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pointless masking being generated for zext values #1637

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llvmbot opened this issue Mar 21, 2007 · 6 comments
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pointless masking being generated for zext values #1637

llvmbot opened this issue Mar 21, 2007 · 6 comments
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@llvmbot
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llvmbot commented Mar 21, 2007

Bugzilla Link 1265
Resolution FIXED
Resolved on Feb 22, 2010 12:46
Version 1.0
OS All
Attachments bytecode before optimization
Reporter LLVM Bugzilla Contributor

Extended Description

Running opt -std-compile-opts on the attached bytecode results in:

    tail call void @​report__test( i64 or (i64 and (i64 zext (i32 ptrtoint 

([7 x i8]* @​str1 to i32) to i64), i64 4294967295), i64 shl (i64 zext (i32
ptrtoint (%struct.string___XUB* @​C.1.384 to i32) to i64), i64 32)) )

Note how an i32 is being zero extended to an i64, then the upper 32 bits of
the result, which are necessarily zero, are being pointlessly masked off.

@llvmbot
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llvmbot commented Mar 21, 2007

assigned to @lattner

@llvmbot
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llvmbot commented Mar 22, 2007

What I don't understand is why the instruction combining pass isn't
eliminating it - it happily eliminates the analogous "and" in various
simpler, artificial, testcases.

@lattner
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lattner commented Mar 25, 2007

The instcombine pass isn't very good at hacking on constant exprs. This should be done by the constant
folding pass.

@lattner
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lattner commented Mar 25, 2007

@llvmbot
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llvmbot commented Mar 25, 2007

Thanks you very much. I feel obliged to point out another possible
simplification though: SExt followed by such an "and" can be turned
into ZExt.

@lattner
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lattner commented Mar 25, 2007

My intention isn't to handle every single case that instcombine does :). If you see a common idiom that a
front-end generates often, we can handle those. Otherwise, they'll get caught by the code generator.

-Chris

@llvmbot llvmbot transferred this issue from llvm/llvm-bugzilla-archive Dec 3, 2021
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