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No support for delayed constants in ARM integrated assembler #18576

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llvmbot opened this issue Dec 11, 2013 · 3 comments
Open

No support for delayed constants in ARM integrated assembler #18576

llvmbot opened this issue Dec 11, 2013 · 3 comments
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backend:ARM bugzilla Issues migrated from bugzilla

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@llvmbot
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llvmbot commented Dec 11, 2013

Bugzilla Link 18202
Version trunk
OS Windows NT
Blocks #19300 #21794
Reporter LLVM Bugzilla Contributor
CC @kbeyls,@rengolin

Extended Description

I have some assembly code that uses .equ to set a symbol to a computed constant. It works in GCC but not LLVM. I am not sure about the correct terminology, but here is an example:

.syntax unified
.equ size, end - start
add r0, r0, #size

start:
.space 0x10
end:

GCC will compile this to add r0, r0, #​16. Compiling with llvm-mc gives:

set.s:4:13: error: invalid operand for instruction
add r0, r0, #size
^
It works for llvm-mc if the #size is set to a constant (e.g. .set size, 0x10).

@rengolin
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This is the same as .set, but neither seem available for ARM assembly. Not sure about other architectures, but I think this should be supported as is.

This is remarkably similar to what exception handling tables do:

.Lset0 = .Leh_func_begin0-.Leh_func_begin0 # >> Call Site 1 <<

So, it's possible that support is already there, but disconnected from this specific case, since this also fails:

.syntax unified
size = end - start
add r0, r0, #size

start:
.space 0x10
end:

I'm not sure this is due to the lack of .set/.equ/= directives (which would have produced an error earlier), I believe this is just an issue with literals using computed constants, since this also fails:

.syntax unified
add r0, r0, #SYM

SYM:
.byte 0x4

@rengolin
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mentioned in issue #19300

@stephenhines
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mentioned in issue #21794

@llvmbot llvmbot transferred this issue from llvm/llvm-bugzilla-archive Dec 9, 2021
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