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[IPRA] Reg Usage Info Collector too aggressive. #28941

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llvmbot opened this issue Jul 15, 2016 · 3 comments
Closed

[IPRA] Reg Usage Info Collector too aggressive. #28941

llvmbot opened this issue Jul 15, 2016 · 3 comments
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bugzilla Issues migrated from bugzilla llvm:regalloc

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@llvmbot
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llvmbot commented Jul 15, 2016

Bugzilla Link 28567
Resolution FIXED
Resolved on Jul 20, 2016 22:52
Version trunk
OS Linux
Reporter LLVM Bugzilla Contributor
CC @joker-eph

Extended Description

==== arm.c ====

char add(char b)
{
return b + 1;
}

==== arm.ll =====
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "armv4t--"

; Function Attrs: minsize norecurse nounwind optsize readnone
define arm_aapcscc zeroext i8 @​add(i8 zeroext %b) {
entry:
%conv = zext i8 %b to i32
%add = add nuw nsw i32 %conv, 1
%conv1 = trunc i32 %add to i8
ret i8 %conv1
}

==== arm.s =====
add: @ @​add
.fnstart
@ BB#0: @ %entry
add r0, r0, #​1
and r0, r0, #​255
bx lr

$ llc -march=arm arm.ll -enable-ipra=true -print-regusage
add Clobbered Registers: R0 R1 R0_R1

I think it should be:
$ llc -march=arm arm.ll -enable-ipra=true -print-regusage
add Clobbered Registers: R0 R0_R1
@llvmbot
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llvmbot commented Jul 15, 2016

I was understanding regmask wrongly. Sorry about that. Current Implementation is correct.

@llvmbot
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llvmbot commented Jul 15, 2016

I don't think current implement is correct because I have a very simple example on X86 where only CL is clobbered than also CH is marked as clobbered :

target triple = "x86_64--"

define i8 @​main(i8 %X) {
%inc = add i8 %X, 1
%inc2 = mul i8 %inc, 5
ret i8 %inc2
}

for above llvm IR generated X86 code is as follow:

main: # @​main
.cfi_startproc

BB#0:

movb	$5, %cl
movl	%edi, %eax
mulb	%cl
addb	$5, %al
retq

So here it is very clear that only CL, CX, RCX, ECX should be marked as clobbered but current implementation marks CH too.

Here is review request https://reviews.llvm.org/D22400 that should fix this.

@llvmbot
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llvmbot commented Jul 21, 2016

Fixed by commit https://reviews.llvm.org/rL276235.

@llvmbot llvmbot transferred this issue from llvm/llvm-bugzilla-archive Dec 10, 2021
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