-
Notifications
You must be signed in to change notification settings - Fork 13.3k
Spills of implicit-defs seem useless #32658
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Comments
Hi Chad, Thanks for the report.
Just from the sound of it that seems legit. If they are used later and can't live in register, we have to put them somewhere. The fact that they are undef on some path may hint some code gen problem, but it is not even sure. Cheers, |
I just created a reproducer: target triple="aarch64--" @g = external global i32 define i32 @foobar() { if.then: if.end: store volatile i32 %v, i32* @g |
Some points about this:
|
I wonder if we actually want to fix that. If I understand correctly, the complain is about spilling undef values, which actually come from the IR. I understand that undef don't need to be spilled by nature, but what about the developer while looking at his code? Wouldn't they think, there is a reg alloc bug, the spill slot is not filed on blah path before being reloaded. In the end, is this a real problem? (Garbage in, garbage out.) Am I missing something? |
Not quite, sometimes a program contains paths that actually cannot happen in practice but the compiler cannot deduce that. A classical pattern would look like this: int x; I wouldn't say it's a big problem, but it's real and worth fixing. |
Argh, I hate code written like that! Anyhow, will look. |
I have the same expectation, which is why I filed a bug rather than attempt a fix myself. That and the fact that this is outside of my area of expertise.
|
I can bugpoint you a test case from mesa, if you're still interested. Sorry for the belated response. |
That's fine, don't bother. |
Fixed in r304752 |
Extended Description
While analyzing the hottest function in SPEC2000/mesa I noticed the following code sequence:
str w8, sp,#260
str w8, sp,#244
str w8, sp,#256
str w8, sp,#248
str w8, sp,#252
str s1, sp,#284
str s1, sp,#280
str s1, sp,#288
str s1, sp,#276
str s1, sp,#272
At first it wasn't clear to me why these instructions weren't being paired by the load store optimizer. These stores are spills of implicit-defs being inserted by the register allocator. AFAICT these implicit-defs are coming from variables that are undefined on some path in the CFG. I think the fix would be to not spill these implicit-defs and update the register allocator's internal data structures accordingly, but this is well outside my area of expertise.
To better understand how frequently this issue occurs I inserted a statistic in the InlineSpiller to count the number of implicit-def spills. Across SPEC200X there were ~200 static spills of which 61 came from SPEC2000/mesa.
The text was updated successfully, but these errors were encountered: