LLVM API Documentation

AArch64BaseInfo.h
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00001 //===-- AArch64BaseInfo.h - Top level definitions for AArch64- --*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains small standalone helper functions and enum definitions for
00011 // the AArch64 target useful for the compiler back-end and the MC libraries.
00012 // As such, it deliberately does not include references to LLVM core
00013 // code gen types, passes, etc..
00014 //
00015 //===----------------------------------------------------------------------===//
00016 
00017 #ifndef LLVM_AARCH64_BASEINFO_H
00018 #define LLVM_AARCH64_BASEINFO_H
00019 
00020 #include "llvm/ADT/STLExtras.h"
00021 #include "llvm/ADT/StringSwitch.h"
00022 #include "llvm/Support/ErrorHandling.h"
00023 
00024 namespace llvm {
00025 
00026 // // Enums corresponding to AArch64 condition codes
00027 namespace A64CC {
00028   // The CondCodes constants map directly to the 4-bit encoding of the
00029   // condition field for predicated instructions.
00030   enum CondCodes {   // Meaning (integer)          Meaning (floating-point)
00031     EQ = 0,        // Equal                      Equal
00032     NE,            // Not equal                  Not equal, or unordered
00033     HS,            // Unsigned higher or same    >, ==, or unordered
00034     LO,            // Unsigned lower or same     Less than
00035     MI,            // Minus, negative            Less than
00036     PL,            // Plus, positive or zero     >, ==, or unordered
00037     VS,            // Overflow                   Unordered
00038     VC,            // No overflow                Ordered
00039     HI,            // Unsigned higher            Greater than, or unordered
00040     LS,            // Unsigned lower or same     Less than or equal
00041     GE,            // Greater than or equal      Greater than or equal
00042     LT,            // Less than                  Less than, or unordered
00043     GT,            // Signed greater than        Greater than
00044     LE,            // Signed less than or equal  <, ==, or unordered
00045     AL,            // Always (unconditional)     Always (unconditional)
00046     NV,             // Always (unconditional)     Always (unconditional)
00047     // Note the NV exists purely to disassemble 0b1111. Execution
00048     // is "always".
00049     Invalid
00050   };
00051 
00052 } // namespace A64CC
00053 
00054 inline static const char *A64CondCodeToString(A64CC::CondCodes CC) {
00055   switch (CC) {
00056   default: llvm_unreachable("Unknown condition code");
00057   case A64CC::EQ:  return "eq";
00058   case A64CC::NE:  return "ne";
00059   case A64CC::HS:  return "hs";
00060   case A64CC::LO:  return "lo";
00061   case A64CC::MI:  return "mi";
00062   case A64CC::PL:  return "pl";
00063   case A64CC::VS:  return "vs";
00064   case A64CC::VC:  return "vc";
00065   case A64CC::HI:  return "hi";
00066   case A64CC::LS:  return "ls";
00067   case A64CC::GE:  return "ge";
00068   case A64CC::LT:  return "lt";
00069   case A64CC::GT:  return "gt";
00070   case A64CC::LE:  return "le";
00071   case A64CC::AL:  return "al";
00072   case A64CC::NV:  return "nv";
00073   }
00074 }
00075 
00076 inline static A64CC::CondCodes A64StringToCondCode(StringRef CondStr) {
00077   return StringSwitch<A64CC::CondCodes>(CondStr.lower())
00078              .Case("eq", A64CC::EQ)
00079              .Case("ne", A64CC::NE)
00080              .Case("ne", A64CC::NE)
00081              .Case("hs", A64CC::HS)
00082              .Case("cs", A64CC::HS)
00083              .Case("lo", A64CC::LO)
00084              .Case("cc", A64CC::LO)
00085              .Case("mi", A64CC::MI)
00086              .Case("pl", A64CC::PL)
00087              .Case("vs", A64CC::VS)
00088              .Case("vc", A64CC::VC)
00089              .Case("hi", A64CC::HI)
00090              .Case("ls", A64CC::LS)
00091              .Case("ge", A64CC::GE)
00092              .Case("lt", A64CC::LT)
00093              .Case("gt", A64CC::GT)
00094              .Case("le", A64CC::LE)
00095              .Case("al", A64CC::AL)
00096              .Case("nv", A64CC::NV)
00097              .Default(A64CC::Invalid);
00098 }
00099 
00100 inline static A64CC::CondCodes A64InvertCondCode(A64CC::CondCodes CC) {
00101   // It turns out that the condition codes have been designed so that in order
00102   // to reverse the intent of the condition you only have to invert the low bit:
00103 
00104   return static_cast<A64CC::CondCodes>(static_cast<unsigned>(CC) ^ 0x1);
00105 }
00106 
00107 /// Instances of this class can perform bidirectional mapping from random
00108 /// identifier strings to operand encodings. For example "MSR" takes a named
00109 /// system-register which must be encoded somehow and decoded for printing. This
00110 /// central location means that the information for those transformations is not
00111 /// duplicated and remains in sync.
00112 ///
00113 /// FIXME: currently the algorithm is a completely unoptimised linear
00114 /// search. Obviously this could be improved, but we would probably want to work
00115 /// out just how often these instructions are emitted before working on it. It
00116 /// might even be optimal to just reorder the tables for the common instructions
00117 /// rather than changing the algorithm.
00118 struct NamedImmMapper {
00119   struct Mapping {
00120     const char *Name;
00121     uint32_t Value;
00122   };
00123 
00124   template<int N>
00125   NamedImmMapper(const Mapping (&Pairs)[N], uint32_t TooBigImm)
00126     : Pairs(&Pairs[0]), NumPairs(N), TooBigImm(TooBigImm) {}
00127 
00128   StringRef toString(uint32_t Value, bool &Valid) const;
00129   uint32_t fromString(StringRef Name, bool &Valid) const;
00130 
00131   /// Many of the instructions allow an alternative assembly form consisting of
00132   /// a simple immediate. Currently the only valid forms are ranges [0, N) where
00133   /// N being 0 indicates no immediate syntax-form is allowed.
00134   bool validImm(uint32_t Value) const;
00135 protected:
00136   const Mapping *Pairs;
00137   size_t NumPairs;
00138   uint32_t TooBigImm;
00139 };
00140 
00141 namespace A64AT {
00142   enum ATValues {
00143     Invalid = -1,    // Op0 Op1  CRn   CRm   Op2
00144     S1E1R = 0x43c0,  // 01  000  0111  1000  000
00145     S1E2R = 0x63c0,  // 01  100  0111  1000  000
00146     S1E3R = 0x73c0,  // 01  110  0111  1000  000
00147     S1E1W = 0x43c1,  // 01  000  0111  1000  001
00148     S1E2W = 0x63c1,  // 01  100  0111  1000  001
00149     S1E3W = 0x73c1,  // 01  110  0111  1000  001
00150     S1E0R = 0x43c2,  // 01  000  0111  1000  010
00151     S1E0W = 0x43c3,  // 01  000  0111  1000  011
00152     S12E1R = 0x63c4, // 01  100  0111  1000  100
00153     S12E1W = 0x63c5, // 01  100  0111  1000  101
00154     S12E0R = 0x63c6, // 01  100  0111  1000  110
00155     S12E0W = 0x63c7  // 01  100  0111  1000  111
00156   };
00157 
00158   struct ATMapper : NamedImmMapper {
00159     const static Mapping ATPairs[];
00160 
00161     ATMapper();
00162   };
00163 
00164 }
00165 namespace A64DB {
00166   enum DBValues {
00167     Invalid = -1,
00168     OSHLD = 0x1,
00169     OSHST = 0x2,
00170     OSH =   0x3,
00171     NSHLD = 0x5,
00172     NSHST = 0x6,
00173     NSH =   0x7,
00174     ISHLD = 0x9,
00175     ISHST = 0xa,
00176     ISH =   0xb,
00177     LD =    0xd,
00178     ST =    0xe,
00179     SY =    0xf
00180   };
00181 
00182   struct DBarrierMapper : NamedImmMapper {
00183     const static Mapping DBarrierPairs[];
00184 
00185     DBarrierMapper();
00186   };
00187 }
00188 
00189 namespace  A64DC {
00190   enum DCValues {
00191     Invalid = -1,   // Op1  CRn   CRm   Op2
00192     ZVA   = 0x5ba1, // 01  011  0111  0100  001
00193     IVAC  = 0x43b1, // 01  000  0111  0110  001
00194     ISW   = 0x43b2, // 01  000  0111  0110  010
00195     CVAC  = 0x5bd1, // 01  011  0111  1010  001
00196     CSW   = 0x43d2, // 01  000  0111  1010  010
00197     CVAU  = 0x5bd9, // 01  011  0111  1011  001
00198     CIVAC = 0x5bf1, // 01  011  0111  1110  001
00199     CISW  = 0x43f2  // 01  000  0111  1110  010
00200   };
00201 
00202   struct DCMapper : NamedImmMapper {
00203     const static Mapping DCPairs[];
00204 
00205     DCMapper();
00206   };
00207 
00208 }
00209 
00210 namespace  A64IC {
00211   enum ICValues {
00212     Invalid = -1,     // Op1  CRn   CRm   Op2
00213     IALLUIS = 0x0388, // 000  0111  0001  000
00214     IALLU = 0x03a8,   // 000  0111  0101  000
00215     IVAU = 0x1ba9     // 011  0111  0101  001
00216   };
00217 
00218 
00219   struct ICMapper : NamedImmMapper {
00220     const static Mapping ICPairs[];
00221 
00222     ICMapper();
00223   };
00224 
00225   static inline bool NeedsRegister(ICValues Val) {
00226     return Val == IVAU;
00227   }
00228 }
00229 
00230 namespace  A64ISB {
00231   enum ISBValues {
00232     Invalid = -1,
00233     SY = 0xf
00234   };
00235   struct ISBMapper : NamedImmMapper {
00236     const static Mapping ISBPairs[];
00237 
00238     ISBMapper();
00239   };
00240 }
00241 
00242 namespace A64PRFM {
00243   enum PRFMValues {
00244     Invalid = -1,
00245     PLDL1KEEP = 0x00,
00246     PLDL1STRM = 0x01,
00247     PLDL2KEEP = 0x02,
00248     PLDL2STRM = 0x03,
00249     PLDL3KEEP = 0x04,
00250     PLDL3STRM = 0x05,
00251     PLIL1KEEP = 0x08,
00252     PLIL1STRM = 0x09,
00253     PLIL2KEEP = 0x0a,
00254     PLIL2STRM = 0x0b,
00255     PLIL3KEEP = 0x0c,
00256     PLIL3STRM = 0x0d,
00257     PSTL1KEEP = 0x10,
00258     PSTL1STRM = 0x11,
00259     PSTL2KEEP = 0x12,
00260     PSTL2STRM = 0x13,
00261     PSTL3KEEP = 0x14,
00262     PSTL3STRM = 0x15
00263   };
00264 
00265   struct PRFMMapper : NamedImmMapper {
00266     const static Mapping PRFMPairs[];
00267 
00268     PRFMMapper();
00269   };
00270 }
00271 
00272 namespace A64PState {
00273   enum PStateValues {
00274     Invalid = -1,
00275     SPSel = 0x05,
00276     DAIFSet = 0x1e,
00277     DAIFClr = 0x1f
00278   };
00279 
00280   struct PStateMapper : NamedImmMapper {
00281     const static Mapping PStatePairs[];
00282 
00283     PStateMapper();
00284   };
00285 
00286 }
00287 
00288 namespace A64SE {
00289     enum ShiftExtSpecifiers {
00290         Invalid = -1,
00291         LSL,
00292         MSL,
00293         LSR,
00294         ASR,
00295         ROR,
00296 
00297         UXTB,
00298         UXTH,
00299         UXTW,
00300         UXTX,
00301 
00302         SXTB,
00303         SXTH,
00304         SXTW,
00305         SXTX
00306     };
00307 }
00308 
00309 namespace A64Layout {
00310     enum VectorLayout {
00311         Invalid = -1,
00312         VL_8B,
00313         VL_4H,
00314         VL_2S,
00315         VL_1D,
00316 
00317         VL_16B,
00318         VL_8H,
00319         VL_4S,
00320         VL_2D,
00321 
00322         // Bare layout for the 128-bit vector
00323         // (only show ".b", ".h", ".s", ".d" without vector number)
00324         VL_B,
00325         VL_H,
00326         VL_S,
00327         VL_D
00328     };
00329 }
00330 
00331 inline static const char *
00332 A64VectorLayoutToString(A64Layout::VectorLayout Layout) {
00333   switch (Layout) {
00334   case A64Layout::VL_8B:  return ".8b";
00335   case A64Layout::VL_4H:  return ".4h";
00336   case A64Layout::VL_2S:  return ".2s";
00337   case A64Layout::VL_1D:  return ".1d";
00338   case A64Layout::VL_16B:  return ".16b";
00339   case A64Layout::VL_8H:  return ".8h";
00340   case A64Layout::VL_4S:  return ".4s";
00341   case A64Layout::VL_2D:  return ".2d";
00342   case A64Layout::VL_B:  return ".b";
00343   case A64Layout::VL_H:  return ".h";
00344   case A64Layout::VL_S:  return ".s";
00345   case A64Layout::VL_D:  return ".d";
00346   default: llvm_unreachable("Unknown Vector Layout");
00347   }
00348 }
00349 
00350 inline static A64Layout::VectorLayout
00351 A64StringToVectorLayout(StringRef LayoutStr) {
00352   return StringSwitch<A64Layout::VectorLayout>(LayoutStr)
00353              .Case(".8b", A64Layout::VL_8B)
00354              .Case(".4h", A64Layout::VL_4H)
00355              .Case(".2s", A64Layout::VL_2S)
00356              .Case(".1d", A64Layout::VL_1D)
00357              .Case(".16b", A64Layout::VL_16B)
00358              .Case(".8h", A64Layout::VL_8H)
00359              .Case(".4s", A64Layout::VL_4S)
00360              .Case(".2d", A64Layout::VL_2D)
00361              .Case(".b", A64Layout::VL_B)
00362              .Case(".h", A64Layout::VL_H)
00363              .Case(".s", A64Layout::VL_S)
00364              .Case(".d", A64Layout::VL_D)
00365              .Default(A64Layout::Invalid);
00366 }
00367 
00368 namespace A64SysReg {
00369   enum SysRegROValues {
00370     MDCCSR_EL0        = 0x9808, // 10  011  0000  0001  000
00371     DBGDTRRX_EL0      = 0x9828, // 10  011  0000  0101  000
00372     MDRAR_EL1         = 0x8080, // 10  000  0001  0000  000
00373     OSLSR_EL1         = 0x808c, // 10  000  0001  0001  100
00374     DBGAUTHSTATUS_EL1 = 0x83f6, // 10  000  0111  1110  110
00375     PMCEID0_EL0       = 0xdce6, // 11  011  1001  1100  110
00376     PMCEID1_EL0       = 0xdce7, // 11  011  1001  1100  111
00377     MIDR_EL1          = 0xc000, // 11  000  0000  0000  000
00378     CCSIDR_EL1        = 0xc800, // 11  001  0000  0000  000
00379     CLIDR_EL1         = 0xc801, // 11  001  0000  0000  001
00380     CTR_EL0           = 0xd801, // 11  011  0000  0000  001
00381     MPIDR_EL1         = 0xc005, // 11  000  0000  0000  101
00382     REVIDR_EL1        = 0xc006, // 11  000  0000  0000  110
00383     AIDR_EL1          = 0xc807, // 11  001  0000  0000  111
00384     DCZID_EL0         = 0xd807, // 11  011  0000  0000  111
00385     ID_PFR0_EL1       = 0xc008, // 11  000  0000  0001  000
00386     ID_PFR1_EL1       = 0xc009, // 11  000  0000  0001  001
00387     ID_DFR0_EL1       = 0xc00a, // 11  000  0000  0001  010
00388     ID_AFR0_EL1       = 0xc00b, // 11  000  0000  0001  011
00389     ID_MMFR0_EL1      = 0xc00c, // 11  000  0000  0001  100
00390     ID_MMFR1_EL1      = 0xc00d, // 11  000  0000  0001  101
00391     ID_MMFR2_EL1      = 0xc00e, // 11  000  0000  0001  110
00392     ID_MMFR3_EL1      = 0xc00f, // 11  000  0000  0001  111
00393     ID_ISAR0_EL1      = 0xc010, // 11  000  0000  0010  000
00394     ID_ISAR1_EL1      = 0xc011, // 11  000  0000  0010  001
00395     ID_ISAR2_EL1      = 0xc012, // 11  000  0000  0010  010
00396     ID_ISAR3_EL1      = 0xc013, // 11  000  0000  0010  011
00397     ID_ISAR4_EL1      = 0xc014, // 11  000  0000  0010  100
00398     ID_ISAR5_EL1      = 0xc015, // 11  000  0000  0010  101
00399     ID_AA64PFR0_EL1   = 0xc020, // 11  000  0000  0100  000
00400     ID_AA64PFR1_EL1   = 0xc021, // 11  000  0000  0100  001
00401     ID_AA64DFR0_EL1   = 0xc028, // 11  000  0000  0101  000
00402     ID_AA64DFR1_EL1   = 0xc029, // 11  000  0000  0101  001
00403     ID_AA64AFR0_EL1   = 0xc02c, // 11  000  0000  0101  100
00404     ID_AA64AFR1_EL1   = 0xc02d, // 11  000  0000  0101  101
00405     ID_AA64ISAR0_EL1  = 0xc030, // 11  000  0000  0110  000
00406     ID_AA64ISAR1_EL1  = 0xc031, // 11  000  0000  0110  001
00407     ID_AA64MMFR0_EL1  = 0xc038, // 11  000  0000  0111  000
00408     ID_AA64MMFR1_EL1  = 0xc039, // 11  000  0000  0111  001
00409     MVFR0_EL1         = 0xc018, // 11  000  0000  0011  000
00410     MVFR1_EL1         = 0xc019, // 11  000  0000  0011  001
00411     MVFR2_EL1         = 0xc01a, // 11  000  0000  0011  010
00412     RVBAR_EL1         = 0xc601, // 11  000  1100  0000  001
00413     RVBAR_EL2         = 0xe601, // 11  100  1100  0000  001
00414     RVBAR_EL3         = 0xf601, // 11  110  1100  0000  001
00415     ISR_EL1           = 0xc608, // 11  000  1100  0001  000
00416     CNTPCT_EL0        = 0xdf01, // 11  011  1110  0000  001
00417     CNTVCT_EL0        = 0xdf02,  // 11  011  1110  0000  010
00418 
00419     // Trace registers
00420     TRCSTATR          = 0x8818, // 10  001  0000  0011  000
00421     TRCIDR8           = 0x8806, // 10  001  0000  0000  110
00422     TRCIDR9           = 0x880e, // 10  001  0000  0001  110
00423     TRCIDR10          = 0x8816, // 10  001  0000  0010  110
00424     TRCIDR11          = 0x881e, // 10  001  0000  0011  110
00425     TRCIDR12          = 0x8826, // 10  001  0000  0100  110
00426     TRCIDR13          = 0x882e, // 10  001  0000  0101  110
00427     TRCIDR0           = 0x8847, // 10  001  0000  1000  111
00428     TRCIDR1           = 0x884f, // 10  001  0000  1001  111
00429     TRCIDR2           = 0x8857, // 10  001  0000  1010  111
00430     TRCIDR3           = 0x885f, // 10  001  0000  1011  111
00431     TRCIDR4           = 0x8867, // 10  001  0000  1100  111
00432     TRCIDR5           = 0x886f, // 10  001  0000  1101  111
00433     TRCIDR6           = 0x8877, // 10  001  0000  1110  111
00434     TRCIDR7           = 0x887f, // 10  001  0000  1111  111
00435     TRCOSLSR          = 0x888c, // 10  001  0001  0001  100
00436     TRCPDSR           = 0x88ac, // 10  001  0001  0101  100
00437     TRCDEVAFF0        = 0x8bd6, // 10  001  0111  1010  110
00438     TRCDEVAFF1        = 0x8bde, // 10  001  0111  1011  110
00439     TRCLSR            = 0x8bee, // 10  001  0111  1101  110
00440     TRCAUTHSTATUS     = 0x8bf6, // 10  001  0111  1110  110
00441     TRCDEVARCH        = 0x8bfe, // 10  001  0111  1111  110
00442     TRCDEVID          = 0x8b97, // 10  001  0111  0010  111
00443     TRCDEVTYPE        = 0x8b9f, // 10  001  0111  0011  111
00444     TRCPIDR4          = 0x8ba7, // 10  001  0111  0100  111
00445     TRCPIDR5          = 0x8baf, // 10  001  0111  0101  111
00446     TRCPIDR6          = 0x8bb7, // 10  001  0111  0110  111
00447     TRCPIDR7          = 0x8bbf, // 10  001  0111  0111  111
00448     TRCPIDR0          = 0x8bc7, // 10  001  0111  1000  111
00449     TRCPIDR1          = 0x8bcf, // 10  001  0111  1001  111
00450     TRCPIDR2          = 0x8bd7, // 10  001  0111  1010  111
00451     TRCPIDR3          = 0x8bdf, // 10  001  0111  1011  111
00452     TRCCIDR0          = 0x8be7, // 10  001  0111  1100  111
00453     TRCCIDR1          = 0x8bef, // 10  001  0111  1101  111
00454     TRCCIDR2          = 0x8bf7, // 10  001  0111  1110  111
00455     TRCCIDR3          = 0x8bff, // 10  001  0111  1111  111
00456 
00457     // GICv3 registers
00458     ICC_IAR1_EL1      = 0xc660, // 11  000  1100  1100  000
00459     ICC_IAR0_EL1      = 0xc640, // 11  000  1100  1000  000
00460     ICC_HPPIR1_EL1    = 0xc662, // 11  000  1100  1100  010
00461     ICC_HPPIR0_EL1    = 0xc642, // 11  000  1100  1000  010
00462     ICC_RPR_EL1       = 0xc65b, // 11  000  1100  1011  011
00463     ICH_VTR_EL2       = 0xe659, // 11  100  1100  1011  001
00464     ICH_EISR_EL2      = 0xe65b, // 11  100  1100  1011  011
00465     ICH_ELSR_EL2      = 0xe65d  // 11  100  1100  1011  101
00466   };
00467 
00468   enum SysRegWOValues {
00469     DBGDTRTX_EL0      = 0x9828, // 10  011  0000  0101  000
00470     OSLAR_EL1         = 0x8084, // 10  000  0001  0000  100
00471     PMSWINC_EL0       = 0xdce4,  // 11  011  1001  1100  100
00472 
00473     // Trace Registers
00474     TRCOSLAR          = 0x8884, // 10  001  0001  0000  100
00475     TRCLAR            = 0x8be6, // 10  001  0111  1100  110
00476 
00477     // GICv3 registers
00478     ICC_EOIR1_EL1     = 0xc661, // 11  000  1100  1100  001
00479     ICC_EOIR0_EL1     = 0xc641, // 11  000  1100  1000  001
00480     ICC_DIR_EL1       = 0xc659, // 11  000  1100  1011  001
00481     ICC_SGI1R_EL1     = 0xc65d, // 11  000  1100  1011  101
00482     ICC_ASGI1R_EL1    = 0xc65e, // 11  000  1100  1011  110
00483     ICC_SGI0R_EL1     = 0xc65f  // 11  000  1100  1011  111
00484   };
00485 
00486   enum SysRegValues {
00487     Invalid = -1,               // Op0 Op1  CRn   CRm   Op2
00488     OSDTRRX_EL1       = 0x8002, // 10  000  0000  0000  010
00489     OSDTRTX_EL1       = 0x801a, // 10  000  0000  0011  010
00490     TEECR32_EL1       = 0x9000, // 10  010  0000  0000  000
00491     MDCCINT_EL1       = 0x8010, // 10  000  0000  0010  000
00492     MDSCR_EL1         = 0x8012, // 10  000  0000  0010  010
00493     DBGDTR_EL0        = 0x9820, // 10  011  0000  0100  000
00494     OSECCR_EL1        = 0x8032, // 10  000  0000  0110  010
00495     DBGVCR32_EL2      = 0xa038, // 10  100  0000  0111  000
00496     DBGBVR0_EL1       = 0x8004, // 10  000  0000  0000  100
00497     DBGBVR1_EL1       = 0x800c, // 10  000  0000  0001  100
00498     DBGBVR2_EL1       = 0x8014, // 10  000  0000  0010  100
00499     DBGBVR3_EL1       = 0x801c, // 10  000  0000  0011  100
00500     DBGBVR4_EL1       = 0x8024, // 10  000  0000  0100  100
00501     DBGBVR5_EL1       = 0x802c, // 10  000  0000  0101  100
00502     DBGBVR6_EL1       = 0x8034, // 10  000  0000  0110  100
00503     DBGBVR7_EL1       = 0x803c, // 10  000  0000  0111  100
00504     DBGBVR8_EL1       = 0x8044, // 10  000  0000  1000  100
00505     DBGBVR9_EL1       = 0x804c, // 10  000  0000  1001  100
00506     DBGBVR10_EL1      = 0x8054, // 10  000  0000  1010  100
00507     DBGBVR11_EL1      = 0x805c, // 10  000  0000  1011  100
00508     DBGBVR12_EL1      = 0x8064, // 10  000  0000  1100  100
00509     DBGBVR13_EL1      = 0x806c, // 10  000  0000  1101  100
00510     DBGBVR14_EL1      = 0x8074, // 10  000  0000  1110  100
00511     DBGBVR15_EL1      = 0x807c, // 10  000  0000  1111  100
00512     DBGBCR0_EL1       = 0x8005, // 10  000  0000  0000  101
00513     DBGBCR1_EL1       = 0x800d, // 10  000  0000  0001  101
00514     DBGBCR2_EL1       = 0x8015, // 10  000  0000  0010  101
00515     DBGBCR3_EL1       = 0x801d, // 10  000  0000  0011  101
00516     DBGBCR4_EL1       = 0x8025, // 10  000  0000  0100  101
00517     DBGBCR5_EL1       = 0x802d, // 10  000  0000  0101  101
00518     DBGBCR6_EL1       = 0x8035, // 10  000  0000  0110  101
00519     DBGBCR7_EL1       = 0x803d, // 10  000  0000  0111  101
00520     DBGBCR8_EL1       = 0x8045, // 10  000  0000  1000  101
00521     DBGBCR9_EL1       = 0x804d, // 10  000  0000  1001  101
00522     DBGBCR10_EL1      = 0x8055, // 10  000  0000  1010  101
00523     DBGBCR11_EL1      = 0x805d, // 10  000  0000  1011  101
00524     DBGBCR12_EL1      = 0x8065, // 10  000  0000  1100  101
00525     DBGBCR13_EL1      = 0x806d, // 10  000  0000  1101  101
00526     DBGBCR14_EL1      = 0x8075, // 10  000  0000  1110  101
00527     DBGBCR15_EL1      = 0x807d, // 10  000  0000  1111  101
00528     DBGWVR0_EL1       = 0x8006, // 10  000  0000  0000  110
00529     DBGWVR1_EL1       = 0x800e, // 10  000  0000  0001  110
00530     DBGWVR2_EL1       = 0x8016, // 10  000  0000  0010  110
00531     DBGWVR3_EL1       = 0x801e, // 10  000  0000  0011  110
00532     DBGWVR4_EL1       = 0x8026, // 10  000  0000  0100  110
00533     DBGWVR5_EL1       = 0x802e, // 10  000  0000  0101  110
00534     DBGWVR6_EL1       = 0x8036, // 10  000  0000  0110  110
00535     DBGWVR7_EL1       = 0x803e, // 10  000  0000  0111  110
00536     DBGWVR8_EL1       = 0x8046, // 10  000  0000  1000  110
00537     DBGWVR9_EL1       = 0x804e, // 10  000  0000  1001  110
00538     DBGWVR10_EL1      = 0x8056, // 10  000  0000  1010  110
00539     DBGWVR11_EL1      = 0x805e, // 10  000  0000  1011  110
00540     DBGWVR12_EL1      = 0x8066, // 10  000  0000  1100  110
00541     DBGWVR13_EL1      = 0x806e, // 10  000  0000  1101  110
00542     DBGWVR14_EL1      = 0x8076, // 10  000  0000  1110  110
00543     DBGWVR15_EL1      = 0x807e, // 10  000  0000  1111  110
00544     DBGWCR0_EL1       = 0x8007, // 10  000  0000  0000  111
00545     DBGWCR1_EL1       = 0x800f, // 10  000  0000  0001  111
00546     DBGWCR2_EL1       = 0x8017, // 10  000  0000  0010  111
00547     DBGWCR3_EL1       = 0x801f, // 10  000  0000  0011  111
00548     DBGWCR4_EL1       = 0x8027, // 10  000  0000  0100  111
00549     DBGWCR5_EL1       = 0x802f, // 10  000  0000  0101  111
00550     DBGWCR6_EL1       = 0x8037, // 10  000  0000  0110  111
00551     DBGWCR7_EL1       = 0x803f, // 10  000  0000  0111  111
00552     DBGWCR8_EL1       = 0x8047, // 10  000  0000  1000  111
00553     DBGWCR9_EL1       = 0x804f, // 10  000  0000  1001  111
00554     DBGWCR10_EL1      = 0x8057, // 10  000  0000  1010  111
00555     DBGWCR11_EL1      = 0x805f, // 10  000  0000  1011  111
00556     DBGWCR12_EL1      = 0x8067, // 10  000  0000  1100  111
00557     DBGWCR13_EL1      = 0x806f, // 10  000  0000  1101  111
00558     DBGWCR14_EL1      = 0x8077, // 10  000  0000  1110  111
00559     DBGWCR15_EL1      = 0x807f, // 10  000  0000  1111  111
00560     TEEHBR32_EL1      = 0x9080, // 10  010  0001  0000  000
00561     OSDLR_EL1         = 0x809c, // 10  000  0001  0011  100
00562     DBGPRCR_EL1       = 0x80a4, // 10  000  0001  0100  100
00563     DBGCLAIMSET_EL1   = 0x83c6, // 10  000  0111  1000  110
00564     DBGCLAIMCLR_EL1   = 0x83ce, // 10  000  0111  1001  110
00565     CSSELR_EL1        = 0xd000, // 11  010  0000  0000  000
00566     VPIDR_EL2         = 0xe000, // 11  100  0000  0000  000
00567     VMPIDR_EL2        = 0xe005, // 11  100  0000  0000  101
00568     CPACR_EL1         = 0xc082, // 11  000  0001  0000  010
00569     SCTLR_EL1         = 0xc080, // 11  000  0001  0000  000
00570     SCTLR_EL2         = 0xe080, // 11  100  0001  0000  000
00571     SCTLR_EL3         = 0xf080, // 11  110  0001  0000  000
00572     ACTLR_EL1         = 0xc081, // 11  000  0001  0000  001
00573     ACTLR_EL2         = 0xe081, // 11  100  0001  0000  001
00574     ACTLR_EL3         = 0xf081, // 11  110  0001  0000  001
00575     HCR_EL2           = 0xe088, // 11  100  0001  0001  000
00576     SCR_EL3           = 0xf088, // 11  110  0001  0001  000
00577     MDCR_EL2          = 0xe089, // 11  100  0001  0001  001
00578     SDER32_EL3        = 0xf089, // 11  110  0001  0001  001
00579     CPTR_EL2          = 0xe08a, // 11  100  0001  0001  010
00580     CPTR_EL3          = 0xf08a, // 11  110  0001  0001  010
00581     HSTR_EL2          = 0xe08b, // 11  100  0001  0001  011
00582     HACR_EL2          = 0xe08f, // 11  100  0001  0001  111
00583     MDCR_EL3          = 0xf099, // 11  110  0001  0011  001
00584     TTBR0_EL1         = 0xc100, // 11  000  0010  0000  000
00585     TTBR0_EL2         = 0xe100, // 11  100  0010  0000  000
00586     TTBR0_EL3         = 0xf100, // 11  110  0010  0000  000
00587     TTBR1_EL1         = 0xc101, // 11  000  0010  0000  001
00588     TCR_EL1           = 0xc102, // 11  000  0010  0000  010
00589     TCR_EL2           = 0xe102, // 11  100  0010  0000  010
00590     TCR_EL3           = 0xf102, // 11  110  0010  0000  010
00591     VTTBR_EL2         = 0xe108, // 11  100  0010  0001  000
00592     VTCR_EL2          = 0xe10a, // 11  100  0010  0001  010
00593     DACR32_EL2        = 0xe180, // 11  100  0011  0000  000
00594     SPSR_EL1          = 0xc200, // 11  000  0100  0000  000
00595     SPSR_EL2          = 0xe200, // 11  100  0100  0000  000
00596     SPSR_EL3          = 0xf200, // 11  110  0100  0000  000
00597     ELR_EL1           = 0xc201, // 11  000  0100  0000  001
00598     ELR_EL2           = 0xe201, // 11  100  0100  0000  001
00599     ELR_EL3           = 0xf201, // 11  110  0100  0000  001
00600     SP_EL0            = 0xc208, // 11  000  0100  0001  000
00601     SP_EL1            = 0xe208, // 11  100  0100  0001  000
00602     SP_EL2            = 0xf208, // 11  110  0100  0001  000
00603     SPSel             = 0xc210, // 11  000  0100  0010  000
00604     NZCV              = 0xda10, // 11  011  0100  0010  000
00605     DAIF              = 0xda11, // 11  011  0100  0010  001
00606     CurrentEL         = 0xc212, // 11  000  0100  0010  010
00607     SPSR_irq          = 0xe218, // 11  100  0100  0011  000
00608     SPSR_abt          = 0xe219, // 11  100  0100  0011  001
00609     SPSR_und          = 0xe21a, // 11  100  0100  0011  010
00610     SPSR_fiq          = 0xe21b, // 11  100  0100  0011  011
00611     FPCR              = 0xda20, // 11  011  0100  0100  000
00612     FPSR              = 0xda21, // 11  011  0100  0100  001
00613     DSPSR_EL0         = 0xda28, // 11  011  0100  0101  000
00614     DLR_EL0           = 0xda29, // 11  011  0100  0101  001
00615     IFSR32_EL2        = 0xe281, // 11  100  0101  0000  001
00616     AFSR0_EL1         = 0xc288, // 11  000  0101  0001  000
00617     AFSR0_EL2         = 0xe288, // 11  100  0101  0001  000
00618     AFSR0_EL3         = 0xf288, // 11  110  0101  0001  000
00619     AFSR1_EL1         = 0xc289, // 11  000  0101  0001  001
00620     AFSR1_EL2         = 0xe289, // 11  100  0101  0001  001
00621     AFSR1_EL3         = 0xf289, // 11  110  0101  0001  001
00622     ESR_EL1           = 0xc290, // 11  000  0101  0010  000
00623     ESR_EL2           = 0xe290, // 11  100  0101  0010  000
00624     ESR_EL3           = 0xf290, // 11  110  0101  0010  000
00625     FPEXC32_EL2       = 0xe298, // 11  100  0101  0011  000
00626     FAR_EL1           = 0xc300, // 11  000  0110  0000  000
00627     FAR_EL2           = 0xe300, // 11  100  0110  0000  000
00628     FAR_EL3           = 0xf300, // 11  110  0110  0000  000
00629     HPFAR_EL2         = 0xe304, // 11  100  0110  0000  100
00630     PAR_EL1           = 0xc3a0, // 11  000  0111  0100  000
00631     PMCR_EL0          = 0xdce0, // 11  011  1001  1100  000
00632     PMCNTENSET_EL0    = 0xdce1, // 11  011  1001  1100  001
00633     PMCNTENCLR_EL0    = 0xdce2, // 11  011  1001  1100  010
00634     PMOVSCLR_EL0      = 0xdce3, // 11  011  1001  1100  011
00635     PMSELR_EL0        = 0xdce5, // 11  011  1001  1100  101
00636     PMCCNTR_EL0       = 0xdce8, // 11  011  1001  1101  000
00637     PMXEVTYPER_EL0    = 0xdce9, // 11  011  1001  1101  001
00638     PMXEVCNTR_EL0     = 0xdcea, // 11  011  1001  1101  010
00639     PMUSERENR_EL0     = 0xdcf0, // 11  011  1001  1110  000
00640     PMINTENSET_EL1    = 0xc4f1, // 11  000  1001  1110  001
00641     PMINTENCLR_EL1    = 0xc4f2, // 11  000  1001  1110  010
00642     PMOVSSET_EL0      = 0xdcf3, // 11  011  1001  1110  011
00643     MAIR_EL1          = 0xc510, // 11  000  1010  0010  000
00644     MAIR_EL2          = 0xe510, // 11  100  1010  0010  000
00645     MAIR_EL3          = 0xf510, // 11  110  1010  0010  000
00646     AMAIR_EL1         = 0xc518, // 11  000  1010  0011  000
00647     AMAIR_EL2         = 0xe518, // 11  100  1010  0011  000
00648     AMAIR_EL3         = 0xf518, // 11  110  1010  0011  000
00649     VBAR_EL1          = 0xc600, // 11  000  1100  0000  000
00650     VBAR_EL2          = 0xe600, // 11  100  1100  0000  000
00651     VBAR_EL3          = 0xf600, // 11  110  1100  0000  000
00652     RMR_EL1           = 0xc602, // 11  000  1100  0000  010
00653     RMR_EL2           = 0xe602, // 11  100  1100  0000  010
00654     RMR_EL3           = 0xf602, // 11  110  1100  0000  010
00655     CONTEXTIDR_EL1    = 0xc681, // 11  000  1101  0000  001
00656     TPIDR_EL0         = 0xde82, // 11  011  1101  0000  010
00657     TPIDR_EL2         = 0xe682, // 11  100  1101  0000  010
00658     TPIDR_EL3         = 0xf682, // 11  110  1101  0000  010
00659     TPIDRRO_EL0       = 0xde83, // 11  011  1101  0000  011
00660     TPIDR_EL1         = 0xc684, // 11  000  1101  0000  100
00661     CNTFRQ_EL0        = 0xdf00, // 11  011  1110  0000  000
00662     CNTVOFF_EL2       = 0xe703, // 11  100  1110  0000  011
00663     CNTKCTL_EL1       = 0xc708, // 11  000  1110  0001  000
00664     CNTHCTL_EL2       = 0xe708, // 11  100  1110  0001  000
00665     CNTP_TVAL_EL0     = 0xdf10, // 11  011  1110  0010  000
00666     CNTHP_TVAL_EL2    = 0xe710, // 11  100  1110  0010  000
00667     CNTPS_TVAL_EL1    = 0xff10, // 11  111  1110  0010  000
00668     CNTP_CTL_EL0      = 0xdf11, // 11  011  1110  0010  001
00669     CNTHP_CTL_EL2     = 0xe711, // 11  100  1110  0010  001
00670     CNTPS_CTL_EL1     = 0xff11, // 11  111  1110  0010  001
00671     CNTP_CVAL_EL0     = 0xdf12, // 11  011  1110  0010  010
00672     CNTHP_CVAL_EL2    = 0xe712, // 11  100  1110  0010  010
00673     CNTPS_CVAL_EL1    = 0xff12, // 11  111  1110  0010  010
00674     CNTV_TVAL_EL0     = 0xdf18, // 11  011  1110  0011  000
00675     CNTV_CTL_EL0      = 0xdf19, // 11  011  1110  0011  001
00676     CNTV_CVAL_EL0     = 0xdf1a, // 11  011  1110  0011  010
00677     PMEVCNTR0_EL0     = 0xdf40, // 11  011  1110  1000  000
00678     PMEVCNTR1_EL0     = 0xdf41, // 11  011  1110  1000  001
00679     PMEVCNTR2_EL0     = 0xdf42, // 11  011  1110  1000  010
00680     PMEVCNTR3_EL0     = 0xdf43, // 11  011  1110  1000  011
00681     PMEVCNTR4_EL0     = 0xdf44, // 11  011  1110  1000  100
00682     PMEVCNTR5_EL0     = 0xdf45, // 11  011  1110  1000  101
00683     PMEVCNTR6_EL0     = 0xdf46, // 11  011  1110  1000  110
00684     PMEVCNTR7_EL0     = 0xdf47, // 11  011  1110  1000  111
00685     PMEVCNTR8_EL0     = 0xdf48, // 11  011  1110  1001  000
00686     PMEVCNTR9_EL0     = 0xdf49, // 11  011  1110  1001  001
00687     PMEVCNTR10_EL0    = 0xdf4a, // 11  011  1110  1001  010
00688     PMEVCNTR11_EL0    = 0xdf4b, // 11  011  1110  1001  011
00689     PMEVCNTR12_EL0    = 0xdf4c, // 11  011  1110  1001  100
00690     PMEVCNTR13_EL0    = 0xdf4d, // 11  011  1110  1001  101
00691     PMEVCNTR14_EL0    = 0xdf4e, // 11  011  1110  1001  110
00692     PMEVCNTR15_EL0    = 0xdf4f, // 11  011  1110  1001  111
00693     PMEVCNTR16_EL0    = 0xdf50, // 11  011  1110  1010  000
00694     PMEVCNTR17_EL0    = 0xdf51, // 11  011  1110  1010  001
00695     PMEVCNTR18_EL0    = 0xdf52, // 11  011  1110  1010  010
00696     PMEVCNTR19_EL0    = 0xdf53, // 11  011  1110  1010  011
00697     PMEVCNTR20_EL0    = 0xdf54, // 11  011  1110  1010  100
00698     PMEVCNTR21_EL0    = 0xdf55, // 11  011  1110  1010  101
00699     PMEVCNTR22_EL0    = 0xdf56, // 11  011  1110  1010  110
00700     PMEVCNTR23_EL0    = 0xdf57, // 11  011  1110  1010  111
00701     PMEVCNTR24_EL0    = 0xdf58, // 11  011  1110  1011  000
00702     PMEVCNTR25_EL0    = 0xdf59, // 11  011  1110  1011  001
00703     PMEVCNTR26_EL0    = 0xdf5a, // 11  011  1110  1011  010
00704     PMEVCNTR27_EL0    = 0xdf5b, // 11  011  1110  1011  011
00705     PMEVCNTR28_EL0    = 0xdf5c, // 11  011  1110  1011  100
00706     PMEVCNTR29_EL0    = 0xdf5d, // 11  011  1110  1011  101
00707     PMEVCNTR30_EL0    = 0xdf5e, // 11  011  1110  1011  110
00708     PMCCFILTR_EL0     = 0xdf7f, // 11  011  1110  1111  111
00709     PMEVTYPER0_EL0    = 0xdf60, // 11  011  1110  1100  000
00710     PMEVTYPER1_EL0    = 0xdf61, // 11  011  1110  1100  001
00711     PMEVTYPER2_EL0    = 0xdf62, // 11  011  1110  1100  010
00712     PMEVTYPER3_EL0    = 0xdf63, // 11  011  1110  1100  011
00713     PMEVTYPER4_EL0    = 0xdf64, // 11  011  1110  1100  100
00714     PMEVTYPER5_EL0    = 0xdf65, // 11  011  1110  1100  101
00715     PMEVTYPER6_EL0    = 0xdf66, // 11  011  1110  1100  110
00716     PMEVTYPER7_EL0    = 0xdf67, // 11  011  1110  1100  111
00717     PMEVTYPER8_EL0    = 0xdf68, // 11  011  1110  1101  000
00718     PMEVTYPER9_EL0    = 0xdf69, // 11  011  1110  1101  001
00719     PMEVTYPER10_EL0   = 0xdf6a, // 11  011  1110  1101  010
00720     PMEVTYPER11_EL0   = 0xdf6b, // 11  011  1110  1101  011
00721     PMEVTYPER12_EL0   = 0xdf6c, // 11  011  1110  1101  100
00722     PMEVTYPER13_EL0   = 0xdf6d, // 11  011  1110  1101  101
00723     PMEVTYPER14_EL0   = 0xdf6e, // 11  011  1110  1101  110
00724     PMEVTYPER15_EL0   = 0xdf6f, // 11  011  1110  1101  111
00725     PMEVTYPER16_EL0   = 0xdf70, // 11  011  1110  1110  000
00726     PMEVTYPER17_EL0   = 0xdf71, // 11  011  1110  1110  001
00727     PMEVTYPER18_EL0   = 0xdf72, // 11  011  1110  1110  010
00728     PMEVTYPER19_EL0   = 0xdf73, // 11  011  1110  1110  011
00729     PMEVTYPER20_EL0   = 0xdf74, // 11  011  1110  1110  100
00730     PMEVTYPER21_EL0   = 0xdf75, // 11  011  1110  1110  101
00731     PMEVTYPER22_EL0   = 0xdf76, // 11  011  1110  1110  110
00732     PMEVTYPER23_EL0   = 0xdf77, // 11  011  1110  1110  111
00733     PMEVTYPER24_EL0   = 0xdf78, // 11  011  1110  1111  000
00734     PMEVTYPER25_EL0   = 0xdf79, // 11  011  1110  1111  001
00735     PMEVTYPER26_EL0   = 0xdf7a, // 11  011  1110  1111  010
00736     PMEVTYPER27_EL0   = 0xdf7b, // 11  011  1110  1111  011
00737     PMEVTYPER28_EL0   = 0xdf7c, // 11  011  1110  1111  100
00738     PMEVTYPER29_EL0   = 0xdf7d, // 11  011  1110  1111  101
00739     PMEVTYPER30_EL0   = 0xdf7e, // 11  011  1110  1111  110
00740 
00741     // Trace registers
00742     TRCPRGCTLR        = 0x8808, // 10  001  0000  0001  000
00743     TRCPROCSELR       = 0x8810, // 10  001  0000  0010  000
00744     TRCCONFIGR        = 0x8820, // 10  001  0000  0100  000
00745     TRCAUXCTLR        = 0x8830, // 10  001  0000  0110  000
00746     TRCEVENTCTL0R     = 0x8840, // 10  001  0000  1000  000
00747     TRCEVENTCTL1R     = 0x8848, // 10  001  0000  1001  000
00748     TRCSTALLCTLR      = 0x8858, // 10  001  0000  1011  000
00749     TRCTSCTLR         = 0x8860, // 10  001  0000  1100  000
00750     TRCSYNCPR         = 0x8868, // 10  001  0000  1101  000
00751     TRCCCCTLR         = 0x8870, // 10  001  0000  1110  000
00752     TRCBBCTLR         = 0x8878, // 10  001  0000  1111  000
00753     TRCTRACEIDR       = 0x8801, // 10  001  0000  0000  001
00754     TRCQCTLR          = 0x8809, // 10  001  0000  0001  001
00755     TRCVICTLR         = 0x8802, // 10  001  0000  0000  010
00756     TRCVIIECTLR       = 0x880a, // 10  001  0000  0001  010
00757     TRCVISSCTLR       = 0x8812, // 10  001  0000  0010  010
00758     TRCVIPCSSCTLR     = 0x881a, // 10  001  0000  0011  010
00759     TRCVDCTLR         = 0x8842, // 10  001  0000  1000  010
00760     TRCVDSACCTLR      = 0x884a, // 10  001  0000  1001  010
00761     TRCVDARCCTLR      = 0x8852, // 10  001  0000  1010  010
00762     TRCSEQEVR0        = 0x8804, // 10  001  0000  0000  100
00763     TRCSEQEVR1        = 0x880c, // 10  001  0000  0001  100
00764     TRCSEQEVR2        = 0x8814, // 10  001  0000  0010  100
00765     TRCSEQRSTEVR      = 0x8834, // 10  001  0000  0110  100
00766     TRCSEQSTR         = 0x883c, // 10  001  0000  0111  100
00767     TRCEXTINSELR      = 0x8844, // 10  001  0000  1000  100
00768     TRCCNTRLDVR0      = 0x8805, // 10  001  0000  0000  101
00769     TRCCNTRLDVR1      = 0x880d, // 10  001  0000  0001  101
00770     TRCCNTRLDVR2      = 0x8815, // 10  001  0000  0010  101
00771     TRCCNTRLDVR3      = 0x881d, // 10  001  0000  0011  101
00772     TRCCNTCTLR0       = 0x8825, // 10  001  0000  0100  101
00773     TRCCNTCTLR1       = 0x882d, // 10  001  0000  0101  101
00774     TRCCNTCTLR2       = 0x8835, // 10  001  0000  0110  101
00775     TRCCNTCTLR3       = 0x883d, // 10  001  0000  0111  101
00776     TRCCNTVR0         = 0x8845, // 10  001  0000  1000  101
00777     TRCCNTVR1         = 0x884d, // 10  001  0000  1001  101
00778     TRCCNTVR2         = 0x8855, // 10  001  0000  1010  101
00779     TRCCNTVR3         = 0x885d, // 10  001  0000  1011  101
00780     TRCIMSPEC0        = 0x8807, // 10  001  0000  0000  111
00781     TRCIMSPEC1        = 0x880f, // 10  001  0000  0001  111
00782     TRCIMSPEC2        = 0x8817, // 10  001  0000  0010  111
00783     TRCIMSPEC3        = 0x881f, // 10  001  0000  0011  111
00784     TRCIMSPEC4        = 0x8827, // 10  001  0000  0100  111
00785     TRCIMSPEC5        = 0x882f, // 10  001  0000  0101  111
00786     TRCIMSPEC6        = 0x8837, // 10  001  0000  0110  111
00787     TRCIMSPEC7        = 0x883f, // 10  001  0000  0111  111
00788     TRCRSCTLR2        = 0x8890, // 10  001  0001  0010  000
00789     TRCRSCTLR3        = 0x8898, // 10  001  0001  0011  000
00790     TRCRSCTLR4        = 0x88a0, // 10  001  0001  0100  000
00791     TRCRSCTLR5        = 0x88a8, // 10  001  0001  0101  000
00792     TRCRSCTLR6        = 0x88b0, // 10  001  0001  0110  000
00793     TRCRSCTLR7        = 0x88b8, // 10  001  0001  0111  000
00794     TRCRSCTLR8        = 0x88c0, // 10  001  0001  1000  000
00795     TRCRSCTLR9        = 0x88c8, // 10  001  0001  1001  000
00796     TRCRSCTLR10       = 0x88d0, // 10  001  0001  1010  000
00797     TRCRSCTLR11       = 0x88d8, // 10  001  0001  1011  000
00798     TRCRSCTLR12       = 0x88e0, // 10  001  0001  1100  000
00799     TRCRSCTLR13       = 0x88e8, // 10  001  0001  1101  000
00800     TRCRSCTLR14       = 0x88f0, // 10  001  0001  1110  000
00801     TRCRSCTLR15       = 0x88f8, // 10  001  0001  1111  000
00802     TRCRSCTLR16       = 0x8881, // 10  001  0001  0000  001
00803     TRCRSCTLR17       = 0x8889, // 10  001  0001  0001  001
00804     TRCRSCTLR18       = 0x8891, // 10  001  0001  0010  001
00805     TRCRSCTLR19       = 0x8899, // 10  001  0001  0011  001
00806     TRCRSCTLR20       = 0x88a1, // 10  001  0001  0100  001
00807     TRCRSCTLR21       = 0x88a9, // 10  001  0001  0101  001
00808     TRCRSCTLR22       = 0x88b1, // 10  001  0001  0110  001
00809     TRCRSCTLR23       = 0x88b9, // 10  001  0001  0111  001
00810     TRCRSCTLR24       = 0x88c1, // 10  001  0001  1000  001
00811     TRCRSCTLR25       = 0x88c9, // 10  001  0001  1001  001
00812     TRCRSCTLR26       = 0x88d1, // 10  001  0001  1010  001
00813     TRCRSCTLR27       = 0x88d9, // 10  001  0001  1011  001
00814     TRCRSCTLR28       = 0x88e1, // 10  001  0001  1100  001
00815     TRCRSCTLR29       = 0x88e9, // 10  001  0001  1101  001
00816     TRCRSCTLR30       = 0x88f1, // 10  001  0001  1110  001
00817     TRCRSCTLR31       = 0x88f9, // 10  001  0001  1111  001
00818     TRCSSCCR0         = 0x8882, // 10  001  0001  0000  010
00819     TRCSSCCR1         = 0x888a, // 10  001  0001  0001  010
00820     TRCSSCCR2         = 0x8892, // 10  001  0001  0010  010
00821     TRCSSCCR3         = 0x889a, // 10  001  0001  0011  010
00822     TRCSSCCR4         = 0x88a2, // 10  001  0001  0100  010
00823     TRCSSCCR5         = 0x88aa, // 10  001  0001  0101  010
00824     TRCSSCCR6         = 0x88b2, // 10  001  0001  0110  010
00825     TRCSSCCR7         = 0x88ba, // 10  001  0001  0111  010
00826     TRCSSCSR0         = 0x88c2, // 10  001  0001  1000  010
00827     TRCSSCSR1         = 0x88ca, // 10  001  0001  1001  010
00828     TRCSSCSR2         = 0x88d2, // 10  001  0001  1010  010
00829     TRCSSCSR3         = 0x88da, // 10  001  0001  1011  010
00830     TRCSSCSR4         = 0x88e2, // 10  001  0001  1100  010
00831     TRCSSCSR5         = 0x88ea, // 10  001  0001  1101  010
00832     TRCSSCSR6         = 0x88f2, // 10  001  0001  1110  010
00833     TRCSSCSR7         = 0x88fa, // 10  001  0001  1111  010
00834     TRCSSPCICR0       = 0x8883, // 10  001  0001  0000  011
00835     TRCSSPCICR1       = 0x888b, // 10  001  0001  0001  011
00836     TRCSSPCICR2       = 0x8893, // 10  001  0001  0010  011
00837     TRCSSPCICR3       = 0x889b, // 10  001  0001  0011  011
00838     TRCSSPCICR4       = 0x88a3, // 10  001  0001  0100  011
00839     TRCSSPCICR5       = 0x88ab, // 10  001  0001  0101  011
00840     TRCSSPCICR6       = 0x88b3, // 10  001  0001  0110  011
00841     TRCSSPCICR7       = 0x88bb, // 10  001  0001  0111  011
00842     TRCPDCR           = 0x88a4, // 10  001  0001  0100  100
00843     TRCACVR0          = 0x8900, // 10  001  0010  0000  000
00844     TRCACVR1          = 0x8910, // 10  001  0010  0010  000
00845     TRCACVR2          = 0x8920, // 10  001  0010  0100  000
00846     TRCACVR3          = 0x8930, // 10  001  0010  0110  000
00847     TRCACVR4          = 0x8940, // 10  001  0010  1000  000
00848     TRCACVR5          = 0x8950, // 10  001  0010  1010  000
00849     TRCACVR6          = 0x8960, // 10  001  0010  1100  000
00850     TRCACVR7          = 0x8970, // 10  001  0010  1110  000
00851     TRCACVR8          = 0x8901, // 10  001  0010  0000  001
00852     TRCACVR9          = 0x8911, // 10  001  0010  0010  001
00853     TRCACVR10         = 0x8921, // 10  001  0010  0100  001
00854     TRCACVR11         = 0x8931, // 10  001  0010  0110  001
00855     TRCACVR12         = 0x8941, // 10  001  0010  1000  001
00856     TRCACVR13         = 0x8951, // 10  001  0010  1010  001
00857     TRCACVR14         = 0x8961, // 10  001  0010  1100  001
00858     TRCACVR15         = 0x8971, // 10  001  0010  1110  001
00859     TRCACATR0         = 0x8902, // 10  001  0010  0000  010
00860     TRCACATR1         = 0x8912, // 10  001  0010  0010  010
00861     TRCACATR2         = 0x8922, // 10  001  0010  0100  010
00862     TRCACATR3         = 0x8932, // 10  001  0010  0110  010
00863     TRCACATR4         = 0x8942, // 10  001  0010  1000  010
00864     TRCACATR5         = 0x8952, // 10  001  0010  1010  010
00865     TRCACATR6         = 0x8962, // 10  001  0010  1100  010
00866     TRCACATR7         = 0x8972, // 10  001  0010  1110  010
00867     TRCACATR8         = 0x8903, // 10  001  0010  0000  011
00868     TRCACATR9         = 0x8913, // 10  001  0010  0010  011
00869     TRCACATR10        = 0x8923, // 10  001  0010  0100  011
00870     TRCACATR11        = 0x8933, // 10  001  0010  0110  011
00871     TRCACATR12        = 0x8943, // 10  001  0010  1000  011
00872     TRCACATR13        = 0x8953, // 10  001  0010  1010  011
00873     TRCACATR14        = 0x8963, // 10  001  0010  1100  011
00874     TRCACATR15        = 0x8973, // 10  001  0010  1110  011
00875     TRCDVCVR0         = 0x8904, // 10  001  0010  0000  100
00876     TRCDVCVR1         = 0x8924, // 10  001  0010  0100  100
00877     TRCDVCVR2         = 0x8944, // 10  001  0010  1000  100
00878     TRCDVCVR3         = 0x8964, // 10  001  0010  1100  100
00879     TRCDVCVR4         = 0x8905, // 10  001  0010  0000  101
00880     TRCDVCVR5         = 0x8925, // 10  001  0010  0100  101
00881     TRCDVCVR6         = 0x8945, // 10  001  0010  1000  101
00882     TRCDVCVR7         = 0x8965, // 10  001  0010  1100  101
00883     TRCDVCMR0         = 0x8906, // 10  001  0010  0000  110
00884     TRCDVCMR1         = 0x8926, // 10  001  0010  0100  110
00885     TRCDVCMR2         = 0x8946, // 10  001  0010  1000  110
00886     TRCDVCMR3         = 0x8966, // 10  001  0010  1100  110
00887     TRCDVCMR4         = 0x8907, // 10  001  0010  0000  111
00888     TRCDVCMR5         = 0x8927, // 10  001  0010  0100  111
00889     TRCDVCMR6         = 0x8947, // 10  001  0010  1000  111
00890     TRCDVCMR7         = 0x8967, // 10  001  0010  1100  111
00891     TRCCIDCVR0        = 0x8980, // 10  001  0011  0000  000
00892     TRCCIDCVR1        = 0x8990, // 10  001  0011  0010  000
00893     TRCCIDCVR2        = 0x89a0, // 10  001  0011  0100  000
00894     TRCCIDCVR3        = 0x89b0, // 10  001  0011  0110  000
00895     TRCCIDCVR4        = 0x89c0, // 10  001  0011  1000  000
00896     TRCCIDCVR5        = 0x89d0, // 10  001  0011  1010  000
00897     TRCCIDCVR6        = 0x89e0, // 10  001  0011  1100  000
00898     TRCCIDCVR7        = 0x89f0, // 10  001  0011  1110  000
00899     TRCVMIDCVR0       = 0x8981, // 10  001  0011  0000  001
00900     TRCVMIDCVR1       = 0x8991, // 10  001  0011  0010  001
00901     TRCVMIDCVR2       = 0x89a1, // 10  001  0011  0100  001
00902     TRCVMIDCVR3       = 0x89b1, // 10  001  0011  0110  001
00903     TRCVMIDCVR4       = 0x89c1, // 10  001  0011  1000  001
00904     TRCVMIDCVR5       = 0x89d1, // 10  001  0011  1010  001
00905     TRCVMIDCVR6       = 0x89e1, // 10  001  0011  1100  001
00906     TRCVMIDCVR7       = 0x89f1, // 10  001  0011  1110  001
00907     TRCCIDCCTLR0      = 0x8982, // 10  001  0011  0000  010
00908     TRCCIDCCTLR1      = 0x898a, // 10  001  0011  0001  010
00909     TRCVMIDCCTLR0     = 0x8992, // 10  001  0011  0010  010
00910     TRCVMIDCCTLR1     = 0x899a, // 10  001  0011  0011  010
00911     TRCITCTRL         = 0x8b84, // 10  001  0111  0000  100
00912     TRCCLAIMSET       = 0x8bc6, // 10  001  0111  1000  110
00913     TRCCLAIMCLR       = 0x8bce, // 10  001  0111  1001  110
00914 
00915     // GICv3 registers
00916     ICC_BPR1_EL1      = 0xc663, // 11  000  1100  1100  011
00917     ICC_BPR0_EL1      = 0xc643, // 11  000  1100  1000  011
00918     ICC_PMR_EL1       = 0xc230, // 11  000  0100  0110  000
00919     ICC_CTLR_EL1      = 0xc664, // 11  000  1100  1100  100
00920     ICC_CTLR_EL3      = 0xf664, // 11  110  1100  1100  100
00921     ICC_SRE_EL1       = 0xc665, // 11  000  1100  1100  101
00922     ICC_SRE_EL2       = 0xe64d, // 11  100  1100  1001  101
00923     ICC_SRE_EL3       = 0xf665, // 11  110  1100  1100  101
00924     ICC_IGRPEN0_EL1   = 0xc666, // 11  000  1100  1100  110
00925     ICC_IGRPEN1_EL1   = 0xc667, // 11  000  1100  1100  111
00926     ICC_IGRPEN1_EL3   = 0xf667, // 11  110  1100  1100  111
00927     ICC_SEIEN_EL1     = 0xc668, // 11  000  1100  1101  000
00928     ICC_AP0R0_EL1     = 0xc644, // 11  000  1100  1000  100
00929     ICC_AP0R1_EL1     = 0xc645, // 11  000  1100  1000  101
00930     ICC_AP0R2_EL1     = 0xc646, // 11  000  1100  1000  110
00931     ICC_AP0R3_EL1     = 0xc647, // 11  000  1100  1000  111
00932     ICC_AP1R0_EL1     = 0xc648, // 11  000  1100  1001  000
00933     ICC_AP1R1_EL1     = 0xc649, // 11  000  1100  1001  001
00934     ICC_AP1R2_EL1     = 0xc64a, // 11  000  1100  1001  010
00935     ICC_AP1R3_EL1     = 0xc64b, // 11  000  1100  1001  011
00936     ICH_AP0R0_EL2     = 0xe640, // 11  100  1100  1000  000
00937     ICH_AP0R1_EL2     = 0xe641, // 11  100  1100  1000  001
00938     ICH_AP0R2_EL2     = 0xe642, // 11  100  1100  1000  010
00939     ICH_AP0R3_EL2     = 0xe643, // 11  100  1100  1000  011
00940     ICH_AP1R0_EL2     = 0xe648, // 11  100  1100  1001  000
00941     ICH_AP1R1_EL2     = 0xe649, // 11  100  1100  1001  001
00942     ICH_AP1R2_EL2     = 0xe64a, // 11  100  1100  1001  010
00943     ICH_AP1R3_EL2     = 0xe64b, // 11  100  1100  1001  011
00944     ICH_HCR_EL2       = 0xe658, // 11  100  1100  1011  000
00945     ICH_MISR_EL2      = 0xe65a, // 11  100  1100  1011  010
00946     ICH_VMCR_EL2      = 0xe65f, // 11  100  1100  1011  111
00947     ICH_VSEIR_EL2     = 0xe64c, // 11  100  1100  1001  100
00948     ICH_LR0_EL2       = 0xe660, // 11  100  1100  1100  000
00949     ICH_LR1_EL2       = 0xe661, // 11  100  1100  1100  001
00950     ICH_LR2_EL2       = 0xe662, // 11  100  1100  1100  010
00951     ICH_LR3_EL2       = 0xe663, // 11  100  1100  1100  011
00952     ICH_LR4_EL2       = 0xe664, // 11  100  1100  1100  100
00953     ICH_LR5_EL2       = 0xe665, // 11  100  1100  1100  101
00954     ICH_LR6_EL2       = 0xe666, // 11  100  1100  1100  110
00955     ICH_LR7_EL2       = 0xe667, // 11  100  1100  1100  111
00956     ICH_LR8_EL2       = 0xe668, // 11  100  1100  1101  000
00957     ICH_LR9_EL2       = 0xe669, // 11  100  1100  1101  001
00958     ICH_LR10_EL2      = 0xe66a, // 11  100  1100  1101  010
00959     ICH_LR11_EL2      = 0xe66b, // 11  100  1100  1101  011
00960     ICH_LR12_EL2      = 0xe66c, // 11  100  1100  1101  100
00961     ICH_LR13_EL2      = 0xe66d, // 11  100  1100  1101  101
00962     ICH_LR14_EL2      = 0xe66e, // 11  100  1100  1101  110
00963     ICH_LR15_EL2      = 0xe66f  // 11  100  1100  1101  111
00964   };
00965 
00966   // Note that these do not inherit from NamedImmMapper. This class is
00967   // sufficiently different in its behaviour that I don't believe it's worth
00968   // burdening the common NamedImmMapper with abstractions only needed in
00969   // this one case.
00970   struct SysRegMapper {
00971     static const NamedImmMapper::Mapping SysRegPairs[];
00972 
00973     const NamedImmMapper::Mapping *InstPairs;
00974     size_t NumInstPairs;
00975 
00976     SysRegMapper() {}
00977     uint32_t fromString(StringRef Name, bool &Valid) const;
00978     std::string toString(uint32_t Bits, bool &Valid) const;
00979   };
00980 
00981   struct MSRMapper : SysRegMapper {
00982     static const NamedImmMapper::Mapping MSRPairs[];
00983     MSRMapper();
00984   };
00985 
00986   struct MRSMapper : SysRegMapper {
00987     static const NamedImmMapper::Mapping MRSPairs[];
00988     MRSMapper();
00989   };
00990 
00991   uint32_t ParseGenericRegister(StringRef Name, bool &Valid);
00992 }
00993 
00994 namespace A64TLBI {
00995   enum TLBIValues {
00996     Invalid = -1,          // Op0 Op1  CRn   CRm   Op2
00997     IPAS2E1IS    = 0x6401, // 01  100  1000  0000  001
00998     IPAS2LE1IS   = 0x6405, // 01  100  1000  0000  101
00999     VMALLE1IS    = 0x4418, // 01  000  1000  0011  000
01000     ALLE2IS      = 0x6418, // 01  100  1000  0011  000
01001     ALLE3IS      = 0x7418, // 01  110  1000  0011  000
01002     VAE1IS       = 0x4419, // 01  000  1000  0011  001
01003     VAE2IS       = 0x6419, // 01  100  1000  0011  001
01004     VAE3IS       = 0x7419, // 01  110  1000  0011  001
01005     ASIDE1IS     = 0x441a, // 01  000  1000  0011  010
01006     VAAE1IS      = 0x441b, // 01  000  1000  0011  011
01007     ALLE1IS      = 0x641c, // 01  100  1000  0011  100
01008     VALE1IS      = 0x441d, // 01  000  1000  0011  101
01009     VALE2IS      = 0x641d, // 01  100  1000  0011  101
01010     VALE3IS      = 0x741d, // 01  110  1000  0011  101
01011     VMALLS12E1IS = 0x641e, // 01  100  1000  0011  110
01012     VAALE1IS     = 0x441f, // 01  000  1000  0011  111
01013     IPAS2E1      = 0x6421, // 01  100  1000  0100  001
01014     IPAS2LE1     = 0x6425, // 01  100  1000  0100  101
01015     VMALLE1      = 0x4438, // 01  000  1000  0111  000
01016     ALLE2        = 0x6438, // 01  100  1000  0111  000
01017     ALLE3        = 0x7438, // 01  110  1000  0111  000
01018     VAE1         = 0x4439, // 01  000  1000  0111  001
01019     VAE2         = 0x6439, // 01  100  1000  0111  001
01020     VAE3         = 0x7439, // 01  110  1000  0111  001
01021     ASIDE1       = 0x443a, // 01  000  1000  0111  010
01022     VAAE1        = 0x443b, // 01  000  1000  0111  011
01023     ALLE1        = 0x643c, // 01  100  1000  0111  100
01024     VALE1        = 0x443d, // 01  000  1000  0111  101
01025     VALE2        = 0x643d, // 01  100  1000  0111  101
01026     VALE3        = 0x743d, // 01  110  1000  0111  101
01027     VMALLS12E1   = 0x643e, // 01  100  1000  0111  110
01028     VAALE1       = 0x443f  // 01  000  1000  0111  111
01029   };
01030 
01031   struct TLBIMapper : NamedImmMapper {
01032     const static Mapping TLBIPairs[];
01033 
01034     TLBIMapper();
01035   };
01036 
01037   static inline bool NeedsRegister(TLBIValues Val) {
01038     switch (Val) {
01039     case VMALLE1IS:
01040     case ALLE2IS:
01041     case ALLE3IS:
01042     case ALLE1IS:
01043     case VMALLS12E1IS:
01044     case VMALLE1:
01045     case ALLE2:
01046     case ALLE3:
01047     case ALLE1:
01048     case VMALLS12E1:
01049       return false;
01050     default:
01051       return true;
01052     }
01053   }
01054 }
01055 
01056 namespace AArch64II {
01057 
01058   enum TOF {
01059     //===--------------------------------------------------------------===//
01060     // AArch64 Specific MachineOperand flags.
01061 
01062     MO_NO_FLAG,
01063 
01064     // MO_GOT - Represents a relocation referring to the GOT entry of a given
01065     // symbol. Used in adrp.
01066     MO_GOT,
01067 
01068     // MO_GOT_LO12 - Represents a relocation referring to the low 12 bits of the
01069     // GOT entry of a given symbol. Used in ldr only.
01070     MO_GOT_LO12,
01071 
01072     // MO_DTPREL_* - Represents a relocation referring to the offset from a
01073     // module's dynamic thread pointer. Used in the local-dynamic TLS access
01074     // model.
01075     MO_DTPREL_G1,
01076     MO_DTPREL_G0_NC,
01077 
01078     // MO_GOTTPREL_* - Represents a relocation referring to a GOT entry
01079     // providing the offset of a variable from the thread-pointer. Used in
01080     // initial-exec TLS model where this offset is assigned in the static thread
01081     // block and thus known by the dynamic linker.
01082     MO_GOTTPREL,
01083     MO_GOTTPREL_LO12,
01084 
01085     // MO_TLSDESC_* - Represents a relocation referring to a GOT entry providing
01086     // a TLS descriptor chosen by the dynamic linker. Used for the
01087     // general-dynamic and local-dynamic TLS access models where very littls is
01088     // known at link-time.
01089     MO_TLSDESC,
01090     MO_TLSDESC_LO12,
01091 
01092     // MO_TPREL_* - Represents a relocation referring to the offset of a
01093     // variable from the thread pointer itself. Used in the local-exec TLS
01094     // access model.
01095     MO_TPREL_G1,
01096     MO_TPREL_G0_NC,
01097 
01098     // MO_LO12 - On a symbol operand, this represents a relocation containing
01099     // lower 12 bits of the address. Used in add/sub/ldr/str.
01100     MO_LO12,
01101 
01102     // MO_ABS_G* - Represent the 16-bit granules of an absolute reference using
01103     // movz/movk instructions.
01104     MO_ABS_G3,
01105     MO_ABS_G2_NC,
01106     MO_ABS_G1_NC,
01107     MO_ABS_G0_NC
01108   };
01109 }
01110 
01111 class APFloat;
01112 
01113 namespace A64Imms {
01114   bool isFPImm(const APFloat &Val, uint32_t &Imm8Bits);
01115 
01116   inline bool isFPImm(const APFloat &Val) {
01117     uint32_t Imm8;
01118     return isFPImm(Val, Imm8);
01119   }
01120 
01121   bool isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits);
01122   bool isLogicalImmBits(unsigned RegWidth, uint32_t Bits, uint64_t &Imm);
01123 
01124   bool isMOVZImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift);
01125   bool isMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift);
01126 
01127   // We sometimes want to know whether the immediate is representable with a
01128   // MOVN but *not* with a MOVZ (because that would take priority).
01129   bool isOnlyMOVNImm(int RegWidth, uint64_t Value, int &UImm16, int &Shift);
01130 
01131   uint64_t decodeNeonModImm(unsigned Val, unsigned OpCmode, unsigned &EltBits);
01132   bool decodeNeonModShiftImm(unsigned OpCmode, unsigned &ShiftImm,
01133                              unsigned &ShiftOnesIn);
01134   }
01135 
01136 } // end namespace llvm;
01137 
01138 #endif