LLVM 19.0.0git
Classes | Namespaces | Enumerations | Functions | Variables
AMDGPU.h File Reference
#include "llvm/IR/PassManager.h"
#include "llvm/Pass.h"
#include "llvm/Support/AMDGPUAddrSpace.h"
#include "llvm/Support/CodeGen.h"

Go to the source code of this file.

Classes

struct  llvm::AMDGPUSimplifyLibCallsPass
 
struct  llvm::AMDGPUImageIntrinsicOptimizerPass
 
struct  llvm::AMDGPUUseNativeCallsPass
 
struct  llvm::AMDGPUPromoteKernelArgumentsPass
 
struct  llvm::AMDGPULowerKernelAttributesPass
 
struct  llvm::AMDGPULowerModuleLDSPass
 
struct  llvm::AMDGPULowerBufferFatPointersPass
 
struct  llvm::AMDGPUPromoteAllocaPass
 
struct  llvm::AMDGPUPromoteAllocaToVectorPass
 
struct  llvm::AMDGPUAtomicOptimizerPass
 
struct  llvm::AMDGPUAlwaysInlinePass
 
class  llvm::AMDGPUCodeGenPreparePass
 
class  llvm::AMDGPULowerKernelArgumentsPass
 
class  llvm::AMDGPUAttributorPass
 
struct  llvm::AMDGPUPrintfRuntimeBindingPass
 
struct  llvm::AMDGPUUnifyMetadataPass
 
class  llvm::AMDGPURewriteUndefForPHIPass
 

Namespaces

namespace  llvm
 This is an optimization pass for GlobalISel generic memory operations.
 
namespace  llvm::AMDGPU
 

Enumerations

enum class  llvm::ScanOptions { llvm::DPP , llvm::Iterative , llvm::None }
 
enum  llvm::AMDGPU::TargetIndex {
  llvm::AMDGPU::TI_CONSTDATA_START , llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD0 , llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD1 , llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD2 ,
  llvm::AMDGPU::TI_SCRATCH_RSRC_DWORD3
}
 

Functions

void llvm::initializeAMDGPUPreLegalizerCombinerPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUPreLegalizeCombiner (bool IsOptNone)
 
void llvm::initializeAMDGPUPostLegalizerCombinerPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUPostLegalizeCombiner (bool IsOptNone)
 
FunctionPassllvm::createAMDGPURegBankCombiner (bool IsOptNone)
 
void llvm::initializeAMDGPURegBankCombinerPass (PassRegistry &)
 
void llvm::initializeAMDGPURegBankSelectPass (PassRegistry &)
 
FunctionPassllvm::createGCNDPPCombinePass ()
 
FunctionPassllvm::createSIAnnotateControlFlowPass ()
 Create the annotation pass.
 
FunctionPassllvm::createSIFoldOperandsPass ()
 
FunctionPassllvm::createSIPeepholeSDWAPass ()
 
FunctionPassllvm::createSILowerI1CopiesPass ()
 
FunctionPassllvm::createAMDGPUGlobalISelDivergenceLoweringPass ()
 
FunctionPass * llvm::createSIShrinkInstructionsPass ()
 
FunctionPassllvm::createSILoadStoreOptimizerPass ()
 
FunctionPassllvm::createSIWholeQuadModePass ()
 
FunctionPass * llvm::createSIFixControlFlowLiveIntervalsPass ()
 
FunctionPassllvm::createSIOptimizeExecMaskingPreRAPass ()
 
FunctionPassllvm::createSIOptimizeVGPRLiveRangePass ()
 
FunctionPassllvm::createSIFixSGPRCopiesPass ()
 
FunctionPass * llvm::createLowerWWMCopiesPass ()
 
FunctionPassllvm::createSIMemoryLegalizerPass ()
 
FunctionPassllvm::createSIInsertWaitcntsPass ()
 
FunctionPassllvm::createSIPreAllocateWWMRegsPass ()
 
FunctionPassllvm::createSIFormMemoryClausesPass ()
 
FunctionPassllvm::createSIPostRABundlerPass ()
 
FunctionPassllvm::createAMDGPUImageIntrinsicOptimizerPass (const TargetMachine *)
 
ModulePass * llvm::createAMDGPURemoveIncompatibleFunctionsPass (const TargetMachine *)
 
FunctionPassllvm::createAMDGPUCodeGenPreparePass ()
 
FunctionPassllvm::createAMDGPULateCodeGenPreparePass ()
 
FunctionPassllvm::createAMDGPUMachineCFGStructurizerPass ()
 
FunctionPassllvm::createAMDGPURewriteOutArgumentsPass ()
 
ModulePassllvm::createAMDGPULowerModuleLDSLegacyPass (const AMDGPUTargetMachine *TM=nullptr)
 
ModulePassllvm::createAMDGPULowerBufferFatPointersPass ()
 
FunctionPassllvm::createSIModeRegisterPass ()
 
FunctionPassllvm::createGCNPreRAOptimizationsPass ()
 
void llvm::initializeAMDGPUDAGToDAGISelPass (PassRegistry &)
 
void llvm::initializeAMDGPUMachineCFGStructurizerPass (PassRegistry &)
 
void llvm::initializeAMDGPUAlwaysInlinePass (PassRegistry &)
 
Passllvm::createAMDGPUAnnotateKernelFeaturesPass ()
 
Passllvm::createAMDGPUAttributorLegacyPass ()
 
void llvm::initializeAMDGPUAttributorLegacyPass (PassRegistry &)
 
void llvm::initializeAMDGPUAnnotateKernelFeaturesPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUAtomicOptimizerPass (ScanOptions ScanStrategy)
 
void llvm::initializeAMDGPUAtomicOptimizerPass (PassRegistry &)
 
ModulePass * llvm::createAMDGPUCtorDtorLoweringLegacyPass ()
 
void llvm::initializeAMDGPUCtorDtorLoweringLegacyPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPULowerKernelArgumentsPass ()
 
void llvm::initializeAMDGPULowerKernelArgumentsPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUPromoteKernelArgumentsPass ()
 
void llvm::initializeAMDGPUPromoteKernelArgumentsPass (PassRegistry &)
 
ModulePassllvm::createAMDGPULowerKernelAttributesPass ()
 
void llvm::initializeAMDGPULowerKernelAttributesPass (PassRegistry &)
 
void llvm::initializeAMDGPULowerModuleLDSLegacyPass (PassRegistry &)
 
void llvm::initializeAMDGPULowerBufferFatPointersPass (PassRegistry &)
 
void llvm::initializeAMDGPURewriteOutArgumentsPass (PassRegistry &)
 
void llvm::initializeGCNDPPCombinePass (PassRegistry &)
 
void llvm::initializeSIFoldOperandsPass (PassRegistry &)
 
void llvm::initializeSIPeepholeSDWAPass (PassRegistry &)
 
void llvm::initializeSIShrinkInstructionsPass (PassRegistry &)
 
void llvm::initializeSIFixSGPRCopiesPass (PassRegistry &)
 
void llvm::initializeSIFixVGPRCopiesPass (PassRegistry &)
 
void llvm::initializeSILowerWWMCopiesPass (PassRegistry &)
 
void llvm::initializeSILowerI1CopiesPass (PassRegistry &)
 
void llvm::initializeAMDGPUGlobalISelDivergenceLoweringPass (PassRegistry &)
 
void llvm::initializeAMDGPUMarkLastScratchLoadPass (PassRegistry &)
 
void llvm::initializeSILowerSGPRSpillsPass (PassRegistry &)
 
void llvm::initializeSILoadStoreOptimizerPass (PassRegistry &)
 
void llvm::initializeSIWholeQuadModePass (PassRegistry &)
 
void llvm::initializeSILowerControlFlowPass (PassRegistry &)
 
void llvm::initializeSIPreEmitPeepholePass (PassRegistry &)
 
void llvm::initializeSILateBranchLoweringPass (PassRegistry &)
 
void llvm::initializeSIOptimizeExecMaskingPass (PassRegistry &)
 
void llvm::initializeSIPreAllocateWWMRegsPass (PassRegistry &)
 
void llvm::initializeAMDGPUImageIntrinsicOptimizerPass (PassRegistry &)
 
void llvm::initializeAMDGPUPerfHintAnalysisPass (PassRegistry &)
 
void llvm::initializeGCNRegPressurePrinterPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUPromoteAlloca ()
 
void llvm::initializeAMDGPUPromoteAllocaPass (PassRegistry &)
 
FunctionPassllvm::createAMDGPUPromoteAllocaToVector ()
 
void llvm::initializeAMDGPUPromoteAllocaToVectorPass (PassRegistry &)
 
Passllvm::createAMDGPUStructurizeCFGPass ()
 
FunctionPassllvm::createAMDGPUISelDag (TargetMachine &TM, CodeGenOptLevel OptLevel)
 This pass converts a legalized DAG into a AMDGPU-specific.
 
ModulePassllvm::createAMDGPUAlwaysInlinePass (bool GlobalOpt=true)
 
FunctionPassllvm::createAMDGPUAnnotateUniformValues ()
 
ModulePassllvm::createAMDGPUPrintfRuntimeBinding ()
 
void llvm::initializeAMDGPUPrintfRuntimeBindingPass (PassRegistry &)
 
void llvm::initializeAMDGPUResourceUsageAnalysisPass (PassRegistry &)
 
ModulePass * llvm::createAMDGPUUnifyMetadataPass ()
 
void llvm::initializeAMDGPUUnifyMetadataPass (PassRegistry &)
 
void llvm::initializeSIOptimizeExecMaskingPreRAPass (PassRegistry &)
 
void llvm::initializeSIOptimizeVGPRLiveRangePass (PassRegistry &)
 
void llvm::initializeAMDGPUAnnotateUniformValuesPass (PassRegistry &)
 
void llvm::initializeAMDGPUCodeGenPreparePass (PassRegistry &)
 
void llvm::initializeAMDGPURemoveIncompatibleFunctionsPass (PassRegistry &)
 
void llvm::initializeAMDGPULateCodeGenPreparePass (PassRegistry &)
 
FunctionPassllvm::createAMDGPURewriteUndefForPHILegacyPass ()
 
void llvm::initializeAMDGPURewriteUndefForPHILegacyPass (PassRegistry &)
 
void llvm::initializeSIAnnotateControlFlowPass (PassRegistry &)
 
void llvm::initializeSIMemoryLegalizerPass (PassRegistry &)
 
void llvm::initializeSIModeRegisterPass (PassRegistry &)
 
void llvm::initializeAMDGPUInsertDelayAluPass (PassRegistry &)
 
void llvm::initializeAMDGPUInsertSingleUseVDSTPass (PassRegistry &)
 
void llvm::initializeSIInsertHardClausesPass (PassRegistry &)
 
void llvm::initializeSIInsertWaitcntsPass (PassRegistry &)
 
void llvm::initializeSIFormMemoryClausesPass (PassRegistry &)
 
void llvm::initializeSIPostRABundlerPass (PassRegistry &)
 
void llvm::initializeGCNCreateVOPDPass (PassRegistry &)
 
void llvm::initializeAMDGPUUnifyDivergentExitNodesPass (PassRegistry &)
 
ImmutablePassllvm::createAMDGPUAAWrapperPass ()
 
void llvm::initializeAMDGPUAAWrapperPassPass (PassRegistry &)
 
ImmutablePassllvm::createAMDGPUExternalAAWrapperPass ()
 
void llvm::initializeAMDGPUExternalAAWrapperPass (PassRegistry &)
 
void llvm::initializeAMDGPUArgumentUsageInfoPass (PassRegistry &)
 
ModulePass * llvm::createAMDGPUOpenCLEnqueuedBlockLoweringPass ()
 
void llvm::initializeAMDGPUOpenCLEnqueuedBlockLoweringPass (PassRegistry &)
 
void llvm::initializeGCNNSAReassignPass (PassRegistry &)
 
void llvm::initializeGCNPreRALongBranchRegPass (PassRegistry &)
 
void llvm::initializeGCNPreRAOptimizationsPass (PassRegistry &)
 
FunctionPass * llvm::createAMDGPUSetWavePriorityPass ()
 
void llvm::initializeAMDGPUSetWavePriorityPass (PassRegistry &)
 
void llvm::initializeGCNRewritePartialRegUsesPass (llvm::PassRegistry &)
 
bool llvm::AMDGPU::isFlatGlobalAddrSpace (unsigned AS)
 
bool llvm::AMDGPU::isExtendedGlobalAddrSpace (unsigned AS)
 
static bool llvm::AMDGPU::addrspacesMayAlias (unsigned AS1, unsigned AS2)
 

Variables

charllvm::AMDGPUMachineCFGStructurizerID
 
charllvm::AMDGPUAnnotateKernelFeaturesID = AMDGPUAnnotateKernelFeatures::ID
 
charllvm::AMDGPUAtomicOptimizerID = AMDGPUAtomicOptimizer::ID
 
charllvm::AMDGPUCtorDtorLoweringLegacyPassID
 
charllvm::AMDGPULowerKernelArgumentsID
 
charllvm::AMDGPUPromoteKernelArgumentsID
 
charllvm::AMDGPULowerKernelAttributesID
 
charllvm::AMDGPULowerModuleLDSLegacyPassID = AMDGPULowerModuleLDSLegacy::ID
 
charllvm::AMDGPULowerBufferFatPointersID = AMDGPULowerBufferFatPointers::ID
 
charllvm::AMDGPURewriteOutArgumentsID
 
charllvm::GCNDPPCombineID = GCNDPPCombine::ID
 
charllvm::SIFoldOperandsID
 
charllvm::SIPeepholeSDWAID = SIPeepholeSDWA::ID
 
charllvm::SIShrinkInstructionsID
 
charllvm::SIFixSGPRCopiesID = SIFixSGPRCopies::ID
 
charllvm::SIFixVGPRCopiesID = SIFixVGPRCopies::ID
 
charllvm::SILowerWWMCopiesID = SILowerWWMCopies::ID
 
charllvm::SILowerI1CopiesID = SILowerI1Copies::ID
 
charllvm::AMDGPUGlobalISelDivergenceLoweringID
 
charllvm::AMDGPUMarkLastScratchLoadID = AMDGPUMarkLastScratchLoad::ID
 
charllvm::SILowerSGPRSpillsID = SILowerSGPRSpills::ID
 
charllvm::SILoadStoreOptimizerID = SILoadStoreOptimizer::ID
 
charllvm::SIWholeQuadModeID = SIWholeQuadMode::ID
 
charllvm::SILowerControlFlowID = SILowerControlFlow::ID
 
charllvm::SIPreEmitPeepholeID
 
charllvm::SILateBranchLoweringPassID = SILateBranchLowering::ID
 
charllvm::SIOptimizeExecMaskingID = SIOptimizeExecMasking::ID
 
charllvm::SIPreAllocateWWMRegsID = SIPreAllocateWWMRegs::ID
 
charllvm::AMDGPUImageIntrinsicOptimizerID
 
charllvm::AMDGPUPerfHintAnalysisID = AMDGPUPerfHintAnalysis::ID
 
charllvm::GCNRegPressurePrinterID = GCNRegPressurePrinter::ID
 
charllvm::AMDGPUPromoteAllocaID = AMDGPUPromoteAlloca::ID
 
charllvm::AMDGPUPromoteAllocaToVectorID = AMDGPUPromoteAllocaToVector::ID
 
charllvm::AMDGPUPrintfRuntimeBindingID = AMDGPUPrintfRuntimeBinding::ID
 
charllvm::AMDGPUResourceUsageAnalysisID = AMDGPUResourceUsageAnalysis::ID
 
charllvm::AMDGPUUnifyMetadataID = AMDGPUUnifyMetadata::ID
 
charllvm::SIOptimizeExecMaskingPreRAID = SIOptimizeExecMaskingPreRA::ID
 
charllvm::SIOptimizeVGPRLiveRangeID = SIOptimizeVGPRLiveRange::ID
 
charllvm::AMDGPUAnnotateUniformValuesPassID
 
charllvm::AMDGPUCodeGenPrepareID
 
charllvm::AMDGPURemoveIncompatibleFunctionsID
 
charllvm::AMDGPULateCodeGenPrepareID
 
charllvm::AMDGPURewriteUndefForPHILegacyPassID
 
charllvm::SIAnnotateControlFlowPassID
 
charllvm::SIMemoryLegalizerID = SIMemoryLegalizer::ID
 
charllvm::SIModeRegisterID
 
charllvm::AMDGPUInsertDelayAluID = AMDGPUInsertDelayAlu::ID
 
charllvm::AMDGPUInsertSingleUseVDSTID = AMDGPUInsertSingleUseVDST::ID
 
charllvm::SIInsertHardClausesID = SIInsertHardClauses::ID
 
charllvm::SIInsertWaitcntsID = SIInsertWaitcnts::ID
 
charllvm::SIFormMemoryClausesID = SIFormMemoryClauses::ID
 
charllvm::SIPostRABundlerID = SIPostRABundler::ID
 
charllvm::GCNCreateVOPDID = GCNCreateVOPD::ID
 
charllvm::AMDGPUUnifyDivergentExitNodesID = AMDGPUUnifyDivergentExitNodes::ID
 
charllvm::AMDGPUOpenCLEnqueuedBlockLoweringID
 
charllvm::GCNNSAReassignID = GCNNSAReassign::ID
 
charllvm::GCNPreRALongBranchRegID
 
charllvm::GCNPreRAOptimizationsID = GCNPreRAOptimizations::ID
 
charllvm::GCNRewritePartialRegUsesID = GCNRewritePartialRegUses::ID