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CallingConvLower.h
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00001 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file declares the CCState and CCValAssign classes, used for lowering
00011 // and implementing calling conventions.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
00016 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
00017 
00018 #include "llvm/ADT/SmallVector.h"
00019 #include "llvm/CodeGen/MachineFrameInfo.h"
00020 #include "llvm/CodeGen/MachineFunction.h"
00021 #include "llvm/IR/CallingConv.h"
00022 #include "llvm/Target/TargetCallingConv.h"
00023 
00024 namespace llvm {
00025 class CCState;
00026 class MVT;
00027 class TargetMachine;
00028 class TargetRegisterInfo;
00029 
00030 /// CCValAssign - Represent assignment of one arg/retval to a location.
00031 class CCValAssign {
00032 public:
00033   enum LocInfo {
00034     Full,      // The value fills the full location.
00035     SExt,      // The value is sign extended in the location.
00036     ZExt,      // The value is zero extended in the location.
00037     AExt,      // The value is extended with undefined upper bits.
00038     SExtUpper, // The value is in the upper bits of the location and should be
00039                // sign extended when retrieved.
00040     ZExtUpper, // The value is in the upper bits of the location and should be
00041                // zero extended when retrieved.
00042     AExtUpper, // The value is in the upper bits of the location and should be
00043                // extended with undefined upper bits when retrieved.
00044     BCvt,      // The value is bit-converted in the location.
00045     VExt,      // The value is vector-widened in the location.
00046                // FIXME: Not implemented yet. Code that uses AExt to mean
00047                // vector-widen should be fixed to use VExt instead.
00048     FPExt,     // The floating-point value is fp-extended in the location.
00049     Indirect   // The location contains pointer to the value.
00050     // TODO: a subset of the value is in the location.
00051   };
00052 
00053 private:
00054   /// ValNo - This is the value number begin assigned (e.g. an argument number).
00055   unsigned ValNo;
00056 
00057   /// Loc is either a stack offset or a register number.
00058   unsigned Loc;
00059 
00060   /// isMem - True if this is a memory loc, false if it is a register loc.
00061   unsigned isMem : 1;
00062 
00063   /// isCustom - True if this arg/retval requires special handling.
00064   unsigned isCustom : 1;
00065 
00066   /// Information about how the value is assigned.
00067   LocInfo HTP : 6;
00068 
00069   /// ValVT - The type of the value being assigned.
00070   MVT ValVT;
00071 
00072   /// LocVT - The type of the location being assigned to.
00073   MVT LocVT;
00074 public:
00075 
00076   static CCValAssign getReg(unsigned ValNo, MVT ValVT,
00077                             unsigned RegNo, MVT LocVT,
00078                             LocInfo HTP) {
00079     CCValAssign Ret;
00080     Ret.ValNo = ValNo;
00081     Ret.Loc = RegNo;
00082     Ret.isMem = false;
00083     Ret.isCustom = false;
00084     Ret.HTP = HTP;
00085     Ret.ValVT = ValVT;
00086     Ret.LocVT = LocVT;
00087     return Ret;
00088   }
00089 
00090   static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
00091                                   unsigned RegNo, MVT LocVT,
00092                                   LocInfo HTP) {
00093     CCValAssign Ret;
00094     Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
00095     Ret.isCustom = true;
00096     return Ret;
00097   }
00098 
00099   static CCValAssign getMem(unsigned ValNo, MVT ValVT,
00100                             unsigned Offset, MVT LocVT,
00101                             LocInfo HTP) {
00102     CCValAssign Ret;
00103     Ret.ValNo = ValNo;
00104     Ret.Loc = Offset;
00105     Ret.isMem = true;
00106     Ret.isCustom = false;
00107     Ret.HTP = HTP;
00108     Ret.ValVT = ValVT;
00109     Ret.LocVT = LocVT;
00110     return Ret;
00111   }
00112 
00113   static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
00114                                   unsigned Offset, MVT LocVT,
00115                                   LocInfo HTP) {
00116     CCValAssign Ret;
00117     Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
00118     Ret.isCustom = true;
00119     return Ret;
00120   }
00121 
00122   // There is no need to differentiate between a pending CCValAssign and other
00123   // kinds, as they are stored in a different list.
00124   static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
00125                                 LocInfo HTP) {
00126     return getReg(ValNo, ValVT, 0, LocVT, HTP);
00127   }
00128 
00129   void convertToReg(unsigned RegNo) {
00130     Loc = RegNo;
00131     isMem = false;
00132   }
00133 
00134   void convertToMem(unsigned Offset) {
00135     Loc = Offset;
00136     isMem = true;
00137   }
00138 
00139   unsigned getValNo() const { return ValNo; }
00140   MVT getValVT() const { return ValVT; }
00141 
00142   bool isRegLoc() const { return !isMem; }
00143   bool isMemLoc() const { return isMem; }
00144 
00145   bool needsCustom() const { return isCustom; }
00146 
00147   unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
00148   unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
00149   MVT getLocVT() const { return LocVT; }
00150 
00151   LocInfo getLocInfo() const { return HTP; }
00152   bool isExtInLoc() const {
00153     return (HTP == AExt || HTP == SExt || HTP == ZExt);
00154   }
00155 
00156   bool isUpperBitsInLoc() const {
00157     return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
00158   }
00159 };
00160 
00161 /// CCAssignFn - This function assigns a location for Val, updating State to
00162 /// reflect the change.  It returns 'true' if it failed to handle Val.
00163 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
00164                         MVT LocVT, CCValAssign::LocInfo LocInfo,
00165                         ISD::ArgFlagsTy ArgFlags, CCState &State);
00166 
00167 /// CCCustomFn - This function assigns a location for Val, possibly updating
00168 /// all args to reflect changes and indicates if it handled it. It must set
00169 /// isCustom if it handles the arg and returns true.
00170 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
00171                         MVT &LocVT, CCValAssign::LocInfo &LocInfo,
00172                         ISD::ArgFlagsTy &ArgFlags, CCState &State);
00173 
00174 /// ParmContext - This enum tracks whether calling convention lowering is in
00175 /// the context of prologue or call generation. Not all backends make use of
00176 /// this information.
00177 typedef enum { Unknown, Prologue, Call } ParmContext;
00178 
00179 /// CCState - This class holds information needed while lowering arguments and
00180 /// return values.  It captures which registers are already assigned and which
00181 /// stack slots are used.  It provides accessors to allocate these values.
00182 class CCState {
00183 private:
00184   CallingConv::ID CallingConv;
00185   bool IsVarArg;
00186   MachineFunction &MF;
00187   const TargetRegisterInfo &TRI;
00188   SmallVectorImpl<CCValAssign> &Locs;
00189   LLVMContext &Context;
00190 
00191   unsigned StackOffset;
00192   SmallVector<uint32_t, 16> UsedRegs;
00193   SmallVector<CCValAssign, 4> PendingLocs;
00194 
00195   // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
00196   //
00197   // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
00198   // tracking.
00199   // Or, in another words it tracks byval parameters that are stored in
00200   // general purpose registers.
00201   //
00202   // For 4 byte stack alignment,
00203   // instance index means byval parameter number in formal
00204   // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
00205   // then, for function "foo":
00206   //
00207   // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
00208   //
00209   // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
00210   // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
00211   //
00212   // In case of 8 bytes stack alignment,
00213   // ByValRegs may also contain information about wasted registers.
00214   // In function shown above, r3 would be wasted according to AAPCS rules.
00215   // And in that case ByValRegs[1].Waste would be "true".
00216   // ByValRegs vector size still would be 2,
00217   // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
00218   //
00219   // Supposed use-case for this collection:
00220   // 1. Initially ByValRegs is empty, InRegsParamsProceed is 0.
00221   // 2. HandleByVal fillups ByValRegs.
00222   // 3. Argument analysis (LowerFormatArguments, for example). After
00223   // some byval argument was analyzed, InRegsParamsProceed is increased.
00224   struct ByValInfo {
00225     ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
00226       Begin(B), End(E), Waste(IsWaste) {}
00227     // First register allocated for current parameter.
00228     unsigned Begin;
00229 
00230     // First after last register allocated for current parameter.
00231     unsigned End;
00232 
00233     // Means that current range of registers doesn't belong to any
00234     // parameters. It was wasted due to stack alignment rules.
00235     // For more information see:
00236     // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
00237     bool Waste;
00238   };
00239   SmallVector<ByValInfo, 4 > ByValRegs;
00240 
00241   // InRegsParamsProceed - shows how many instances of ByValRegs was proceed
00242   // during argument analysis.
00243   unsigned InRegsParamsProceed;
00244 
00245 protected:
00246   ParmContext CallOrPrologue;
00247 
00248 public:
00249   CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
00250           SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
00251 
00252   void addLoc(const CCValAssign &V) {
00253     Locs.push_back(V);
00254   }
00255 
00256   LLVMContext &getContext() const { return Context; }
00257   MachineFunction &getMachineFunction() const { return MF; }
00258   CallingConv::ID getCallingConv() const { return CallingConv; }
00259   bool isVarArg() const { return IsVarArg; }
00260 
00261   unsigned getNextStackOffset() const { return StackOffset; }
00262 
00263   /// isAllocated - Return true if the specified register (or an alias) is
00264   /// allocated.
00265   bool isAllocated(unsigned Reg) const {
00266     return UsedRegs[Reg/32] & (1 << (Reg&31));
00267   }
00268 
00269   /// AnalyzeFormalArguments - Analyze an array of argument values,
00270   /// incorporating info about the formals into this state.
00271   void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
00272                               CCAssignFn Fn);
00273 
00274   /// AnalyzeReturn - Analyze the returned values of a return,
00275   /// incorporating info about the result values into this state.
00276   void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
00277                      CCAssignFn Fn);
00278 
00279   /// CheckReturn - Analyze the return values of a function, returning
00280   /// true if the return can be performed without sret-demotion, and
00281   /// false otherwise.
00282   bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
00283                    CCAssignFn Fn);
00284 
00285   /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
00286   /// incorporating info about the passed values into this state.
00287   void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
00288                            CCAssignFn Fn);
00289 
00290   /// AnalyzeCallOperands - Same as above except it takes vectors of types
00291   /// and argument flags.
00292   void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
00293                            SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
00294                            CCAssignFn Fn);
00295 
00296   /// AnalyzeCallResult - Analyze the return values of a call,
00297   /// incorporating info about the passed values into this state.
00298   void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
00299                          CCAssignFn Fn);
00300 
00301   /// AnalyzeCallResult - Same as above except it's specialized for calls which
00302   /// produce a single value.
00303   void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
00304 
00305   /// getFirstUnallocated - Return the first unallocated register in the set, or
00306   /// NumRegs if they are all allocated.
00307   unsigned getFirstUnallocated(const MCPhysReg *Regs, unsigned NumRegs) const {
00308     for (unsigned i = 0; i != NumRegs; ++i)
00309       if (!isAllocated(Regs[i]))
00310         return i;
00311     return NumRegs;
00312   }
00313 
00314   /// AllocateReg - Attempt to allocate one register.  If it is not available,
00315   /// return zero.  Otherwise, return the register, marking it and any aliases
00316   /// as allocated.
00317   unsigned AllocateReg(unsigned Reg) {
00318     if (isAllocated(Reg)) return 0;
00319     MarkAllocated(Reg);
00320     return Reg;
00321   }
00322 
00323   /// Version of AllocateReg with extra register to be shadowed.
00324   unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
00325     if (isAllocated(Reg)) return 0;
00326     MarkAllocated(Reg);
00327     MarkAllocated(ShadowReg);
00328     return Reg;
00329   }
00330 
00331   /// AllocateReg - Attempt to allocate one of the specified registers.  If none
00332   /// are available, return zero.  Otherwise, return the first one available,
00333   /// marking it and any aliases as allocated.
00334   unsigned AllocateReg(const MCPhysReg *Regs, unsigned NumRegs) {
00335     unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
00336     if (FirstUnalloc == NumRegs)
00337       return 0;    // Didn't find the reg.
00338 
00339     // Mark the register and any aliases as allocated.
00340     unsigned Reg = Regs[FirstUnalloc];
00341     MarkAllocated(Reg);
00342     return Reg;
00343   }
00344 
00345   /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
00346   /// registers. If this is not possible, return zero. Otherwise, return the first
00347   /// register of the block that were allocated, marking the entire block as allocated.
00348   unsigned AllocateRegBlock(const uint16_t *Regs, unsigned NumRegs, unsigned RegsRequired) {
00349     for (unsigned StartIdx = 0; StartIdx <= NumRegs - RegsRequired; ++StartIdx) {
00350       bool BlockAvailable = true;
00351       // Check for already-allocated regs in this block
00352       for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
00353         if (isAllocated(Regs[StartIdx + BlockIdx])) {
00354           BlockAvailable = false;
00355           break;
00356         }
00357       }
00358       if (BlockAvailable) {
00359         // Mark the entire block as allocated
00360         for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
00361           MarkAllocated(Regs[StartIdx + BlockIdx]);
00362         }
00363         return Regs[StartIdx];
00364       }
00365     }
00366     // No block was available
00367     return 0;
00368   }
00369 
00370   /// Version of AllocateReg with list of registers to be shadowed.
00371   unsigned AllocateReg(const MCPhysReg *Regs, const MCPhysReg *ShadowRegs,
00372                        unsigned NumRegs) {
00373     unsigned FirstUnalloc = getFirstUnallocated(Regs, NumRegs);
00374     if (FirstUnalloc == NumRegs)
00375       return 0;    // Didn't find the reg.
00376 
00377     // Mark the register and any aliases as allocated.
00378     unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
00379     MarkAllocated(Reg);
00380     MarkAllocated(ShadowReg);
00381     return Reg;
00382   }
00383 
00384   /// AllocateStack - Allocate a chunk of stack space with the specified size
00385   /// and alignment.
00386   unsigned AllocateStack(unsigned Size, unsigned Align) {
00387     assert(Align && ((Align - 1) & Align) == 0); // Align is power of 2.
00388     StackOffset = ((StackOffset + Align - 1) & ~(Align - 1));
00389     unsigned Result = StackOffset;
00390     StackOffset += Size;
00391     MF.getFrameInfo()->ensureMaxAlignment(Align);
00392     return Result;
00393   }
00394 
00395   /// Version of AllocateStack with extra register to be shadowed.
00396   unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
00397     MarkAllocated(ShadowReg);
00398     return AllocateStack(Size, Align);
00399   }
00400 
00401   /// Version of AllocateStack with list of extra registers to be shadowed.
00402   /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
00403   unsigned AllocateStack(unsigned Size, unsigned Align,
00404                          const MCPhysReg *ShadowRegs, unsigned NumShadowRegs) {
00405     for (unsigned i = 0; i < NumShadowRegs; ++i)
00406       MarkAllocated(ShadowRegs[i]);
00407     return AllocateStack(Size, Align);
00408   }
00409 
00410   // HandleByVal - Allocate a stack slot large enough to pass an argument by
00411   // value. The size and alignment information of the argument is encoded in its
00412   // parameter attribute.
00413   void HandleByVal(unsigned ValNo, MVT ValVT,
00414                    MVT LocVT, CCValAssign::LocInfo LocInfo,
00415                    int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
00416 
00417   // Returns count of byval arguments that are to be stored (even partly)
00418   // in registers.
00419   unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
00420 
00421   // Returns count of byval in-regs arguments proceed.
00422   unsigned getInRegsParamsProceed() const { return InRegsParamsProceed; }
00423 
00424   // Get information about N-th byval parameter that is stored in registers.
00425   // Here "ByValParamIndex" is N.
00426   void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
00427                           unsigned& BeginReg, unsigned& EndReg) const {
00428     assert(InRegsParamRecordIndex < ByValRegs.size() &&
00429            "Wrong ByVal parameter index");
00430 
00431     const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
00432     BeginReg = info.Begin;
00433     EndReg = info.End;
00434   }
00435 
00436   // Add information about parameter that is kept in registers.
00437   void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
00438     ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
00439   }
00440 
00441   // Goes either to next byval parameter (excluding "waste" record), or
00442   // to the end of collection.
00443   // Returns false, if end is reached.
00444   bool nextInRegsParam() {
00445     unsigned e = ByValRegs.size();
00446     if (InRegsParamsProceed < e)
00447       ++InRegsParamsProceed;
00448     return InRegsParamsProceed < e;
00449   }
00450 
00451   // Clear byval registers tracking info.
00452   void clearByValRegsInfo() {
00453     InRegsParamsProceed = 0;
00454     ByValRegs.clear();
00455   }
00456 
00457   // Rewind byval registers tracking info.
00458   void rewindByValRegsInfo() {
00459     InRegsParamsProceed = 0;
00460   }
00461 
00462   ParmContext getCallOrPrologue() const { return CallOrPrologue; }
00463 
00464   // Get list of pending assignments
00465   SmallVectorImpl<llvm::CCValAssign> &getPendingLocs() {
00466     return PendingLocs;
00467   }
00468 
00469 private:
00470   /// MarkAllocated - Mark a register and all of its aliases as allocated.
00471   void MarkAllocated(unsigned Reg);
00472 };
00473 
00474 
00475 
00476 } // end namespace llvm
00477 
00478 #endif