LLVM 23.0.0git
ELFObjectFile.cpp
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1//===- ELFObjectFile.cpp - ELF object file implementation -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// Part of the ELFObjectFile class implementation.
10//
11//===----------------------------------------------------------------------===//
12
17#include "llvm/Object/ELF.h"
19#include "llvm/Object/Error.h"
29#include <algorithm>
30#include <cstddef>
31#include <cstdint>
32#include <memory>
33#include <optional>
34#include <string>
35#include <utility>
36
37using namespace llvm;
38using namespace object;
39
41 {"None", "NOTYPE", ELF::STT_NOTYPE},
42 {"Object", "OBJECT", ELF::STT_OBJECT},
43 {"Function", "FUNC", ELF::STT_FUNC},
44 {"Section", "SECTION", ELF::STT_SECTION},
45 {"File", "FILE", ELF::STT_FILE},
46 {"Common", "COMMON", ELF::STT_COMMON},
47 {"TLS", "TLS", ELF::STT_TLS},
48 {"Unknown", "<unknown>: 7", 7},
49 {"Unknown", "<unknown>: 8", 8},
50 {"Unknown", "<unknown>: 9", 9},
51 {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC},
52 {"OS Specific", "<OS specific>: 11", 11},
53 {"OS Specific", "<OS specific>: 12", 12},
54 {"Proc Specific", "<processor specific>: 13", 13},
55 {"Proc Specific", "<processor specific>: 14", 14},
56 {"Proc Specific", "<processor specific>: 15", 15}
57};
58
61
62template <class ELFT>
64createPtr(MemoryBufferRef Object, bool InitContent) {
65 auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent);
66 if (Error E = Ret.takeError())
67 return std::move(E);
68 return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret));
69}
70
71Expected<std::unique_ptr<ObjectFile>>
73 std::pair<unsigned char, unsigned char> Ident =
74 getElfArchType(Obj.getBuffer());
75 std::size_t MaxAlignment =
76 1ULL << llvm::countr_zero(
77 reinterpret_cast<uintptr_t>(Obj.getBufferStart()));
78
79 if (MaxAlignment < 2)
80 return createError("Insufficient alignment");
81
82 if (Ident.first == ELF::ELFCLASS32) {
83 if (Ident.second == ELF::ELFDATA2LSB)
84 return createPtr<ELF32LE>(Obj, InitContent);
85 else if (Ident.second == ELF::ELFDATA2MSB)
86 return createPtr<ELF32BE>(Obj, InitContent);
87 else
88 return createError("Invalid ELF data");
89 } else if (Ident.first == ELF::ELFCLASS64) {
90 if (Ident.second == ELF::ELFDATA2LSB)
91 return createPtr<ELF64LE>(Obj, InitContent);
92 else if (Ident.second == ELF::ELFDATA2MSB)
93 return createPtr<ELF64BE>(Obj, InitContent);
94 else
95 return createError("Invalid ELF data");
96 }
97 return createError("Invalid ELF class");
98}
99
100SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const {
101 SubtargetFeatures Features;
102 unsigned PlatformFlags = getPlatformFlags();
103
104 switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
106 break;
108 Features.AddFeature("mips2");
109 break;
111 Features.AddFeature("mips3");
112 break;
114 Features.AddFeature("mips4");
115 break;
117 Features.AddFeature("mips5");
118 break;
120 Features.AddFeature("mips32");
121 break;
123 Features.AddFeature("mips64");
124 break;
126 Features.AddFeature("mips32r2");
127 break;
129 Features.AddFeature("mips64r2");
130 break;
132 Features.AddFeature("mips32r6");
133 break;
135 Features.AddFeature("mips64r6");
136 break;
137 default:
138 llvm_unreachable("Unknown EF_MIPS_ARCH value");
139 }
140
141 switch (PlatformFlags & ELF::EF_MIPS_MACH) {
143 // No feature associated with this value.
144 break;
146 Features.AddFeature("cnmips");
147 break;
148 default:
149 llvm_unreachable("Unknown EF_MIPS_ARCH value");
150 }
151
152 if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
153 Features.AddFeature("mips16");
154 if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
155 Features.AddFeature("micromips");
156
157 return Features;
158}
159
160SubtargetFeatures ELFObjectFileBase::getARMFeatures() const {
161 SubtargetFeatures Features;
162 ARMAttributeParser Attributes;
164 consumeError(std::move(E));
165 return SubtargetFeatures();
166 }
167
168 // both ARMv7-M and R have to support thumb hardware div
169 bool isV7 = false;
170 std::optional<unsigned> Attr =
171 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
172 if (Attr)
173 isV7 = *Attr == ARMBuildAttrs::v7;
174
175 Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
176 if (Attr) {
177 switch (*Attr) {
179 Features.AddFeature("aclass");
180 break;
182 Features.AddFeature("rclass");
183 if (isV7)
184 Features.AddFeature("hwdiv");
185 break;
187 Features.AddFeature("mclass");
188 if (isV7)
189 Features.AddFeature("hwdiv");
190 break;
191 }
192 }
193
194 Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use);
195 if (Attr) {
196 switch (*Attr) {
197 default:
198 break;
200 Features.AddFeature("thumb", false);
201 Features.AddFeature("thumb2", false);
202 break;
204 Features.AddFeature("thumb2");
205 break;
206 }
207 }
208
209 Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch);
210 if (Attr) {
211 switch (*Attr) {
212 default:
213 break;
215 Features.AddFeature("vfp2sp", false);
216 Features.AddFeature("vfp3d16sp", false);
217 Features.AddFeature("vfp4d16sp", false);
218 break;
220 Features.AddFeature("vfp2");
221 break;
224 Features.AddFeature("vfp3");
225 break;
228 Features.AddFeature("vfp4");
229 break;
230 }
231 }
232
233 Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch);
234 if (Attr) {
235 switch (*Attr) {
236 default:
237 break;
239 Features.AddFeature("neon", false);
240 Features.AddFeature("fp16", false);
241 break;
243 Features.AddFeature("neon");
244 break;
246 Features.AddFeature("neon");
247 Features.AddFeature("fp16");
248 break;
249 }
250 }
251
252 Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch);
253 if (Attr) {
254 switch (*Attr) {
255 default:
256 break;
258 Features.AddFeature("mve", false);
259 Features.AddFeature("mve.fp", false);
260 break;
262 Features.AddFeature("mve.fp", false);
263 Features.AddFeature("mve");
264 break;
266 Features.AddFeature("mve.fp");
267 break;
268 }
269 }
270
271 Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use);
272 if (Attr) {
273 switch (*Attr) {
274 default:
275 break;
277 Features.AddFeature("hwdiv", false);
278 Features.AddFeature("hwdiv-arm", false);
279 break;
281 Features.AddFeature("hwdiv");
282 Features.AddFeature("hwdiv-arm");
283 break;
284 }
285 }
286
287 return Features;
288}
289
290static std::string hexagonAttrToFeatureString(unsigned Attr) {
291 return "v" + utostr(Attr);
292}
293
294SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const {
295 SubtargetFeatures Features;
296 HexagonAttributeParser Parser;
297 if (Error E = getBuildAttributes(Parser)) {
298 // Return no attributes if none can be read.
299 // This behavior is important for backwards compatibility.
300 consumeError(std::move(E));
301 return Features;
302 }
303 std::optional<unsigned> Attr;
304
305 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ARCH)))
306 Features.AddFeature(hexagonAttrToFeatureString(*Attr));
307
308 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXARCH)))
309 Features.AddFeature("hvx" + hexagonAttrToFeatureString(*Attr));
310
311 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXIEEEFP)))
312 if (*Attr)
313 Features.AddFeature("hvx-ieee-fp");
314
315 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXQFLOAT)))
316 if (*Attr)
317 Features.AddFeature("hvx-qfloat");
318
319 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ZREG)))
320 if (*Attr)
321 Features.AddFeature("zreg");
322
323 if ((Attr = Parser.getAttributeValue(HexagonAttrs::AUDIO)))
324 if (*Attr)
325 Features.AddFeature("audio");
326
327 if ((Attr = Parser.getAttributeValue(HexagonAttrs::CABAC)))
328 if (*Attr)
329 Features.AddFeature("cabac");
330
331 return Features;
332}
333
334Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const {
335 SubtargetFeatures Features;
336 unsigned PlatformFlags = getPlatformFlags();
337
338 if (PlatformFlags & ELF::EF_RISCV_RVC) {
339 Features.AddFeature("zca");
340 }
341
342 RISCVAttributeParser Attributes;
344 return std::move(E);
345 }
346
347 std::optional<StringRef> Attr =
348 Attributes.getAttributeString(RISCVAttrs::ARCH);
349 if (Attr) {
350 auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr);
351 if (!ParseResult)
352 return ParseResult.takeError();
353 auto &ISAInfo = *ParseResult;
354
355 if (ISAInfo->getXLen() == 32)
356 Features.AddFeature("64bit", false);
357 else if (ISAInfo->getXLen() == 64)
358 Features.AddFeature("64bit");
359 else
360 llvm_unreachable("XLEN should be 32 or 64.");
361
362 Features.addFeaturesVector(ISAInfo->toFeatures());
363 }
364
365 return Features;
366}
367
368SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const {
369 SubtargetFeatures Features;
370
373 break;
375 Features.AddFeature("d");
376 // D implies F according to LoongArch ISA spec.
377 [[fallthrough]];
379 Features.AddFeature("f");
380 break;
381 }
382
383 return Features;
384}
385
387 switch (getEMachine()) {
388 case ELF::EM_MIPS:
389 return getMIPSFeatures();
390 case ELF::EM_ARM:
391 return getARMFeatures();
392 case ELF::EM_RISCV:
393 return getRISCVFeatures();
395 return getLoongArchFeatures();
396 case ELF::EM_HEXAGON:
397 return getHexagonFeatures();
398 default:
399 return SubtargetFeatures();
400 }
401}
402
403std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const {
404 switch (getEMachine()) {
405 case ELF::EM_AMDGPU:
406 return getAMDGPUCPUName();
407 case ELF::EM_CUDA:
408 return getNVPTXCPUName();
409 case ELF::EM_PPC:
410 case ELF::EM_PPC64:
411 return StringRef("future");
412 case ELF::EM_BPF:
413 return StringRef("v4");
414 default:
415 return std::nullopt;
416 }
417}
418
419StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
421 unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH;
422
423 switch (CPU) {
424#define X(NUM, ENUM, NAME) \
425 case ELF::ENUM: \
426 return NAME;
428#undef X
429
430 default:
431 llvm_unreachable("Unknown EF_AMDGPU_MACH value");
432 }
433}
434
435StringRef ELFObjectFileBase::getNVPTXCPUName() const {
441
442 switch (SM) {
443 // Fermi architecture.
445 return "sm_20";
447 return "sm_21";
448
449 // Kepler architecture.
451 return "sm_30";
453 return "sm_32";
455 return "sm_35";
457 return "sm_37";
458
459 // Maxwell architecture.
461 return "sm_50";
463 return "sm_52";
465 return "sm_53";
466
467 // Pascal architecture.
469 return "sm_60";
471 return "sm_61";
473 return "sm_62";
474
475 // Volta architecture.
477 return "sm_70";
479 return "sm_72";
480
481 // Turing architecture.
483 return "sm_75";
484
485 // Ampere architecture.
487 return "sm_80";
489 return "sm_86";
491 return "sm_87";
493 return "sm_88";
494
495 // Ada architecture.
497 return "sm_89";
498
499 // Hopper architecture.
502 : "sm_90";
503
504 // Blackwell architecture.
506 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_100a"
507 : "sm_100";
509 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_101a"
510 : "sm_101";
512 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_103a"
513 : "sm_103";
515 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_110a"
516 : "sm_110";
517
518 // Rubin architecture.
520 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_120a"
521 : "sm_120";
523 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_121a"
524 : "sm_121";
525 default:
526 llvm_unreachable("Unknown EF_CUDA_SM value");
527 }
528}
529
530// FIXME Encode from a tablegen description or target parser.
532 if (TheTriple.getSubArch() != Triple::NoSubArch)
533 return;
534
535 ARMAttributeParser Attributes;
536 if (Error E = getBuildAttributes(Attributes)) {
537 // TODO Propagate Error.
538 consumeError(std::move(E));
539 return;
540 }
541
542 std::string Triple;
543 // Default to ARM, but use the triple if it's been set.
544 if (TheTriple.isThumb())
545 Triple = "thumb";
546 else
547 Triple = "arm";
548
549 std::optional<unsigned> Attr =
550 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
551 if (Attr) {
552 switch (*Attr) {
554 Triple += "v4";
555 break;
557 Triple += "v4t";
558 break;
560 Triple += "v5t";
561 break;
563 Triple += "v5te";
564 break;
566 Triple += "v5tej";
567 break;
569 Triple += "v6";
570 break;
572 Triple += "v6kz";
573 break;
575 Triple += "v6t2";
576 break;
578 Triple += "v6k";
579 break;
580 case ARMBuildAttrs::v7: {
581 std::optional<unsigned> ArchProfileAttr =
582 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
583 if (ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile)
584 Triple += "v7m";
585 else
586 Triple += "v7";
587 break;
588 }
590 Triple += "v6m";
591 break;
593 Triple += "v6sm";
594 break;
596 Triple += "v7em";
597 break;
599 Triple += "v8a";
600 break;
602 Triple += "v8r";
603 break;
605 Triple += "v8m.base";
606 break;
608 Triple += "v8m.main";
609 break;
611 Triple += "v8.1m.main";
612 break;
614 Triple += "v9a";
615 break;
616 }
617 }
618 if (!isLittleEndian())
619 Triple += "eb";
620
621 TheTriple.setArchName(Triple);
622}
623
624std::vector<ELFPltEntry>
626 std::string Err;
627 const auto Triple = makeTriple();
628 const auto *T = TargetRegistry::lookupTarget(Triple, Err);
629 if (!T)
630 return {};
631 uint32_t JumpSlotReloc = 0, GlobDatReloc = 0;
632 switch (Triple.getArch()) {
633 case Triple::x86:
634 JumpSlotReloc = ELF::R_386_JUMP_SLOT;
635 GlobDatReloc = ELF::R_386_GLOB_DAT;
636 break;
637 case Triple::x86_64:
638 JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT;
639 GlobDatReloc = ELF::R_X86_64_GLOB_DAT;
640 break;
641 case Triple::aarch64:
643 JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT;
644 break;
645 case Triple::arm:
646 case Triple::armeb:
647 case Triple::thumb:
648 case Triple::thumbeb:
649 JumpSlotReloc = ELF::R_ARM_JUMP_SLOT;
650 break;
651 case Triple::hexagon:
652 JumpSlotReloc = ELF::R_HEX_JMP_SLOT;
653 GlobDatReloc = ELF::R_HEX_GLOB_DAT;
654 break;
655 case Triple::riscv32:
656 case Triple::riscv64:
657 JumpSlotReloc = ELF::R_RISCV_JUMP_SLOT;
658 break;
659 default:
660 return {};
661 }
662 std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo());
663 std::unique_ptr<const MCInstrAnalysis> MIA(
664 T->createMCInstrAnalysis(MII.get()));
665 if (!MIA)
666 return {};
667 std::vector<std::pair<uint64_t, uint64_t>> PltEntries;
668 std::optional<SectionRef> RelaPlt, RelaDyn;
669 uint64_t GotBaseVA = 0;
670 for (const SectionRef &Section : sections()) {
671 Expected<StringRef> NameOrErr = Section.getName();
672 if (!NameOrErr) {
673 consumeError(NameOrErr.takeError());
674 continue;
675 }
676 StringRef Name = *NameOrErr;
677
678 if (Name == ".rela.plt" || Name == ".rel.plt") {
679 RelaPlt = Section;
680 } else if (Name == ".rela.dyn" || Name == ".rel.dyn") {
681 RelaDyn = Section;
682 } else if (Name == ".got.plt") {
683 GotBaseVA = Section.getAddress();
684 } else if (Name == ".plt" || Name == ".plt.got") {
685 Expected<StringRef> PltContents = Section.getContents();
686 if (!PltContents) {
687 consumeError(PltContents.takeError());
688 return {};
689 }
691 PltEntries,
692 MIA->findPltEntries(Section.getAddress(),
693 arrayRefFromStringRef(*PltContents), STI));
694 }
695 }
696
697 // Build a map from GOT entry virtual address to PLT entry virtual address.
699 for (auto [Plt, GotPlt] : PltEntries) {
700 uint64_t GotPltEntry = GotPlt;
701 // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add
702 // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address.
703 // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit.
704 if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386)
705 GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA;
706 GotToPlt.insert(std::make_pair(GotPltEntry, Plt));
707 }
708
709 // Find the relocations in the dynamic relocation table that point to
710 // locations in the GOT for which we know the corresponding PLT entry.
711 std::vector<ELFPltEntry> Result;
712 auto handleRels = [&](iterator_range<relocation_iterator> Rels,
713 uint32_t RelType, StringRef PltSec) {
714 for (const auto &R : Rels) {
715 if (R.getType() != RelType)
716 continue;
717 auto PltEntryIter = GotToPlt.find(R.getOffset());
718 if (PltEntryIter != GotToPlt.end()) {
719 symbol_iterator Sym = R.getSymbol();
720 if (Sym == symbol_end())
721 Result.push_back(
722 ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second});
723 else
724 Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(),
725 PltEntryIter->second});
726 }
727 }
728 };
729
730 if (RelaPlt)
731 handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt");
732
733 // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's
734 // x86 port places the PLT entry in the .plt.got section.
735 if (RelaDyn)
736 handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got");
737
738 return Result;
739}
740
741template <class ELFT>
743 const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex,
744 std::vector<PGOAnalysisMap> *PGOAnalyses) {
745 using Elf_Shdr = typename ELFT::Shdr;
746 bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL;
747 std::vector<BBAddrMap> BBAddrMaps;
748 if (PGOAnalyses)
749 PGOAnalyses->clear();
750
751 const auto &Sections = cantFail(EF.sections());
752 auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> {
753 if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP)
754 return false;
755 if (!TextSectionIndex)
756 return true;
757 Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link);
758 if (!TextSecOrErr)
759 return createError("unable to get the linked-to section for " +
760 describe(EF, Sec) + ": " +
761 toString(TextSecOrErr.takeError()));
762 assert(*TextSecOrErr >= Sections.begin() &&
763 "Text section pointer outside of bounds");
764 if (*TextSectionIndex !=
765 (unsigned)std::distance(Sections.begin(), *TextSecOrErr))
766 return false;
767 return true;
768 };
769
771 EF.getSectionAndRelocations(IsMatch);
772 if (!SectionRelocMapOrErr)
773 return SectionRelocMapOrErr.takeError();
774
775 for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) {
776 if (IsRelocatable && !RelocSec)
777 return createError("unable to get relocation section for " +
778 describe(EF, *Sec));
779 Expected<std::vector<BBAddrMap>> BBAddrMapOrErr =
780 EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses);
781 if (!BBAddrMapOrErr) {
782 if (PGOAnalyses)
783 PGOAnalyses->clear();
784 return createError("unable to read BB addr map section: " +
785 toString(BBAddrMapOrErr.takeError()));
786 }
787 std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(),
788 std::back_inserter(BBAddrMaps));
789 }
790 if (PGOAnalyses)
791 assert(PGOAnalyses->size() == BBAddrMaps.size() &&
792 "The same number of BBAddrMaps and PGOAnalysisMaps should be "
793 "returned when PGO information is requested");
794 return BBAddrMaps;
795}
796
797template <class ELFT>
798static Expected<std::vector<VersionEntry>>
801 using Elf_Shdr = typename ELFT::Shdr;
802 const Elf_Shdr *VerSec = nullptr;
803 const Elf_Shdr *VerNeedSec = nullptr;
804 const Elf_Shdr *VerDefSec = nullptr;
805 // The user should ensure sections() can't fail here.
806 for (const Elf_Shdr &Sec : cantFail(EF.sections())) {
807 if (Sec.sh_type == ELF::SHT_GNU_versym)
808 VerSec = &Sec;
809 else if (Sec.sh_type == ELF::SHT_GNU_verdef)
810 VerDefSec = &Sec;
811 else if (Sec.sh_type == ELF::SHT_GNU_verneed)
812 VerNeedSec = &Sec;
813 }
814 if (!VerSec)
815 return std::vector<VersionEntry>();
816
818 EF.loadVersionMap(VerNeedSec, VerDefSec);
819 if (!MapOrErr)
820 return MapOrErr.takeError();
821
822 std::vector<VersionEntry> Ret;
823 size_t I = 0;
824 for (const ELFSymbolRef &Sym : Symbols) {
825 ++I;
827 EF.template getEntry<typename ELFT::Versym>(*VerSec, I);
828 if (!VerEntryOrErr)
829 return createError("unable to read an entry with index " + Twine(I) +
830 " from " + describe(EF, *VerSec) + ": " +
831 toString(VerEntryOrErr.takeError()));
832
833 Expected<uint32_t> FlagsOrErr = Sym.getFlags();
834 if (!FlagsOrErr)
835 return createError("unable to read flags for symbol with index " +
836 Twine(I) + ": " + toString(FlagsOrErr.takeError()));
837
838 bool IsDefault;
840 (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr,
841 (*FlagsOrErr) & SymbolRef::SF_Undefined);
842 if (!VerOrErr)
843 return createError("unable to get a version for entry " + Twine(I) +
844 " of " + describe(EF, *VerSec) + ": " +
845 toString(VerOrErr.takeError()));
846
847 Ret.push_back({(*VerOrErr).str(), IsDefault});
848 }
849
850 return Ret;
851}
852
853Expected<std::vector<VersionEntry>>
856 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
857 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
858 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
859 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
860 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
861 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
862 return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
863 Symbols);
864}
865
867 std::optional<unsigned> TextSectionIndex,
868 std::vector<PGOAnalysisMap> *PGOAnalyses) const {
869 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
870 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
871 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
872 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
873 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
874 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
875 return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
876 TextSectionIndex, PGOAnalyses);
877}
878
880 auto Data = Sec.getRawDataRefImpl();
881 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
882 return Obj->getCrelDecodeProblem(Data);
883 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
884 return Obj->getCrelDecodeProblem(Data);
885 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
886 return Obj->getCrelDecodeProblem(Data);
887 return cast<ELF64BEObjectFile>(this)->getCrelDecodeProblem(Data);
888}
assert(UImm &&(UImm !=~static_cast< T >(0)) &&"Invalid immediate!")
AMDGPU Kernel Attributes
#define X(NUM, ENUM, NAME)
Definition ELF.h:853
#define AMDGPU_MACH_LIST(X)
Definition ELF.h:768
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
static Expected< std::unique_ptr< ELFObjectFile< ELFT > > > createPtr(MemoryBufferRef Object, bool InitContent)
static Expected< std::vector< BBAddrMap > > readBBAddrMapImpl(const ELFFile< ELFT > &EF, std::optional< unsigned > TextSectionIndex, std::vector< PGOAnalysisMap > *PGOAnalyses)
static std::string hexagonAttrToFeatureString(unsigned Attr)
static Expected< std::vector< VersionEntry > > readDynsymVersionsImpl(const ELFFile< ELFT > &EF, ELFObjectFileBase::elf_symbol_iterator_range Symbols)
#define I(x, y, z)
Definition MD5.cpp:57
#define T
static constexpr unsigned SM(unsigned Version)
iterator find(const_arg_type_t< KeyT > Val)
Definition DenseMap.h:225
iterator end()
Definition DenseMap.h:143
std::pair< iterator, bool > insert(const std::pair< KeyT, ValueT > &KV)
Definition DenseMap.h:286
std::optional< unsigned > getAttributeValue(unsigned tag) const override
Lightweight error class with error context and mandatory checking.
Definition Error.h:159
Tagged union holding either a T or a Error.
Definition Error.h:485
Error takeError()
Take ownership of the stored error.
Definition Error.h:612
Generic base class for all target subtargets.
static LLVM_ABI llvm::Expected< std::unique_ptr< RISCVISAInfo > > parseNormalizedArchString(StringRef Arch)
Parse RISC-V ISA info from an arch string that is already in normalized form (as defined in the psABI...
Represent a constant reference to a string, i.e.
Definition StringRef.h:56
Manages the enabling and disabling of subtarget specific features.
LLVM_ABI void AddFeature(StringRef String, bool Enable=true)
Adds Features.
LLVM_ABI void addFeaturesVector(const ArrayRef< std::string > OtherFeatures)
Triple - Helper class for working with autoconf configuration names.
Definition Triple.h:47
LLVM_ABI void setArchName(StringRef Str)
Set the architecture (first) component of the triple by name.
Definition Triple.cpp:1942
bool isThumb() const
Tests whether the target is Thumb (little and big endian).
Definition Triple.h:913
SubArchType getSubArch() const
get the parsed subarchitecture type for this triple.
Definition Triple.h:439
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition Triple.h:436
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition Twine.h:82
The instances of the Type class are immutable: once they are created, they are never changed.
Definition Type.h:46
A range adaptor for a pair of iterators.
DataRefImpl getRawDataRefImpl() const
MemoryBufferRef Data
Definition Binary.h:38
bool isLittleEndian() const
Definition Binary.h:157
const Elf_Ehdr & getHeader() const
Definition ELF.h:347
Expected< std::vector< BBAddrMap > > decodeBBAddrMap(const Elf_Shdr &Sec, const Elf_Shdr *RelaSec=nullptr, std::vector< PGOAnalysisMap > *PGOAnalyses=nullptr) const
Returns a vector of BBAddrMap structs corresponding to each function within the text section that the...
Definition ELF.cpp:840
Expected< StringRef > getSymbolVersionByIndex(uint32_t SymbolVersionIndex, bool &IsDefault, SmallVector< std::optional< VersionEntry >, 0 > &VersionMap, std::optional< bool > IsSymHidden) const
Definition ELF.h:1120
Expected< Elf_Shdr_Range > sections() const
Definition ELF.h:1038
Expected< MapVector< const Elf_Shdr *, const Elf_Shdr * > > getSectionAndRelocations(std::function< Expected< bool >(const Elf_Shdr &)> IsMatch) const
Returns a map from every section matching IsMatch to its relocation section, or nullptr if it has no ...
Definition ELF.cpp:853
Expected< SmallVector< std::optional< VersionEntry >, 0 > > loadVersionMap(const Elf_Shdr *VerNeedSec, const Elf_Shdr *VerDefSec) const
Definition ELF.h:793
Expected< const Elf_Shdr * > getSection(const Elf_Sym &Sym, const Elf_Shdr *SymTab, DataRegion< Elf_Word > ShndxTable) const
Definition ELF.h:651
virtual uint8_t getEIdentABIVersion() const =0
virtual Error getBuildAttributes(ELFAttributeParser &Attributes) const =0
std::vector< ELFPltEntry > getPltEntries(const MCSubtargetInfo &STI) const
Expected< std::vector< VersionEntry > > readDynsymVersions() const
Returns a vector containing a symbol version for each dynamic symbol.
virtual elf_symbol_iterator_range getDynamicSymbolIterators() const =0
StringRef getCrelDecodeProblem(SectionRef Sec) const
Expected< SubtargetFeatures > getFeatures() const override
std::optional< StringRef > tryGetCPUName() const override
iterator_range< elf_symbol_iterator > elf_symbol_iterator_range
virtual uint16_t getEMachine() const =0
virtual unsigned getPlatformFlags() const =0
Returns platform-specific object flags, if any.
ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source)
void setARMSubArch(Triple &TheTriple) const override
Expected< std::vector< BBAddrMap > > readBBAddrMap(std::optional< unsigned > TextSectionIndex=std::nullopt, std::vector< PGOAnalysisMap > *PGOAnalyses=nullptr) const
Returns a vector of all BB address maps in the object file.
static Expected< ELFObjectFile< ELFT > > create(MemoryBufferRef Object, bool InitContent=true)
static Expected< std::unique_ptr< ObjectFile > > createELFObjectFile(MemoryBufferRef Object, bool InitContent=true)
Triple makeTriple() const
Create a triple from the data in this object file.
section_iterator_range sections() const
Definition ObjectFile.h:331
ObjectFile(unsigned int Type, MemoryBufferRef Source)
DataRefImpl getRawDataRefImpl() const
Definition ObjectFile.h:603
virtual basic_symbol_iterator symbol_end() const =0
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ EM_PPC64
Definition ELF.h:154
@ EM_386
Definition ELF.h:141
@ EM_CUDA
Definition ELF.h:291
@ EM_LOONGARCH
Definition ELF.h:327
@ EM_BPF
Definition ELF.h:324
@ EM_PPC
Definition ELF.h:153
@ EM_HEXAGON
Definition ELF.h:262
@ EM_MIPS
Definition ELF.h:146
@ EM_RISCV
Definition ELF.h:322
@ EM_ARM
Definition ELF.h:161
@ EM_AMDGPU
Definition ELF.h:321
@ SHT_GNU_verneed
Definition ELF.h:1201
@ SHT_GNU_verdef
Definition ELF.h:1200
@ SHT_LLVM_BB_ADDR_MAP
Definition ELF.h:1188
@ SHT_GNU_versym
Definition ELF.h:1202
@ EF_MIPS_ARCH
Definition ELF.h:580
@ EF_MIPS_MICROMIPS
Definition ELF.h:563
@ EF_MIPS_ARCH_32R6
Definition ELF.h:578
@ EF_MIPS_MACH_NONE
Definition ELF.h:541
@ EF_MIPS_ARCH_64
Definition ELF.h:575
@ EF_MIPS_ARCH_32
Definition ELF.h:574
@ EF_MIPS_MACH_OCTEON
Definition ELF.h:549
@ EF_MIPS_ARCH_4
Definition ELF.h:572
@ EF_MIPS_ARCH_5
Definition ELF.h:573
@ EF_MIPS_ARCH_2
Definition ELF.h:570
@ EF_MIPS_ARCH_32R2
Definition ELF.h:576
@ EF_MIPS_ARCH_64R2
Definition ELF.h:577
@ EF_MIPS_ARCH_ASE_M16
Definition ELF.h:564
@ EF_MIPS_MACH
Definition ELF.h:560
@ EF_MIPS_ARCH_1
Definition ELF.h:569
@ EF_MIPS_ARCH_64R6
Definition ELF.h:579
@ EF_MIPS_ARCH_3
Definition ELF.h:571
@ ELFDATA2MSB
Definition ELF.h:341
@ ELFDATA2LSB
Definition ELF.h:340
@ EF_LOONGARCH_ABI_SINGLE_FLOAT
Definition ELF.h:1071
@ EF_LOONGARCH_ABI_DOUBLE_FLOAT
Definition ELF.h:1072
@ EF_LOONGARCH_ABI_SOFT_FLOAT
Definition ELF.h:1070
@ EF_LOONGARCH_ABI_MODIFIER_MASK
Definition ELF.h:1073
@ STT_FUNC
Definition ELF.h:1421
@ STT_NOTYPE
Definition ELF.h:1419
@ STT_SECTION
Definition ELF.h:1422
@ STT_FILE
Definition ELF.h:1423
@ STT_COMMON
Definition ELF.h:1424
@ STT_GNU_IFUNC
Definition ELF.h:1426
@ STT_OBJECT
Definition ELF.h:1420
@ STT_TLS
Definition ELF.h:1425
@ EF_CUDA_SM21
Definition ELF.h:948
@ EF_CUDA_SM90
Definition ELF.h:967
@ EF_CUDA_SM86
Definition ELF.h:963
@ EF_CUDA_SM60
Definition ELF.h:956
@ EF_CUDA_SM
Definition ELF.h:938
@ EF_CUDA_SM89
Definition ELF.h:966
@ EF_CUDA_SM37
Definition ELF.h:952
@ EF_CUDA_SM32
Definition ELF.h:950
@ EF_CUDA_SM72
Definition ELF.h:960
@ EF_CUDA_SM50
Definition ELF.h:953
@ EF_CUDA_ACCELERATORS
Definition ELF.h:990
@ EF_CUDA_SM121
Definition ELF.h:973
@ EF_CUDA_SM61
Definition ELF.h:957
@ EF_CUDA_SM_MASK
Definition ELF.h:941
@ EF_CUDA_SM52
Definition ELF.h:954
@ EF_CUDA_SM35
Definition ELF.h:951
@ EF_CUDA_SM120
Definition ELF.h:972
@ EF_CUDA_SM100
Definition ELF.h:968
@ EF_CUDA_SM62
Definition ELF.h:958
@ EF_CUDA_SM101
Definition ELF.h:969
@ EF_CUDA_SM30
Definition ELF.h:949
@ EF_CUDA_SM_OFFSET
Definition ELF.h:944
@ EF_CUDA_ACCELERATORS_V1
Definition ELF.h:982
@ EF_CUDA_SM75
Definition ELF.h:961
@ EF_CUDA_SM103
Definition ELF.h:970
@ EF_CUDA_SM87
Definition ELF.h:964
@ EF_CUDA_SM20
Definition ELF.h:947
@ EF_CUDA_SM88
Definition ELF.h:965
@ EF_CUDA_SM80
Definition ELF.h:962
@ EF_CUDA_SM53
Definition ELF.h:955
@ EF_CUDA_SM70
Definition ELF.h:959
@ EF_CUDA_SM110
Definition ELF.h:971
@ ELFCLASS64
Definition ELF.h:334
@ ELFCLASS32
Definition ELF.h:333
@ ET_REL
Definition ELF.h:119
@ EF_AMDGPU_MACH
Definition ELF.h:848
@ ELFABIVERSION_CUDA_V1
Definition ELF.h:391
@ EF_RISCV_RVC
Definition ELF.h:712
Error createError(const Twine &Err)
Definition Error.h:86
constexpr int NumElfSymbolTypes
static std::string describe(const ELFFile< ELFT > &Obj, const typename ELFT::Shdr &Sec)
Definition ELF.h:147
std::pair< unsigned char, unsigned char > getElfArchType(StringRef Object)
Definition ELF.h:82
LLVM_ABI const llvm::EnumEntry< unsigned > ElfSymbolTypes[NumElfSymbolTypes]
This is an optimization pass for GlobalISel generic memory operations.
ArrayRef< CharT > arrayRefFromStringRef(StringRef Input)
Construct a string ref from an array ref of unsigned chars.
decltype(auto) dyn_cast(const From &Val)
dyn_cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:643
void append_range(Container &C, Range &&R)
Wrapper function to append range R to container C.
Definition STLExtras.h:2207
std::string utostr(uint64_t X, bool isNeg=false)
int countr_zero(T Val)
Count number of 0's from the least significant bit to the most stopping at the first 1.
Definition bit.h:204
void cantFail(Error Err, const char *Msg=nullptr)
Report a fatal error if Err is a failure value.
Definition Error.h:769
std::string toString(const APInt &I, unsigned Radix, bool Signed, bool formatAsCLiteral=false, bool UpperCase=true, bool InsertSeparators=false)
decltype(auto) cast(const From &Val)
cast<X> - Return the argument parameter cast to the specified type.
Definition Casting.h:559
void consumeError(Error Err)
Consume a Error without doing anything.
Definition Error.h:1106
static LLVM_ABI const Target * lookupTarget(const Triple &TheTriple, std::string &Error)
lookupTarget - Lookup a target based on a target triple.