LLVM API Documentation

FunctionLoweringInfo.h
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00001 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This implements routines for translating functions from LLVM IR into
00011 // Machine IR.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
00016 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
00017 
00018 #include "llvm/ADT/APInt.h"
00019 #include "llvm/ADT/DenseMap.h"
00020 #include "llvm/ADT/IndexedMap.h"
00021 #include "llvm/ADT/SmallPtrSet.h"
00022 #include "llvm/ADT/SmallVector.h"
00023 #include "llvm/CodeGen/MachineBasicBlock.h"
00024 #include "llvm/CodeGen/ISDOpcodes.h"
00025 #include "llvm/IR/InlineAsm.h"
00026 #include "llvm/IR/Instructions.h"
00027 #include "llvm/Target/TargetRegisterInfo.h"
00028 #include <vector>
00029 
00030 namespace llvm {
00031 
00032 class AllocaInst;
00033 class BasicBlock;
00034 class BranchProbabilityInfo;
00035 class CallInst;
00036 class Function;
00037 class GlobalVariable;
00038 class Instruction;
00039 class MachineInstr;
00040 class MachineBasicBlock;
00041 class MachineFunction;
00042 class MachineModuleInfo;
00043 class MachineRegisterInfo;
00044 class SelectionDAG;
00045 class MVT;
00046 class TargetLowering;
00047 class Value;
00048 
00049 //===--------------------------------------------------------------------===//
00050 /// FunctionLoweringInfo - This contains information that is global to a
00051 /// function that is used when lowering a region of the function.
00052 ///
00053 class FunctionLoweringInfo {
00054 public:
00055   const Function *Fn;
00056   MachineFunction *MF;
00057   const TargetLowering *TLI;
00058   MachineRegisterInfo *RegInfo;
00059   BranchProbabilityInfo *BPI;
00060   /// CanLowerReturn - true iff the function's return value can be lowered to
00061   /// registers.
00062   bool CanLowerReturn;
00063 
00064   /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
00065   /// allocated to hold a pointer to the hidden sret parameter.
00066   unsigned DemoteRegister;
00067 
00068   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
00069   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
00070 
00071   /// ValueMap - Since we emit code for the function a basic block at a time,
00072   /// we must remember which virtual registers hold the values for
00073   /// cross-basic-block values.
00074   DenseMap<const Value*, unsigned> ValueMap;
00075 
00076   /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
00077   /// the entry block.  This allows the allocas to be efficiently referenced
00078   /// anywhere in the function.
00079   DenseMap<const AllocaInst*, int> StaticAllocaMap;
00080 
00081   /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
00082   DenseMap<const Argument*, int> ByValArgFrameIndexMap;
00083 
00084   /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
00085   /// function arguments that are inserted after scheduling is completed.
00086   SmallVector<MachineInstr*, 8> ArgDbgValues;
00087 
00088   /// RegFixups - Registers which need to be replaced after isel is done.
00089   DenseMap<unsigned, unsigned> RegFixups;
00090 
00091   /// StatepointStackSlots - A list of temporary stack slots (frame indices) 
00092   /// used to spill values at a statepoint.  We store them here to enable
00093   /// reuse of the same stack slots across different statepoints in different
00094   /// basic blocks.
00095   SmallVector<unsigned, 50> StatepointStackSlots;
00096 
00097   /// MBB - The current block.
00098   MachineBasicBlock *MBB;
00099 
00100   /// MBB - The current insert position inside the current block.
00101   MachineBasicBlock::iterator InsertPt;
00102 
00103 #ifndef NDEBUG
00104   SmallPtrSet<const Instruction *, 8> CatchInfoLost;
00105   SmallPtrSet<const Instruction *, 8> CatchInfoFound;
00106 #endif
00107 
00108   struct LiveOutInfo {
00109     unsigned NumSignBits : 31;
00110     bool IsValid : 1;
00111     APInt KnownOne, KnownZero;
00112     LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
00113                     KnownZero(1, 0) {}
00114   };
00115 
00116   /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
00117   /// for a value.
00118   DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
00119 
00120   /// VisitedBBs - The set of basic blocks visited thus far by instruction
00121   /// selection.
00122   SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
00123 
00124   /// PHINodesToUpdate - A list of phi instructions whose operand list will
00125   /// be updated after processing the current basic block.
00126   /// TODO: This isn't per-function state, it's per-basic-block state. But
00127   /// there's no other convenient place for it to live right now.
00128   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
00129   unsigned OrigNumPHINodesToUpdate;
00130 
00131   /// If the current MBB is a landing pad, the exception pointer and exception
00132   /// selector registers are copied into these virtual registers by
00133   /// SelectionDAGISel::PrepareEHLandingPad().
00134   unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
00135 
00136   /// set - Initialize this FunctionLoweringInfo with the given Function
00137   /// and its associated MachineFunction.
00138   ///
00139   void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
00140 
00141   /// clear - Clear out all the function-specific state. This returns this
00142   /// FunctionLoweringInfo to an empty state, ready to be used for a
00143   /// different function.
00144   void clear();
00145 
00146   /// isExportedInst - Return true if the specified value is an instruction
00147   /// exported from its block.
00148   bool isExportedInst(const Value *V) {
00149     return ValueMap.count(V);
00150   }
00151 
00152   unsigned CreateReg(MVT VT);
00153   
00154   unsigned CreateRegs(Type *Ty);
00155   
00156   unsigned InitializeRegForValue(const Value *V) {
00157     unsigned &R = ValueMap[V];
00158     assert(R == 0 && "Already initialized this value register!");
00159     return R = CreateRegs(V->getType());
00160   }
00161 
00162   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
00163   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
00164   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
00165     if (!LiveOutRegInfo.inBounds(Reg))
00166       return nullptr;
00167 
00168     const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
00169     if (!LOI->IsValid)
00170       return nullptr;
00171 
00172     return LOI;
00173   }
00174 
00175   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
00176   /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
00177   /// the register's LiveOutInfo is for a smaller bit width, it is extended to
00178   /// the larger bit width by zero extension. The bit width must be no smaller
00179   /// than the LiveOutInfo's existing bit width.
00180   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
00181 
00182   /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
00183   void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
00184                          const APInt &KnownZero, const APInt &KnownOne) {
00185     // Only install this information if it tells us something.
00186     if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
00187       return;
00188 
00189     LiveOutRegInfo.grow(Reg);
00190     LiveOutInfo &LOI = LiveOutRegInfo[Reg];
00191     LOI.NumSignBits = NumSignBits;
00192     LOI.KnownOne = KnownOne;
00193     LOI.KnownZero = KnownZero;
00194   }
00195 
00196   /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
00197   /// register based on the LiveOutInfo of its operands.
00198   void ComputePHILiveOutRegInfo(const PHINode*);
00199 
00200   /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
00201   /// called when a block is visited before all of its predecessors.
00202   void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
00203     // PHIs with no uses have no ValueMap entry.
00204     DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
00205     if (It == ValueMap.end())
00206       return;
00207 
00208     unsigned Reg = It->second;
00209     if (Reg == 0)
00210       return;
00211 
00212     LiveOutRegInfo.grow(Reg);
00213     LiveOutRegInfo[Reg].IsValid = false;
00214   }
00215 
00216   /// setArgumentFrameIndex - Record frame index for the byval
00217   /// argument.
00218   void setArgumentFrameIndex(const Argument *A, int FI);
00219 
00220   /// getArgumentFrameIndex - Get frame index for the byval argument.
00221   int getArgumentFrameIndex(const Argument *A);
00222 
00223 private:
00224   /// LiveOutRegInfo - Information about live out vregs.
00225   IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
00226 };
00227 
00228 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
00229 /// being passed to this variadic function, and set the MachineModuleInfo's
00230 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
00231 /// reference to _fltused on Windows, which will link in MSVCRT's
00232 /// floating-point support.
00233 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
00234 
00235 /// AddCatchInfo - Extract the personality and type infos from an eh.selector
00236 /// call, and add them to the specified machine basic block.
00237 void AddCatchInfo(const CallInst &I,
00238                   MachineModuleInfo *MMI, MachineBasicBlock *MBB);
00239 
00240 /// AddLandingPadInfo - Extract the exception handling information from the
00241 /// landingpad instruction and add them to the specified machine module info.
00242 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
00243                        MachineBasicBlock *MBB);
00244 
00245 } // end namespace llvm
00246 
00247 #endif