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FunctionLoweringInfo.h
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00001 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This implements routines for translating functions from LLVM IR into
00011 // Machine IR.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
00016 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
00017 
00018 #include "llvm/ADT/APInt.h"
00019 #include "llvm/ADT/DenseMap.h"
00020 #include "llvm/ADT/IndexedMap.h"
00021 #include "llvm/ADT/Optional.h"
00022 #include "llvm/ADT/SmallPtrSet.h"
00023 #include "llvm/ADT/SmallVector.h"
00024 #include "llvm/CodeGen/ISDOpcodes.h"
00025 #include "llvm/CodeGen/MachineBasicBlock.h"
00026 #include "llvm/IR/InlineAsm.h"
00027 #include "llvm/IR/Instructions.h"
00028 #include "llvm/Target/TargetRegisterInfo.h"
00029 #include <vector>
00030 
00031 namespace llvm {
00032 
00033 class AllocaInst;
00034 class BasicBlock;
00035 class BranchProbabilityInfo;
00036 class CallInst;
00037 class Function;
00038 class GlobalVariable;
00039 class Instruction;
00040 class MachineInstr;
00041 class MachineBasicBlock;
00042 class MachineFunction;
00043 class MachineModuleInfo;
00044 class MachineRegisterInfo;
00045 class SelectionDAG;
00046 class MVT;
00047 class TargetLowering;
00048 class Value;
00049 
00050 //===--------------------------------------------------------------------===//
00051 /// FunctionLoweringInfo - This contains information that is global to a
00052 /// function that is used when lowering a region of the function.
00053 ///
00054 class FunctionLoweringInfo {
00055 public:
00056   const Function *Fn;
00057   MachineFunction *MF;
00058   const TargetLowering *TLI;
00059   MachineRegisterInfo *RegInfo;
00060   BranchProbabilityInfo *BPI;
00061   /// CanLowerReturn - true iff the function's return value can be lowered to
00062   /// registers.
00063   bool CanLowerReturn;
00064 
00065   /// True if part of the CSRs will be handled via explicit copies.
00066   bool SplitCSR;
00067 
00068   /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
00069   /// allocated to hold a pointer to the hidden sret parameter.
00070   unsigned DemoteRegister;
00071 
00072   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
00073   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
00074 
00075   /// ValueMap - Since we emit code for the function a basic block at a time,
00076   /// we must remember which virtual registers hold the values for
00077   /// cross-basic-block values.
00078   DenseMap<const Value *, unsigned> ValueMap;
00079 
00080   /// Track virtual registers created for exception pointers.
00081   DenseMap<const Value *, unsigned> CatchPadExceptionPointers;
00082 
00083   // Keep track of frame indices allocated for statepoints as they could be used
00084   // across basic block boundaries.
00085   // Key of the map is statepoint instruction, value is a map from spilled
00086   // llvm Value to the optional stack stack slot index.
00087   // If optional is unspecified it means that we have visited this value
00088   // but didn't spill it.
00089   typedef DenseMap<const Value*, Optional<int>> StatepointSpilledValueMapTy;
00090   DenseMap<const Instruction*, StatepointSpilledValueMapTy>
00091     StatepointRelocatedValues;
00092 
00093   /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
00094   /// the entry block.  This allows the allocas to be efficiently referenced
00095   /// anywhere in the function.
00096   DenseMap<const AllocaInst*, int> StaticAllocaMap;
00097 
00098   /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
00099   DenseMap<const Argument*, int> ByValArgFrameIndexMap;
00100 
00101   /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
00102   /// function arguments that are inserted after scheduling is completed.
00103   SmallVector<MachineInstr*, 8> ArgDbgValues;
00104 
00105   /// RegFixups - Registers which need to be replaced after isel is done.
00106   DenseMap<unsigned, unsigned> RegFixups;
00107 
00108   /// StatepointStackSlots - A list of temporary stack slots (frame indices)
00109   /// used to spill values at a statepoint.  We store them here to enable
00110   /// reuse of the same stack slots across different statepoints in different
00111   /// basic blocks.
00112   SmallVector<unsigned, 50> StatepointStackSlots;
00113 
00114   /// MBB - The current block.
00115   MachineBasicBlock *MBB;
00116 
00117   /// MBB - The current insert position inside the current block.
00118   MachineBasicBlock::iterator InsertPt;
00119 
00120   struct LiveOutInfo {
00121     unsigned NumSignBits : 31;
00122     bool IsValid : 1;
00123     APInt KnownOne, KnownZero;
00124     LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
00125                     KnownZero(1, 0) {}
00126   };
00127 
00128   /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
00129   /// for a value.
00130   DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
00131 
00132   /// VisitedBBs - The set of basic blocks visited thus far by instruction
00133   /// selection.
00134   SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
00135 
00136   /// PHINodesToUpdate - A list of phi instructions whose operand list will
00137   /// be updated after processing the current basic block.
00138   /// TODO: This isn't per-function state, it's per-basic-block state. But
00139   /// there's no other convenient place for it to live right now.
00140   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
00141   unsigned OrigNumPHINodesToUpdate;
00142 
00143   /// If the current MBB is a landing pad, the exception pointer and exception
00144   /// selector registers are copied into these virtual registers by
00145   /// SelectionDAGISel::PrepareEHLandingPad().
00146   unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
00147 
00148   /// set - Initialize this FunctionLoweringInfo with the given Function
00149   /// and its associated MachineFunction.
00150   ///
00151   void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
00152 
00153   /// clear - Clear out all the function-specific state. This returns this
00154   /// FunctionLoweringInfo to an empty state, ready to be used for a
00155   /// different function.
00156   void clear();
00157 
00158   /// isExportedInst - Return true if the specified value is an instruction
00159   /// exported from its block.
00160   bool isExportedInst(const Value *V) {
00161     return ValueMap.count(V);
00162   }
00163 
00164   unsigned CreateReg(MVT VT);
00165 
00166   unsigned CreateRegs(Type *Ty);
00167 
00168   unsigned InitializeRegForValue(const Value *V) {
00169     // Tokens never live in vregs.
00170     if (V->getType()->isTokenTy())
00171       return 0;
00172     unsigned &R = ValueMap[V];
00173     assert(R == 0 && "Already initialized this value register!");
00174     return R = CreateRegs(V->getType());
00175   }
00176 
00177   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
00178   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
00179   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
00180     if (!LiveOutRegInfo.inBounds(Reg))
00181       return nullptr;
00182 
00183     const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
00184     if (!LOI->IsValid)
00185       return nullptr;
00186 
00187     return LOI;
00188   }
00189 
00190   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
00191   /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
00192   /// the register's LiveOutInfo is for a smaller bit width, it is extended to
00193   /// the larger bit width by zero extension. The bit width must be no smaller
00194   /// than the LiveOutInfo's existing bit width.
00195   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
00196 
00197   /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
00198   void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
00199                          const APInt &KnownZero, const APInt &KnownOne) {
00200     // Only install this information if it tells us something.
00201     if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
00202       return;
00203 
00204     LiveOutRegInfo.grow(Reg);
00205     LiveOutInfo &LOI = LiveOutRegInfo[Reg];
00206     LOI.NumSignBits = NumSignBits;
00207     LOI.KnownOne = KnownOne;
00208     LOI.KnownZero = KnownZero;
00209   }
00210 
00211   /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
00212   /// register based on the LiveOutInfo of its operands.
00213   void ComputePHILiveOutRegInfo(const PHINode*);
00214 
00215   /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
00216   /// called when a block is visited before all of its predecessors.
00217   void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
00218     // PHIs with no uses have no ValueMap entry.
00219     DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
00220     if (It == ValueMap.end())
00221       return;
00222 
00223     unsigned Reg = It->second;
00224     if (Reg == 0)
00225       return;
00226 
00227     LiveOutRegInfo.grow(Reg);
00228     LiveOutRegInfo[Reg].IsValid = false;
00229   }
00230 
00231   /// setArgumentFrameIndex - Record frame index for the byval
00232   /// argument.
00233   void setArgumentFrameIndex(const Argument *A, int FI);
00234 
00235   /// getArgumentFrameIndex - Get frame index for the byval argument.
00236   int getArgumentFrameIndex(const Argument *A);
00237 
00238   unsigned getCatchPadExceptionPointerVReg(const Value *CPI,
00239                                            const TargetRegisterClass *RC);
00240 
00241 private:
00242   void addSEHHandlersForLPads(ArrayRef<const LandingPadInst *> LPads);
00243 
00244   /// LiveOutRegInfo - Information about live out vregs.
00245   IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
00246 };
00247 
00248 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
00249 /// being passed to this variadic function, and set the MachineModuleInfo's
00250 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
00251 /// reference to _fltused on Windows, which will link in MSVCRT's
00252 /// floating-point support.
00253 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
00254 
00255 /// AddLandingPadInfo - Extract the exception handling information from the
00256 /// landingpad instruction and add them to the specified machine module info.
00257 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
00258                        MachineBasicBlock *MBB);
00259 
00260 } // end namespace llvm
00261 
00262 #endif