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FunctionLoweringInfo.h
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00001 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This implements routines for translating functions from LLVM IR into
00011 // Machine IR.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
00016 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
00017 
00018 #include "llvm/ADT/APInt.h"
00019 #include "llvm/ADT/DenseMap.h"
00020 #include "llvm/ADT/IndexedMap.h"
00021 #include "llvm/ADT/Optional.h"
00022 #include "llvm/ADT/SmallPtrSet.h"
00023 #include "llvm/ADT/SmallVector.h"
00024 #include "llvm/CodeGen/ISDOpcodes.h"
00025 #include "llvm/CodeGen/MachineBasicBlock.h"
00026 #include "llvm/IR/InlineAsm.h"
00027 #include "llvm/IR/Instructions.h"
00028 #include "llvm/Target/TargetRegisterInfo.h"
00029 #include <vector>
00030 
00031 namespace llvm {
00032 
00033 class AllocaInst;
00034 class BasicBlock;
00035 class BranchProbabilityInfo;
00036 class CallInst;
00037 class Function;
00038 class GlobalVariable;
00039 class Instruction;
00040 class MachineInstr;
00041 class MachineBasicBlock;
00042 class MachineFunction;
00043 class MachineModuleInfo;
00044 class MachineRegisterInfo;
00045 class SelectionDAG;
00046 class MVT;
00047 class TargetLowering;
00048 class Value;
00049 
00050 //===--------------------------------------------------------------------===//
00051 /// FunctionLoweringInfo - This contains information that is global to a
00052 /// function that is used when lowering a region of the function.
00053 ///
00054 class FunctionLoweringInfo {
00055 public:
00056   const Function *Fn;
00057   MachineFunction *MF;
00058   const TargetLowering *TLI;
00059   MachineRegisterInfo *RegInfo;
00060   BranchProbabilityInfo *BPI;
00061   /// CanLowerReturn - true iff the function's return value can be lowered to
00062   /// registers.
00063   bool CanLowerReturn;
00064 
00065   /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
00066   /// allocated to hold a pointer to the hidden sret parameter.
00067   unsigned DemoteRegister;
00068 
00069   /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
00070   DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
00071 
00072   /// ValueMap - Since we emit code for the function a basic block at a time,
00073   /// we must remember which virtual registers hold the values for
00074   /// cross-basic-block values.
00075   DenseMap<const Value*, unsigned> ValueMap;
00076 
00077   // Keep track of frame indices allocated for statepoints as they could be used
00078   // across basic block boundaries.
00079   // Key of the map is statepoint instruction, value is a map from spilled
00080   // llvm Value to the optional stack stack slot index.
00081   // If optional is unspecified it means that we have visited this value
00082   // but didn't spill it.
00083   typedef DenseMap<const Value*, Optional<int>> StatepointSpilledValueMapTy;
00084   DenseMap<const Instruction*, StatepointSpilledValueMapTy>
00085     StatepointRelocatedValues;
00086 
00087   /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
00088   /// the entry block.  This allows the allocas to be efficiently referenced
00089   /// anywhere in the function.
00090   DenseMap<const AllocaInst*, int> StaticAllocaMap;
00091 
00092   /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
00093   DenseMap<const Argument*, int> ByValArgFrameIndexMap;
00094 
00095   /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
00096   /// function arguments that are inserted after scheduling is completed.
00097   SmallVector<MachineInstr*, 8> ArgDbgValues;
00098 
00099   /// RegFixups - Registers which need to be replaced after isel is done.
00100   DenseMap<unsigned, unsigned> RegFixups;
00101 
00102   /// StatepointStackSlots - A list of temporary stack slots (frame indices) 
00103   /// used to spill values at a statepoint.  We store them here to enable
00104   /// reuse of the same stack slots across different statepoints in different
00105   /// basic blocks.
00106   SmallVector<unsigned, 50> StatepointStackSlots;
00107 
00108   /// MBB - The current block.
00109   MachineBasicBlock *MBB;
00110 
00111   /// MBB - The current insert position inside the current block.
00112   MachineBasicBlock::iterator InsertPt;
00113 
00114 #ifndef NDEBUG
00115   SmallPtrSet<const Instruction *, 8> CatchInfoLost;
00116   SmallPtrSet<const Instruction *, 8> CatchInfoFound;
00117 #endif
00118 
00119   struct LiveOutInfo {
00120     unsigned NumSignBits : 31;
00121     bool IsValid : 1;
00122     APInt KnownOne, KnownZero;
00123     LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
00124                     KnownZero(1, 0) {}
00125   };
00126 
00127   /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
00128   /// for a value.
00129   DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
00130 
00131   /// VisitedBBs - The set of basic blocks visited thus far by instruction
00132   /// selection.
00133   SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
00134 
00135   /// PHINodesToUpdate - A list of phi instructions whose operand list will
00136   /// be updated after processing the current basic block.
00137   /// TODO: This isn't per-function state, it's per-basic-block state. But
00138   /// there's no other convenient place for it to live right now.
00139   std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
00140   unsigned OrigNumPHINodesToUpdate;
00141 
00142   /// If the current MBB is a landing pad, the exception pointer and exception
00143   /// selector registers are copied into these virtual registers by
00144   /// SelectionDAGISel::PrepareEHLandingPad().
00145   unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
00146 
00147   /// set - Initialize this FunctionLoweringInfo with the given Function
00148   /// and its associated MachineFunction.
00149   ///
00150   void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
00151 
00152   /// clear - Clear out all the function-specific state. This returns this
00153   /// FunctionLoweringInfo to an empty state, ready to be used for a
00154   /// different function.
00155   void clear();
00156 
00157   /// isExportedInst - Return true if the specified value is an instruction
00158   /// exported from its block.
00159   bool isExportedInst(const Value *V) {
00160     return ValueMap.count(V);
00161   }
00162 
00163   unsigned CreateReg(MVT VT);
00164   
00165   unsigned CreateRegs(Type *Ty);
00166   
00167   unsigned InitializeRegForValue(const Value *V) {
00168     unsigned &R = ValueMap[V];
00169     assert(R == 0 && "Already initialized this value register!");
00170     return R = CreateRegs(V->getType());
00171   }
00172 
00173   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
00174   /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
00175   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
00176     if (!LiveOutRegInfo.inBounds(Reg))
00177       return nullptr;
00178 
00179     const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
00180     if (!LOI->IsValid)
00181       return nullptr;
00182 
00183     return LOI;
00184   }
00185 
00186   /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
00187   /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
00188   /// the register's LiveOutInfo is for a smaller bit width, it is extended to
00189   /// the larger bit width by zero extension. The bit width must be no smaller
00190   /// than the LiveOutInfo's existing bit width.
00191   const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
00192 
00193   /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
00194   void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
00195                          const APInt &KnownZero, const APInt &KnownOne) {
00196     // Only install this information if it tells us something.
00197     if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
00198       return;
00199 
00200     LiveOutRegInfo.grow(Reg);
00201     LiveOutInfo &LOI = LiveOutRegInfo[Reg];
00202     LOI.NumSignBits = NumSignBits;
00203     LOI.KnownOne = KnownOne;
00204     LOI.KnownZero = KnownZero;
00205   }
00206 
00207   /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
00208   /// register based on the LiveOutInfo of its operands.
00209   void ComputePHILiveOutRegInfo(const PHINode*);
00210 
00211   /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
00212   /// called when a block is visited before all of its predecessors.
00213   void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
00214     // PHIs with no uses have no ValueMap entry.
00215     DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
00216     if (It == ValueMap.end())
00217       return;
00218 
00219     unsigned Reg = It->second;
00220     if (Reg == 0)
00221       return;
00222 
00223     LiveOutRegInfo.grow(Reg);
00224     LiveOutRegInfo[Reg].IsValid = false;
00225   }
00226 
00227   /// setArgumentFrameIndex - Record frame index for the byval
00228   /// argument.
00229   void setArgumentFrameIndex(const Argument *A, int FI);
00230 
00231   /// getArgumentFrameIndex - Get frame index for the byval argument.
00232   int getArgumentFrameIndex(const Argument *A);
00233 
00234 private:
00235   void addSEHHandlersForLPads(ArrayRef<const LandingPadInst *> LPads);
00236 
00237   /// LiveOutRegInfo - Information about live out vregs.
00238   IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
00239 };
00240 
00241 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
00242 /// being passed to this variadic function, and set the MachineModuleInfo's
00243 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
00244 /// reference to _fltused on Windows, which will link in MSVCRT's
00245 /// floating-point support.
00246 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
00247 
00248 /// AddLandingPadInfo - Extract the exception handling information from the
00249 /// landingpad instruction and add them to the specified machine module info.
00250 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
00251                        MachineBasicBlock *MBB);
00252 
00253 } // end namespace llvm
00254 
00255 #endif