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MipsCodeEmitter.cpp
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00001 //===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===---------------------------------------------------------------------===//
00009 //
00010 // This file contains the pass that transforms the Mips machine instructions
00011 // into relocatable machine code.
00012 //
00013 //===---------------------------------------------------------------------===//
00014 
00015 #include "Mips.h"
00016 #include "MCTargetDesc/MipsBaseInfo.h"
00017 #include "MipsInstrInfo.h"
00018 #include "MipsRelocations.h"
00019 #include "MipsSubtarget.h"
00020 #include "MipsTargetMachine.h"
00021 #include "llvm/ADT/Statistic.h"
00022 #include "llvm/CodeGen/JITCodeEmitter.h"
00023 #include "llvm/CodeGen/MachineConstantPool.h"
00024 #include "llvm/CodeGen/MachineFunctionPass.h"
00025 #include "llvm/CodeGen/MachineInstr.h"
00026 #include "llvm/CodeGen/MachineInstrBuilder.h"
00027 #include "llvm/CodeGen/MachineJumpTableInfo.h"
00028 #include "llvm/CodeGen/MachineModuleInfo.h"
00029 #include "llvm/CodeGen/MachineOperand.h"
00030 #include "llvm/CodeGen/Passes.h"
00031 #include "llvm/IR/Constants.h"
00032 #include "llvm/IR/DerivedTypes.h"
00033 #include "llvm/PassManager.h"
00034 #include "llvm/Support/Debug.h"
00035 #include "llvm/Support/ErrorHandling.h"
00036 #include "llvm/Support/raw_ostream.h"
00037 #ifndef NDEBUG
00038 #include <iomanip>
00039 #endif
00040 
00041 using namespace llvm;
00042 
00043 #define DEBUG_TYPE "jit"
00044 
00045 STATISTIC(NumEmitted, "Number of machine instructions emitted");
00046 
00047 namespace {
00048 
00049 class MipsCodeEmitter : public MachineFunctionPass {
00050   MipsJITInfo *JTI;
00051   const MipsInstrInfo *II;
00052   const DataLayout *TD;
00053   const MipsSubtarget *Subtarget;
00054   TargetMachine &TM;
00055   JITCodeEmitter &MCE;
00056   const std::vector<MachineConstantPoolEntry> *MCPEs;
00057   const std::vector<MachineJumpTableEntry> *MJTEs;
00058   bool IsPIC;
00059 
00060   void getAnalysisUsage(AnalysisUsage &AU) const override {
00061     AU.addRequired<MachineModuleInfo> ();
00062     MachineFunctionPass::getAnalysisUsage(AU);
00063   }
00064 
00065   static char ID;
00066 
00067 public:
00068   MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
00069     : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr),
00070       TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr),
00071       IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
00072 
00073   bool runOnMachineFunction(MachineFunction &MF) override;
00074 
00075   const char *getPassName() const override {
00076     return "Mips Machine Code Emitter";
00077   }
00078 
00079   /// getBinaryCodeForInstr - This function, generated by the
00080   /// CodeEmitterGenerator using TableGen, produces the binary encoding for
00081   /// machine instructions.
00082   uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
00083 
00084   void emitInstruction(MachineBasicBlock::instr_iterator MI,
00085                        MachineBasicBlock &MBB);
00086 
00087 private:
00088 
00089   void emitWord(unsigned Word);
00090 
00091   /// Routines that handle operands which add machine relocations which are
00092   /// fixed up by the relocation stage.
00093   void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
00094                          bool MayNeedFarStub) const;
00095   void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
00096   void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
00097   void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const;
00098   void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
00099 
00100   /// getMachineOpValue - Return binary encoding of operand. If the machine
00101   /// operand requires relocation, record the relocation and return zero.
00102   unsigned getMachineOpValue(const MachineInstr &MI,
00103                              const MachineOperand &MO) const;
00104 
00105   unsigned getRelocation(const MachineInstr &MI,
00106                          const MachineOperand &MO) const;
00107 
00108   unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
00109   unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const;
00110   unsigned getBranchTargetOpValueMM(const MachineInstr &MI,
00111                                     unsigned OpNo) const;
00112 
00113   unsigned getBranchTarget21OpValue(const MachineInstr &MI,
00114                                     unsigned OpNo) const;
00115   unsigned getBranchTarget26OpValue(const MachineInstr &MI,
00116                                     unsigned OpNo) const;
00117   unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const;
00118 
00119   unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
00120   unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
00121   unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const;
00122   unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
00123   unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
00124   unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
00125   unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const;
00126   unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const;
00127   unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const;
00128 
00129   /// Expand pseudo instructions with accumulator register operands.
00130   void expandACCInstr(MachineBasicBlock::instr_iterator MI,
00131                       MachineBasicBlock &MBB, unsigned Opc) const;
00132 
00133   void expandPseudoIndirectBranch(MachineBasicBlock::instr_iterator MI,
00134                                   MachineBasicBlock &MBB) const;
00135 
00136   /// \brief Expand pseudo instruction. Return true if MI was expanded.
00137   bool expandPseudos(MachineBasicBlock::instr_iterator &MI,
00138                      MachineBasicBlock &MBB) const;
00139 };
00140 }
00141 
00142 char MipsCodeEmitter::ID = 0;
00143 
00144 bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
00145   MipsTargetMachine &Target = static_cast<MipsTargetMachine &>(
00146                                 const_cast<TargetMachine &>(MF.getTarget()));
00147   // Initialize the subtarget so that we can grab the subtarget dependent
00148   // variables from it.
00149   Subtarget = &TM.getSubtarget<MipsSubtarget>();
00150   JTI = Target.getSubtargetImpl()->getJITInfo();
00151   II = Subtarget->getInstrInfo();
00152   TD = Subtarget->getDataLayout();
00153   MCPEs = &MF.getConstantPool()->getConstants();
00154   MJTEs = nullptr;
00155   if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables();
00156   JTI->Initialize(MF, IsPIC, Subtarget->isLittle());
00157   MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
00158 
00159   do {
00160     DEBUG(errs() << "JITTing function '"
00161         << MF.getName() << "'\n");
00162     MCE.startFunction(MF);
00163 
00164     for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
00165         MBB != E; ++MBB){
00166       MCE.StartMachineBasicBlock(MBB);
00167       for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
00168            E = MBB->instr_end(); I != E;)
00169         emitInstruction(*I++, *MBB);
00170     }
00171   } while (MCE.finishFunction(MF));
00172 
00173   return false;
00174 }
00175 
00176 unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
00177                                         const MachineOperand &MO) const {
00178   // NOTE: This relocations are for static.
00179   uint64_t TSFlags = MI.getDesc().TSFlags;
00180   uint64_t Form = TSFlags & MipsII::FormMask;
00181   if (Form == MipsII::FrmJ)
00182     return Mips::reloc_mips_26;
00183   if ((Form == MipsII::FrmI || Form == MipsII::FrmFI)
00184        && MI.isBranch())
00185     return Mips::reloc_mips_pc16;
00186   if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
00187     return Mips::reloc_mips_hi;
00188   return Mips::reloc_mips_lo;
00189 }
00190 
00191 unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI,
00192                                                unsigned OpNo) const {
00193   MachineOperand MO = MI.getOperand(OpNo);
00194   if (MO.isGlobal())
00195     emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
00196   else if (MO.isSymbol())
00197     emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
00198   else if (MO.isMBB())
00199     emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
00200   else
00201     llvm_unreachable("Unexpected jump target operand kind.");
00202   return 0;
00203 }
00204 
00205 unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI,
00206                                                  unsigned OpNo) const {
00207   llvm_unreachable("Unimplemented function.");
00208   return 0;
00209 }
00210 
00211 unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI,
00212                                                    unsigned OpNo) const {
00213   llvm_unreachable("Unimplemented function.");
00214   return 0;
00215 }
00216 
00217 unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI,
00218                                                    unsigned OpNo) const {
00219   llvm_unreachable("Unimplemented function.");
00220   return 0;
00221 }
00222 
00223 unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI,
00224                                                    unsigned OpNo) const {
00225   llvm_unreachable("Unimplemented function.");
00226   return 0;
00227 }
00228 
00229 unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI,
00230                                                  unsigned OpNo) const {
00231   llvm_unreachable("Unimplemented function.");
00232   return 0;
00233 }
00234 
00235 unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
00236                                                  unsigned OpNo) const {
00237   MachineOperand MO = MI.getOperand(OpNo);
00238   emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
00239   return 0;
00240 }
00241 
00242 unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
00243                                          unsigned OpNo) const {
00244   // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
00245   assert(MI.getOperand(OpNo).isReg());
00246   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
00247   return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
00248 }
00249 
00250 unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI,
00251                                                 unsigned OpNo) const {
00252   llvm_unreachable("Unimplemented function.");
00253   return 0;
00254 }
00255 
00256 unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI,
00257                                             unsigned OpNo) const {
00258   llvm_unreachable("Unimplemented function.");
00259   return 0;
00260 }
00261 
00262 unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
00263                                              unsigned OpNo) const {
00264   // size is encoded as size-1.
00265   return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
00266 }
00267 
00268 unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
00269                                              unsigned OpNo) const {
00270   // size is encoded as pos+size-1.
00271   return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
00272          getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
00273 }
00274 
00275 unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI,
00276                                             unsigned OpNo) const {
00277   llvm_unreachable("Unimplemented function.");
00278   return 0;
00279 }
00280 
00281 unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI,
00282                                                 unsigned OpNo) const {
00283   llvm_unreachable("Unimplemented function.");
00284   return 0;
00285 }
00286 
00287 unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI,
00288                                                 unsigned OpNo) const {
00289   llvm_unreachable("Unimplemented function.");
00290   return 0;
00291 }
00292 
00293 /// getMachineOpValue - Return binary encoding of operand. If the machine
00294 /// operand requires relocation, record the relocation and return zero.
00295 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
00296                                             const MachineOperand &MO) const {
00297   if (MO.isReg())
00298     return TM.getSubtargetImpl()->getRegisterInfo()->getEncodingValue(
00299         MO.getReg());
00300   else if (MO.isImm())
00301     return static_cast<unsigned>(MO.getImm());
00302   else if (MO.isGlobal())
00303     emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
00304   else if (MO.isSymbol())
00305     emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
00306   else if (MO.isCPI())
00307     emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
00308   else if (MO.isJTI())
00309     emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO));
00310   else if (MO.isMBB())
00311     emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
00312   else
00313     llvm_unreachable("Unable to encode MachineOperand!");
00314   return 0;
00315 }
00316 
00317 void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
00318                                         bool MayNeedFarStub) const {
00319   MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
00320                                              const_cast<GlobalValue *>(GV), 0,
00321                                              MayNeedFarStub));
00322 }
00323 
00324 void MipsCodeEmitter::
00325 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
00326   MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
00327                                                  Reloc, ES, 0, 0));
00328 }
00329 
00330 void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
00331   MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
00332                                                     Reloc, CPI, 0, false));
00333 }
00334 
00335 void MipsCodeEmitter::
00336 emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const {
00337   MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
00338                                                     Reloc, JTIndex, 0, false));
00339 }
00340 
00341 void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
00342                                             unsigned Reloc) const {
00343   MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
00344                                              Reloc, BB));
00345 }
00346 
00347 void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
00348                                       MachineBasicBlock &MBB) {
00349   DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
00350 
00351   // Expand pseudo instruction. Skip if MI was not expanded.
00352   if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) &&
00353       !expandPseudos(MI, MBB))
00354     return;
00355 
00356   MCE.processDebugLoc(MI->getDebugLoc(), true);
00357 
00358   emitWord(getBinaryCodeForInstr(*MI));
00359   ++NumEmitted;  // Keep track of the # of mi's emitted
00360 
00361   MCE.processDebugLoc(MI->getDebugLoc(), false);
00362 }
00363 
00364 void MipsCodeEmitter::emitWord(unsigned Word) {
00365   DEBUG(errs() << "  0x";
00366         errs().write_hex(Word) << "\n");
00367   if (Subtarget->isLittle())
00368     MCE.emitWordLE(Word);
00369   else
00370     MCE.emitWordBE(Word);
00371 }
00372 
00373 void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI,
00374                                      MachineBasicBlock &MBB,
00375                                      unsigned Opc) const {
00376   // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1".
00377   BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc))
00378     .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg());
00379 }
00380 
00381 void MipsCodeEmitter::expandPseudoIndirectBranch(
00382     MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) const {
00383   // This logic is duplicated from MipsAsmPrinter::emitPseudoIndirectBranch()
00384   bool HasLinkReg = false;
00385   unsigned Opcode = 0;
00386 
00387   if (Subtarget->hasMips64r6()) {
00388     // MIPS64r6 should use (JALR64 ZERO_64, $rs)
00389     Opcode = Mips::JALR64;
00390     HasLinkReg = true;
00391   } else if (Subtarget->hasMips32r6()) {
00392     // MIPS32r6 should use (JALR ZERO, $rs)
00393     Opcode = Mips::JALR;
00394     HasLinkReg = true;
00395   } else if (Subtarget->inMicroMipsMode())
00396     // microMIPS should use (JR_MM $rs)
00397     Opcode = Mips::JR_MM;
00398   else {
00399     // Everything else should use (JR $rs)
00400     Opcode = Mips::JR;
00401   }
00402 
00403   auto MIB = BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opcode));
00404 
00405   if (HasLinkReg) {
00406     unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
00407     MIB.addReg(ZeroReg);
00408   }
00409 
00410   MIB.addReg(MI->getOperand(0).getReg());
00411 }
00412 
00413 bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI,
00414                                     MachineBasicBlock &MBB) const {
00415   switch (MI->getOpcode()) {
00416   default:
00417     llvm_unreachable("Unhandled pseudo");
00418     return false;
00419   case Mips::NOP:
00420     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO)
00421       .addReg(Mips::ZERO).addImm(0);
00422     break;
00423   case Mips::B:
00424     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO)
00425       .addReg(Mips::ZERO).addOperand(MI->getOperand(0));
00426     break;
00427   case Mips::TRAP:
00428     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0)
00429       .addImm(0);
00430     break;
00431   case Mips::JALRPseudo:
00432     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA)
00433       .addReg(MI->getOperand(0).getReg());
00434     break;
00435   case Mips::PseudoMULT:
00436     expandACCInstr(MI, MBB, Mips::MULT);
00437     break;
00438   case Mips::PseudoMULTu:
00439     expandACCInstr(MI, MBB, Mips::MULTu);
00440     break;
00441   case Mips::PseudoSDIV:
00442     expandACCInstr(MI, MBB, Mips::SDIV);
00443     break;
00444   case Mips::PseudoUDIV:
00445     expandACCInstr(MI, MBB, Mips::UDIV);
00446     break;
00447   case Mips::PseudoMADD:
00448     expandACCInstr(MI, MBB, Mips::MADD);
00449     break;
00450   case Mips::PseudoMADDU:
00451     expandACCInstr(MI, MBB, Mips::MADDU);
00452     break;
00453   case Mips::PseudoMSUB:
00454     expandACCInstr(MI, MBB, Mips::MSUB);
00455     break;
00456   case Mips::PseudoMSUBU:
00457     expandACCInstr(MI, MBB, Mips::MSUBU);
00458     break;
00459   case Mips::PseudoReturn:
00460   case Mips::PseudoReturn64:
00461   case Mips::PseudoIndirectBranch:
00462   case Mips::PseudoIndirectBranch64:
00463       expandPseudoIndirectBranch(MI, MBB);
00464       break;
00465   case TargetOpcode::CFI_INSTRUCTION:
00466   case TargetOpcode::IMPLICIT_DEF:
00467   case TargetOpcode::KILL:
00468       // Do nothing
00469       return false;
00470   }
00471 
00472   (MI--)->eraseFromBundle();
00473   return true;
00474 }
00475 
00476 /// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
00477 /// code to the specified MCE object.
00478 FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
00479                                                  JITCodeEmitter &JCE) {
00480   return new MipsCodeEmitter(TM, JCE);
00481 }
00482 
00483 #include "MipsGenCodeEmitter.inc"