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MipsCodeEmitter.cpp
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00001 //===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===---------------------------------------------------------------------===//
00009 //
00010 // This file contains the pass that transforms the Mips machine instructions
00011 // into relocatable machine code.
00012 //
00013 //===---------------------------------------------------------------------===//
00014 
00015 #include "Mips.h"
00016 #include "MCTargetDesc/MipsBaseInfo.h"
00017 #include "MipsInstrInfo.h"
00018 #include "MipsRelocations.h"
00019 #include "MipsSubtarget.h"
00020 #include "MipsTargetMachine.h"
00021 #include "llvm/ADT/Statistic.h"
00022 #include "llvm/CodeGen/JITCodeEmitter.h"
00023 #include "llvm/CodeGen/MachineConstantPool.h"
00024 #include "llvm/CodeGen/MachineFunctionPass.h"
00025 #include "llvm/CodeGen/MachineInstr.h"
00026 #include "llvm/CodeGen/MachineInstrBuilder.h"
00027 #include "llvm/CodeGen/MachineJumpTableInfo.h"
00028 #include "llvm/CodeGen/MachineModuleInfo.h"
00029 #include "llvm/CodeGen/MachineOperand.h"
00030 #include "llvm/CodeGen/Passes.h"
00031 #include "llvm/IR/Constants.h"
00032 #include "llvm/IR/DerivedTypes.h"
00033 #include "llvm/PassManager.h"
00034 #include "llvm/Support/Debug.h"
00035 #include "llvm/Support/ErrorHandling.h"
00036 #include "llvm/Support/raw_ostream.h"
00037 #ifndef NDEBUG
00038 #include <iomanip>
00039 #endif
00040 
00041 using namespace llvm;
00042 
00043 #define DEBUG_TYPE "jit"
00044 
00045 STATISTIC(NumEmitted, "Number of machine instructions emitted");
00046 
00047 namespace {
00048 
00049 class MipsCodeEmitter : public MachineFunctionPass {
00050   MipsJITInfo *JTI;
00051   const MipsInstrInfo *II;
00052   const DataLayout *TD;
00053   const MipsSubtarget *Subtarget;
00054   TargetMachine &TM;
00055   JITCodeEmitter &MCE;
00056   const std::vector<MachineConstantPoolEntry> *MCPEs;
00057   const std::vector<MachineJumpTableEntry> *MJTEs;
00058   bool IsPIC;
00059 
00060   void getAnalysisUsage(AnalysisUsage &AU) const override {
00061     AU.addRequired<MachineModuleInfo> ();
00062     MachineFunctionPass::getAnalysisUsage(AU);
00063   }
00064 
00065   static char ID;
00066 
00067 public:
00068   MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
00069     : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr),
00070       TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr),
00071       IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
00072 
00073   bool runOnMachineFunction(MachineFunction &MF) override;
00074 
00075   const char *getPassName() const override {
00076     return "Mips Machine Code Emitter";
00077   }
00078 
00079   /// getBinaryCodeForInstr - This function, generated by the
00080   /// CodeEmitterGenerator using TableGen, produces the binary encoding for
00081   /// machine instructions.
00082   uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
00083 
00084   void emitInstruction(MachineBasicBlock::instr_iterator MI,
00085                        MachineBasicBlock &MBB);
00086 
00087 private:
00088 
00089   void emitWord(unsigned Word);
00090 
00091   /// Routines that handle operands which add machine relocations which are
00092   /// fixed up by the relocation stage.
00093   void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
00094                          bool MayNeedFarStub) const;
00095   void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
00096   void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
00097   void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const;
00098   void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
00099 
00100   /// getMachineOpValue - Return binary encoding of operand. If the machine
00101   /// operand requires relocation, record the relocation and return zero.
00102   unsigned getMachineOpValue(const MachineInstr &MI,
00103                              const MachineOperand &MO) const;
00104 
00105   unsigned getRelocation(const MachineInstr &MI,
00106                          const MachineOperand &MO) const;
00107 
00108   unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
00109   unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const;
00110   unsigned getBranchTargetOpValueMM(const MachineInstr &MI,
00111                                     unsigned OpNo) const;
00112 
00113   unsigned getBranchTarget21OpValue(const MachineInstr &MI,
00114                                     unsigned OpNo) const;
00115   unsigned getBranchTarget26OpValue(const MachineInstr &MI,
00116                                     unsigned OpNo) const;
00117   unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const;
00118 
00119   unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
00120   unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
00121   unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const;
00122   unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
00123   unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
00124   unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
00125   unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const;
00126   unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const;
00127   unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const;
00128 
00129   /// Expand pseudo instructions with accumulator register operands.
00130   void expandACCInstr(MachineBasicBlock::instr_iterator MI,
00131                       MachineBasicBlock &MBB, unsigned Opc) const;
00132 
00133   void expandPseudoIndirectBranch(MachineBasicBlock::instr_iterator MI,
00134                                   MachineBasicBlock &MBB) const;
00135 
00136   /// \brief Expand pseudo instruction. Return true if MI was expanded.
00137   bool expandPseudos(MachineBasicBlock::instr_iterator &MI,
00138                      MachineBasicBlock &MBB) const;
00139 };
00140 }
00141 
00142 char MipsCodeEmitter::ID = 0;
00143 
00144 bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
00145   MipsTargetMachine &Target = static_cast<MipsTargetMachine &>(
00146                                 const_cast<TargetMachine &>(MF.getTarget()));
00147 
00148   JTI = Target.getJITInfo();
00149   II = Target.getInstrInfo();
00150   TD = Target.getDataLayout();
00151   Subtarget = &TM.getSubtarget<MipsSubtarget> ();
00152   MCPEs = &MF.getConstantPool()->getConstants();
00153   MJTEs = nullptr;
00154   if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables();
00155   JTI->Initialize(MF, IsPIC, Subtarget->isLittle());
00156   MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
00157 
00158   do {
00159     DEBUG(errs() << "JITTing function '"
00160         << MF.getName() << "'\n");
00161     MCE.startFunction(MF);
00162 
00163     for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
00164         MBB != E; ++MBB){
00165       MCE.StartMachineBasicBlock(MBB);
00166       for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
00167            E = MBB->instr_end(); I != E;)
00168         emitInstruction(*I++, *MBB);
00169     }
00170   } while (MCE.finishFunction(MF));
00171 
00172   return false;
00173 }
00174 
00175 unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
00176                                         const MachineOperand &MO) const {
00177   // NOTE: This relocations are for static.
00178   uint64_t TSFlags = MI.getDesc().TSFlags;
00179   uint64_t Form = TSFlags & MipsII::FormMask;
00180   if (Form == MipsII::FrmJ)
00181     return Mips::reloc_mips_26;
00182   if ((Form == MipsII::FrmI || Form == MipsII::FrmFI)
00183        && MI.isBranch())
00184     return Mips::reloc_mips_pc16;
00185   if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
00186     return Mips::reloc_mips_hi;
00187   return Mips::reloc_mips_lo;
00188 }
00189 
00190 unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI,
00191                                                unsigned OpNo) const {
00192   MachineOperand MO = MI.getOperand(OpNo);
00193   if (MO.isGlobal())
00194     emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
00195   else if (MO.isSymbol())
00196     emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
00197   else if (MO.isMBB())
00198     emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
00199   else
00200     llvm_unreachable("Unexpected jump target operand kind.");
00201   return 0;
00202 }
00203 
00204 unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI,
00205                                                  unsigned OpNo) const {
00206   llvm_unreachable("Unimplemented function.");
00207   return 0;
00208 }
00209 
00210 unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI,
00211                                                    unsigned OpNo) const {
00212   llvm_unreachable("Unimplemented function.");
00213   return 0;
00214 }
00215 
00216 unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI,
00217                                                    unsigned OpNo) const {
00218   llvm_unreachable("Unimplemented function.");
00219   return 0;
00220 }
00221 
00222 unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI,
00223                                                    unsigned OpNo) const {
00224   llvm_unreachable("Unimplemented function.");
00225   return 0;
00226 }
00227 
00228 unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI,
00229                                                  unsigned OpNo) const {
00230   llvm_unreachable("Unimplemented function.");
00231   return 0;
00232 }
00233 
00234 unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
00235                                                  unsigned OpNo) const {
00236   MachineOperand MO = MI.getOperand(OpNo);
00237   emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
00238   return 0;
00239 }
00240 
00241 unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
00242                                          unsigned OpNo) const {
00243   // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
00244   assert(MI.getOperand(OpNo).isReg());
00245   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
00246   return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
00247 }
00248 
00249 unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI,
00250                                                 unsigned OpNo) const {
00251   llvm_unreachable("Unimplemented function.");
00252   return 0;
00253 }
00254 
00255 unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI,
00256                                             unsigned OpNo) const {
00257   llvm_unreachable("Unimplemented function.");
00258   return 0;
00259 }
00260 
00261 unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
00262                                              unsigned OpNo) const {
00263   // size is encoded as size-1.
00264   return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
00265 }
00266 
00267 unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
00268                                              unsigned OpNo) const {
00269   // size is encoded as pos+size-1.
00270   return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
00271          getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
00272 }
00273 
00274 unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI,
00275                                             unsigned OpNo) const {
00276   llvm_unreachable("Unimplemented function.");
00277   return 0;
00278 }
00279 
00280 unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI,
00281                                                 unsigned OpNo) const {
00282   llvm_unreachable("Unimplemented function.");
00283   return 0;
00284 }
00285 
00286 unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI,
00287                                                 unsigned OpNo) const {
00288   llvm_unreachable("Unimplemented function.");
00289   return 0;
00290 }
00291 
00292 /// getMachineOpValue - Return binary encoding of operand. If the machine
00293 /// operand requires relocation, record the relocation and return zero.
00294 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
00295                                             const MachineOperand &MO) const {
00296   if (MO.isReg())
00297     return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
00298   else if (MO.isImm())
00299     return static_cast<unsigned>(MO.getImm());
00300   else if (MO.isGlobal())
00301     emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
00302   else if (MO.isSymbol())
00303     emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
00304   else if (MO.isCPI())
00305     emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
00306   else if (MO.isJTI())
00307     emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO));
00308   else if (MO.isMBB())
00309     emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
00310   else
00311     llvm_unreachable("Unable to encode MachineOperand!");
00312   return 0;
00313 }
00314 
00315 void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
00316                                         bool MayNeedFarStub) const {
00317   MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
00318                                              const_cast<GlobalValue *>(GV), 0,
00319                                              MayNeedFarStub));
00320 }
00321 
00322 void MipsCodeEmitter::
00323 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
00324   MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
00325                                                  Reloc, ES, 0, 0));
00326 }
00327 
00328 void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
00329   MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
00330                                                     Reloc, CPI, 0, false));
00331 }
00332 
00333 void MipsCodeEmitter::
00334 emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const {
00335   MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
00336                                                     Reloc, JTIndex, 0, false));
00337 }
00338 
00339 void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
00340                                             unsigned Reloc) const {
00341   MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
00342                                              Reloc, BB));
00343 }
00344 
00345 void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
00346                                       MachineBasicBlock &MBB) {
00347   DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
00348 
00349   // Expand pseudo instruction. Skip if MI was not expanded.
00350   if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) &&
00351       !expandPseudos(MI, MBB))
00352     return;
00353 
00354   MCE.processDebugLoc(MI->getDebugLoc(), true);
00355 
00356   emitWord(getBinaryCodeForInstr(*MI));
00357   ++NumEmitted;  // Keep track of the # of mi's emitted
00358 
00359   MCE.processDebugLoc(MI->getDebugLoc(), false);
00360 }
00361 
00362 void MipsCodeEmitter::emitWord(unsigned Word) {
00363   DEBUG(errs() << "  0x";
00364         errs().write_hex(Word) << "\n");
00365   if (Subtarget->isLittle())
00366     MCE.emitWordLE(Word);
00367   else
00368     MCE.emitWordBE(Word);
00369 }
00370 
00371 void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI,
00372                                      MachineBasicBlock &MBB,
00373                                      unsigned Opc) const {
00374   // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1".
00375   BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc))
00376     .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg());
00377 }
00378 
00379 void MipsCodeEmitter::expandPseudoIndirectBranch(
00380     MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) const {
00381   // This logic is duplicated from MipsAsmPrinter::emitPseudoIndirectBranch()
00382   bool HasLinkReg = false;
00383   unsigned Opcode = 0;
00384 
00385   if (Subtarget->hasMips64r6()) {
00386     // MIPS64r6 should use (JALR64 ZERO_64, $rs)
00387     Opcode = Mips::JALR64;
00388     HasLinkReg = true;
00389   } else if (Subtarget->hasMips32r6()) {
00390     // MIPS32r6 should use (JALR ZERO, $rs)
00391     Opcode = Mips::JALR;
00392     HasLinkReg = true;
00393   } else if (Subtarget->inMicroMipsMode())
00394     // microMIPS should use (JR_MM $rs)
00395     Opcode = Mips::JR_MM;
00396   else {
00397     // Everything else should use (JR $rs)
00398     Opcode = Mips::JR;
00399   }
00400 
00401   auto MIB = BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opcode));
00402 
00403   if (HasLinkReg) {
00404     unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
00405     MIB.addReg(ZeroReg);
00406   }
00407 
00408   MIB.addReg(MI->getOperand(0).getReg());
00409 }
00410 
00411 bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI,
00412                                     MachineBasicBlock &MBB) const {
00413   switch (MI->getOpcode()) {
00414   default:
00415     llvm_unreachable("Unhandled pseudo");
00416     return false;
00417   case Mips::NOP:
00418     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO)
00419       .addReg(Mips::ZERO).addImm(0);
00420     break;
00421   case Mips::B:
00422     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO)
00423       .addReg(Mips::ZERO).addOperand(MI->getOperand(0));
00424     break;
00425   case Mips::TRAP:
00426     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0)
00427       .addImm(0);
00428     break;
00429   case Mips::JALRPseudo:
00430     BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA)
00431       .addReg(MI->getOperand(0).getReg());
00432     break;
00433   case Mips::PseudoMULT:
00434     expandACCInstr(MI, MBB, Mips::MULT);
00435     break;
00436   case Mips::PseudoMULTu:
00437     expandACCInstr(MI, MBB, Mips::MULTu);
00438     break;
00439   case Mips::PseudoSDIV:
00440     expandACCInstr(MI, MBB, Mips::SDIV);
00441     break;
00442   case Mips::PseudoUDIV:
00443     expandACCInstr(MI, MBB, Mips::UDIV);
00444     break;
00445   case Mips::PseudoMADD:
00446     expandACCInstr(MI, MBB, Mips::MADD);
00447     break;
00448   case Mips::PseudoMADDU:
00449     expandACCInstr(MI, MBB, Mips::MADDU);
00450     break;
00451   case Mips::PseudoMSUB:
00452     expandACCInstr(MI, MBB, Mips::MSUB);
00453     break;
00454   case Mips::PseudoMSUBU:
00455     expandACCInstr(MI, MBB, Mips::MSUBU);
00456     break;
00457   case Mips::PseudoReturn:
00458   case Mips::PseudoReturn64:
00459   case Mips::PseudoIndirectBranch:
00460   case Mips::PseudoIndirectBranch64:
00461       expandPseudoIndirectBranch(MI, MBB);
00462       break;
00463   case TargetOpcode::CFI_INSTRUCTION:
00464   case TargetOpcode::IMPLICIT_DEF:
00465   case TargetOpcode::KILL:
00466       // Do nothing
00467       return false;
00468   }
00469 
00470   (MI--)->eraseFromBundle();
00471   return true;
00472 }
00473 
00474 /// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
00475 /// code to the specified MCE object.
00476 FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
00477                                                  JITCodeEmitter &JCE) {
00478   return new MipsCodeEmitter(TM, JCE);
00479 }
00480 
00481 #include "MipsGenCodeEmitter.inc"