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NVPTX.h
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00001 //===-- NVPTX.h - Top-level interface for NVPTX representation --*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains the entry points for global functions defined in
00011 // the LLVM NVPTX back-end.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTX_H
00016 #define LLVM_LIB_TARGET_NVPTX_NVPTX_H
00017 
00018 #include "MCTargetDesc/NVPTXBaseInfo.h"
00019 #include "llvm/ADT/StringMap.h"
00020 #include "llvm/IR/Module.h"
00021 #include "llvm/IR/Value.h"
00022 #include "llvm/Support/ErrorHandling.h"
00023 #include "llvm/Target/TargetMachine.h"
00024 #include <cassert>
00025 #include <iosfwd>
00026 
00027 namespace llvm {
00028 class NVPTXTargetMachine;
00029 class FunctionPass;
00030 class MachineFunctionPass;
00031 class formatted_raw_ostream;
00032 
00033 namespace NVPTXCC {
00034 enum CondCodes {
00035   EQ,
00036   NE,
00037   LT,
00038   LE,
00039   GT,
00040   GE
00041 };
00042 }
00043 
00044 inline static const char *NVPTXCondCodeToString(NVPTXCC::CondCodes CC) {
00045   switch (CC) {
00046   case NVPTXCC::NE:
00047     return "ne";
00048   case NVPTXCC::EQ:
00049     return "eq";
00050   case NVPTXCC::LT:
00051     return "lt";
00052   case NVPTXCC::LE:
00053     return "le";
00054   case NVPTXCC::GT:
00055     return "gt";
00056   case NVPTXCC::GE:
00057     return "ge";
00058   }
00059   llvm_unreachable("Unknown condition code");
00060 }
00061 
00062 ImmutablePass *createNVPTXTargetTransformInfoPass(const NVPTXTargetMachine *TM);
00063 FunctionPass *createNVPTXISelDag(NVPTXTargetMachine &TM,
00064                                  llvm::CodeGenOpt::Level OptLevel);
00065 ModulePass *createNVPTXAssignValidGlobalNamesPass();
00066 ModulePass *createGenericToNVVMPass();
00067 FunctionPass *createNVPTXFavorNonGenericAddrSpacesPass();
00068 ModulePass *createNVVMReflectPass();
00069 ModulePass *createNVVMReflectPass(const StringMap<int>& Mapping);
00070 MachineFunctionPass *createNVPTXPrologEpilogPass();
00071 MachineFunctionPass *createNVPTXReplaceImageHandlesPass();
00072 FunctionPass *createNVPTXImageOptimizerPass();
00073 FunctionPass *createNVPTXLowerStructArgsPass();
00074 
00075 bool isImageOrSamplerVal(const Value *, const Module *);
00076 
00077 extern Target TheNVPTXTarget32;
00078 extern Target TheNVPTXTarget64;
00079 
00080 namespace NVPTX {
00081 enum DrvInterface {
00082   NVCL,
00083   CUDA
00084 };
00085 
00086 // A field inside TSFlags needs a shift and a mask. The usage is
00087 // always as follows :
00088 // ((TSFlags & fieldMask) >> fieldShift)
00089 // The enum keeps the mask, the shift, and all valid values of the
00090 // field in one place.
00091 enum VecInstType {
00092   VecInstTypeShift = 0,
00093   VecInstTypeMask = 0xF,
00094 
00095   VecNOP = 0,
00096   VecLoad = 1,
00097   VecStore = 2,
00098   VecBuild = 3,
00099   VecShuffle = 4,
00100   VecExtract = 5,
00101   VecInsert = 6,
00102   VecDest = 7,
00103   VecOther = 15
00104 };
00105 
00106 enum SimpleMove {
00107   SimpleMoveMask = 0x10,
00108   SimpleMoveShift = 4
00109 };
00110 enum LoadStore {
00111   isLoadMask = 0x20,
00112   isLoadShift = 5,
00113   isStoreMask = 0x40,
00114   isStoreShift = 6
00115 };
00116 
00117 namespace PTXLdStInstCode {
00118 enum AddressSpace {
00119   GENERIC = 0,
00120   GLOBAL = 1,
00121   CONSTANT = 2,
00122   SHARED = 3,
00123   PARAM = 4,
00124   LOCAL = 5
00125 };
00126 enum FromType {
00127   Unsigned = 0,
00128   Signed,
00129   Float
00130 };
00131 enum VecType {
00132   Scalar = 1,
00133   V2 = 2,
00134   V4 = 4
00135 };
00136 }
00137 
00138 /// PTXCvtMode - Conversion code enumeration
00139 namespace PTXCvtMode {
00140 enum CvtMode {
00141   NONE = 0,
00142   RNI,
00143   RZI,
00144   RMI,
00145   RPI,
00146   RN,
00147   RZ,
00148   RM,
00149   RP,
00150 
00151   BASE_MASK = 0x0F,
00152   FTZ_FLAG = 0x10,
00153   SAT_FLAG = 0x20
00154 };
00155 }
00156 
00157 /// PTXCmpMode - Comparison mode enumeration
00158 namespace PTXCmpMode {
00159 enum CmpMode {
00160   EQ = 0,
00161   NE,
00162   LT,
00163   LE,
00164   GT,
00165   GE,
00166   LO,
00167   LS,
00168   HI,
00169   HS,
00170   EQU,
00171   NEU,
00172   LTU,
00173   LEU,
00174   GTU,
00175   GEU,
00176   NUM,
00177   // NAN is a MACRO
00178   NotANumber,
00179 
00180   BASE_MASK = 0xFF,
00181   FTZ_FLAG = 0x100
00182 };
00183 }
00184 }
00185 } // end namespace llvm;
00186 
00187 // Defines symbolic names for NVPTX registers.  This defines a mapping from
00188 // register name to register number.
00189 #define GET_REGINFO_ENUM
00190 #include "NVPTXGenRegisterInfo.inc"
00191 
00192 // Defines symbolic names for the NVPTX instructions.
00193 #define GET_INSTRINFO_ENUM
00194 #include "NVPTXGenInstrInfo.inc"
00195 
00196 #endif