LLVM  mainline
RegisterPressure.h
Go to the documentation of this file.
00001 //===-- RegisterPressure.h - Dynamic Register Pressure -*- C++ -*-------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file defines the RegisterPressure class which can be used to track
00011 // MachineInstr level register pressure.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #ifndef LLVM_CODEGEN_REGISTERPRESSURE_H
00016 #define LLVM_CODEGEN_REGISTERPRESSURE_H
00017 
00018 #include "llvm/ADT/SparseSet.h"
00019 #include "llvm/CodeGen/SlotIndexes.h"
00020 #include "llvm/Target/TargetRegisterInfo.h"
00021 
00022 namespace llvm {
00023 
00024 class LiveIntervals;
00025 class LiveRange;
00026 class RegisterClassInfo;
00027 class MachineInstr;
00028 
00029 struct RegisterMaskPair {
00030   unsigned RegUnit; ///< Virtual register or register unit.
00031   LaneBitmask LaneMask;
00032 
00033   RegisterMaskPair(unsigned RegUnit, LaneBitmask LaneMask)
00034       : RegUnit(RegUnit), LaneMask(LaneMask) {}
00035 };
00036 
00037 /// Base class for register pressure results.
00038 struct RegisterPressure {
00039   /// Map of max reg pressure indexed by pressure set ID, not class ID.
00040   std::vector<unsigned> MaxSetPressure;
00041 
00042   /// List of live in virtual registers or physical register units.
00043   SmallVector<RegisterMaskPair,8> LiveInRegs;
00044   SmallVector<RegisterMaskPair,8> LiveOutRegs;
00045 
00046   void dump(const TargetRegisterInfo *TRI) const;
00047 };
00048 
00049 /// RegisterPressure computed within a region of instructions delimited by
00050 /// TopIdx and BottomIdx.  During pressure computation, the maximum pressure per
00051 /// register pressure set is increased. Once pressure within a region is fully
00052 /// computed, the live-in and live-out sets are recorded.
00053 ///
00054 /// This is preferable to RegionPressure when LiveIntervals are available,
00055 /// because delimiting regions by SlotIndex is more robust and convenient than
00056 /// holding block iterators. The block contents can change without invalidating
00057 /// the pressure result.
00058 struct IntervalPressure : RegisterPressure {
00059   /// Record the boundary of the region being tracked.
00060   SlotIndex TopIdx;
00061   SlotIndex BottomIdx;
00062 
00063   void reset();
00064 
00065   void openTop(SlotIndex NextTop);
00066 
00067   void openBottom(SlotIndex PrevBottom);
00068 };
00069 
00070 /// RegisterPressure computed within a region of instructions delimited by
00071 /// TopPos and BottomPos. This is a less precise version of IntervalPressure for
00072 /// use when LiveIntervals are unavailable.
00073 struct RegionPressure : RegisterPressure {
00074   /// Record the boundary of the region being tracked.
00075   MachineBasicBlock::const_iterator TopPos;
00076   MachineBasicBlock::const_iterator BottomPos;
00077 
00078   void reset();
00079 
00080   void openTop(MachineBasicBlock::const_iterator PrevTop);
00081 
00082   void openBottom(MachineBasicBlock::const_iterator PrevBottom);
00083 };
00084 
00085 /// Capture a change in pressure for a single pressure set. UnitInc may be
00086 /// expressed in terms of upward or downward pressure depending on the client
00087 /// and will be dynamically adjusted for current liveness.
00088 ///
00089 /// Pressure increments are tiny, typically 1-2 units, and this is only for
00090 /// heuristics, so we don't check UnitInc overflow. Instead, we may have a
00091 /// higher level assert that pressure is consistent within a region. We also
00092 /// effectively ignore dead defs which don't affect heuristics much.
00093 class PressureChange {
00094   uint16_t PSetID; // ID+1. 0=Invalid.
00095   int16_t  UnitInc;
00096 public:
00097   PressureChange(): PSetID(0), UnitInc(0) {}
00098   PressureChange(unsigned id): PSetID(id+1), UnitInc(0) {
00099     assert(id < UINT16_MAX && "PSetID overflow.");
00100   }
00101 
00102   bool isValid() const { return PSetID > 0; }
00103 
00104   unsigned getPSet() const {
00105     assert(isValid() && "invalid PressureChange");
00106     return PSetID - 1;
00107   }
00108   // If PSetID is invalid, return UINT16_MAX to give it lowest priority.
00109   unsigned getPSetOrMax() const { return (PSetID - 1) & UINT16_MAX; }
00110 
00111   int getUnitInc() const { return UnitInc; }
00112 
00113   void setUnitInc(int Inc) { UnitInc = Inc; }
00114 
00115   bool operator==(const PressureChange &RHS) const {
00116     return PSetID == RHS.PSetID && UnitInc == RHS.UnitInc;
00117   }
00118 };
00119 
00120 template <> struct isPodLike<PressureChange> {
00121    static const bool value = true;
00122 };
00123 
00124 /// List of PressureChanges in order of increasing, unique PSetID.
00125 ///
00126 /// Use a small fixed number, because we can fit more PressureChanges in an
00127 /// empty SmallVector than ever need to be tracked per register class. If more
00128 /// PSets are affected, then we only track the most constrained.
00129 class PressureDiff {
00130   // The initial design was for MaxPSets=4, but that requires PSet partitions,
00131   // which are not yet implemented. (PSet partitions are equivalent PSets given
00132   // the register classes actually in use within the scheduling region.)
00133   enum { MaxPSets = 16 };
00134 
00135   PressureChange PressureChanges[MaxPSets];
00136 
00137   typedef PressureChange* iterator;
00138   iterator nonconst_begin() { return &PressureChanges[0]; }
00139   iterator nonconst_end() { return &PressureChanges[MaxPSets]; }
00140 
00141 public:
00142   typedef const PressureChange* const_iterator;
00143   const_iterator begin() const { return &PressureChanges[0]; }
00144   const_iterator end() const { return &PressureChanges[MaxPSets]; }
00145 
00146   void addPressureChange(unsigned RegUnit, bool IsDec,
00147                          const MachineRegisterInfo *MRI);
00148 
00149   LLVM_DUMP_METHOD void dump(const TargetRegisterInfo &TRI) const;
00150 };
00151 
00152 /// List of registers defined and used by a machine instruction.
00153 class RegisterOperands {
00154 public:
00155   /// List of virtual registers and register units read by the instruction.
00156   SmallVector<RegisterMaskPair, 8> Uses;
00157   /// \brief List of virtual registers and register units defined by the
00158   /// instruction which are not dead.
00159   SmallVector<RegisterMaskPair, 8> Defs;
00160   /// \brief List of virtual registers and register units defined by the
00161   /// instruction but dead.
00162   SmallVector<RegisterMaskPair, 8> DeadDefs;
00163 
00164   /// Analyze the given instruction \p MI and fill in the Uses, Defs and
00165   /// DeadDefs list based on the MachineOperand flags.
00166   void collect(const MachineInstr &MI, const TargetRegisterInfo &TRI,
00167                const MachineRegisterInfo &MRI, bool TrackLaneMasks,
00168                bool IgnoreDead);
00169 
00170   /// Use liveness information to find dead defs not marked with a dead flag
00171   /// and move them to the DeadDefs vector.
00172   void detectDeadDefs(const MachineInstr &MI, const LiveIntervals &LIS);
00173 
00174   /// Use liveness information to find out which uses/defs are partially
00175   /// undefined/dead and adjust the RegisterMaskPairs accordingly.
00176   /// If \p AddFlagsMI is given then missing read-undef and dead flags will be
00177   /// added to the instruction.
00178   void adjustLaneLiveness(const LiveIntervals &LIS,
00179                           const MachineRegisterInfo &MRI, SlotIndex Pos,
00180                           MachineInstr *AddFlagsMI = nullptr);
00181 };
00182 
00183 /// Array of PressureDiffs.
00184 class PressureDiffs {
00185   PressureDiff *PDiffArray;
00186   unsigned Size;
00187   unsigned Max;
00188 public:
00189   PressureDiffs(): PDiffArray(nullptr), Size(0), Max(0) {}
00190   ~PressureDiffs() { free(PDiffArray); }
00191 
00192   void clear() { Size = 0; }
00193 
00194   void init(unsigned N);
00195 
00196   PressureDiff &operator[](unsigned Idx) {
00197     assert(Idx < Size && "PressureDiff index out of bounds");
00198     return PDiffArray[Idx];
00199   }
00200   const PressureDiff &operator[](unsigned Idx) const {
00201     return const_cast<PressureDiffs*>(this)->operator[](Idx);
00202   }
00203   /// \brief Record pressure difference induced by the given operand list to
00204   /// node with index \p Idx.
00205   void addInstruction(unsigned Idx, const RegisterOperands &RegOpers,
00206                       const MachineRegisterInfo &MRI);
00207 };
00208 
00209 /// Store the effects of a change in pressure on things that MI scheduler cares
00210 /// about.
00211 ///
00212 /// Excess records the value of the largest difference in register units beyond
00213 /// the target's pressure limits across the affected pressure sets, where
00214 /// largest is defined as the absolute value of the difference. Negative
00215 /// ExcessUnits indicates a reduction in pressure that had already exceeded the
00216 /// target's limits.
00217 ///
00218 /// CriticalMax records the largest increase in the tracker's max pressure that
00219 /// exceeds the critical limit for some pressure set determined by the client.
00220 ///
00221 /// CurrentMax records the largest increase in the tracker's max pressure that
00222 /// exceeds the current limit for some pressure set determined by the client.
00223 struct RegPressureDelta {
00224   PressureChange Excess;
00225   PressureChange CriticalMax;
00226   PressureChange CurrentMax;
00227 
00228   RegPressureDelta() {}
00229 
00230   bool operator==(const RegPressureDelta &RHS) const {
00231     return Excess == RHS.Excess && CriticalMax == RHS.CriticalMax
00232       && CurrentMax == RHS.CurrentMax;
00233   }
00234   bool operator!=(const RegPressureDelta &RHS) const {
00235     return !operator==(RHS);
00236   }
00237 };
00238 
00239 /// A set of live virtual registers and physical register units.
00240 ///
00241 /// This is a wrapper around a SparseSet which deals with mapping register unit
00242 /// and virtual register indexes to an index usable by the sparse set.
00243 class LiveRegSet {
00244 private:
00245   struct IndexMaskPair {
00246     unsigned Index;
00247     LaneBitmask LaneMask;
00248 
00249     IndexMaskPair(unsigned Index, LaneBitmask LaneMask)
00250         : Index(Index), LaneMask(LaneMask) {}
00251 
00252     unsigned getSparseSetIndex() const {
00253       return Index;
00254     }
00255   };
00256 
00257   typedef SparseSet<IndexMaskPair> RegSet;
00258   RegSet Regs;
00259   unsigned NumRegUnits;
00260 
00261   unsigned getSparseIndexFromReg(unsigned Reg) const {
00262     if (TargetRegisterInfo::isVirtualRegister(Reg))
00263       return TargetRegisterInfo::virtReg2Index(Reg) + NumRegUnits;
00264     assert(Reg < NumRegUnits);
00265     return Reg;
00266   }
00267   unsigned getRegFromSparseIndex(unsigned SparseIndex) const {
00268     if (SparseIndex >= NumRegUnits)
00269       return TargetRegisterInfo::index2VirtReg(SparseIndex-NumRegUnits);
00270     return SparseIndex;
00271   }
00272 
00273 public:
00274   void clear();
00275   void init(const MachineRegisterInfo &MRI);
00276 
00277   LaneBitmask contains(unsigned Reg) const {
00278     unsigned SparseIndex = getSparseIndexFromReg(Reg);
00279     RegSet::const_iterator I = Regs.find(SparseIndex);
00280     if (I == Regs.end())
00281       return 0;
00282     return I->LaneMask;
00283   }
00284 
00285   /// Mark the \p Pair.LaneMask lanes of \p Pair.Reg as live.
00286   /// Returns the previously live lanes of \p Pair.Reg.
00287   LaneBitmask insert(RegisterMaskPair Pair) {
00288     unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
00289     auto InsertRes = Regs.insert(IndexMaskPair(SparseIndex, Pair.LaneMask));
00290     if (!InsertRes.second) {
00291       unsigned PrevMask = InsertRes.first->LaneMask;
00292       InsertRes.first->LaneMask |= Pair.LaneMask;
00293       return PrevMask;
00294     }
00295     return 0;
00296   }
00297 
00298   /// Clears the \p Pair.LaneMask lanes of \p Pair.Reg (mark them as dead).
00299   /// Returns the previously live lanes of \p Pair.Reg.
00300   LaneBitmask erase(RegisterMaskPair Pair) {
00301     unsigned SparseIndex = getSparseIndexFromReg(Pair.RegUnit);
00302     RegSet::iterator I = Regs.find(SparseIndex);
00303     if (I == Regs.end())
00304       return 0;
00305     unsigned PrevMask = I->LaneMask;
00306     I->LaneMask &= ~Pair.LaneMask;
00307     return PrevMask;
00308   }
00309 
00310   size_t size() const {
00311     return Regs.size();
00312   }
00313 
00314   template<typename ContainerT>
00315   void appendTo(ContainerT &To) const {
00316     for (const IndexMaskPair &P : Regs) {
00317       unsigned Reg = getRegFromSparseIndex(P.Index);
00318       if (P.LaneMask != 0)
00319         To.push_back(RegisterMaskPair(Reg, P.LaneMask));
00320     }
00321   }
00322 };
00323 
00324 /// Track the current register pressure at some position in the instruction
00325 /// stream, and remember the high water mark within the region traversed. This
00326 /// does not automatically consider live-through ranges. The client may
00327 /// independently adjust for global liveness.
00328 ///
00329 /// Each RegPressureTracker only works within a MachineBasicBlock. Pressure can
00330 /// be tracked across a larger region by storing a RegisterPressure result at
00331 /// each block boundary and explicitly adjusting pressure to account for block
00332 /// live-in and live-out register sets.
00333 ///
00334 /// RegPressureTracker holds a reference to a RegisterPressure result that it
00335 /// computes incrementally. During downward tracking, P.BottomIdx or P.BottomPos
00336 /// is invalid until it reaches the end of the block or closeRegion() is
00337 /// explicitly called. Similarly, P.TopIdx is invalid during upward
00338 /// tracking. Changing direction has the side effect of closing region, and
00339 /// traversing past TopIdx or BottomIdx reopens it.
00340 class RegPressureTracker {
00341   const MachineFunction     *MF;
00342   const TargetRegisterInfo  *TRI;
00343   const RegisterClassInfo   *RCI;
00344   const MachineRegisterInfo *MRI;
00345   const LiveIntervals       *LIS;
00346 
00347   /// We currently only allow pressure tracking within a block.
00348   const MachineBasicBlock *MBB;
00349 
00350   /// Track the max pressure within the region traversed so far.
00351   RegisterPressure &P;
00352 
00353   /// Run in two modes dependending on whether constructed with IntervalPressure
00354   /// or RegisterPressure. If requireIntervals is false, LIS are ignored.
00355   bool RequireIntervals;
00356 
00357   /// True if UntiedDefs will be populated.
00358   bool TrackUntiedDefs;
00359 
00360   /// True if lanemasks should be tracked.
00361   bool TrackLaneMasks;
00362 
00363   /// Register pressure corresponds to liveness before this instruction
00364   /// iterator. It may point to the end of the block or a DebugValue rather than
00365   /// an instruction.
00366   MachineBasicBlock::const_iterator CurrPos;
00367 
00368   /// Pressure map indexed by pressure set ID, not class ID.
00369   std::vector<unsigned> CurrSetPressure;
00370 
00371   /// Set of live registers.
00372   LiveRegSet LiveRegs;
00373 
00374   /// Set of vreg defs that start a live range.
00375   SparseSet<unsigned, VirtReg2IndexFunctor> UntiedDefs;
00376   /// Live-through pressure.
00377   std::vector<unsigned> LiveThruPressure;
00378 
00379 public:
00380   RegPressureTracker(IntervalPressure &rp) :
00381     MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
00382     RequireIntervals(true), TrackUntiedDefs(false), TrackLaneMasks(false) {}
00383 
00384   RegPressureTracker(RegionPressure &rp) :
00385     MF(nullptr), TRI(nullptr), RCI(nullptr), LIS(nullptr), MBB(nullptr), P(rp),
00386     RequireIntervals(false), TrackUntiedDefs(false), TrackLaneMasks(false) {}
00387 
00388   void reset();
00389 
00390   void init(const MachineFunction *mf, const RegisterClassInfo *rci,
00391             const LiveIntervals *lis, const MachineBasicBlock *mbb,
00392             MachineBasicBlock::const_iterator pos,
00393             bool TrackLaneMasks, bool TrackUntiedDefs);
00394 
00395   /// Force liveness of virtual registers or physical register
00396   /// units. Particularly useful to initialize the livein/out state of the
00397   /// tracker before the first call to advance/recede.
00398   void addLiveRegs(ArrayRef<RegisterMaskPair> Regs);
00399 
00400   /// Get the MI position corresponding to this register pressure.
00401   MachineBasicBlock::const_iterator getPos() const { return CurrPos; }
00402 
00403   // Reset the MI position corresponding to the register pressure. This allows
00404   // schedulers to move instructions above the RegPressureTracker's
00405   // CurrPos. Since the pressure is computed before CurrPos, the iterator
00406   // position changes while pressure does not.
00407   void setPos(MachineBasicBlock::const_iterator Pos) { CurrPos = Pos; }
00408 
00409   /// Recede across the previous instruction.
00410   void recede(SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr);
00411 
00412   /// Recede across the previous instruction.
00413   /// This "low-level" variant assumes that recedeSkipDebugValues() was
00414   /// called previously and takes precomputed RegisterOperands for the
00415   /// instruction.
00416   void recede(const RegisterOperands &RegOpers,
00417               SmallVectorImpl<RegisterMaskPair> *LiveUses = nullptr);
00418 
00419   /// Recede until we find an instruction which is not a DebugValue.
00420   void recedeSkipDebugValues();
00421 
00422   /// Advance across the current instruction.
00423   void advance();
00424 
00425   /// Advance across the current instruction.
00426   /// This is a "low-level" variant of advance() which takes precomputed
00427   /// RegisterOperands of the instruction.
00428   void advance(const RegisterOperands &RegOpers);
00429 
00430   /// Finalize the region boundaries and recored live ins and live outs.
00431   void closeRegion();
00432 
00433   /// Initialize the LiveThru pressure set based on the untied defs found in
00434   /// RPTracker.
00435   void initLiveThru(const RegPressureTracker &RPTracker);
00436 
00437   /// Copy an existing live thru pressure result.
00438   void initLiveThru(ArrayRef<unsigned> PressureSet) {
00439     LiveThruPressure.assign(PressureSet.begin(), PressureSet.end());
00440   }
00441 
00442   ArrayRef<unsigned> getLiveThru() const { return LiveThruPressure; }
00443 
00444   /// Get the resulting register pressure over the traversed region.
00445   /// This result is complete if closeRegion() was explicitly invoked.
00446   RegisterPressure &getPressure() { return P; }
00447   const RegisterPressure &getPressure() const { return P; }
00448 
00449   /// Get the register set pressure at the current position, which may be less
00450   /// than the pressure across the traversed region.
00451   const std::vector<unsigned> &getRegSetPressureAtPos() const {
00452     return CurrSetPressure;
00453   }
00454 
00455   bool isTopClosed() const;
00456   bool isBottomClosed() const;
00457 
00458   void closeTop();
00459   void closeBottom();
00460 
00461   /// Consider the pressure increase caused by traversing this instruction
00462   /// bottom-up. Find the pressure set with the most change beyond its pressure
00463   /// limit based on the tracker's current pressure, and record the number of
00464   /// excess register units of that pressure set introduced by this instruction.
00465   void getMaxUpwardPressureDelta(const MachineInstr *MI,
00466                                  PressureDiff *PDiff,
00467                                  RegPressureDelta &Delta,
00468                                  ArrayRef<PressureChange> CriticalPSets,
00469                                  ArrayRef<unsigned> MaxPressureLimit);
00470 
00471   void getUpwardPressureDelta(const MachineInstr *MI,
00472                               /*const*/ PressureDiff &PDiff,
00473                               RegPressureDelta &Delta,
00474                               ArrayRef<PressureChange> CriticalPSets,
00475                               ArrayRef<unsigned> MaxPressureLimit) const;
00476 
00477   /// Consider the pressure increase caused by traversing this instruction
00478   /// top-down. Find the pressure set with the most change beyond its pressure
00479   /// limit based on the tracker's current pressure, and record the number of
00480   /// excess register units of that pressure set introduced by this instruction.
00481   void getMaxDownwardPressureDelta(const MachineInstr *MI,
00482                                    RegPressureDelta &Delta,
00483                                    ArrayRef<PressureChange> CriticalPSets,
00484                                    ArrayRef<unsigned> MaxPressureLimit);
00485 
00486   /// Find the pressure set with the most change beyond its pressure limit after
00487   /// traversing this instruction either upward or downward depending on the
00488   /// closed end of the current region.
00489   void getMaxPressureDelta(const MachineInstr *MI,
00490                            RegPressureDelta &Delta,
00491                            ArrayRef<PressureChange> CriticalPSets,
00492                            ArrayRef<unsigned> MaxPressureLimit) {
00493     if (isTopClosed())
00494       return getMaxDownwardPressureDelta(MI, Delta, CriticalPSets,
00495                                          MaxPressureLimit);
00496 
00497     assert(isBottomClosed() && "Uninitialized pressure tracker");
00498     return getMaxUpwardPressureDelta(MI, nullptr, Delta, CriticalPSets,
00499                                      MaxPressureLimit);
00500   }
00501 
00502   /// Get the pressure of each PSet after traversing this instruction bottom-up.
00503   void getUpwardPressure(const MachineInstr *MI,
00504                          std::vector<unsigned> &PressureResult,
00505                          std::vector<unsigned> &MaxPressureResult);
00506 
00507   /// Get the pressure of each PSet after traversing this instruction top-down.
00508   void getDownwardPressure(const MachineInstr *MI,
00509                            std::vector<unsigned> &PressureResult,
00510                            std::vector<unsigned> &MaxPressureResult);
00511 
00512   void getPressureAfterInst(const MachineInstr *MI,
00513                             std::vector<unsigned> &PressureResult,
00514                             std::vector<unsigned> &MaxPressureResult) {
00515     if (isTopClosed())
00516       return getUpwardPressure(MI, PressureResult, MaxPressureResult);
00517 
00518     assert(isBottomClosed() && "Uninitialized pressure tracker");
00519     return getDownwardPressure(MI, PressureResult, MaxPressureResult);
00520   }
00521 
00522   bool hasUntiedDef(unsigned VirtReg) const {
00523     return UntiedDefs.count(VirtReg);
00524   }
00525 
00526   void dump() const;
00527 
00528 protected:
00529   /// Add Reg to the live out set and increase max pressure.
00530   void discoverLiveOut(RegisterMaskPair Pair);
00531   /// Add Reg to the live in set and increase max pressure.
00532   void discoverLiveIn(RegisterMaskPair Pair);
00533 
00534   /// \brief Get the SlotIndex for the first nondebug instruction including or
00535   /// after the current position.
00536   SlotIndex getCurrSlot() const;
00537 
00538   void increaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
00539                            LaneBitmask NewMask);
00540   void decreaseRegPressure(unsigned RegUnit, LaneBitmask PreviousMask,
00541                            LaneBitmask NewMask);
00542 
00543   void bumpDeadDefs(ArrayRef<RegisterMaskPair> DeadDefs);
00544 
00545   void bumpUpwardPressure(const MachineInstr *MI);
00546   void bumpDownwardPressure(const MachineInstr *MI);
00547 
00548   void discoverLiveInOrOut(RegisterMaskPair Pair,
00549                            SmallVectorImpl<RegisterMaskPair> &LiveInOrOut);
00550 
00551   LaneBitmask getLastUsedLanes(unsigned RegUnit, SlotIndex Pos) const;
00552   LaneBitmask getLiveLanesAt(unsigned RegUnit, SlotIndex Pos) const;
00553   LaneBitmask getLiveThroughAt(unsigned RegUnit, SlotIndex Pos) const;
00554 };
00555 
00556 void dumpRegSetPressure(ArrayRef<unsigned> SetPressure,
00557                         const TargetRegisterInfo *TRI);
00558 } // end namespace llvm
00559 
00560 #endif