30 { SystemZ::R2D, 0x10 },
31 { SystemZ::R3D, 0x18 },
32 { SystemZ::R4D, 0x20 },
33 { SystemZ::R5D, 0x28 },
34 { SystemZ::R6D, 0x30 },
35 { SystemZ::R7D, 0x38 },
36 { SystemZ::R8D, 0x40 },
37 { SystemZ::R9D, 0x48 },
38 { SystemZ::R10D, 0x50 },
39 { SystemZ::R11D, 0x58 },
40 { SystemZ::R12D, 0x60 },
41 { SystemZ::R13D, 0x68 },
42 { SystemZ::R14D, 0x70 },
43 { SystemZ::R15D, 0x78 },
44 { SystemZ::F0D, 0x80 },
45 { SystemZ::F2D, 0x88 },
46 { SystemZ::F4D, 0x90 },
47 { SystemZ::F6D, 0x98 }
51 {SystemZ::R4D, 0x00}, {SystemZ::R5D, 0x08}, {SystemZ::R6D, 0x10},
52 {SystemZ::R7D, 0x18}, {SystemZ::R8D, 0x20}, {SystemZ::R9D, 0x28},
53 {SystemZ::R10D, 0x30}, {SystemZ::R11D, 0x38}, {SystemZ::R12D, 0x40},
54 {SystemZ::R13D, 0x48}, {SystemZ::R14D, 0x50}, {SystemZ::R15D, 0x58}};
58 int LAO,
Align TransAl,
62std::unique_ptr<SystemZFrameLowering>
65 return std::make_unique<SystemZXPLINKFrameLowering>();
66 return std::make_unique<SystemZELFFrameLowering>();
72 switch (
MI->getOpcode()) {
73 case SystemZ::ADJCALLSTACKDOWN:
74 case SystemZ::ADJCALLSTACKUP:
76 "ADJSTACKDOWN and ADJSTACKUP should be no-ops");
86struct SZFrameSortingObj {
93typedef std::vector<SZFrameSortingObj> SZFrameObjVec;
104 if (ObjectsToAllocate.
size() <= 1)
107 for (
auto &Obj : ObjectsToAllocate) {
108 SortingObjects[Obj].IsValid =
true;
109 SortingObjects[Obj].ObjectIndex = Obj;
116 for (
auto &
MI :
MBB) {
117 if (
MI.isDebugInstr())
119 for (
unsigned I = 0, E =
MI.getNumOperands();
I != E; ++
I) {
125 SortingObjects[
Index].IsValid) {
126 if (
TII->hasDisplacementPairInsn(
MI.getOpcode()))
127 SortingObjects[
Index].DPairCount++;
129 SortingObjects[
Index].D12Count++;
141 auto CmpD12 = [](
const SZFrameSortingObj &
A,
const SZFrameSortingObj &
B) {
143 if (!
A.IsValid || !
B.IsValid)
145 if (!
A.ObjectSize || !
B.ObjectSize)
146 return A.ObjectSize > 0;
147 uint64_t ADensityCmp =
A.D12Count *
B.ObjectSize;
148 uint64_t BDensityCmp =
B.D12Count *
A.ObjectSize;
149 if (ADensityCmp != BDensityCmp)
150 return ADensityCmp < BDensityCmp;
151 return A.DPairCount *
B.ObjectSize <
B.DPairCount *
A.ObjectSize;
153 std::stable_sort(SortingObjects.begin(), SortingObjects.end(), CmpD12);
158 for (
auto &Obj : SortingObjects) {
162 ObjectsToAllocate[
Idx++] = Obj.ObjectIndex;
178 std::vector<CalleeSavedInfo> &CSI)
const {
186 unsigned HighGPR = SystemZ::R15D;
188 for (
auto &CS : CSI) {
192 if (SystemZ::GR64BitRegClass.
contains(Reg) && StartSPOffset >
Offset) {
197 int FrameIdx = MFFrame.CreateFixedSpillStackObject(8,
Offset);
198 CS.setFrameIdx(FrameIdx);
200 CS.setFrameIdx(INT32_MAX);
214 if (StartSPOffset >
Offset) {
215 LowGPR = Reg; StartSPOffset =
Offset;
224 CurrOffset += StartSPOffset;
226 for (
auto &CS : CSI) {
227 if (CS.getFrameIdx() != INT32_MAX)
231 unsigned Size =
TRI->getSpillSize(*RC);
233 assert(CurrOffset % 8 == 0 &&
234 "8-byte alignment required for for all register save slots");
235 int FrameIdx = MFFrame.CreateFixedSpillStackObject(
Size, CurrOffset);
236 CS.setFrameIdx(FrameIdx);
249 bool HasFP =
hasFP(MF);
263 SavedRegs.
set(SystemZ::R6D);
264 SavedRegs.
set(SystemZ::R7D);
270 SavedRegs.
set(SystemZ::R11D);
275 SavedRegs.
set(SystemZ::R14D);
282 for (
unsigned I = 0; CSRegs[
I]; ++
I) {
283 unsigned Reg = CSRegs[
I];
284 if (SystemZ::GR64BitRegClass.
contains(Reg) && SavedRegs.
test(Reg)) {
285 SavedRegs.
set(SystemZ::R15D);
304 RegSpillOffsets.
grow(SystemZ::NUM_TARGET_REGS);
305 for (
const auto &Entry : ELFSpillOffsetTable)
306 RegSpillOffsets[Entry.Reg] = Entry.Offset;
314 unsigned GPR64,
bool IsImplicit) {
319 if (!IsLive || !IsImplicit) {
342 "Should be saving %r15 and something else");
358 if (SystemZ::GR64BitRegClass.
contains(Reg))
371 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
376 if (SystemZ::VR128BitRegClass.
contains(Reg)) {
395 bool HasFP =
hasFP(MF);
401 if (SystemZ::FP64BitRegClass.
contains(Reg))
404 if (SystemZ::VR128BitRegClass.
contains(Reg))
417 "Should be loading %r15 and something else");
427 MIB.
addReg(HasFP ? SystemZ::R11D : SystemZ::R15D);
433 if (Reg != RestoreGPRs.
LowGPR && Reg != RestoreGPRs.
HighGPR &&
434 SystemZ::GR64BitRegClass.contains(Reg))
458 int64_t MaxArgOffset = 0;
463 MaxArgOffset = std::max(MaxArgOffset, ArgOffset);
466 uint64_t MaxReach = StackSize + MaxArgOffset;
467 if (!isUInt<12>(MaxReach)) {
481 for (
auto &MO :
MRI->use_nodbg_operands(SystemZ::R6D))
492 int64_t ThisVal = NumBytes;
493 if (isInt<16>(NumBytes))
494 Opcode = SystemZ::AGHI;
496 Opcode = SystemZ::AGFI;
498 int64_t MinVal = -
uint64_t(1) << 31;
499 int64_t MaxVal = (int64_t(1) << 31) - 8;
500 if (ThisVal < MinVal)
502 else if (ThisVal > MaxVal)
508 MI->getOperand(3).setIsDead();
532 unsigned RegNum =
MRI->getDwarfRegNum(Reg,
true);
541 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
551 bool HasFP =
hasFP(MF);
560 "Pre allocated stack space for GHC function is too small");
564 "In GHC calling convention a frame pointer is not supported");
585 for (
auto &Save : CSI) {
587 if (SystemZ::GR64BitRegClass.
contains(Reg)) {
588 int FI = Save.getFrameIdx();
591 nullptr,
MRI->getDwarfRegNum(Reg,
true),
Offset));
602 bool HasStackObject =
false;
605 HasStackObject =
true;
608 if (HasStackObject || MFFrame.
hasCalls())
618 int64_t Delta = -int64_t(StackSize);
619 const unsigned ProbeSize = TLI.getStackProbeSize(MF);
645 SPOffsetFromCFA += Delta;
660 MBBJ.addLiveIn(SystemZ::R11D);
665 for (
auto &Save : CSI) {
667 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
669 (
MBBI->getOpcode() == SystemZ::STD ||
670 MBBI->getOpcode() == SystemZ::STDY))
674 }
else if (SystemZ::VR128BitRegClass.
contains(Reg)) {
676 MBBI->getOpcode() == SystemZ::VST)
684 unsigned DwarfReg =
MRI->getDwarfRegNum(Reg,
true);
691 nullptr, DwarfReg, SPOffsetFromCFA +
Offset));
696 for (
auto CFIIndex : CFIIndexes) {
715 assert(
MBBI->isReturn() &&
"Can only insert epilogue into returning blocks");
717 uint64_t StackSize = MFFrame.getStackSize();
720 unsigned Opcode =
MBBI->getOpcode();
721 if (Opcode != SystemZ::LMG)
724 unsigned AddrOpNo = 2;
727 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode,
Offset);
736 NewOpcode = ZII->getOpcodeForOffset(Opcode,
Offset);
737 assert(NewOpcode &&
"No restore instruction available");
740 MBBI->setDesc(ZII->get(NewOpcode));
741 MBBI->getOperand(AddrOpNo + 1).ChangeToImmediate(
Offset);
742 }
else if (StackSize) {
757 if (
MI.getOpcode() == SystemZ::PROBED_STACKALLOC) {
761 if (StackAllocMI ==
nullptr)
764 const unsigned ProbeSize = TLI.getStackProbeSize(MF);
765 uint64_t NumFullBlocks = StackSize / ProbeSize;
766 uint64_t Residual = StackSize % ProbeSize;
775 bool EmitCFI) ->
void {
778 SPOffsetFromCFA -=
Size;
784 BuildMI(InsMBB, InsPt,
DL, ZII->get(SystemZ::CG))
797 if (NumFullBlocks < 3) {
799 for (
unsigned int i = 0; i < NumFullBlocks; i++)
800 allocateAndProbe(*
MBB,
MBBI, ProbeSize,
true);
803 uint64_t LoopAlloc = ProbeSize * NumFullBlocks;
804 SPOffsetFromCFA -= LoopAlloc;
821 allocateAndProbe(*
MBB,
MBB->
end(), ProbeSize,
false);
833 allocateAndProbe(*
MBB,
MBBI, Residual,
true);
841 if (DoneMBB !=
nullptr) {
843 bool anyChange =
false;
868 bool BackChain = Subtarget.hasBackChain();
869 bool SoftFloat = Subtarget.hasSoftFloat();
870 unsigned Offset = RegSpillOffsets[Reg];
872 if (SystemZ::GR64BitRegClass.
contains(Reg))
875 Offset += BackChain ? 24 : 32;
898 bool BackChain = Subtarget.hasBackChain();
899 bool SoftFloat = Subtarget.hasSoftFloat();
900 if (HasPackedStackAttr && BackChain && !SoftFloat)
903 return HasPackedStackAttr && CallConv;
909 RegSpillOffsets(-1) {
913 RegSpillOffsets.
grow(SystemZ::NUM_TARGET_REGS);
914 for (
const auto &Entry : XPLINKSpillOffsetTable)
915 RegSpillOffsets[Entry.Reg] = Entry.Offset;
941 if (
MRI.isPhysRegModified(Regs->getStackPointerRegister()))
945 if (
MRI.isPhysRegModified(Regs->getAddressOfCalleeRegister()))
950 if (
MRI.isPhysRegModified(Regs->getReturnFunctionAddressRegister()))
968 std::vector<CalleeSavedInfo> &CSI)
const {
973 auto &GRRegClass = SystemZ::GR64BitRegClass;
990 CSI.back().setRestored(
false);
993 CSI.push_back(
CalleeSavedInfo(Regs.getReturnFunctionAddressRegister()));
997 if (
hasFP(MF) || Subtarget.hasBackChain())
1007 int LowRestoreOffset = INT32_MAX;
1009 int LowSpillOffset = INT32_MAX;
1011 int HighOffset = -1;
1013 for (
auto &CS : CSI) {
1015 int Offset = RegSpillOffsets[Reg];
1017 if (GRRegClass.contains(Reg)) {
1018 if (LowSpillOffset >
Offset) {
1022 if (CS.isRestored() && LowRestoreOffset >
Offset) {
1023 LowRestoreOffset =
Offset;
1024 LowRestoreGPR = Reg;
1027 if (
Offset > HighOffset) {
1036 CS.setFrameIdx(FrameIdx);
1042 Align Alignment =
TRI->getSpillAlign(*RC);
1043 unsigned Size =
TRI->getSpillSize(*RC);
1046 CS.setFrameIdx(FrameIdx);
1056 assert(LowSpillGPR &&
"Expected registers to spill");
1067 bool HasFP =
hasFP(MF);
1074 SavedRegs.
set(Regs.getFramePointerRegister());
1092 if (SpillGPRs.LowGPR) {
1093 assert(SpillGPRs.LowGPR != SpillGPRs.HighGPR &&
1094 "Should be saving multiple registers");
1104 MIB.
addReg(Regs.getStackPointerRegister());
1108 MIB.
addImm(SpillGPRs.GPROffset);
1112 auto &GRRegClass = SystemZ::GR64BitRegClass;
1115 if (GRRegClass.contains(Reg))
1123 if (SystemZ::FP64BitRegClass.
contains(Reg)) {
1128 if (SystemZ::VR128BitRegClass.
contains(Reg)) {
1156 if (SystemZ::FP64BitRegClass.
contains(Reg))
1159 if (SystemZ::VR128BitRegClass.
contains(Reg))
1167 if (RestoreGPRs.
LowGPR) {
1168 assert(isInt<20>(Regs.getStackPointerBias() + RestoreGPRs.
GPROffset));
1172 .
addReg(Regs.getStackPointerRegister())
1184 MIB.
addReg(Regs.getStackPointerRegister());
1201 assert(&MF.
front() == &
MBB &&
"Shrink-wrapping not yet supported");
1212 bool HasFP =
hasFP(MF);
1218 const uint64_t StackSize = MFFrame.getStackSize();
1220 if (ZFI->getSpillGPRRegs().LowGPR) {
1222 if ((
MBBI !=
MBB.
end()) && ((
MBBI->getOpcode() == SystemZ::STMG))) {
1223 const int Operand = 3;
1226 Offset = Regs.getStackPointerBias() +
MBBI->getOperand(Operand).getImm();
1228 if (isInt<20>(
Offset - StackSize))
1231 StoreInstr = &*
MBBI;
1241 int64_t Delta = -int64_t(StackSize);
1247 if (StoreInstr && HasFP) {
1269 const uint64_t GuardPageSize = 1024 * 1024;
1270 if (StackSize > GuardPageSize) {
1271 assert(StoreInstr &&
"Wrong insertion point");
1272 BuildMI(
MBB, InsertPt,
DL, ZII->get(SystemZ::XPLINK_STACKALLOC));
1279 Regs.getFramePointerRegister())
1280 .
addReg(Regs.getStackPointerRegister());
1286 B.addLiveIn(Regs.getFramePointerRegister());
1296 unsigned FixedRegs = ZFI->getVarArgsFirstGPR() + ZFI->getVarArgsFirstFPR();
1299 uint64_t StartOffset = MFFrame.getOffsetAdjustment() +
1300 MFFrame.getStackSize() + Regs.getCallFrameSize() +
1302 unsigned Reg = GPRs[
I];
1305 .
addReg(Regs.getStackPointerRegister())
1324 assert(
MBBI->isReturn() &&
"Can only insert epilogue into returning blocks");
1326 uint64_t StackSize = MFFrame.getStackSize();
1328 unsigned SPReg = Regs.getStackPointerRegister();
1345 if (
MI.getOpcode() == SystemZ::XPLINK_STACKALLOC) {
1349 if (StackAllocMI ==
nullptr)
1352 bool NeedSaveSP =
hasFP(MF);
1353 bool NeedSaveArg = PrologMBB.
isLiveIn(SystemZ::R3D);
1354 const int64_t SaveSlotR3 = 2192;
1368 BuildMI(StackExtMBB,
DL, ZII->get(SystemZ::LG), SystemZ::R3D)
1373 BuildMI(StackExtMBB,
DL, ZII->get(SystemZ::CallBASR_STACKEXT))
1395 BuildMI(
MBB, StackAllocMI,
DL, ZII->get(SystemZ::LLGT), SystemZ::R3D)
1417 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LGR))
1425 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LGR))
1429 BuildMI(*NextMBB, StackAllocMI,
DL, ZII->get(SystemZ::LG))
1444 bool anyChange =
false;
1447 }
while (anyChange);
1489 StackSize += Regs->getCallFrameSize();
1498 int Offset = RegSpillOffsets[CS.getReg()];
unsigned const MachineRegisterInfo * MRI
MachineBasicBlock MachineBasicBlock::iterator DebugLoc DL
MachineBasicBlock MachineBasicBlock::iterator MBBI
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< StatepointGC > D("statepoint-example", "an example strategy for statepoint")
Returns the sub type a function will return at a given Idx Should correspond to the result type of an ExtractValue instruction executed with just that one unsigned Idx
const HexagonInstrInfo * TII
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
unsigned const TargetRegisterInfo * TRI
This file declares the machine register scavenger class.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void emitIncrement(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &DL, Register Reg, int64_t NumBytes, const TargetInstrInfo *TII)
static void buildDefCFAReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, unsigned Reg, const SystemZInstrInfo *ZII)
static void buildCFAOffs(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, int Offset, const SystemZInstrInfo *ZII)
static bool isXPLeafCandidate(const MachineFunction &MF)
static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, unsigned GPR64, bool IsImplicit)
static bool contains(SmallPtrSetImpl< ConstantExpr * > &Cache, ConstantExpr *Expr, Constant *C)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
bool empty() const
empty - Check if the array is empty.
bool test(unsigned Idx) const
The CalleeSavedInfo class tracks the information need to locate where a callee saved register is in t...
unsigned getPointerSize(unsigned AS=0) const
Layout pointer size in bytes, rounded up to a whole number of bytes.
CallingConv::ID getCallingConv() const
getCallingConv()/setCallingConv(CC) - These method get and set the calling convention of this functio...
bool isVarArg() const
isVarArg - Return true if this function takes a variable number of arguments.
bool hasFnAttribute(Attribute::AttrKind Kind) const
Return true if the function has the attribute.
void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Store the specified register of the given register class to the specified stack frame index.
void loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, Register DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, Register VReg) const override
Load the specified register of the given register class from the specified stack frame index.
static MCCFIInstruction createDefCfaRegister(MCSymbol *L, unsigned Register, SMLoc Loc={})
.cfi_def_cfa_register modifies a rule for computing CFA.
static MCCFIInstruction createOffset(MCSymbol *L, unsigned Register, int Offset, SMLoc Loc={})
.cfi_offset Previous value of Register is saved at offset Offset from CFA.
static MCCFIInstruction cfiDefCfaOffset(MCSymbol *L, int Offset, SMLoc Loc={})
.cfi_def_cfa_offset modifies a rule for computing CFA.
const MCRegisterInfo * getRegisterInfo() const
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
const BasicBlock * getBasicBlock() const
Return the LLVM basic block that this instance corresponded to originally.
bool isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask=LaneBitmask::getAll()) const
Return true if the specified register is in the live in set.
void addSuccessor(MachineBasicBlock *Succ, BranchProbability Prob=BranchProbability::getUnknown())
Add Succ as a successor of this MachineBasicBlock.
iterator getLastNonDebugInstr(bool SkipPseudoOp=true)
Returns an iterator to the last non-debug instruction in the basic block, or end().
void addLiveIn(MCRegister PhysReg, LaneBitmask LaneMask=LaneBitmask::getAll())
Adds the specified register as a live in.
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted.
int CreateFixedObject(uint64_t Size, int64_t SPOffset, bool IsImmutable, bool isAliased=false)
Create a new object at a fixed location on the stack.
bool hasVarSizedObjects() const
This method may be called any time after instruction selection is complete to determine if the stack ...
uint64_t getStackSize() const
Return the number of bytes that must be allocated to hold all of the fixed size frame objects.
bool adjustsStack() const
Return true if this function adjusts the stack – e.g., when calling another function.
int CreateStackObject(uint64_t Size, Align Alignment, bool isSpillSlot, const AllocaInst *Alloca=nullptr, uint8_t ID=0)
Create a new statically sized stack object, returning a nonnegative identifier to represent it.
bool hasCalls() const
Return true if the current function has any function calls.
uint64_t estimateStackSize(const MachineFunction &MF) const
Estimate and return the size of the stack frame.
void setStackID(int ObjectIdx, uint8_t ID)
void setOffsetAdjustment(int Adj)
Set the correction for frame offsets.
int64_t getObjectSize(int ObjectIdx) const
Return the size of the specified object.
const std::vector< CalleeSavedInfo > & getCalleeSavedInfo() const
Returns a reference to call saved info vector for the current function.
unsigned getMaxCallFrameSize() const
Return the maximum size of a call frame that must be allocated for an outgoing function call.
int getObjectIndexEnd() const
Return one past the maximum frame object index.
void setMaxCallFrameSize(unsigned S)
int CreateFixedSpillStackObject(uint64_t Size, int64_t SPOffset, bool IsImmutable=false)
Create a spill slot at a fixed location on the stack.
int64_t getObjectOffset(int ObjectIdx) const
Return the assigned stack offset of the specified object from the incoming stack pointer.
void setStackSize(uint64_t Size)
Set the size of the stack.
int getObjectIndexBegin() const
Return the minimum frame object index.
bool isDeadObjectIndex(int ObjectIdx) const
Returns true if the specified index corresponds to a dead object.
unsigned addFrameInst(const MCCFIInstruction &Inst)
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
MachineMemOperand * getMachineMemOperand(MachinePointerInfo PtrInfo, MachineMemOperand::Flags f, LLT MemTy, Align base_alignment, const AAMDNodes &AAInfo=AAMDNodes(), const MDNode *Ranges=nullptr, SyncScope::ID SSID=SyncScope::System, AtomicOrdering Ordering=AtomicOrdering::NotAtomic, AtomicOrdering FailureOrdering=AtomicOrdering::NotAtomic)
getMachineMemOperand - Allocate a new MachineMemOperand.
MachineFrameInfo & getFrameInfo()
getFrameInfo - Return the frame info object for the current function.
void push_back(MachineBasicBlock *MBB)
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
const DataLayout & getDataLayout() const
Return the DataLayout attached to the Module associated to this MF.
Function & getFunction()
Return the LLVM function that this machine code represents.
const LLVMTargetMachine & getTarget() const
getTarget - Return the target machine this machine code is compiled with
const std::vector< LandingPadInfo > & getLandingPads() const
Return a reference to the landing pad info for the current function.
MachineModuleInfo & getMMI() const
Ty * getInfo()
getInfo - Keep track of various per-function pieces of information for backends that would like to do...
const MachineBasicBlock & front() const
MachineBasicBlock * CreateMachineBasicBlock(const BasicBlock *BB=nullptr, std::optional< UniqueBBID > BBID=std::nullopt)
CreateMachineBasicBlock - Allocate a new MachineBasicBlock.
const MachineInstrBuilder & addCFIIndex(unsigned CFIIndex) const
const MachineInstrBuilder & addImm(int64_t Val) const
Add a new immediate operand.
const MachineInstrBuilder & addReg(Register RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
const MachineInstrBuilder & addMBB(MachineBasicBlock *MBB, unsigned TargetFlags=0) const
const MachineInstrBuilder & addMemOperand(MachineMemOperand *MMO) const
Representation of each machine instruction.
const DebugLoc & getDebugLoc() const
Returns the debug location id of this MachineInstr.
void eraseFromParent()
Unlink 'this' from the containing basic block and delete it.
const MachineOperand & getOperand(unsigned i) const
A description of a memory reference used in the backend.
@ MOVolatile
The memory access is volatile.
@ MOLoad
The memory access reads data.
This class contains meta information specific to a module.
const MCContext & getContext() const
MachineOperand class - Representation of each machine instruction operand.
bool isFI() const
isFI - Tests if this is a MO_FrameIndex operand.
MachineRegisterInfo - Keep track of information for virtual and physical registers,...
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
void addScavengingFrameIndex(int FI)
Add a scavenging frame index.
Wrapper class representing virtual and physical registers.
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
void push_back(const T &Elt)
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
StackOffset holds a fixed and a scalable offset in bytes.
int64_t getFixed() const
Returns the fixed component of the stack.
static StackOffset getFixed(int64_t Fixed)
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void orderFrameObjects(const MachineFunction &MF, SmallVectorImpl< int > &ObjectsToAllocate) const override
Order the symbols in the local stack frame.
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
unsigned getBackchainOffset(MachineFunction &MF) const
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const override
getFrameIndexReference - This method should return the base register and offset used to reference a f...
bool usePackedStack(MachineFunction &MF) const
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
unsigned getRegSpillOffset(MachineFunction &MF, Register Reg) const
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
int getOrCreateFramePointerSaveIndex(MachineFunction &MF) const
SystemZELFFrameLowering()
bool hasReservedCallFrame(const MachineFunction &MF) const override
hasReservedCallFrame - Under normal circumstances, when a frame pointer is not required,...
static std::unique_ptr< SystemZFrameLowering > create(const SystemZSubtarget &STI)
MachineBasicBlock::iterator eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const override
This method is called during prolog/epilog code insertion to eliminate call frame setup and destroy p...
SystemZFrameLowering(StackDirection D, Align StackAl, int LAO, Align TransAl, bool StackReal)
Register getVarArgsFirstGPR() const
int getFramePointerSaveIndex() const
SystemZ::GPRRegs getRestoreGPRRegs() const
void setRestoreGPRRegs(Register Low, Register High, unsigned Offs)
void setFramePointerSaveIndex(int Idx)
SystemZ::GPRRegs getSpillGPRRegs() const
void setSpillGPRRegs(Register Low, Register High, unsigned Offs)
const SystemZInstrInfo * getInstrInfo() const override
const SystemZTargetLowering * getTargetLowering() const override
bool isTargetXPLINK64() const
SystemZCallingConventionRegisters * getSpecialRegisters() const
XPLINK64 calling convention specific use registers Particular to z/OS when in 64 bit mode.
SystemZXPLINKFrameLowering()
void inlineStackProbe(MachineFunction &MF, MachineBasicBlock &PrologMBB) const override
Replace a StackProbe stub (if any) with the actual probe code inline.
bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, MutableArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee saved registers and returns...
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override
emitProlog/emitEpilog - These methods insert prolog and epilog code into the function.
void determineFrameLayout(MachineFunction &MF) const
bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, ArrayRef< CalleeSavedInfo > CSI, const TargetRegisterInfo *TRI) const override
spillCalleeSavedRegisters - Issues instruction(s) to spill all callee saved registers and returns tru...
bool hasFP(const MachineFunction &MF) const override
hasFP - Return true if the specified function should have a dedicated frame pointer register.
void processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const override
processFunctionBeforeFrameFinalized - This method is called immediately before the specified function...
void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS) const override
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
bool assignCalleeSavedSpillSlots(MachineFunction &MF, const TargetRegisterInfo *TRI, std::vector< CalleeSavedInfo > &CSI) const override
Information about stack frame layout on the target.
virtual void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, RegScavenger *RS=nullptr) const
This method determines which of the registers reported by TargetRegisterInfo::getCalleeSavedRegs() sh...
int getOffsetOfLocalArea() const
getOffsetOfLocalArea - This method returns the offset of the local area from the stack pointer on ent...
Align getStackAlign() const
getStackAlignment - This method returns the number of bytes to which the stack pointer must be aligne...
virtual StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, Register &FrameReg) const
getFrameIndexReference - This method should return the base register and offset used to reference a f...
TargetInstrInfo - Interface to description of machine instruction set.
virtual bool hasInlineStackProbe(const MachineFunction &MF) const
bool DisableFramePointerElim(const MachineFunction &MF) const
DisableFramePointerElim - This returns true if frame pointer elimination optimization should be disab...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCRegister getSubReg(MCRegister Reg, unsigned Idx) const
Returns the physical register number of sub-register "Index" for physical register RegNo.
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
virtual const TargetInstrInfo * getInstrInfo() const
virtual const TargetLowering * getTargetLowering() const
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
@ GHC
Used by the Glasgow Haskell Compiler (GHC).
@ Define
Register definition.
@ Kill
The last use of a register.
@ Undef
Value of the register doesn't matter.
const int64_t ELFCallFrameSize
const int64_t ELFCFAOffsetFromInitialSP
MachineBasicBlock * splitBlockBefore(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB)
const unsigned CCMASK_CMP_GT
MachineBasicBlock * emitBlockAfter(MachineBasicBlock *MBB)
const unsigned CCMASK_ICMP
const unsigned XPLINK64NumArgGPRs
const MCPhysReg ELFArgGPRs[ELFNumArgGPRs]
const unsigned CCMASK_CMP_LT
const unsigned ELFNumArgGPRs
const MCPhysReg XPLINK64ArgGPRs[XPLINK64NumArgGPRs]
This is an optimization pass for GlobalISel generic memory operations.
auto drop_begin(T &&RangeOrContainer, size_t N=1)
Return a range covering RangeOrContainer with the first N elements excluded.
MachineInstrBuilder BuildMI(MachineFunction &MF, const MIMetadata &MIMD, const MCInstrDesc &MCID)
Builder interface. Specify how to create the initial instruction itself.
unsigned getImplRegState(bool B)
void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
unsigned getKillRegState(bool B)
uint64_t alignTo(uint64_t Size, Align A)
Returns a multiple of A needed to store Size bytes.
static bool recomputeLiveIns(MachineBasicBlock &MBB)
Convenience function for recomputing live-in's for a MBB.
This struct is a compact representation of a valid (non-zero power of two) alignment.
This class contains a discriminated union of information about pointers in memory operands,...