#include "Target/Hexagon/HexagonVLIWPacketizer.h"

Inheritance diagram for llvm::HexagonPacketizerList:

Public Member Functions
	HexagonPacketizerList (MachineFunction &MF, MachineLoopInfo &MLI, AAResults AA, const MachineBranchProbabilityInfo MBPI, bool Minimal)

void	initPacketizerState () override

bool	ignorePseudoInstruction (const MachineInstr &MI, const MachineBasicBlock *MBB) override

bool	isSoloInstruction (const MachineInstr &MI) override

bool	isLegalToPacketizeTogether (SUnit SUI, SUnit SUJ) override

bool	isLegalToPruneDependencies (SUnit SUI, SUnit SUJ) override

bool	foundLSInPacket ()

MachineBasicBlock::iterator	addToPacket (MachineInstr &MI) override

void	endPacket (MachineBasicBlock *MBB, MachineBasicBlock::iterator MI) override

bool	shouldAddToPacket (const MachineInstr &MI) override

void	unpacketizeSoloInstrs (MachineFunction &MF)

Public Member Functions inherited from llvm::VLIWPacketizerList
	VLIWPacketizerList (MachineFunction &MF, MachineLoopInfo &MLI, AAResults *AA)

VLIWPacketizerList &	operator= (const VLIWPacketizerList &other)=delete

	VLIWPacketizerList (const VLIWPacketizerList &other)=delete

virtual	~VLIWPacketizerList ()

void	PacketizeMIs (MachineBasicBlock *MBB, MachineBasicBlock::iterator BeginItr, MachineBasicBlock::iterator EndItr)

DFAPacketizer *	getResourceTracker ()

virtual MachineBasicBlock::iterator	addToPacket (MachineInstr &MI)

virtual void	endPacket (MachineBasicBlock *MBB, MachineBasicBlock::iterator MI)

virtual void	initPacketizerState ()

virtual bool	ignorePseudoInstruction (const MachineInstr &I, const MachineBasicBlock *MBB)

virtual bool	isSoloInstruction (const MachineInstr &MI)

virtual bool	shouldAddToPacket (const MachineInstr &MI)

virtual bool	isLegalToPacketizeTogether (SUnit SUI, SUnit SUJ)

virtual bool	isLegalToPruneDependencies (SUnit SUI, SUnit SUJ)

void	addMutation (std::unique_ptr< ScheduleDAGMutation > Mutation)

bool	alias (const MachineInstr &MI1, const MachineInstr &MI2, bool UseTBAA=true) const

Protected Member Functions
bool	getmemShufDisabled ()

void	setmemShufDisabled (bool val)

bool	isCallDependent (const MachineInstr &MI, SDep::Kind DepType, unsigned DepReg)

bool	promoteToDotCur (MachineInstr &MI, SDep::Kind DepType, MachineBasicBlock::iterator &MII, const TargetRegisterClass *RC)

bool	canPromoteToDotCur (const MachineInstr &MI, const SUnit PacketSU, unsigned DepReg, MachineBasicBlock::iterator &MII, const TargetRegisterClass RC)

void	cleanUpDotCur ()

bool	promoteToDotNew (MachineInstr &MI, SDep::Kind DepType, MachineBasicBlock::iterator &MII, const TargetRegisterClass *RC)

bool	canPromoteToDotNew (const MachineInstr &MI, const SUnit PacketSU, unsigned DepReg, MachineBasicBlock::iterator &MII, const TargetRegisterClass RC)

bool	canPromoteToNewValue (const MachineInstr &MI, const SUnit *PacketSU, unsigned DepReg, MachineBasicBlock::iterator &MII)

bool	canPromoteToNewValueStore (const MachineInstr &MI, const MachineInstr &PacketMI, unsigned DepReg)

bool	demoteToDotOld (MachineInstr &MI)

bool	useCallersSP (MachineInstr &MI)

void	useCalleesSP (MachineInstr &MI)

bool	updateOffset (SUnit SUI, SUnit SUJ)
	Return true if we can update the offset in MI so that MI and MJ can be packetized together.

void	undoChangedOffset (MachineInstr &MI)
	Undo the changed offset.

bool	arePredicatesComplements (MachineInstr &MI1, MachineInstr &MI2)

bool	restrictingDepExistInPacket (MachineInstr &, unsigned)

bool	isNewifiable (const MachineInstr &MI, const TargetRegisterClass *NewRC)

bool	isCurifiable (MachineInstr &MI)

bool	cannotCoexist (const MachineInstr &MI, const MachineInstr &MJ)

bool	isPromotedToDotNew () const

bool	tryAllocateResourcesForConstExt (bool Reserve)

bool	canReserveResourcesForConstExt ()

void	reserveResourcesForConstExt ()

bool	hasDeadDependence (const MachineInstr &I, const MachineInstr &J)

bool	hasControlDependence (const MachineInstr &I, const MachineInstr &J)

bool	hasRegMaskDependence (const MachineInstr &I, const MachineInstr &J)

bool	hasDualStoreDependence (const MachineInstr &I, const MachineInstr &J)

bool	producesStall (const MachineInstr &MI)

unsigned int	calcStall (const MachineInstr &MI)

Protected Attributes
const MachineBranchProbabilityInfo *	MBPI
	A handle to the branch probability pass.

const MachineLoopInfo *	MLI

Protected Attributes inherited from llvm::VLIWPacketizerList
MachineFunction &	MF

const TargetInstrInfo *	TII

AAResults *	AA

DefaultVLIWScheduler *	VLIWScheduler

std::vector< MachineInstr * >	CurrentPacketMIs

DFAPacketizer *	ResourceTracker

std::map< MachineInstr , SUnit >	MIToSUnit

Detailed Description

Definition at line 27 of file HexagonVLIWPacketizer.h.

Constructor & Destructor Documentation

◆ HexagonPacketizerList()

hexagon Hexagon false HexagonPacketizerList::HexagonPacketizerList	(	MachineFunction &	MF,
		MachineLoopInfo &	MLI,
		AAResults *	AA,
		const MachineBranchProbabilityInfo *	MBPI,
		bool	Minimal
	)

Definition at line 134 of file HexagonVLIWPacketizer.cpp.

Member Function Documentation

◆ addToPacket()

MachineBasicBlock::iterator HexagonPacketizerList::addToPacket ( MachineInstr & MI )

overridevirtual

Reimplemented from llvm::VLIWPacketizerList.

Definition at line 1709 of file HexagonVLIWPacketizer.cpp.

References assert(), calcStall(), llvm::DFAPacketizer::canReserveResources(), canReserveResourcesForConstExt(), llvm::VLIWPacketizerList::CurrentPacketMIs, demoteToDotOld(), endPacket(), MBB, MI, producesStall(), llvm::DFAPacketizer::reserveResources(), reserveResourcesForConstExt(), llvm::VLIWPacketizerList::ResourceTracker, tryAllocateResourcesForConstExt(), and useCalleesSP().

◆ arePredicatesComplements()

bool HexagonPacketizerList::arePredicatesComplements	(	MachineInstr &	MI1,
		MachineInstr &	MI2
	)

protected

Definition at line 966 of file HexagonVLIWPacketizer.cpp.

References llvm::VLIWPacketizerList::CurrentPacketMIs, llvm::SDep::Data, getPredicatedRegister(), getPredicateSense(), I, llvm::SUnit::isSucc(), llvm::VLIWPacketizerList::MIToSUnit, PK_Unknown, restrictingDepExistInPacket(), and llvm::SUnit::Succs.

Referenced by isLegalToPacketizeTogether().

◆ calcStall()

unsigned int HexagonPacketizerList::calcStall ( const MachineInstr & MI )

protected

Definition at line 1878 of file HexagonVLIWPacketizer.cpp.

References llvm::VLIWPacketizerList::CurrentPacketMIs, llvm::MachineLoopInfo::getLoopFor(), I, llvm::VLIWPacketizerList::MIToSUnit, MLI, and llvm::SUnit::Preds.

Referenced by addToPacket(), and producesStall().

◆ cannotCoexist()

bool HexagonPacketizerList::cannotCoexist	(	const MachineInstr &	MI,
		const MachineInstr &	MJ
	)

protected

Definition at line 1160 of file HexagonVLIWPacketizer.cpp.

References cannotCoexistAsymm(), and MI.

Referenced by isLegalToPacketizeTogether(), and isLegalToPruneDependencies().

◆ canPromoteToDotCur()

bool HexagonPacketizerList::canPromoteToDotCur	(	const MachineInstr &	MI,
		const SUnit *	PacketSU,
		unsigned	DepReg,
		MachineBasicBlock::iterator &	MII,
		const TargetRegisterClass *	RC
	)

protected

Definition at line 406 of file HexagonVLIWPacketizer.cpp.

References llvm::VLIWPacketizerList::CurrentPacketMIs, llvm::dbgs(), llvm::Pass::dump(), llvm::SUnit::getInstr(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::MachineFunction::getSubtarget(), llvm::MachineInstr::isInlineAsm(), LLVM_DEBUG, llvm::VLIWPacketizerList::MF, and MI.

Referenced by isLegalToPacketizeTogether().

◆ canPromoteToDotNew()

bool HexagonPacketizerList::canPromoteToDotNew	(	const MachineInstr &	MI,
		const SUnit *	PacketSU,
		unsigned	DepReg,
		MachineBasicBlock::iterator &	MII,
		const TargetRegisterClass *	RC
	)