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Public Member Functions
llvm::MipsSEInstrInfo Class Reference

#include <MipsSEInstrInfo.h>

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List of all members.

Public Member Functions

 MipsSEInstrInfo (const MipsSubtarget &STI)
const MipsRegisterInfogetRegisterInfo () const override
 getRegisterInfo - TargetInstrInfo is a superset of MRegister info.
unsigned isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const override
 isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.
unsigned isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const override
 isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.
void copyPhysReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const override
void storeRegToStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override
void loadRegFromStack (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI, int64_t Offset) const override
bool expandPostRAPseudo (MachineBasicBlock::iterator MI) const override
unsigned getOppositeBranchOpc (unsigned Opc) const override
 getOppositeBranchOpc - Return the inverse of the specified opcode, e.g.
void adjustStackPtr (unsigned SP, int64_t Amount, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const override
 Adjust SP by Amount bytes.
unsigned loadImmediate (int64_t Imm, MachineBasicBlock &MBB, MachineBasicBlock::iterator II, DebugLoc DL, unsigned *NewImm) const
 Emit a series of instructions to load an immediate.

Detailed Description

Definition at line 22 of file MipsSEInstrInfo.h.


Constructor & Destructor Documentation

Definition at line 27 of file MipsSEInstrInfo.cpp.


Member Function Documentation

void MipsSEInstrInfo::adjustStackPtr ( unsigned  SP,
int64_t  Amount,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  I 
) const [override, virtual]
void MipsSEInstrInfo::copyPhysReg ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
DebugLoc  DL,
unsigned  DestReg,
unsigned  SrcReg,
bool  KillSrc 
) const [override]
unsigned MipsSEInstrInfo::getOppositeBranchOpc ( unsigned  Opc) const [override, virtual]

getOppositeBranchOpc - Return the inverse of the specified opcode, e.g.

turning BEQ to BNE.

Implements llvm::MipsInstrInfo.

Definition at line 336 of file MipsSEInstrInfo.cpp.

References llvm_unreachable.

const MipsRegisterInfo & MipsSEInstrInfo::getRegisterInfo ( ) const [override, virtual]

getRegisterInfo - TargetInstrInfo is a superset of MRegister info.

As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Implements llvm::MipsInstrInfo.

Definition at line 32 of file MipsSEInstrInfo.cpp.

unsigned MipsSEInstrInfo::isLoadFromStackSlot ( const MachineInstr MI,
int FrameIndex 
) const [override]

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Definition at line 41 of file MipsSEInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), llvm::MipsInstrInfo::isZeroImm(), and llvm::AArch64DB::LD.

unsigned MipsSEInstrInfo::isStoreToStackSlot ( const MachineInstr MI,
int FrameIndex 
) const [override]

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot.

If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Definition at line 63 of file MipsSEInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and llvm::MipsInstrInfo::isZeroImm().

unsigned MipsSEInstrInfo::loadImmediate ( int64_t  Imm,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  II,
DebugLoc  DL,
unsigned NewImm 
) const

Emit a series of instructions to load an immediate.

This function generates the sequence of instructions needed to get the result of adding register REG and immediate IMM.

If NewImm is a non-NULL parameter, the last instruction is not emitted, but instead its immediate operand is returned in NewImm.

Definition at line 381 of file MipsSEInstrInfo.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MipsAnalyzeImmediate::Analyze(), llvm::SmallVectorTemplateCommon< T, typename >::begin(), llvm::BuildMI(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::SmallVectorTemplateCommon< T, typename >::end(), llvm::MachineBasicBlock::getParent(), llvm::MachineFunction::getRegInfo(), llvm::MipsSubtarget::isABI_N64(), llvm::RegState::Kill, llvm::SmallVectorTemplateCommon< T, typename >::size(), and llvm::MipsInstrInfo::Subtarget.

Referenced by adjustStackPtr().

void MipsSEInstrInfo::loadRegFromStack ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
int64_t  Offset 
) const [override, virtual]
void MipsSEInstrInfo::storeRegToStack ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass RC,
const TargetRegisterInfo TRI,
int64_t  Offset 
) const [override, virtual]

The documentation for this class was generated from the following files: