LLVM  6.0.0svn
AArch64CallLowering.h
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1 //===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file describes how to lower LLVM calls to machine code calls.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
16 #define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
17 
18 #include "llvm/ADT/ArrayRef.h"
20 #include "llvm/IR/CallingConv.h"
21 #include <cstdint>
22 #include <functional>
23 
24 namespace llvm {
25 
26 class AArch64TargetLowering;
27 class CCValAssign;
28 class DataLayout;
29 class MachineIRBuilder;
30 class MachineRegisterInfo;
31 class Type;
32 
34 public:
36 
37  bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val,
38  unsigned VReg) const override;
39 
40  bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
41  ArrayRef<unsigned> VRegs) const override;
42 
43  bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv,
44  const MachineOperand &Callee, const ArgInfo &OrigRet,
45  ArrayRef<ArgInfo> OrigArgs) const override;
46 
47 private:
48  using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned,
49  CCValAssign &)>;
50 
51  using MemHandler =
52  std::function<void(MachineIRBuilder &, int, CCValAssign &)>;
53 
54  using SplitArgTy = std::function<void(unsigned, uint64_t)>;
55 
56  void splitToValueTypes(const ArgInfo &OrigArgInfo,
57  SmallVectorImpl<ArgInfo> &SplitArgs,
59  CallingConv::ID CallConv,
60  const SplitArgTy &SplitArg) const;
61 };
62 
63 } // end namespace llvm
64 
65 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:109
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
static const MCPhysReg VRegs[32]
F(f)
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
bool lowerCall(MachineIRBuilder &MIRBuilder, CallingConv::ID CallConv, const MachineOperand &Callee, const ArgInfo &OrigRet, ArrayRef< ArgInfo > OrigArgs) const override
This hook must be implemented to lower the given call instruction, including argument and return valu...
amdgpu Simplify well known AMD library false Value * Callee
unsigned const MachineRegisterInfo * MRI
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
Helper class to build MachineInstr.
bool lowerReturn(MachineIRBuilder &MIRBuiler, const Value *Val, unsigned VReg) const override
This hook must be implemented to lower outgoing return values, described by Val, into the specified v...
MachineOperand class - Representation of each machine instruction operand.
CCValAssign - Represent assignment of one arg/retval to a location.
bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, ArrayRef< unsigned > VRegs) const override
This hook must be implemented to lower the incoming (formal) arguments, described by Args...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
LLVM Value Representation.
Definition: Value.h:73
This file describes how to lower LLVM calls to machine code calls.
print Print MemDeps of function
AArch64CallLowering(const AArch64TargetLowering &TLI)