LLVM  6.0.0svn
Classes | Macros | Functions | Variables
AArch64CollectLOH.cpp File Reference
#include "AArch64.h"
#include "AArch64InstrInfo.h"
#include "AArch64MachineFunctionInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/MapVector.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
Include dependency graph for AArch64CollectLOH.cpp:

Go to the source code of this file.

Classes

struct  LOHInfo
 State tracked per register. More...
 

Macros

#define DEBUG_TYPE   "aarch64-collect-loh"
 
#define AARCH64_COLLECT_LOH_NAME   "AArch64 Collect Linker Optimization Hint (LOH)"
 

Functions

 STATISTIC (NumADRPSimpleCandidate, "Number of simplifiable ADRP dominate by another")
 
 STATISTIC (NumADDToSTR, "Number of simplifiable STR reachable by ADD")
 
 STATISTIC (NumLDRToSTR, "Number of simplifiable STR reachable by LDR")
 
 STATISTIC (NumADDToLDR, "Number of simplifiable LDR reachable by ADD")
 
 STATISTIC (NumLDRToLDR, "Number of simplifiable LDR reachable by LDR")
 
 STATISTIC (NumADRPToLDR, "Number of simplifiable LDR reachable by ADRP")
 
 STATISTIC (NumADRSimpleCandidate, "Number of simplifiable ADRP + ADD")
 
 INITIALIZE_PASS (AArch64CollectLOH, "aarch64-collect-loh", AARCH64_COLLECT_LOH_NAME, false, false) static bool canAddBePartOfLOH(const MachineInstr &MI)
 
static bool canDefBePartOfLOH (const MachineInstr &MI)
 Answer the following question: Can Def be one of the definition involved in a part of a LOH? More...
 
static bool isCandidateStore (const MachineInstr &MI, const MachineOperand &MO)
 Check whether the given instruction can the end of a LOH chain involving a store. More...
 
static bool isCandidateLoad (const MachineInstr &MI)
 Check whether the given instruction can be the end of a LOH chain involving a load. More...
 
static bool supportLoadFromLiteral (const MachineInstr &MI)
 Check whether the given instruction can load a litteral. More...
 
static int mapRegToGPRIndex (MCPhysReg Reg)
 Map register number to index from 0-30. More...
 
static void handleUse (const MachineInstr &MI, const MachineOperand &MO, LOHInfo &Info)
 Update state Info given MI uses the tracked register. More...
 
static void handleClobber (LOHInfo &Info)
 Update state Info given the tracked register is clobbered. More...
 
static bool handleMiddleInst (const MachineInstr &MI, LOHInfo &DefInfo, LOHInfo &OpInfo)
 Update state Info given that MI is possibly the middle instruction of an LOH involving 3 instructions. More...
 
static void handleADRP (const MachineInstr &MI, AArch64FunctionInfo &AFI, LOHInfo &Info)
 Update state when seeing and ADRP instruction. More...
 
static void handleRegMaskClobber (const uint32_t *RegMask, MCPhysReg Reg, LOHInfo *LOHInfos)
 
static void handleNormalInst (const MachineInstr &MI, LOHInfo *LOHInfos)
 

Variables

static const unsigned N_GPR_REGS = 31
 Number of GPR registers traked by mapRegToGPRIndex() More...
 

Macro Definition Documentation

◆ AARCH64_COLLECT_LOH_NAME

#define AARCH64_COLLECT_LOH_NAME   "AArch64 Collect Linker Optimization Hint (LOH)"

Definition at line 130 of file AArch64CollectLOH.cpp.

◆ DEBUG_TYPE

#define DEBUG_TYPE   "aarch64-collect-loh"

Definition at line 119 of file AArch64CollectLOH.cpp.

Function Documentation

◆ canDefBePartOfLOH()

static bool canDefBePartOfLOH ( const MachineInstr MI)
static

◆ handleADRP()

static void handleADRP ( const MachineInstr MI,
AArch64FunctionInfo AFI,
LOHInfo Info 
)
static

◆ handleClobber()

static void handleClobber ( LOHInfo Info)
static

Update state Info given the tracked register is clobbered.

Definition at line 325 of file AArch64CollectLOH.cpp.

References LOHInfo::IsCandidate, LOHInfo::LastADRP, LOHInfo::MultiUsers, and LOHInfo::OneUser.

Referenced by handleADRP(), handleMiddleInst(), handleNormalInst(), and handleRegMaskClobber().

◆ handleMiddleInst()

static bool handleMiddleInst ( const MachineInstr MI,
LOHInfo DefInfo,
LOHInfo OpInfo 
)
static

◆ handleNormalInst()

static void handleNormalInst ( const MachineInstr MI,
LOHInfo LOHInfos 
)
static

◆ handleRegMaskClobber()

static void handleRegMaskClobber ( const uint32_t RegMask,
MCPhysReg  Reg,
LOHInfo LOHInfos 
)
static

◆ handleUse()

static void handleUse ( const MachineInstr MI,
const MachineOperand MO,
LOHInfo Info 
)
static

◆ INITIALIZE_PASS()

INITIALIZE_PASS ( AArch64CollectLOH  ,
"aarch64-collect-loh"  ,
AARCH64_COLLECT_LOH_NAME  ,
false  ,
false   
) const &

◆ isCandidateLoad()

static bool isCandidateLoad ( const MachineInstr MI)
static

Check whether the given instruction can be the end of a LOH chain involving a load.

Definition at line 221 of file AArch64CollectLOH.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getTargetFlags(), and llvm::AArch64II::MO_GOT.

Referenced by handleUse().

◆ isCandidateStore()

static bool isCandidateStore ( const MachineInstr MI,
const MachineOperand MO 
)
static

Check whether the given instruction can the end of a LOH chain involving a store.

Definition at line 197 of file AArch64CollectLOH.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getOperandNo(), and llvm::MachineOperand::getReg().

Referenced by handleUse().

◆ mapRegToGPRIndex()

static int mapRegToGPRIndex ( MCPhysReg  Reg)
static

Map register number to index from 0-30.

Definition at line 259 of file AArch64CollectLOH.cpp.

Referenced by handleNormalInst(), and handleRegMaskClobber().

◆ STATISTIC() [1/7]

STATISTIC ( NumADRPSimpleCandidate  ,
"Number of simplifiable ADRP dominate by another"   
)

◆ STATISTIC() [2/7]

STATISTIC ( NumADDToSTR  ,
"Number of simplifiable STR reachable by ADD"   
)

◆ STATISTIC() [3/7]

STATISTIC ( NumLDRToSTR  ,
"Number of simplifiable STR reachable by LDR"   
)

◆ STATISTIC() [4/7]

STATISTIC ( NumADDToLDR  ,
"Number of simplifiable LDR reachable by ADD"   
)

◆ STATISTIC() [5/7]

STATISTIC ( NumLDRToLDR  ,
"Number of simplifiable LDR reachable by LDR"   
)

◆ STATISTIC() [6/7]

STATISTIC ( NumADRPToLDR  ,
"Number of simplifiable LDR reachable by ADRP"   
)

◆ STATISTIC() [7/7]

STATISTIC ( NumADRSimpleCandidate  ,
"Number of simplifiable ADRP + ADD"   
)

◆ supportLoadFromLiteral()

static bool supportLoadFromLiteral ( const MachineInstr MI)
static

Check whether the given instruction can load a litteral.

Definition at line 242 of file AArch64CollectLOH.cpp.

References llvm::MachineInstr::getOpcode().

Referenced by handleADRP().

Variable Documentation

◆ N_GPR_REGS

const unsigned N_GPR_REGS = 31
static

Number of GPR registers traked by mapRegToGPRIndex()

Definition at line 257 of file AArch64CollectLOH.cpp.

Referenced by handleNormalInst().