LLVM 19.0.0git
|
This file contains definition for AMDGPU ISA disassembler. More...
#include "Disassembler/AMDGPUDisassembler.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "SIDefines.h"
#include "SIRegisterInfo.h"
#include "TargetInfo/AMDGPUTargetInfo.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm-c/DisassemblerTypes.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDecoderOps.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/TargetRegistry.h"
#include "llvm/Support/AMDHSAKernelDescriptor.h"
#include "AMDGPUGenDisassemblerTables.inc"
Go to the source code of this file.
Classes | |
struct | VOPModifiers |
Macros | |
#define | DEBUG_TYPE "amdgpu-disassembler" |
#define | SGPR_MAX |
#define | DECODE_OPERAND(StaticDecoderName, DecoderName) |
#define | DECODE_OPERAND_REG_8(RegClass) |
#define | DECODE_SrcOp(Name, EncSize, OpWidth, EncImm, MandatoryLiteral, ImmWidth) |
#define | DECODE_OPERAND_REG_7(RegClass, OpWidth) DECODE_SrcOp(Decode##RegClass##RegisterClass, 7, OpWidth, Imm, false, 0) |
#define | DECODE_SDWA(DecName) DECODE_OPERAND(decodeSDWA##DecName, decodeSDWA##DecName) |
#define | GET_FIELD(MASK) (AMDHSA_BITS_GET(FourByteBuffer, MASK)) |
#define | PRINT_DIRECTIVE(DIRECTIVE, MASK) |
#define | PRINT_PSEUDO_DIRECTIVE_COMMENT(DIRECTIVE, MASK) |
#define | CHECK_RESERVED_BITS_IMPL(MASK, DESC, MSG) |
#define | CHECK_RESERVED_BITS(MASK) CHECK_RESERVED_BITS_IMPL(MASK, #MASK, "") |
#define | CHECK_RESERVED_BITS_MSG(MASK, MSG) CHECK_RESERVED_BITS_IMPL(MASK, #MASK, ", " MSG) |
#define | CHECK_RESERVED_BITS_DESC(MASK, DESC) CHECK_RESERVED_BITS_IMPL(MASK, DESC, "") |
#define | CHECK_RESERVED_BITS_DESC_MSG(MASK, DESC, MSG) CHECK_RESERVED_BITS_IMPL(MASK, DESC, ", " MSG) |
#define | PRINT_DIRECTIVE(DIRECTIVE, MASK) |
Typedefs | |
using | DecodeStatus = llvm::MCDisassembler::DecodeStatus |
This file contains definition for AMDGPU ISA disassembler.
Definition in file AMDGPUDisassembler.cpp.
#define CHECK_RESERVED_BITS | ( | MASK | ) | CHECK_RESERVED_BITS_IMPL(MASK, #MASK, "") |
Definition at line 1827 of file AMDGPUDisassembler.cpp.
#define CHECK_RESERVED_BITS_DESC | ( | MASK, | |
DESC | |||
) | CHECK_RESERVED_BITS_IMPL(MASK, DESC, "") |
Definition at line 1830 of file AMDGPUDisassembler.cpp.
#define CHECK_RESERVED_BITS_DESC_MSG | ( | MASK, | |
DESC, | |||
MSG | |||
) | CHECK_RESERVED_BITS_IMPL(MASK, DESC, ", " MSG) |
Definition at line 1832 of file AMDGPUDisassembler.cpp.
#define CHECK_RESERVED_BITS_IMPL | ( | MASK, | |
DESC, | |||
MSG | |||
) |
Definition at line 1817 of file AMDGPUDisassembler.cpp.
#define CHECK_RESERVED_BITS_MSG | ( | MASK, | |
MSG | |||
) | CHECK_RESERVED_BITS_IMPL(MASK, #MASK, ", " MSG) |
Definition at line 1828 of file AMDGPUDisassembler.cpp.
#define DEBUG_TYPE "amdgpu-disassembler" |
Definition at line 39 of file AMDGPUDisassembler.cpp.
#define DECODE_OPERAND | ( | StaticDecoderName, | |
DecoderName | |||
) |
Definition at line 128 of file AMDGPUDisassembler.cpp.
#define DECODE_OPERAND_REG_7 | ( | RegClass, | |
OpWidth | |||
) | DECODE_SrcOp(Decode##RegClass##RegisterClass, 7, OpWidth, Imm, false, 0) |
Definition at line 173 of file AMDGPUDisassembler.cpp.
#define DECODE_OPERAND_REG_8 | ( | RegClass | ) |
Definition at line 138 of file AMDGPUDisassembler.cpp.
#define DECODE_SDWA | ( | DecName | ) | DECODE_OPERAND(decodeSDWA##DecName, decodeSDWA##DecName) |
Definition at line 417 of file AMDGPUDisassembler.cpp.
#define DECODE_SrcOp | ( | Name, | |
EncSize, | |||
OpWidth, | |||
EncImm, | |||
MandatoryLiteral, | |||
ImmWidth | |||
) |
Definition at line 148 of file AMDGPUDisassembler.cpp.
#define GET_FIELD | ( | MASK | ) | (AMDHSA_BITS_GET(FourByteBuffer, MASK)) |
Definition at line 1806 of file AMDGPUDisassembler.cpp.
#define PRINT_DIRECTIVE | ( | DIRECTIVE, | |
MASK | |||
) |
Definition at line 1807 of file AMDGPUDisassembler.cpp.
#define PRINT_DIRECTIVE | ( | DIRECTIVE, | |
MASK | |||
) |
Definition at line 1807 of file AMDGPUDisassembler.cpp.
#define PRINT_PSEUDO_DIRECTIVE_COMMENT | ( | DIRECTIVE, | |
MASK | |||
) |
Definition at line 1811 of file AMDGPUDisassembler.cpp.
#define SGPR_MAX |
Definition at line 41 of file AMDGPUDisassembler.cpp.
Definition at line 45 of file AMDGPUDisassembler.cpp.
|
inlinestatic |
Definition at line 62 of file AMDGPUDisassembler.cpp.
References llvm::MCInst::addOperand(), llvm::MCDisassembler::Fail, llvm::MCOperand::isValid(), and llvm::MCDisassembler::Success.
Referenced by llvm::AMDGPUDisassembler::convertMIMGInst(), decodeAVLdSt(), decodeBoolReg(), decodeDpp8FI(), decodeOperand_KImmFP(), decodeOperand_VSrc_f64(), decodeOperand_VSrcT16(), decodeOperand_VSrcT16_Lo128(), decodeOperandVOPDDstY(), decodeSMEMOffset(), decodeSOPPBrTarget(), decodeSplitBarrier(), decodeSrcOp(), DecodeVGPR_16_Lo128RegisterClass(), DecodeVGPR_16RegisterClass(), llvm::VPReplicateRecipe::VPReplicateRecipe(), llvm::VPWidenIntOrFpInductionRecipe::VPWidenIntOrFpInductionRecipe(), and llvm::VPWidenPointerInductionRecipe::VPWidenPointerInductionRecipe().
|
static |
Definition at line 773 of file AMDGPUDisassembler.cpp.
References llvm::SISrcMods::DST_OP_SEL, llvm::AMDGPU::getNamedOperandIdx(), MI, llvm::SISrcMods::NEG, llvm::SISrcMods::NEG_HI, VOPModifiers::NegHi, VOPModifiers::NegLo, llvm::SISrcMods::OP_SEL_0, llvm::SISrcMods::OP_SEL_1, VOPModifiers::OpSel, and VOPModifiers::OpSelHi.
Referenced by llvm::AMDGPUDisassembler::convertDPP8Inst(), llvm::AMDGPUDisassembler::convertVOP3DPPInst(), and llvm::AMDGPUDisassembler::convertVOP3PDPPInst().
|
static |
Definition at line 2375 of file AMDGPUDisassembler.cpp.
Referenced by LLVMInitializeAMDGPUDisassembler().
|
static |
Definition at line 2366 of file AMDGPUDisassembler.cpp.
Referenced by LLVMInitializeAMDGPUDisassembler().
|
static |
Create an error object to return from onSymbolStart for reserved kernel descriptor bits being set.
Definition at line 2086 of file AMDGPUDisassembler.cpp.
References llvm::c_str(), llvm::createStringError(), and getBitRangeFromMask().
Referenced by llvm::AMDGPUDisassembler::decodeKernelDescriptorDirective().
Create an error object to return from onSymbolStart for reserved kernel descriptor bytes being set.
Definition at line 2095 of file AMDGPUDisassembler.cpp.
References llvm::createStringError().
Referenced by llvm::AMDGPUDisassembler::decodeKernelDescriptorDirective().
|
static |
Definition at line 181 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), llvm::AMDGPU::INT, and llvm::AMDGPU::EncValues::IS_VGPR.
|
static |
Definition at line 366 of file AMDGPUDisassembler.cpp.
References addOperand(), llvm::SIInstrFlags::DS, llvm::AMDGPU::getNamedOperandIdx(), llvm::MCInst::getNumOperands(), llvm::MCInst::getOpcode(), IsAGPROperand(), and MRI.
Referenced by decodeAVLdSt().
|
static |
Definition at line 401 of file AMDGPUDisassembler.cpp.
References decodeAVLdSt().
|
static |
Definition at line 109 of file AMDGPUDisassembler.cpp.
References addOperand().
|
static |
Definition at line 122 of file AMDGPUDisassembler.cpp.
References addOperand().
|
static |
Definition at line 339 of file AMDGPUDisassembler.cpp.
References addOperand().
|
static |
Definition at line 407 of file AMDGPUDisassembler.cpp.
References addOperand(), assert(), llvm::AMDGPU::FP64, and llvm::AMDGPUDisassembler::OPW64.
|
static |
Definition at line 323 of file AMDGPUDisassembler.cpp.
References addOperand(), assert(), and llvm::AMDGPUDisassembler::OPW16.
|
static |
Definition at line 307 of file AMDGPUDisassembler.cpp.
References addOperand(), assert(), and llvm::AMDGPUDisassembler::OPW16.
|
static |
Definition at line 346 of file AMDGPUDisassembler.cpp.
References addOperand().
|
static |
Definition at line 95 of file AMDGPUDisassembler.cpp.
References addOperand(), llvm::MCOperand::createImm(), and llvm::Offset.
|
static |
Definition at line 80 of file AMDGPUDisassembler.cpp.
References addOperand(), Addr, llvm::MCOperand::createImm(), llvm::Offset, llvm::APInt::sext(), and llvm::MCDisassembler::Success.
|
static |
Definition at line 115 of file AMDGPUDisassembler.cpp.
References addOperand().
|
static |
Definition at line 200 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and llvm::AMDGPU::INT.
|
static |
Definition at line 209 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and llvm::AMDGPU::INT.
|
static |
Definition at line 159 of file AMDGPUDisassembler.cpp.
References addOperand(), and assert().
Referenced by decodeAV10(), decodeSrcA9(), decodeSrcAV10(), decodeSrcReg9(), decodeSrcRegOrImm9(), decodeSrcRegOrImmA9(), and decodeSrcRegOrImmDeferred9().
|
static |
Definition at line 189 of file AMDGPUDisassembler.cpp.
References decodeSrcOp(), and llvm::AMDGPU::INT.
|
static |
Definition at line 223 of file AMDGPUDisassembler.cpp.
References decodeSrcOp().
|
static |
Definition at line 234 of file AMDGPUDisassembler.cpp.
References decodeSrcOp().
|
static |
Definition at line 243 of file AMDGPUDisassembler.cpp.
References decodeSrcOp().
|
static |
Definition at line 297 of file AMDGPUDisassembler.cpp.
References addOperand(), and assert().
|
static |
Definition at line 284 of file AMDGPUDisassembler.cpp.
References addOperand(), and assert().
|
inlinestatic |
Definition at line 438 of file AMDGPUDisassembler.cpp.
References assert(), llvm::ArrayRef< T >::data(), llvm::Hi, llvm::Lo, llvm::ArrayRef< T >::size(), and llvm::ArrayRef< T >::slice().
Referenced by llvm::AMDGPUDisassembler::getInstruction().
Definition at line 430 of file AMDGPUDisassembler.cpp.
References assert(), llvm::ArrayRef< T >::data(), llvm::ArrayRef< T >::size(), and llvm::ArrayRef< T >::slice().
|
static |
Print a string describing the reserved bit range specified by Mask with offset BaseBytes for use in error comments.
Mask is a single continuous range of 1s surrounded by zeros. The format here is meant to align with the tables that describe these bits in llvm.org/docs/AMDGPUUsage.html.
Definition at line 1788 of file AMDGPUDisassembler.cpp.
References llvm::countr_zero(), and llvm::popcount().
Referenced by createReservedKDBitsError().
|
static |
Definition at line 1364 of file AMDGPUDisassembler.cpp.
References llvm::AMDGPU::BF16, getInlineImmValBF16(), and getInlineImmValF16().
Referenced by llvm::AMDGPUDisassembler::decodeFPImmed().
|
static |
Definition at line 1264 of file AMDGPUDisassembler.cpp.
References llvm_unreachable.
Referenced by llvm::AMDGPUDisassembler::decodeFPImmed().
|
static |
Definition at line 1289 of file AMDGPUDisassembler.cpp.
References llvm_unreachable.
Referenced by llvm::AMDGPUDisassembler::decodeFPImmed().
|
static |
Definition at line 1339 of file AMDGPUDisassembler.cpp.
References llvm_unreachable.
Referenced by getInlineImmVal16().
|
static |
Definition at line 1314 of file AMDGPUDisassembler.cpp.
References llvm_unreachable.
Referenced by getInlineImmVal16().
Definition at line 69 of file AMDGPUDisassembler.cpp.
References llvm::AMDGPU::getNamedOperandIdx(), I, and MI.
Referenced by llvm::AMDGPUDisassembler::convertDPP8Inst(), llvm::AMDGPUDisassembler::convertEXPInst(), llvm::AMDGPUDisassembler::convertFMAanyK(), llvm::AMDGPUDisassembler::convertMacDPPInst(), llvm::AMDGPUDisassembler::convertSDWAInst(), llvm::AMDGPUDisassembler::convertVINTERPInst(), llvm::AMDGPUDisassembler::convertVOP3DPPInst(), llvm::AMDGPUDisassembler::convertVOP3PDPPInst(), llvm::AMDGPUDisassembler::convertVOPCDPPInst(), and llvm::AMDGPUDisassembler::getInstruction().
|
static |
Definition at line 352 of file AMDGPUDisassembler.cpp.
References llvm::MCInst::getOperand(), and MRI.
LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUDisassembler | ( | ) |
Definition at line 2381 of file AMDGPUDisassembler.cpp.
References createAMDGPUDisassembler(), createAMDGPUSymbolizer(), llvm::getTheGCNTarget(), llvm::TargetRegistry::RegisterMCDisassembler(), and llvm::TargetRegistry::RegisterMCSymbolizer().