LLVM  6.0.0svn
Macros | Typedefs | Functions
AMDGPUDisassembler.cpp File Reference

This file contains definition for AMDGPU ISA disassembler. More...

#include "Disassembler/AMDGPUDisassembler.h"
#include "AMDGPU.h"
#include "AMDGPURegisterInfo.h"
#include "SIDefines.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm-c/Disassembler.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/Twine.h"
#include "llvm/BinaryFormat/ELF.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler/MCDisassembler.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCFixedLenDisassembler.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/Endian.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <tuple>
#include <vector>
#include "AMDGPUGenDisassemblerTables.inc"
Include dependency graph for AMDGPUDisassembler.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "amdgpu-disassembler"
 
#define DECODE_OPERAND(StaticDecoderName, DecoderName)
 
#define DECODE_OPERAND_REG(RegClass)   DECODE_OPERAND(Decode##RegClass##RegisterClass, decodeOperand_##RegClass)
 
#define DECODE_SDWA(DecName)   DECODE_OPERAND(decodeSDWA##DecName, decodeSDWA##DecName)
 

Typedefs

using DecodeStatus = llvm::MCDisassembler::DecodeStatus
 

Functions

static MCDisassembler::DecodeStatus addOperand (MCInst &Inst, const MCOperand &Opnd)
 
static int insertNamedMCOperand (MCInst &MI, const MCOperand &Op, uint16_t NameIdx)
 
static DecodeStatus decodeSoppBrTarget (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)
 
static DecodeStatus decodeOperand_VSrc16 (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)
 
static DecodeStatus decodeOperand_VSrcV216 (MCInst &Inst, unsigned Imm, uint64_t Addr, const void *Decoder)
 
template<typename T >
static T eatBytes (ArrayRef< uint8_t > &Bytes)
 
static int64_t getInlineImmVal32 (unsigned Imm)
 
static int64_t getInlineImmVal64 (unsigned Imm)
 
static int64_t getInlineImmVal16 (unsigned Imm)
 
static MCSymbolizercreateAMDGPUSymbolizer (const Triple &, LLVMOpInfoCallback, LLVMSymbolLookupCallback, void *DisInfo, MCContext *Ctx, std::unique_ptr< MCRelocationInfo > &&RelInfo)
 
static MCDisassemblercreateAMDGPUDisassembler (const Target &T, const MCSubtargetInfo &STI, MCContext &Ctx)
 
void LLVMInitializeAMDGPUDisassembler ()
 

Detailed Description

This file contains definition for AMDGPU ISA disassembler.

Definition in file AMDGPUDisassembler.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "amdgpu-disassembler"

Definition at line 51 of file AMDGPUDisassembler.cpp.

◆ DECODE_OPERAND

#define DECODE_OPERAND (   StaticDecoderName,
  DecoderName 
)
Value:
static DecodeStatus StaticDecoderName(MCInst &Inst, \
unsigned Imm, \
uint64_t /*Addr*/, \
const void *Decoder) { \
auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); \
return addOperand(Inst, DAsm->DecoderName(Imm)); \
}
DecodeStatus
Ternary decode status.
static MCDisassembler::DecodeStatus addOperand(MCInst &Inst, const MCOperand &Opnd)
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159

Definition at line 86 of file AMDGPUDisassembler.cpp.

◆ DECODE_OPERAND_REG

#define DECODE_OPERAND_REG (   RegClass)    DECODE_OPERAND(Decode##RegClass##RegisterClass, decodeOperand_##RegClass)

Definition at line 95 of file AMDGPUDisassembler.cpp.

◆ DECODE_SDWA

#define DECODE_SDWA (   DecName)    DECODE_OPERAND(decodeSDWA##DecName, decodeSDWA##DecName)

Definition at line 132 of file AMDGPUDisassembler.cpp.

Typedef Documentation

◆ DecodeStatus

Definition at line 53 of file AMDGPUDisassembler.cpp.

Function Documentation

◆ addOperand()

static MCDisassembler::DecodeStatus addOperand ( MCInst Inst,
const MCOperand Opnd 
)
inlinestatic

◆ createAMDGPUDisassembler()

static MCDisassembler* createAMDGPUDisassembler ( const Target T,
const MCSubtargetInfo STI,
MCContext Ctx 
)
static

◆ createAMDGPUSymbolizer()

static MCSymbolizer* createAMDGPUSymbolizer ( const Triple ,
LLVMOpInfoCallback  ,
LLVMSymbolLookupCallback  ,
void *  DisInfo,
MCContext Ctx,
std::unique_ptr< MCRelocationInfo > &&  RelInfo 
)
static

Definition at line 746 of file AMDGPUDisassembler.cpp.

Referenced by LLVMInitializeAMDGPUDisassembler().

◆ decodeOperand_VSrc16()

static DecodeStatus decodeOperand_VSrc16 ( MCInst Inst,
unsigned  Imm,
uint64_t  Addr,
const void *  Decoder 
)
static

Definition at line 116 of file AMDGPUDisassembler.cpp.

References addOperand().

◆ decodeOperand_VSrcV216()

static DecodeStatus decodeOperand_VSrcV216 ( MCInst Inst,
unsigned  Imm,
uint64_t  Addr,
const void *  Decoder 
)
static

Definition at line 124 of file AMDGPUDisassembler.cpp.

References addOperand().

◆ decodeSoppBrTarget()

static DecodeStatus decodeSoppBrTarget ( MCInst Inst,
unsigned  Imm,
uint64_t  Addr,
const void *  Decoder 
)
static

◆ eatBytes()

template<typename T >
static T eatBytes ( ArrayRef< uint8_t > &  Bytes)
inlinestatic

◆ getInlineImmVal16()

static int64_t getInlineImmVal16 ( unsigned  Imm)
static

Definition at line 483 of file AMDGPUDisassembler.cpp.

References llvm_unreachable.

Referenced by llvm::AMDGPUDisassembler::decodeFPImmed().

◆ getInlineImmVal32()

static int64_t getInlineImmVal32 ( unsigned  Imm)
static

◆ getInlineImmVal64()

static int64_t getInlineImmVal64 ( unsigned  Imm)
static

◆ insertNamedMCOperand()

static int insertNamedMCOperand ( MCInst MI,
const MCOperand Op,
uint16_t  NameIdx 
)
static

◆ LLVMInitializeAMDGPUDisassembler()

void LLVMInitializeAMDGPUDisassembler ( )