LLVM  9.0.0svn
AMDGPUELFObjectWriter.cpp
Go to the documentation of this file.
1 //===- AMDGPUELFObjectWriter.cpp - AMDGPU ELF Writer ----------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "AMDGPUMCTargetDesc.h"
10 #include "llvm/BinaryFormat/ELF.h"
12 #include "llvm/MC/MCExpr.h"
13 #include "llvm/MC/MCFixup.h"
14 #include "llvm/MC/MCObjectWriter.h"
15 #include "llvm/MC/MCSymbol.h"
16 #include "llvm/MC/MCValue.h"
18 
19 using namespace llvm;
20 
21 namespace {
22 
23 class AMDGPUELFObjectWriter : public MCELFObjectTargetWriter {
24 public:
25  AMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend,
26  uint8_t ABIVersion);
27 
28 protected:
29  unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
30  const MCFixup &Fixup, bool IsPCRel) const override;
31 };
32 
33 
34 } // end anonymous namespace
35 
36 AMDGPUELFObjectWriter::AMDGPUELFObjectWriter(bool Is64Bit,
37  uint8_t OSABI,
38  bool HasRelocationAddend,
39  uint8_t ABIVersion)
40  : MCELFObjectTargetWriter(Is64Bit, OSABI, ELF::EM_AMDGPU,
41  HasRelocationAddend, ABIVersion) {}
42 
44  const MCValue &Target,
45  const MCFixup &Fixup,
46  bool IsPCRel) const {
47  if (const auto *SymA = Target.getSymA()) {
48  // SCRATCH_RSRC_DWORD[01] is a special global variable that represents
49  // the scratch buffer.
50  if (SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD0" ||
51  SymA->getSymbol().getName() == "SCRATCH_RSRC_DWORD1")
52  return ELF::R_AMDGPU_ABS32_LO;
53  }
54 
55  switch (Target.getAccessVariant()) {
56  default:
57  break;
59  return ELF::R_AMDGPU_GOTPCREL;
61  return ELF::R_AMDGPU_GOTPCREL32_LO;
63  return ELF::R_AMDGPU_GOTPCREL32_HI;
65  return ELF::R_AMDGPU_REL32_LO;
67  return ELF::R_AMDGPU_REL32_HI;
69  return ELF::R_AMDGPU_REL64;
70  }
71 
72  switch (Fixup.getKind()) {
73  default: break;
74  case FK_PCRel_4:
75  return ELF::R_AMDGPU_REL32;
76  case FK_Data_4:
77  case FK_SecRel_4:
78  return ELF::R_AMDGPU_ABS32;
79  case FK_Data_8:
80  return ELF::R_AMDGPU_ABS64;
81  }
82 
83  llvm_unreachable("unhandled relocation type");
84 }
85 
86 std::unique_ptr<MCObjectTargetWriter>
87 llvm::createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI,
88  bool HasRelocationAddend,
89  uint8_t ABIVersion) {
90  return llvm::make_unique<AMDGPUELFObjectWriter>(Is64Bit, OSABI,
91  HasRelocationAddend,
92  ABIVersion);
93 }
This class represents lattice values for constants.
Definition: AllocatorList.h:23
This represents an "assembler immediate".
Definition: MCValue.h:39
MCSymbolRefExpr::VariantKind getAccessVariant() const
Definition: MCValue.cpp:46
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:74
std::unique_ptr< MCObjectTargetWriter > createAMDGPUELFObjectWriter(bool Is64Bit, uint8_t OSABI, bool HasRelocationAddend, uint8_t ABIVersion)
static unsigned getRelocType(const MCValue &Target, const MCFixupKind FixupKind, const bool IsPCRel)
Translates generic PPC fixup kind to Mach-O/PPC relocation type enum.
A four-byte section relative fixup.
Definition: MCFixup.h:42
A four-byte fixup.
Definition: MCFixup.h:26
Context object for machine code objects.
Definition: MCContext.h:62
const MCSymbolRefExpr * getSymA() const
Definition: MCValue.h:47
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
A four-byte pc relative fixup.
Definition: MCFixup.h:30
Target - Wrapper for Target specific information.
Provides AMDGPU specific target descriptions.
A eight-byte fixup.
Definition: MCFixup.h:27
MCFixupKind getKind() const
Definition: MCFixup.h:123