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ARMFixupKinds.h
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1 //===-- ARMFixupKinds.h - ARM Specific Fixup Entries ------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMFIXUPKINDS_H
11 #define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMFIXUPKINDS_H
12 
13 #include "llvm/MC/MCFixup.h"
14 
15 namespace llvm {
16 namespace ARM {
17 enum Fixups {
18  // 12-bit PC relative relocation for symbol addresses
20 
21  // Equivalent to fixup_arm_ldst_pcrel_12, with the 16-bit halfwords reordered.
23 
24  // 10-bit PC relative relocation for symbol addresses used in
25  // LDRD/LDRH/LDRB/etc. instructions. All bits are encoded.
27  // 10-bit PC relative relocation for symbol addresses used in VFP instructions
28  // where the lower 2 bits are not encoded (so it's encoded as an 8-bit
29  // immediate).
31  // Equivalent to fixup_arm_pcrel_10, accounting for the short-swapped encoding
32  // of Thumb2 instructions.
34  // 9-bit PC relative relocation for symbol addresses used in VFP instructions
35  // where bit 0 not encoded (so it's encoded as an 8-bit immediate).
37  // Equivalent to fixup_arm_pcrel_9, accounting for the short-swapped encoding
38  // of Thumb2 instructions.
40  // 10-bit PC relative relocation for symbol addresses where the lower 2 bits
41  // are not encoded (so it's encoded as an 8-bit immediate).
43  // 12-bit PC relative relocation for the ADR instruction.
45  // 12-bit PC relative relocation for the ADR instruction.
47  // 24-bit PC relative relocation for conditional branch instructions.
49  // 24-bit PC relative relocation for branch instructions. (unconditional)
51  // 20-bit PC relative relocation for Thumb2 direct uconditional branch
52  // instructions.
54  // 20-bit PC relative relocation for Thumb2 direct branch unconditional branch
55  // instructions.
57 
58  // 12-bit fixup for Thumb B instructions.
60 
61  // The following fixups handle the ARM BL instructions. These can be
62  // conditionalised; however, the ARM ELF ABI requires a different relocation
63  // in that case: R_ARM_JUMP24 instead of R_ARM_CALL. The difference is that
64  // R_ARM_CALL is allowed to change the instruction to a BLX inline, which has
65  // no conditional version; R_ARM_JUMP24 would have to insert a veneer.
66  //
67  // MachO does not draw a distinction between the two cases, so it will treat
68  // fixup_arm_uncondbl and fixup_arm_condbl as identical fixups.
69 
70  // Fixup for unconditional ARM BL instructions.
72 
73  // Fixup for ARM BL instructions with nontrivial conditionalisation.
75 
76  // Fixup for ARM BLX instructions.
78 
79  // Fixup for Thumb BL instructions.
81 
82  // Fixup for Thumb BLX instructions.
84 
85  // Fixup for Thumb branch instructions.
87 
88  // Fixup for Thumb load/store from constant pool instrs.
90 
91  // Fixup for Thumb conditional branching instructions.
93 
94  // The next two are for the movt/movw pair
95  // the 16bit imm field are split into imm{15-12} and imm{11-0}
96  fixup_arm_movt_hi16, // :upper16:
97  fixup_arm_movw_lo16, // :lower16:
98  fixup_t2_movt_hi16, // :upper16:
99  fixup_t2_movw_lo16, // :lower16:
100 
101  // Fixup for mod_imm
103 
104  // Fixup for Thumb2 8-bit rotated operand
106 
107  // Marker
110 };
111 }
112 } // namespace llvm
113 
114 #endif
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24