LLVM  6.0.0svn
Macros | Functions | Variables
ARMFrameLowering.cpp File Reference
#include "ARMFrameLowering.h"
#include "ARMBaseInstrInfo.h"
#include "ARMBaseRegisterInfo.h"
#include "ARMConstantPoolValue.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMSubtarget.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "Utils/ARMBaseInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cstddef>
#include <cstdint>
#include <iterator>
#include <utility>
#include <vector>

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "arm-frame-lowering"
 

Functions

static MachineBasicBlock::iterator skipAlignedDPRCS2Spills (MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs)
 Skip past the code inserted by emitAlignedDPRCS2Spills, and return an iterator to the following instruction. More...
 
static bool isCSRestore (MachineInstr &MI, const ARMBaseInstrInfo &TII, const MCPhysReg *CSRegs)
 
static void emitRegPlusImmediate (bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, const ARMBaseInstrInfo &TII, unsigned DestReg, unsigned SrcReg, int NumBytes, unsigned MIFlags=MachineInstr::NoFlags, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0)
 
static void emitSPUpdate (bool isARM, MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, const DebugLoc &dl, const ARMBaseInstrInfo &TII, int NumBytes, unsigned MIFlags=MachineInstr::NoFlags, ARMCC::CondCodes Pred=ARMCC::AL, unsigned PredReg=0)
 
static int sizeOfSPAdjustment (const MachineInstr &MI)
 
static bool WindowsRequiresStackProbe (const MachineFunction &MF, size_t StackSizeInBytes)
 
static void emitAligningInstructions (MachineFunction &MF, ARMFunctionInfo *AFI, const TargetInstrInfo &TII, MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, const DebugLoc &DL, const unsigned Reg, const unsigned Alignment, const bool MustBeSingleInstruction)
 Emit an instruction sequence that will align the address in register Reg by zero-ing out the lower bits. More...
 
static int getMaxFPOffset (const Function &F, const ARMFunctionInfo &AFI)
 We need the offset of the frame pointer relative to other MachineFrameInfo offsets which are encoded relative to SP at function begin. More...
 
static void emitAlignedDPRCS2Spills (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI)
 Emit aligned spill instructions for NumAlignedDPRCS2Regs D-registers starting from d8. More...
 
static void emitAlignedDPRCS2Restores (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo *TRI)
 Emit aligned reload instructions for NumAlignedDPRCS2Regs D-registers starting from d8. More...
 
static unsigned GetFunctionSizeInBytes (const MachineFunction &MF, const ARMBaseInstrInfo &TII)
 
static unsigned estimateRSStackSizeLimit (MachineFunction &MF, const TargetFrameLowering *TFI)
 estimateRSStackSizeLimit - Look at each instruction that references stack frames and return the stack size limit beyond which some of these instructions will require a scratch register during their expansion later. More...
 
static void checkNumAlignedDPRCS2Regs (MachineFunction &MF, BitVector &SavedRegs)
 
static uint32_t alignToARMConstant (uint32_t Value)
 Get the minimum constant for ARM that is greater than or equal to the argument. More...
 

Variables

static cl::opt< boolSpillAlignedNEONRegs ("align-neon-spills", cl::Hidden, cl::init(true), cl::desc("Align ARM NEON spills in prolog and epilog"))
 
static const uint64_t kSplitStackAvailable = 256
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "arm-frame-lowering"

Definition at line 66 of file ARMFrameLowering.cpp.

Function Documentation

◆ alignToARMConstant()

static uint32_t alignToARMConstant ( uint32_t  Value)
static

Get the minimum constant for ARM that is greater than or equal to the argument.

In ARM, constants can have any value that can be produced by rotating an 8-bit value to the right by an even number of bits within a 32-bit word.

Definition at line 2043 of file ARMFrameLowering.cpp.

Referenced by llvm::ARMFrameLowering::adjustForSegmentedStacks().

◆ checkNumAlignedDPRCS2Regs()

static void checkNumAlignedDPRCS2Regs ( MachineFunction MF,
BitVector SavedRegs 
)
static

◆ emitAlignedDPRCS2Restores()

static void emitAlignedDPRCS2Restores ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  NumAlignedDPRCS2Regs,
const std::vector< CalleeSavedInfo > &  CSI,
const TargetRegisterInfo TRI 
)
static

◆ emitAlignedDPRCS2Spills()

static void emitAlignedDPRCS2Spills ( MachineBasicBlock MBB,
MachineBasicBlock::iterator  MI,
unsigned  NumAlignedDPRCS2Regs,
const std::vector< CalleeSavedInfo > &  CSI,
const TargetRegisterInfo TRI 
)
static

◆ emitAligningInstructions()

static void emitAligningInstructions ( MachineFunction MF,
ARMFunctionInfo AFI,
const TargetInstrInfo TII,
MachineBasicBlock MBB,
MachineBasicBlock::iterator  MBBI,
const DebugLoc DL,
const unsigned  Reg,
const unsigned  Alignment,
const bool  MustBeSingleInstruction 
)
static

Emit an instruction sequence that will align the address in register Reg by zero-ing out the lower bits.

For versions of the architecture that support Neon, this must be done in a single instruction, since skipAlignedDPRCS2Spills assumes it is done in a single instruction. That function only gets called when optimizing spilling of D registers on a core with the Neon instruction set present.

Definition at line 267 of file ARMFrameLowering.cpp.

References llvm::MachineInstrBuilder::add(), llvm::MachineInstrBuilder::addImm(), llvm::ARMCC::AL, assert(), llvm::BuildMI(), llvm::condCodeOp(), llvm::countTrailingZeros(), llvm::MCInstrInfo::get(), llvm::ARM_AM::getSORegOpc(), llvm::MachineFunction::getSubtarget(), llvm::ARMSubtarget::hasV6T2Ops(), llvm::ARMSubtarget::hasV7Ops(), llvm::ARMFunctionInfo::isThumb1OnlyFunction(), llvm::ARMFunctionInfo::isThumbFunction(), llvm::RegState::Kill, llvm::ARM_AM::lsl, llvm::ARM_AM::lsr, and llvm::predOps().

Referenced by emitAlignedDPRCS2Spills(), and llvm::ARMFrameLowering::emitPrologue().

◆ emitRegPlusImmediate()

static void emitRegPlusImmediate ( bool  isARM,
MachineBasicBlock MBB,
MachineBasicBlock::iterator MBBI,
const DebugLoc dl,
const ARMBaseInstrInfo TII,
unsigned  DestReg,
unsigned  SrcReg,
int  NumBytes,
unsigned  MIFlags = MachineInstr::NoFlags,
ARMCC::CondCodes  Pred = ARMCC::AL,
unsigned  PredReg = 0 
)
static

◆ emitSPUpdate()

static void emitSPUpdate ( bool  isARM,
MachineBasicBlock MBB,
MachineBasicBlock::iterator MBBI,
const DebugLoc dl,
const ARMBaseInstrInfo TII,
int  NumBytes,
unsigned  MIFlags = MachineInstr::NoFlags,
ARMCC::CondCodes  Pred = ARMCC::AL,
unsigned  PredReg = 0 
)
static

◆ estimateRSStackSizeLimit()

static unsigned estimateRSStackSizeLimit ( MachineFunction MF,
const TargetFrameLowering TFI 
)
static

estimateRSStackSizeLimit - Look at each instruction that references stack frames and return the stack size limit beyond which some of these instructions will require a scratch register during their expansion later.

Definition at line 1477 of file ARMFrameLowering.cpp.

References llvm::ARMII::AddrMode3, llvm::ARMII::AddrMode4, llvm::ARMII::AddrMode5, llvm::ARMII::AddrMode6, llvm::ARMII::AddrModeMask, llvm::ARMII::AddrModeT2_i12, llvm::ARMII::AddrModeT2_i8, llvm::ARMII::AddrModeT2_i8s4, llvm::MachineFunction::getInfo(), llvm::TargetFrameLowering::hasFP(), and llvm::ARMFunctionInfo::hasStackFrame().

Referenced by llvm::ARMFrameLowering::determineCalleeSaves().

◆ GetFunctionSizeInBytes()

static unsigned GetFunctionSizeInBytes ( const MachineFunction MF,
const ARMBaseInstrInfo TII 
)
static

◆ getMaxFPOffset()

static int getMaxFPOffset ( const Function F,
const ARMFunctionInfo AFI 
)
static

We need the offset of the frame pointer relative to other MachineFrameInfo offsets which are encoded relative to SP at function begin.

See also emitPrologue() for how the FP is set up. Unfortunately we cannot determine this value in determineCalleeSaves() yet as assignCalleeSavedSpillSlots() hasn't run at this point. Instead we use this to produce a conservative estimate that we check in an assert() later.

Definition at line 334 of file ARMFrameLowering.cpp.

References llvm::ARMFunctionInfo::getArgRegsSaveSize().

Referenced by llvm::ARMFrameLowering::determineCalleeSaves(), and llvm::ARMFrameLowering::emitPrologue().

◆ isCSRestore()

static bool isCSRestore ( MachineInstr MI,
const ARMBaseInstrInfo TII,
const MCPhysReg CSRegs 
)
static

◆ sizeOfSPAdjustment()

static int sizeOfSPAdjustment ( const MachineInstr MI)
static

◆ skipAlignedDPRCS2Spills()

static MachineBasicBlock::iterator skipAlignedDPRCS2Spills ( MachineBasicBlock::iterator  MI,
unsigned  NumAlignedDPRCS2Regs 
)
static

Skip past the code inserted by emitAlignedDPRCS2Spills, and return an iterator to the following instruction.

Definition at line 1281 of file ARMFrameLowering.cpp.

References assert(), LLVM_FALLTHROUGH, MI, and R4.

Referenced by llvm::ARMFrameLowering::emitPrologue().

◆ WindowsRequiresStackProbe()

static bool WindowsRequiresStackProbe ( const MachineFunction MF,
size_t  StackSizeInBytes 
)
static

Variable Documentation

◆ kSplitStackAvailable

const uint64_t kSplitStackAvailable = 256
static

◆ SpillAlignedNEONRegs

cl::opt<bool> SpillAlignedNEONRegs("align-neon-spills", cl::Hidden, cl::init(true), cl::desc("Align ARM NEON spills in prolog and epilog"))
static