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ARMMCTargetDesc.h
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1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides ARM specific target descriptions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
14 #define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
15 
16 #include "llvm/Support/DataTypes.h"
17 #include <memory>
18 #include <string>
19 
20 namespace llvm {
21 class formatted_raw_ostream;
22 class MCAsmBackend;
23 class MCCodeEmitter;
24 class MCContext;
25 class MCInstrInfo;
26 class MCInstPrinter;
27 class MCObjectTargetWriter;
28 class MCObjectWriter;
29 class MCRegisterInfo;
30 class MCSubtargetInfo;
31 class MCStreamer;
32 class MCTargetOptions;
33 class MCRelocationInfo;
34 class MCTargetStreamer;
35 class StringRef;
36 class Target;
37 class Triple;
38 class raw_ostream;
39 class raw_pwrite_stream;
40 
41 namespace ARM_MC {
42 std::string ParseARMTriple(const Triple &TT, StringRef CPU);
43 
44 /// Create a ARM MCSubtargetInfo instance. This is exposed so Asm parser, etc.
45 /// do not need to go through TargetRegistry.
47  StringRef FS);
48 }
49 
53  MCInstPrinter *InstPrint,
54  bool isVerboseAsm);
56  const MCSubtargetInfo &STI);
57 
59  const MCRegisterInfo &MRI,
60  MCContext &Ctx);
61 
63  const MCRegisterInfo &MRI,
64  MCContext &Ctx);
65 
67  const MCRegisterInfo &MRI,
68  const MCTargetOptions &Options);
69 
71  const MCRegisterInfo &MRI,
72  const MCTargetOptions &Options);
73 
74 // Construct a PE/COFF machine code streamer which will generate a PE/COFF
75 // object file.
77  std::unique_ptr<MCAsmBackend> &&MAB,
78  std::unique_ptr<MCObjectWriter> &&OW,
79  std::unique_ptr<MCCodeEmitter> &&Emitter,
80  bool RelaxAll,
81  bool IncrementalLinkerCompatible);
82 
83 /// Construct an ELF Mach-O object writer.
84 std::unique_ptr<MCObjectTargetWriter> createARMELFObjectWriter(uint8_t OSABI);
85 
86 /// Construct an ARM Mach-O object writer.
87 std::unique_ptr<MCObjectTargetWriter>
89  uint32_t CPUSubtype);
90 
91 /// Construct an ARM PE/COFF object writer.
92 std::unique_ptr<MCObjectTargetWriter>
93 createARMWinCOFFObjectWriter(bool Is64Bit);
94 
95 /// Construct ARM Mach-O relocation info.
97 } // End llvm namespace
98 
99 // Defines symbolic names for ARM registers. This defines a mapping from
100 // register name to register number.
101 //
102 #define GET_REGINFO_ENUM
103 #include "ARMGenRegisterInfo.inc"
104 
105 // Defines symbolic names for the ARM instructions.
106 //
107 #define GET_INSTRINFO_ENUM
108 #include "ARMGenInstrInfo.inc"
109 
110 #define GET_SUBTARGETINFO_ENUM
111 #include "ARMGenSubtargetInfo.inc"
112 
113 #endif
MCAsmBackend * createARMLEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
LLVMContext & Context
This class represents lattice values for constants.
Definition: AllocatorList.h:23
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
Target specific streamer interface.
Definition: MCStreamer.h:83
MCRelocationInfo * createARMMachORelocationInfo(MCContext &Ctx)
Construct ARM Mach-O relocation info.
Context object for machine code objects.
Definition: MCContext.h:62
MCAsmBackend * createARMBEAsmBackend(const Target &T, const MCSubtargetInfo &STI, const MCRegisterInfo &MRI, const MCTargetOptions &Options)
MCTargetStreamer * createARMTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCTargetStreamer * createARMObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
Streaming machine code generation interface.
Definition: MCStreamer.h:188
unsigned const MachineRegisterInfo * MRI
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:21
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:23
Create MCExprs from relocations found in an object file.
std::unique_ptr< MCObjectTargetWriter > createARMELFObjectWriter(uint8_t OSABI)
Construct an ELF Mach-O object writer.
MCSubtargetInfo * createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a ARM MCSubtargetInfo instance.
MCStreamer * createARMWinCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, std::unique_ptr< MCObjectWriter > &&OW, std::unique_ptr< MCCodeEmitter > &&Emitter, bool RelaxAll, bool IncrementalLinkerCompatible)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:43
Target - Wrapper for Target specific information.
std::unique_ptr< MCObjectTargetWriter > createARMWinCOFFObjectWriter(bool Is64Bit)
Construct an ARM PE/COFF object writer.
std::unique_ptr< MCObjectTargetWriter > createARMMachObjectWriter(bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an ARM Mach-O object writer.
MCCodeEmitter * createARMLEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:39
Generic base class for all target subtargets.
MCTargetStreamer * createARMNullTargetStreamer(MCStreamer &S)
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:41
std::string ParseARMTriple(const Triple &TT, StringRef CPU)
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
MCCodeEmitter * createARMBEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)