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ARMMCTargetDesc.h
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1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides ARM specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_ARM_MCTARGETDESC_ARMMCTARGETDESC_H
16 
17 #include "llvm/Support/DataTypes.h"
18 #include <memory>
19 #include <string>
20 
21 namespace llvm {
22 class formatted_raw_ostream;
23 class MCAsmBackend;
24 class MCCodeEmitter;
25 class MCContext;
26 class MCInstrInfo;
27 class MCInstPrinter;
28 class MCObjectWriter;
29 class MCRegisterInfo;
30 class MCSubtargetInfo;
31 class MCStreamer;
32 class MCTargetOptions;
33 class MCRelocationInfo;
34 class MCTargetStreamer;
35 class StringRef;
36 class Target;
37 class Triple;
38 class raw_ostream;
39 class raw_pwrite_stream;
40 
41 Target &getTheARMLETarget();
42 Target &getTheThumbLETarget();
43 Target &getTheARMBETarget();
44 Target &getTheThumbBETarget();
45 
46 namespace ARM_MC {
47 std::string ParseARMTriple(const Triple &TT, StringRef CPU);
48 
49 /// Create a ARM MCSubtargetInfo instance. This is exposed so Asm parser, etc.
50 /// do not need to go through TargetRegistry.
52  StringRef FS);
53 }
54 
58  MCInstPrinter *InstPrint,
59  bool isVerboseAsm);
61  const MCSubtargetInfo &STI);
62 
64  const MCRegisterInfo &MRI,
65  MCContext &Ctx);
66 
68  const MCRegisterInfo &MRI,
69  MCContext &Ctx);
70 
72  const Triple &TT, StringRef CPU,
73  const MCTargetOptions &Options,
74  bool IsLittleEndian);
75 
77  const Triple &TT, StringRef CPU,
78  const MCTargetOptions &Options);
79 
81  const Triple &TT, StringRef CPU,
82  const MCTargetOptions &Options);
83 
85  const MCRegisterInfo &MRI,
86  const Triple &TT, StringRef CPU,
87  const MCTargetOptions &Options);
88 
90  const MCRegisterInfo &MRI,
91  const Triple &TT, StringRef CPU,
92  const MCTargetOptions &Options);
93 
94 // Construct a PE/COFF machine code streamer which will generate a PE/COFF
95 // object file.
97  std::unique_ptr<MCAsmBackend> &&MAB,
99  std::unique_ptr<MCCodeEmitter> &&Emitter,
100  bool RelaxAll,
101  bool IncrementalLinkerCompatible);
102 
103 /// Construct an ELF Mach-O object writer.
104 std::unique_ptr<MCObjectWriter> createARMELFObjectWriter(raw_pwrite_stream &OS,
105  uint8_t OSABI,
106  bool IsLittleEndian);
107 
108 /// Construct an ARM Mach-O object writer.
109 std::unique_ptr<MCObjectWriter> createARMMachObjectWriter(raw_pwrite_stream &OS,
110  bool Is64Bit,
112  uint32_t CPUSubtype);
113 
114 /// Construct an ARM PE/COFF object writer.
115 std::unique_ptr<MCObjectWriter>
117 
118 /// Construct ARM Mach-O relocation info.
120 } // End llvm namespace
121 
122 // Defines symbolic names for ARM registers. This defines a mapping from
123 // register name to register number.
124 //
125 #define GET_REGINFO_ENUM
126 #include "ARMGenRegisterInfo.inc"
127 
128 // Defines symbolic names for the ARM instructions.
129 //
130 #define GET_INSTRINFO_ENUM
131 #include "ARMGenInstrInfo.inc"
132 
133 #define GET_SUBTARGETINFO_ENUM
134 #include "ARMGenSubtargetInfo.inc"
135 
136 #endif
std::unique_ptr< MCObjectWriter > createARMMachObjectWriter(raw_pwrite_stream &OS, bool Is64Bit, uint32_t CPUType, uint32_t CPUSubtype)
Construct an ARM Mach-O object writer.
LLVMContext & Context
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
formatted_raw_ostream - A raw_ostream that wraps another one and keeps track of line and column posit...
MCAsmBackend * createARMAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options, bool IsLittleEndian)
MCAsmBackend * createThumbLEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Target specific streamer interface.
Definition: MCStreamer.h:80
MCRelocationInfo * createARMMachORelocationInfo(MCContext &Ctx)
Construct ARM Mach-O relocation info.
Target & getTheThumbLETarget()
Target & getTheARMBETarget()
Context object for machine code objects.
Definition: MCContext.h:59
Target & getTheThumbBETarget()
MCTargetStreamer * createARMTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS, MCInstPrinter *InstPrint, bool isVerboseAsm)
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
MCTargetStreamer * createARMObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI)
Streaming machine code generation interface.
Definition: MCStreamer.h:169
unsigned const MachineRegisterInfo * MRI
MCAsmBackend * createARMBEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
MCCodeEmitter - Generic instruction encoding interface.
Definition: MCCodeEmitter.h:22
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
std::unique_ptr< MCObjectWriter > createARMWinCOFFObjectWriter(raw_pwrite_stream &OS, bool Is64Bit)
Construct an ARM PE/COFF object writer.
Create MCExprs from relocations found in an object file.
MCSubtargetInfo * createARMMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
Create a ARM MCSubtargetInfo instance.
MCAsmBackend * createARMLEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
MCStreamer * createARMWinCOFFStreamer(MCContext &Context, std::unique_ptr< MCAsmBackend > &&MAB, raw_pwrite_stream &OS, std::unique_ptr< MCCodeEmitter > &&Emitter, bool RelaxAll, bool IncrementalLinkerCompatible)
MCAsmBackend * createThumbBEAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const MCTargetOptions &Options)
Target - Wrapper for Target specific information.
MCCodeEmitter * createARMLEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)
This is an instance of a target assembly language printer that converts an MCInst to valid target ass...
Definition: MCInstPrinter.h:41
MCSubtargetInfo - Generic base class for all target subtargets.
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:337
MCTargetStreamer * createARMNullTargetStreamer(MCStreamer &S)
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:40
std::string ParseARMTriple(const Triple &TT, StringRef CPU)
std::unique_ptr< MCObjectWriter > createARMELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI, bool IsLittleEndian)
Construct an ELF Mach-O object writer.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Target & getTheARMLETarget()
MCCodeEmitter * createARMBEMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, MCContext &Ctx)