LLVM  6.0.0svn
ARMTargetMachine.h
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1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file declares the ARM specific subclass of TargetMachine.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
15 #define LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
16 
17 #include "ARMSubtarget.h"
18 #include "llvm/ADT/Optional.h"
19 #include "llvm/ADT/StringMap.h"
20 #include "llvm/ADT/StringRef.h"
22 #include "llvm/Support/CodeGen.h"
24 #include <memory>
25 
26 namespace llvm {
27 
29 public:
30  enum ARMABI {
33  ARM_ABI_AAPCS, // ARM EABI
35  } TargetABI;
36 
37 protected:
38  std::unique_ptr<TargetLoweringObjectFile> TLOF;
39  bool isLittle;
41 
42 public:
43  ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
44  StringRef FS, const TargetOptions &Options,
46  CodeGenOpt::Level OL, bool isLittle);
47  ~ARMBaseTargetMachine() override;
48 
49  const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
50  // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
51  // subtargets are per-function entities based on the target-specific
52  // attributes of each function.
53  const ARMSubtarget *getSubtargetImpl() const = delete;
54  bool isLittleEndian() const { return isLittle; }
55 
56  /// \brief Get the TargetIRAnalysis for this target.
58 
59  // Pass Pipeline Configuration
61 
63  return TLOF.get();
64  }
65 };
66 
67 /// ARM/Thumb little endian target machine.
68 ///
70 public:
71  ARMLETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
72  StringRef FS, const TargetOptions &Options,
74  CodeGenOpt::Level OL, bool JIT);
75 };
76 
77 /// ARM/Thumb big endian target machine.
78 ///
80 public:
81  ARMBETargetMachine(const Target &T, const Triple &TT, StringRef CPU,
82  StringRef FS, const TargetOptions &Options,
84  CodeGenOpt::Level OL, bool JIT);
85 };
86 
87 } // end namespace llvm
88 
89 #endif // LLVM_LIB_TARGET_ARM_ARMTARGETMACHINE_H
TargetIRAnalysis getTargetIRAnalysis() override
Get the TargetIRAnalysis for this target.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Analysis pass providing the TargetTransformInfo.
F(f)
enum llvm::ARMBaseTargetMachine::ARMABI TargetABI
TargetLoweringObjectFile * getObjFileLowering() const override
ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool isLittle)
Create an ARM architecture model.
Target-Independent Code Generator Pass Configuration Options.
ARM/Thumb big endian target machine.
std::unique_ptr< TargetLoweringObjectFile > TLOF
StringMap< std::unique_ptr< ARMSubtarget > > SubtargetMap
ARM/Thumb little endian target machine.
This class describes a target machine that is implemented with the LLVM target-independent code gener...
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
PassManagerBase - An abstract interface to allow code to add passes to a pass manager without having ...
StringMap - This is an unconventional map that is specialized for handling keys that are "strings"...
Definition: StringMap.h:224
Target - Wrapper for Target specific information.
TargetPassConfig * createPassConfig(PassManagerBase &PM) override
Create a pass configuration object to be used by addPassToEmitX methods for generating a pipeline of ...
TargetOptions Options
Definition: TargetMachine.h:96
const ARMSubtarget * getSubtargetImpl() const =delete
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
This pass exposes codegen information to IR-level passes.