LLVM  6.0.0svn
ARMTargetStreamer.cpp
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1 //===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the ARMTargetStreamer class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "ARMTargetMachine.h"
15 #include "llvm/MC/ConstantPools.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCStreamer.h"
21 
22 using namespace llvm;
23 
24 //
25 // ARMTargetStreamer Implemenation
26 //
27 
29  : MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
30 
32 
33 // The constant pool handling is shared by all ARMTargetStreamer
34 // implementations.
36  return ConstantPools->addEntry(Streamer, Expr, 4, Loc);
37 }
38 
40  ConstantPools->emitForCurrentSection(Streamer);
41  ConstantPools->clearCacheForCurrentSection(Streamer);
42 }
43 
44 // finish() - write out any non-empty assembler constant pools.
45 void ARMTargetStreamer::finish() { ConstantPools->emitAll(Streamer); }
46 
47 // reset() - Reset any state
49 
50 // The remaining callbacks should be handled separately by each
51 // streamer.
55 void ARMTargetStreamer::emitPersonality(const MCSymbol *Personality) {}
58 void ARMTargetStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
59  int64_t Offset) {}
60 void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
63  bool isVector) {}
64 void ARMTargetStreamer::emitUnwindRaw(int64_t StackOffset,
65  const SmallVectorImpl<uint8_t> &Opcodes) {
66 }
70  StringRef String) {}
72  unsigned IntValue,
73  StringRef StringValue) {}
75 void ARMTargetStreamer::emitArchExtension(unsigned ArchExt) {}
77 void ARMTargetStreamer::emitFPU(unsigned FPU) {}
79 void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}
80 void
83 
85  if (STI.getCPU() == "xscale")
86  return ARMBuildAttrs::v5TEJ;
87 
88  if (STI.hasFeature(ARM::HasV8Ops)) {
89  if (STI.hasFeature(ARM::FeatureRClass))
90  return ARMBuildAttrs::v8_R;
91  return ARMBuildAttrs::v8_A;
92  } else if (STI.hasFeature(ARM::HasV8MMainlineOps))
94  else if (STI.hasFeature(ARM::HasV7Ops)) {
95  if (STI.hasFeature(ARM::FeatureMClass) && STI.hasFeature(ARM::FeatureDSP))
96  return ARMBuildAttrs::v7E_M;
97  return ARMBuildAttrs::v7;
98  } else if (STI.hasFeature(ARM::HasV6T2Ops))
99  return ARMBuildAttrs::v6T2;
100  else if (STI.hasFeature(ARM::HasV8MBaselineOps))
102  else if (STI.hasFeature(ARM::HasV6MOps))
103  return ARMBuildAttrs::v6S_M;
104  else if (STI.hasFeature(ARM::HasV6Ops))
105  return ARMBuildAttrs::v6;
106  else if (STI.hasFeature(ARM::HasV5TEOps))
107  return ARMBuildAttrs::v5TE;
108  else if (STI.hasFeature(ARM::HasV5TOps))
109  return ARMBuildAttrs::v5T;
110  else if (STI.hasFeature(ARM::HasV4TOps))
111  return ARMBuildAttrs::v4T;
112  else
113  return ARMBuildAttrs::v4;
114 }
115 
116 static bool isV8M(const MCSubtargetInfo &STI) {
117  // Note that v8M Baseline is a subset of v6T2!
118  return (STI.hasFeature(ARM::HasV8MBaselineOps) &&
119  !STI.hasFeature(ARM::HasV6T2Ops)) ||
120  STI.hasFeature(ARM::HasV8MMainlineOps);
121 }
122 
123 /// Emit the build attributes that only depend on the hardware that we expect
124 // /to be available, and not on the ABI, or any source-language choices.
126  switchVendor("aeabi");
127 
128  const StringRef CPUString = STI.getCPU();
129  if (!CPUString.empty() && !CPUString.startswith("generic")) {
130  // FIXME: remove krait check when GNU tools support krait cpu
131  if (STI.hasFeature(ARM::ProcKrait)) {
133  // We consider krait as a "cortex-a9" + hwdiv CPU
134  // Enable hwdiv through ".arch_extension idiv"
135  if (STI.hasFeature(ARM::FeatureHWDivThumb) ||
136  STI.hasFeature(ARM::FeatureHWDivARM))
138  } else {
140  }
141  }
142 
144 
145  if (STI.hasFeature(ARM::FeatureAClass)) {
148  } else if (STI.hasFeature(ARM::FeatureRClass)) {
151  } else if (STI.hasFeature(ARM::FeatureMClass)) {
154  }
155 
156  emitAttribute(ARMBuildAttrs::ARM_ISA_use, STI.hasFeature(ARM::FeatureNoARM)
159 
160  if (isV8M(STI)) {
163  } else if (STI.hasFeature(ARM::FeatureThumb2)) {
166  } else if (STI.hasFeature(ARM::HasV4TOps)) {
168  }
169 
170  if (STI.hasFeature(ARM::FeatureNEON)) {
171  /* NEON is not exactly a VFP architecture, but GAS emit one of
172  * neon/neon-fp-armv8/neon-vfpv4/vfpv3/vfpv2 for .fpu parameters */
173  if (STI.hasFeature(ARM::FeatureFPARMv8)) {
174  if (STI.hasFeature(ARM::FeatureCrypto))
175  emitFPU(ARM::FK_CRYPTO_NEON_FP_ARMV8);
176  else
177  emitFPU(ARM::FK_NEON_FP_ARMV8);
178  } else if (STI.hasFeature(ARM::FeatureVFP4))
179  emitFPU(ARM::FK_NEON_VFPV4);
180  else
181  emitFPU(STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_NEON_FP16
182  : ARM::FK_NEON);
183  // Emit Tag_Advanced_SIMD_arch for ARMv8 architecture
184  if (STI.hasFeature(ARM::HasV8Ops))
186  STI.hasFeature(ARM::HasV8_1aOps)
189  } else {
190  if (STI.hasFeature(ARM::FeatureFPARMv8))
191  // FPv5 and FP-ARMv8 have the same instructions, so are modeled as one
192  // FPU, but there are two different names for it depending on the CPU.
193  emitFPU(STI.hasFeature(ARM::FeatureD16)
194  ? (STI.hasFeature(ARM::FeatureVFPOnlySP) ? ARM::FK_FPV5_SP_D16
195  : ARM::FK_FPV5_D16)
196  : ARM::FK_FP_ARMV8);
197  else if (STI.hasFeature(ARM::FeatureVFP4))
198  emitFPU(STI.hasFeature(ARM::FeatureD16)
199  ? (STI.hasFeature(ARM::FeatureVFPOnlySP) ? ARM::FK_FPV4_SP_D16
200  : ARM::FK_VFPV4_D16)
201  : ARM::FK_VFPV4);
202  else if (STI.hasFeature(ARM::FeatureVFP3))
203  emitFPU(
204  STI.hasFeature(ARM::FeatureD16)
205  // +d16
206  ? (STI.hasFeature(ARM::FeatureVFPOnlySP)
207  ? (STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3XD_FP16
208  : ARM::FK_VFPV3XD)
209  : (STI.hasFeature(ARM::FeatureFP16)
210  ? ARM::FK_VFPV3_D16_FP16
211  : ARM::FK_VFPV3_D16))
212  // -d16
213  : (STI.hasFeature(ARM::FeatureFP16) ? ARM::FK_VFPV3_FP16
214  : ARM::FK_VFPV3));
215  else if (STI.hasFeature(ARM::FeatureVFP2))
216  emitFPU(ARM::FK_VFPV2);
217  }
218 
219  // ABI_HardFP_use attribute to indicate single precision FP.
220  if (STI.hasFeature(ARM::FeatureVFPOnlySP))
223 
224  if (STI.hasFeature(ARM::FeatureFP16))
226 
227  if (STI.hasFeature(ARM::FeatureMP))
229 
230  // Hardware divide in ARM mode is part of base arch, starting from ARMv8.
231  // If only Thumb hwdiv is present, it must also be in base arch (ARMv7-R/M).
232  // It is not possible to produce DisallowDIV: if hwdiv is present in the base
233  // arch, supplying -hwdiv downgrades the effective arch, via ClearImpliedBits.
234  // AllowDIVExt is only emitted if hwdiv isn't available in the base arch;
235  // otherwise, the default value (AllowDIVIfExists) applies.
236  if (STI.hasFeature(ARM::FeatureHWDivARM) && !STI.hasFeature(ARM::HasV8Ops))
238 
239  if (STI.hasFeature(ARM::FeatureDSP) && isV8M(STI))
241 
242  if (STI.hasFeature(ARM::FeatureStrictAlign))
245  else
248 
249  if (STI.hasFeature(ARM::FeatureTrustZone) &&
250  STI.hasFeature(ARM::FeatureVirtualization))
253  else if (STI.hasFeature(ARM::FeatureTrustZone))
255  else if (STI.hasFeature(ARM::FeatureVirtualization))
258 }
virtual void AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE)
virtual void emitFPU(unsigned FPU)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
virtual void emitArchExtension(unsigned ArchExt)
Target specific streamer interface.
Definition: MCStreamer.h:80
virtual void emitPad(int64_t Offset)
virtual void finishAttributeSection()
virtual void emitPersonality(const MCSymbol *Personality)
virtual void reset()
Reset any state between object emissions, i.e.
virtual void emitPersonalityIndex(unsigned Index)
void emitCurrentConstantPool()
Callback used to implemnt the .ltorg directive.
virtual void emitInst(uint32_t Inst, char Suffix='\0')
virtual void emitObjectArch(ARM::ArchKind Arch)
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
Reg
All possible values of the reg field in the ModR/M byte.
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:165
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool startswith(StringRef Prefix) const
Check if this string starts with the given Prefix.
Definition: StringRef.h:267
LLVM_NODISCARD LLVM_ATTRIBUTE_ALWAYS_INLINE bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:133
virtual void emitMovSP(unsigned Reg, int64_t Offset=0)
static bool isV8M(const MCSubtargetInfo &STI)
ARMTargetStreamer(MCStreamer &S)
virtual void emitAttribute(unsigned Attribute, unsigned Value)
Streaming machine code generation interface.
Definition: MCStreamer.h:169
virtual void emitRegSave(const SmallVectorImpl< unsigned > &RegList, bool isVector)
virtual void emitThumbSet(MCSymbol *Symbol, const MCExpr *Value)
virtual void emitSetFP(unsigned FpReg, unsigned SpReg, int64_t Offset=0)
virtual void emitUnwindRaw(int64_t StackOffset, const SmallVectorImpl< uint8_t > &Opcodes)
~ARMTargetStreamer() override
static ARMBuildAttrs::CPUArch getArchForCPU(const MCSubtargetInfo &STI)
bool isVector(MCInstrInfo const &MCII, MCInst const &MCI)
MCStreamer & Streamer
Definition: MCStreamer.h:82
void emitTargetAttributes(const MCSubtargetInfo &STI)
Emit the build attributes that only depend on the hardware that we expect.
const MCExpr * addConstantPoolEntry(const MCExpr *, SMLoc Loc)
Callback used to implement the ldr= pseudo.
virtual void emitArch(ARM::ArchKind Arch)
StringRef getCPU() const
getCPU - Return the CPU string.
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue, StringRef StringValue="")
bool hasFeature(unsigned Feature) const
MCSubtargetInfo - Generic base class for all target subtargets.
LLVM Value Representation.
Definition: Value.h:73
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Represents a location in source code.
Definition: SMLoc.h:24
virtual void switchVendor(StringRef Vendor)
virtual void emitTextAttribute(unsigned Attribute, StringRef String)