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AVRAsmBackend.cpp
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1 //===-- AVRAsmBackend.cpp - AVR Asm Backend ------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the AVRAsmBackend class.
11 //
12 //===----------------------------------------------------------------------===//
13 
17 
18 #include "llvm/MC/MCAsmBackend.h"
19 #include "llvm/MC/MCAssembler.h"
20 #include "llvm/MC/MCContext.h"
21 #include "llvm/MC/MCDirectives.h"
24 #include "llvm/MC/MCObjectWriter.h"
26 #include "llvm/MC/MCValue.h"
30 
31 // FIXME: we should be doing checks to make sure asm operands
32 // are not out of bounds.
33 
34 namespace adjust {
35 
36 using namespace llvm;
37 
38 void signed_width(unsigned Width, uint64_t Value, std::string Description,
39  const MCFixup &Fixup, MCContext *Ctx = nullptr) {
40  if (!isIntN(Width, Value)) {
41  std::string Diagnostic = "out of range " + Description;
42 
43  int64_t Min = minIntN(Width);
44  int64_t Max = maxIntN(Width);
45 
46  Diagnostic += " (expected an integer in the range " + std::to_string(Min) +
47  " to " + std::to_string(Max) + ")";
48 
49  if (Ctx) {
50  Ctx->reportFatalError(Fixup.getLoc(), Diagnostic);
51  } else {
52  llvm_unreachable(Diagnostic.c_str());
53  }
54  }
55 }
56 
57 void unsigned_width(unsigned Width, uint64_t Value, std::string Description,
58  const MCFixup &Fixup, MCContext *Ctx = nullptr) {
59  if (!isUIntN(Width, Value)) {
60  std::string Diagnostic = "out of range " + Description;
61 
62  int64_t Max = maxUIntN(Width);
63 
64  Diagnostic += " (expected an integer in the range 0 to " +
65  std::to_string(Max) + ")";
66 
67  if (Ctx) {
68  Ctx->reportFatalError(Fixup.getLoc(), Diagnostic);
69  } else {
70  llvm_unreachable(Diagnostic.c_str());
71  }
72  }
73 }
74 
75 /// Adjusts the value of a branch target before fixup application.
76 void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
77  MCContext *Ctx = nullptr) {
78  // We have one extra bit of precision because the value is rightshifted by
79  // one.
80  unsigned_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx);
81 
82  // Rightshifts the value by one.
84 }
85 
86 /// Adjusts the value of a relative branch target before fixup application.
87 void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
88  MCContext *Ctx = nullptr) {
89  // We have one extra bit of precision because the value is rightshifted by
90  // one.
91  signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx);
92 
93  Value -= 2;
94 
95  // Rightshifts the value by one.
97 }
98 
99 /// 22-bit absolute fixup.
100 ///
101 /// Resolves to:
102 /// 1001 kkkk 010k kkkk kkkk kkkk 111k kkkk
103 ///
104 /// Offset of 0 (so the result is left shifted by 3 bits before application).
105 void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
106  MCContext *Ctx = nullptr) {
107  adjustBranch(Size, Fixup, Value, Ctx);
108 
109  auto top = Value & (0xf00000 << 6); // the top four bits
110  auto middle = Value & (0x1ffff << 5); // the middle 13 bits
111  auto bottom = Value & 0x1f; // end bottom 5 bits
112 
113  Value = (top << 6) | (middle << 3) | (bottom << 0);
114 }
115 
116 /// 7-bit PC-relative fixup.
117 ///
118 /// Resolves to:
119 /// 0000 00kk kkkk k000
120 /// Offset of 0 (so the result is left shifted by 3 bits before application).
121 void fixup_7_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
122  MCContext *Ctx = nullptr) {
123  adjustRelativeBranch(Size, Fixup, Value, Ctx);
124 
125  // Because the value may be negative, we must mask out the sign bits
126  Value &= 0x7f;
127 }
128 
129 /// 12-bit PC-relative fixup.
130 /// Yes, the fixup is 12 bits even though the name says otherwise.
131 ///
132 /// Resolves to:
133 /// 0000 kkkk kkkk kkkk
134 /// Offset of 0 (so the result isn't left-shifted before application).
135 void fixup_13_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
136  MCContext *Ctx = nullptr) {
137  adjustRelativeBranch(Size, Fixup, Value, Ctx);
138 
139  // Because the value may be negative, we must mask out the sign bits
140  Value &= 0xfff;
141 }
142 
143 /// 6-bit fixup for the immediate operand of the ADIW family of
144 /// instructions.
145 ///
146 /// Resolves to:
147 /// 0000 0000 kk00 kkkk
148 void fixup_6_adiw(const MCFixup &Fixup, uint64_t &Value,
149  MCContext *Ctx = nullptr) {
150  unsigned_width(6, Value, std::string("immediate"), Fixup, Ctx);
151 
152  Value = ((Value & 0x30) << 2) | (Value & 0x0f);
153 }
154 
155 /// 5-bit port number fixup on the SBIC family of instructions.
156 ///
157 /// Resolves to:
158 /// 0000 0000 AAAA A000
159 void fixup_port5(const MCFixup &Fixup, uint64_t &Value,
160  MCContext *Ctx = nullptr) {
161  unsigned_width(5, Value, std::string("port number"), Fixup, Ctx);
162 
163  Value &= 0x1f;
164 
165  Value <<= 3;
166 }
167 
168 /// 6-bit port number fixup on the `IN` family of instructions.
169 ///
170 /// Resolves to:
171 /// 1011 0AAd dddd AAAA
172 void fixup_port6(const MCFixup &Fixup, uint64_t &Value,
173  MCContext *Ctx = nullptr) {
174  unsigned_width(6, Value, std::string("port number"), Fixup, Ctx);
175 
176  Value = ((Value & 0x30) << 5) | (Value & 0x0f);
177 }
178 
179 /// Adjusts a program memory address.
180 /// This is a simple right-shift.
181 void pm(uint64_t &Value) {
182  Value >>= 1;
183 }
184 
185 /// Fixups relating to the LDI instruction.
186 namespace ldi {
187 
188 /// Adjusts a value to fix up the immediate of an `LDI Rd, K` instruction.
189 ///
190 /// Resolves to:
191 /// 0000 KKKK 0000 KKKK
192 /// Offset of 0 (so the result isn't left-shifted before application).
193 void fixup(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
194  MCContext *Ctx = nullptr) {
195  uint64_t upper = Value & 0xf0;
196  uint64_t lower = Value & 0x0f;
197 
198  Value = (upper << 4) | lower;
199 }
200 
201 void neg(uint64_t &Value) { Value *= -1; }
202 
203 void lo8(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
204  MCContext *Ctx = nullptr) {
205  Value &= 0xff;
206  ldi::fixup(Size, Fixup, Value, Ctx);
207 }
208 
209 void hi8(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
210  MCContext *Ctx = nullptr) {
211  Value = (Value & 0xff00) >> 8;
212  ldi::fixup(Size, Fixup, Value, Ctx);
213 }
214 
215 void hh8(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
216  MCContext *Ctx = nullptr) {
217  Value = (Value & 0xff0000) >> 16;
218  ldi::fixup(Size, Fixup, Value, Ctx);
219 }
220 
221 void ms8(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
222  MCContext *Ctx = nullptr) {
223  Value = (Value & 0xff000000) >> 24;
224  ldi::fixup(Size, Fixup, Value, Ctx);
225 }
226 
227 } // end of ldi namespace
228 } // end of adjust namespace
229 
230 namespace llvm {
231 
232 // Prepare value for the target space for it
234  const MCValue &Target,
235  uint64_t &Value,
236  MCContext *Ctx) const {
237  // The size of the fixup in bits.
238  uint64_t Size = AVRAsmBackend::getFixupKindInfo(Fixup.getKind()).TargetSize;
239 
240  unsigned Kind = Fixup.getKind();
241 
242  // Parsed LLVM-generated temporary labels are already
243  // adjusted for instruction size, but normal labels aren't.
244  //
245  // To handle both cases, we simply un-adjust the temporary label
246  // case so it acts like all other labels.
247  if (const MCSymbolRefExpr *A = Target.getSymA()) {
248  if (A->getSymbol().isTemporary())
249  Value += 2;
250  }
251 
252  switch (Kind) {
253  default:
254  llvm_unreachable("unhandled fixup");
255  case AVR::fixup_7_pcrel:
256  adjust::fixup_7_pcrel(Size, Fixup, Value, Ctx);
257  break;
258  case AVR::fixup_13_pcrel:
259  adjust::fixup_13_pcrel(Size, Fixup, Value, Ctx);
260  break;
261  case AVR::fixup_call:
262  adjust::fixup_call(Size, Fixup, Value, Ctx);
263  break;
264  case AVR::fixup_ldi:
265  adjust::ldi::fixup(Size, Fixup, Value, Ctx);
266  break;
267  case AVR::fixup_lo8_ldi:
269  if (Kind == AVR::fixup_lo8_ldi_pm) adjust::pm(Value);
270 
271  adjust::ldi::lo8(Size, Fixup, Value, Ctx);
272  break;
273  case AVR::fixup_hi8_ldi:
275  if (Kind == AVR::fixup_hi8_ldi_pm) adjust::pm(Value);
276 
277  adjust::ldi::hi8(Size, Fixup, Value, Ctx);
278  break;
279  case AVR::fixup_hh8_ldi:
281  if (Kind == AVR::fixup_hh8_ldi_pm) adjust::pm(Value);
282 
283  adjust::ldi::hh8(Size, Fixup, Value, Ctx);
284  break;
285  case AVR::fixup_ms8_ldi:
286  adjust::ldi::ms8(Size, Fixup, Value, Ctx);
287  break;
288 
291  if (Kind == AVR::fixup_lo8_ldi_pm_neg) adjust::pm(Value);
292 
293  adjust::ldi::neg(Value);
294  adjust::ldi::lo8(Size, Fixup, Value, Ctx);
295  break;
298  if (Kind == AVR::fixup_hi8_ldi_pm_neg) adjust::pm(Value);
299 
300  adjust::ldi::neg(Value);
301  adjust::ldi::hi8(Size, Fixup, Value, Ctx);
302  break;
305  if (Kind == AVR::fixup_hh8_ldi_pm_neg) adjust::pm(Value);
306 
307  adjust::ldi::neg(Value);
308  adjust::ldi::hh8(Size, Fixup, Value, Ctx);
309  break;
311  adjust::ldi::neg(Value);
312  adjust::ldi::ms8(Size, Fixup, Value, Ctx);
313  break;
314  case AVR::fixup_16:
315  adjust::unsigned_width(16, Value, std::string("port number"), Fixup, Ctx);
316 
317  Value &= 0xffff;
318  break;
319  case AVR::fixup_6_adiw:
320  adjust::fixup_6_adiw(Fixup, Value, Ctx);
321  break;
322 
323  case AVR::fixup_port5:
324  adjust::fixup_port5(Fixup, Value, Ctx);
325  break;
326 
327  case AVR::fixup_port6:
328  adjust::fixup_port6(Fixup, Value, Ctx);
329  break;
330 
331  // Fixups which do not require adjustments.
332  case FK_Data_2:
333  case FK_Data_4:
334  case FK_Data_8:
335  break;
336 
337  case FK_GPRel_4:
338  llvm_unreachable("don't know how to adjust this fixup");
339  break;
340  }
341 }
342 
343 std::unique_ptr<MCObjectWriter>
345  return createAVRELFObjectWriter(OS,
347 }
348 
350  const MCValue &Target, MutableArrayRef<char> Data,
351  uint64_t Value, bool IsPCRel) const {
352  adjustFixupValue(Fixup, Target, Value, &Asm.getContext());
353  if (Value == 0)
354  return; // Doesn't change encoding.
355 
356  MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
357 
358  // The number of bits in the fixup mask
359  auto NumBits = Info.TargetSize + Info.TargetOffset;
360  auto NumBytes = (NumBits / 8) + ((NumBits % 8) == 0 ? 0 : 1);
361 
362  // Shift the value into position.
363  Value <<= Info.TargetOffset;
364 
365  unsigned Offset = Fixup.getOffset();
366  assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
367 
368  // For each byte of the fragment that the fixup touches, mask in the
369  // bits from the fixup value.
370  for (unsigned i = 0; i < NumBytes; ++i) {
371  uint8_t mask = (((Value >> (i * 8)) & 0xff));
372  Data[Offset + i] |= mask;
373  }
374 }
375 
377  // NOTE: Many AVR fixups work on sets of non-contignous bits. We work around
378  // this by saying that the fixup is the size of the entire instruction.
379  const static MCFixupKindInfo Infos[AVR::NumTargetFixupKinds] = {
380  // This table *must* be in same the order of fixup_* kinds in
381  // AVRFixupKinds.h.
382  //
383  // name offset bits flags
384  {"fixup_32", 0, 32, 0},
385 
386  {"fixup_7_pcrel", 3, 7, MCFixupKindInfo::FKF_IsPCRel},
387  {"fixup_13_pcrel", 0, 12, MCFixupKindInfo::FKF_IsPCRel},
388 
389  {"fixup_16", 0, 16, 0},
390  {"fixup_16_pm", 0, 16, 0},
391 
392  {"fixup_ldi", 0, 8, 0},
393 
394  {"fixup_lo8_ldi", 0, 8, 0},
395  {"fixup_hi8_ldi", 0, 8, 0},
396  {"fixup_hh8_ldi", 0, 8, 0},
397  {"fixup_ms8_ldi", 0, 8, 0},
398 
399  {"fixup_lo8_ldi_neg", 0, 8, 0},
400  {"fixup_hi8_ldi_neg", 0, 8, 0},
401  {"fixup_hh8_ldi_neg", 0, 8, 0},
402  {"fixup_ms8_ldi_neg", 0, 8, 0},
403 
404  {"fixup_lo8_ldi_pm", 0, 8, 0},
405  {"fixup_hi8_ldi_pm", 0, 8, 0},
406  {"fixup_hh8_ldi_pm", 0, 8, 0},
407 
408  {"fixup_lo8_ldi_pm_neg", 0, 8, 0},
409  {"fixup_hi8_ldi_pm_neg", 0, 8, 0},
410  {"fixup_hh8_ldi_pm_neg", 0, 8, 0},
411 
412  {"fixup_call", 0, 22, 0},
413 
414  {"fixup_6", 0, 16, 0}, // non-contiguous
415  {"fixup_6_adiw", 0, 6, 0},
416 
417  {"fixup_lo8_ldi_gs", 0, 8, 0},
418  {"fixup_hi8_ldi_gs", 0, 8, 0},
419 
420  {"fixup_8", 0, 8, 0},
421  {"fixup_8_lo8", 0, 8, 0},
422  {"fixup_8_hi8", 0, 8, 0},
423  {"fixup_8_hlo8", 0, 8, 0},
424 
425  {"fixup_sym_diff", 0, 32, 0},
426  {"fixup_16_ldst", 0, 16, 0},
427 
428  {"fixup_lds_sts_16", 0, 16, 0},
429 
430  {"fixup_port6", 0, 16, 0}, // non-contiguous
431  {"fixup_port5", 3, 5, 0},
432  };
433 
434  if (Kind < FirstTargetFixupKind)
435  return MCAsmBackend::getFixupKindInfo(Kind);
436 
437  assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
438  "Invalid kind!");
439 
440  return Infos[Kind - FirstTargetFixupKind];
441 }
442 
443 bool AVRAsmBackend::writeNopData(uint64_t Count, MCObjectWriter *OW) const {
444  // If the count is not 2-byte aligned, we must be writing data into the text
445  // section (otherwise we have unaligned instructions, and thus have far
446  // bigger problems), so just write zeros instead.
447  assert((Count % 2) == 0 && "NOP instructions must be 2 bytes");
448 
449  OW->WriteZeros(Count);
450  return true;
451 }
452 
454  const MCFixup &Fixup,
455  const MCValue &Target) {
456  switch ((unsigned) Fixup.getKind()) {
457  default: return false;
458  // Fixups which should always be recorded as relocations.
459  case AVR::fixup_7_pcrel:
460  case AVR::fixup_13_pcrel:
461  case AVR::fixup_call:
462  return true;
463  }
464 }
465 
467  const Triple &TT, StringRef CPU,
468  const llvm::MCTargetOptions &TO) {
469  return new AVRAsmBackend(TT.getOS());
470 }
471 
472 } // end of namespace llvm
473 
void WriteZeros(unsigned N)
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...
Definition: AVRFixupKinds.h:70
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
This represents an "assembler immediate".
Definition: MCValue.h:40
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit progra...
Definition: AVRFixupKinds.h:80
OSType getOS() const
getOS - Get the parsed operating system type of this triple.
Definition: Triple.h:294
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 16-bi...
Definition: AVRFixupKinds.h:97
virtual const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const
Get information on a fixup kind.
void unsigned_width(unsigned Width, uint64_t Value, std::string Description, const MCFixup &Fixup, MCContext *Ctx=nullptr)
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target) override
Hook to check if a relocation is needed for some target specific reason.
Defines the object file and target independent interfaces used by the assembler backend to write nati...
void hh8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...
Definition: AVRFixupKinds.h:67
unsigned TargetOffset
The bit offset to write the relocation into.
Encode information on a single operation to perform on a byte sequence (e.g., an encoded instruction)...
Definition: MCFixup.h:66
Is this fixup kind PCrelative? This is used by the assembler backend to evaluate fixup values in a ta...
MCContext & getContext() const
Definition: MCAssembler.h:259
std::unique_ptr< MCObjectWriter > createAVRELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI)
Creates an ELF object writer for AVR.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated negat...
Definition: AVRFixupKinds.h:76
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a 16-bit value ...
Definition: AVRFixupKinds.h:54
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:165
A four-byte fixup.
Definition: MCFixup.h:26
void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Adjusts the value of a relative branch target before fixup application.
Context object for machine code objects.
Definition: MCContext.h:59
int64_t maxIntN(int64_t N)
Gets the maximum value for a N-bit signed integer.
Definition: MathExtras.h:376
A four-byte gp relative fixup.
Definition: MCFixup.h:34
void signed_width(unsigned Width, uint64_t Value, std::string Description, const MCFixup &Fixup, MCContext *Ctx=nullptr)
Utilities for manipulating generated AVR machine code.
Definition: AVRAsmBackend.h:32
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated negat...
Definition: AVRFixupKinds.h:73
int64_t minIntN(int64_t N)
Gets the minimum value for a N-bit signed integer.
Definition: MathExtras.h:369
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
A 16-bit address.
Definition: AVRFixupKinds.h:45
void fixup_port5(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
5-bit port number fixup on the SBIC family of instructions.
unsigned const MachineRegisterInfo * MRI
MutableArrayRef - Represent a mutable reference to an array (0 or more elements consecutively in memo...
Definition: ArrayRef.h:291
const MCFixupKindInfo & getFixupKindInfo(MCFixupKind Kind) const override
Get information on a fixup kind.
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:149
MCFixupKind
Extensible enumeration to represent the type of a fixup.
Definition: MCFixup.h:23
void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Adjusts the value of a branch target before fixup application.
void neg(uint64_t &Value)
const MCSymbolRefExpr * getSymA() const
Definition: MCValue.h:48
void fixup_7_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
7-bit PC-relative fixup.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit progra...
Definition: AVRFixupKinds.h:84
uint32_t getOffset() const
Definition: MCFixup.h:95
void pm(uint64_t &Value)
Adjusts a program memory address.
bool isIntN(unsigned N, int64_t x)
Checks if an signed integer fits into the given (dynamic) bit width.
Definition: MathExtras.h:390
void ms8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
void hi8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
SMLoc getLoc() const
Definition: MCFixup.h:112
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a negated 24-bi...
void fixup(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
Adjusts a value to fix up the immediate of an LDI Rd, K instruction.
void fixup_6_adiw(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
6-bit fixup for the immediate operand of the ADIW family of instructions.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 16-bit value ...
Definition: AVRFixupKinds.h:57
std::unique_ptr< MCObjectWriter > createObjectWriter(raw_pwrite_stream &OS) const override
Create a new MCObjectWriter instance for use by the assembler backend to emit the final object file...
void adjustBranchTarget(T &val)
Adjusts the value of a branch target.
bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override
Write an (optimal) nop sequence of Count bytes to the given output.
unsigned TargetSize
The number of bits written by this fixup.
Target - Wrapper for Target specific information.
void fixup_13_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
12-bit PC-relative fixup.
uint64_t maxUIntN(uint64_t N)
Gets the maximum value for a N-bit unsigned integer.
Definition: MathExtras.h:358
Replaces the immediate operand of a 16-bit Rd, K instruction with the lower 8 bits of a negated 16-bi...
Definition: AVRFixupKinds.h:93
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 32-bit value ...
Definition: AVRFixupKinds.h:63
A eight-byte fixup.
Definition: MCFixup.h:27
static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, MCContext &Ctx, const Triple &TheTriple, bool IsResolved)
Target independent information on a fixup kind.
const std::string to_string(const T &Value)
Definition: ScopedPrinter.h:62
An abstract base class for streams implementations that also support a pwrite operation.
Definition: raw_ostream.h:337
const unsigned Kind
void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
22-bit absolute fixup.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
LLVM Value Representation.
Definition: Value.h:73
Generic interface to target specific assembler backends.
Definition: MCAsmBackend.h:40
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
void adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, uint64_t &Value, MCContext *Ctx=nullptr) const
MCAsmBackend * createAVRAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, StringRef CPU, const llvm::MCTargetOptions &TO)
Creates an assembly backend for AVR.
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit progra...
Definition: AVRFixupKinds.h:88
void lo8(unsigned Size, const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
bool isUIntN(unsigned N, uint64_t x)
Checks if an unsigned integer fits into the given (dynamic) bit width.
Definition: MathExtras.h:385
Replaces the immediate operand of a 16-bit Rd, K instruction with the upper 8 bits of a 24-bit value ...
Definition: AVRFixupKinds.h:60
Replaces the 8-bit immediate with another value.
Definition: AVRFixupKinds.h:50
void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, const MCValue &Target, MutableArrayRef< char > Data, uint64_t Value, bool IsPCRel) const override
Apply the Value for given Fixup into the provided data fragment, at the offset specified by the fixup...
A two-byte fixup.
Definition: MCFixup.h:25
MCFixupKind getKind() const
Definition: MCFixup.h:93
void fixup_port6(const MCFixup &Fixup, uint64_t &Value, MCContext *Ctx=nullptr)
6-bit port number fixup on the IN family of instructions.