LLVM 19.0.0git
BasicTTIImpl.h
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1//===- BasicTTIImpl.h -------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file provides a helper that implements much of the TTI interface in
11/// terms of the target-independent code generator and TargetLowering
12/// interfaces.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_BASICTTIIMPL_H
17#define LLVM_CODEGEN_BASICTTIIMPL_H
18
19#include "llvm/ADT/APInt.h"
20#include "llvm/ADT/ArrayRef.h"
21#include "llvm/ADT/BitVector.h"
33#include "llvm/IR/BasicBlock.h"
34#include "llvm/IR/Constant.h"
35#include "llvm/IR/Constants.h"
36#include "llvm/IR/DataLayout.h"
38#include "llvm/IR/InstrTypes.h"
39#include "llvm/IR/Instruction.h"
41#include "llvm/IR/Intrinsics.h"
42#include "llvm/IR/Operator.h"
43#include "llvm/IR/Type.h"
44#include "llvm/IR/Value.h"
52#include <algorithm>
53#include <cassert>
54#include <cstdint>
55#include <limits>
56#include <optional>
57#include <utility>
58
59namespace llvm {
60
61class Function;
62class GlobalValue;
63class LLVMContext;
64class ScalarEvolution;
65class SCEV;
66class TargetMachine;
67
68extern cl::opt<unsigned> PartialUnrollingThreshold;
69
70/// Base class which can be used to help build a TTI implementation.
71///
72/// This class provides as much implementation of the TTI interface as is
73/// possible using the target independent parts of the code generator.
74///
75/// In order to subclass it, your class must implement a getST() method to
76/// return the subtarget, and a getTLI() method to return the target lowering.
77/// We need these methods implemented in the derived class so that this class
78/// doesn't have to duplicate storage for them.
79template <typename T>
81private:
84
85 /// Helper function to access this as a T.
86 T *thisT() { return static_cast<T *>(this); }
87
88 /// Estimate a cost of Broadcast as an extract and sequence of insert
89 /// operations.
90 InstructionCost getBroadcastShuffleOverhead(FixedVectorType *VTy,
93 // Broadcast cost is equal to the cost of extracting the zero'th element
94 // plus the cost of inserting it into every element of the result vector.
95 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
96 CostKind, 0, nullptr, nullptr);
97
98 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
99 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
100 CostKind, i, nullptr, nullptr);
101 }
102 return Cost;
103 }
104
105 /// Estimate a cost of shuffle as a sequence of extract and insert
106 /// operations.
107 InstructionCost getPermuteShuffleOverhead(FixedVectorType *VTy,
110 // Shuffle cost is equal to the cost of extracting element from its argument
111 // plus the cost of inserting them onto the result vector.
112
113 // e.g. <4 x float> has a mask of <0,5,2,7> i.e we need to extract from
114 // index 0 of first vector, index 1 of second vector,index 2 of first
115 // vector and finally index 3 of second vector and insert them at index
116 // <0,1,2,3> of result vector.
117 for (int i = 0, e = VTy->getNumElements(); i < e; ++i) {
118 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, VTy,
119 CostKind, i, nullptr, nullptr);
120 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
121 CostKind, i, nullptr, nullptr);
122 }
123 return Cost;
124 }
125
126 /// Estimate a cost of subvector extraction as a sequence of extract and
127 /// insert operations.
128 InstructionCost getExtractSubvectorOverhead(VectorType *VTy,
130 int Index,
131 FixedVectorType *SubVTy) {
132 assert(VTy && SubVTy &&
133 "Can only extract subvectors from vectors");
134 int NumSubElts = SubVTy->getNumElements();
135 assert((!isa<FixedVectorType>(VTy) ||
136 (Index + NumSubElts) <=
137 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
138 "SK_ExtractSubvector index out of range");
139
141 // Subvector extraction cost is equal to the cost of extracting element from
142 // the source type plus the cost of inserting them into the result vector
143 // type.
144 for (int i = 0; i != NumSubElts; ++i) {
145 Cost +=
146 thisT()->getVectorInstrCost(Instruction::ExtractElement, VTy,
147 CostKind, i + Index, nullptr, nullptr);
148 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, SubVTy,
149 CostKind, i, nullptr, nullptr);
150 }
151 return Cost;
152 }
153
154 /// Estimate a cost of subvector insertion as a sequence of extract and
155 /// insert operations.
156 InstructionCost getInsertSubvectorOverhead(VectorType *VTy,
158 int Index,
159 FixedVectorType *SubVTy) {
160 assert(VTy && SubVTy &&
161 "Can only insert subvectors into vectors");
162 int NumSubElts = SubVTy->getNumElements();
163 assert((!isa<FixedVectorType>(VTy) ||
164 (Index + NumSubElts) <=
165 (int)cast<FixedVectorType>(VTy)->getNumElements()) &&
166 "SK_InsertSubvector index out of range");
167
169 // Subvector insertion cost is equal to the cost of extracting element from
170 // the source type plus the cost of inserting them into the result vector
171 // type.
172 for (int i = 0; i != NumSubElts; ++i) {
173 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, SubVTy,
174 CostKind, i, nullptr, nullptr);
175 Cost +=
176 thisT()->getVectorInstrCost(Instruction::InsertElement, VTy, CostKind,
177 i + Index, nullptr, nullptr);
178 }
179 return Cost;
180 }
181
182 /// Local query method delegates up to T which *must* implement this!
183 const TargetSubtargetInfo *getST() const {
184 return static_cast<const T *>(this)->getST();
185 }
186
187 /// Local query method delegates up to T which *must* implement this!
188 const TargetLoweringBase *getTLI() const {
189 return static_cast<const T *>(this)->getTLI();
190 }
191
192 static ISD::MemIndexedMode getISDIndexedMode(TTI::MemIndexedMode M) {
193 switch (M) {
195 return ISD::UNINDEXED;
196 case TTI::MIM_PreInc:
197 return ISD::PRE_INC;
198 case TTI::MIM_PreDec:
199 return ISD::PRE_DEC;
200 case TTI::MIM_PostInc:
201 return ISD::POST_INC;
202 case TTI::MIM_PostDec:
203 return ISD::POST_DEC;
204 }
205 llvm_unreachable("Unexpected MemIndexedMode");
206 }
207
208 InstructionCost getCommonMaskedMemoryOpCost(unsigned Opcode, Type *DataTy,
209 Align Alignment,
210 bool VariableMask,
211 bool IsGatherScatter,
213 // We cannot scalarize scalable vectors, so return Invalid.
214 if (isa<ScalableVectorType>(DataTy))
216
217 auto *VT = cast<FixedVectorType>(DataTy);
218 // Assume the target does not have support for gather/scatter operations
219 // and provide a rough estimate.
220 //
221 // First, compute the cost of the individual memory operations.
222 InstructionCost AddrExtractCost =
223 IsGatherScatter
224 ? getVectorInstrCost(Instruction::ExtractElement,
226 PointerType::get(VT->getElementType(), 0),
227 VT->getNumElements()),
228 CostKind, -1, nullptr, nullptr)
229 : 0;
230 InstructionCost LoadCost =
231 VT->getNumElements() *
232 (AddrExtractCost +
233 getMemoryOpCost(Opcode, VT->getElementType(), Alignment, 0, CostKind));
234
235 // Next, compute the cost of packing the result in a vector.
236 InstructionCost PackingCost =
237 getScalarizationOverhead(VT, Opcode != Instruction::Store,
238 Opcode == Instruction::Store, CostKind);
239
240 InstructionCost ConditionalCost = 0;
241 if (VariableMask) {
242 // Compute the cost of conditionally executing the memory operations with
243 // variable masks. This includes extracting the individual conditions, a
244 // branches and PHIs to combine the results.
245 // NOTE: Estimating the cost of conditionally executing the memory
246 // operations accurately is quite difficult and the current solution
247 // provides a very rough estimate only.
248 ConditionalCost =
249 VT->getNumElements() *
251 Instruction::ExtractElement,
253 VT->getNumElements()),
254 CostKind, -1, nullptr, nullptr) +
255 getCFInstrCost(Instruction::Br, CostKind) +
256 getCFInstrCost(Instruction::PHI, CostKind));
257 }
258
259 return LoadCost + PackingCost + ConditionalCost;
260 }
261
262protected:
264 : BaseT(DL) {}
265 virtual ~BasicTTIImplBase() = default;
266
268
269public:
270 /// \name Scalar TTI Implementations
271 /// @{
273 unsigned AddressSpace, Align Alignment,
274 unsigned *Fast) const {
276 return getTLI()->allowsMisalignedMemoryAccesses(
278 }
279
280 bool hasBranchDivergence(const Function *F = nullptr) { return false; }
281
282 bool isSourceOfDivergence(const Value *V) { return false; }
283
284 bool isAlwaysUniform(const Value *V) { return false; }
285
286 bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const {
287 return false;
288 }
289
290 bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const {
291 return true;
292 }
293
295 // Return an invalid address space.
296 return -1;
297 }
298
300 Intrinsic::ID IID) const {
301 return false;
302 }
303
304 bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const {
305 return getTLI()->getTargetMachine().isNoopAddrSpaceCast(FromAS, ToAS);
306 }
307
308 unsigned getAssumedAddrSpace(const Value *V) const {
309 return getTLI()->getTargetMachine().getAssumedAddrSpace(V);
310 }
311
312 bool isSingleThreaded() const {
313 return getTLI()->getTargetMachine().Options.ThreadModel ==
315 }
316
317 std::pair<const Value *, unsigned>
319 return getTLI()->getTargetMachine().getPredicatedAddrSpace(V);
320 }
321
323 Value *NewV) const {
324 return nullptr;
325 }
326
327 bool isLegalAddImmediate(int64_t imm) {
328 return getTLI()->isLegalAddImmediate(imm);
329 }
330
331 bool isLegalAddScalableImmediate(int64_t Imm) {
332 return getTLI()->isLegalAddScalableImmediate(Imm);
333 }
334
335 bool isLegalICmpImmediate(int64_t imm) {
336 return getTLI()->isLegalICmpImmediate(imm);
337 }
338
339 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
340 bool HasBaseReg, int64_t Scale, unsigned AddrSpace,
341 Instruction *I = nullptr,
342 int64_t ScalableOffset = 0) {
344 AM.BaseGV = BaseGV;
345 AM.BaseOffs = BaseOffset;
346 AM.HasBaseReg = HasBaseReg;
347 AM.Scale = Scale;
348 AM.ScalableOffset = ScalableOffset;
349 return getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace, I);
350 }
351
352 int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) {
353 return getTLI()->getPreferredLargeGEPBaseOffset(MinOffset, MaxOffset);
354 }
355
356 unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
357 Type *ScalarValTy) const {
358 auto &&IsSupportedByTarget = [this, ScalarMemTy, ScalarValTy](unsigned VF) {
359 auto *SrcTy = FixedVectorType::get(ScalarMemTy, VF / 2);
360 EVT VT = getTLI()->getValueType(DL, SrcTy);
361 if (getTLI()->isOperationLegal(ISD::STORE, VT) ||
362 getTLI()->isOperationCustom(ISD::STORE, VT))
363 return true;
364
365 EVT ValVT =
366 getTLI()->getValueType(DL, FixedVectorType::get(ScalarValTy, VF / 2));
367 EVT LegalizedVT =
368 getTLI()->getTypeToTransformTo(ScalarMemTy->getContext(), VT);
369 return getTLI()->isTruncStoreLegal(LegalizedVT, ValVT);
370 };
371 while (VF > 2 && IsSupportedByTarget(VF))
372 VF /= 2;
373 return VF;
374 }
375
377 const DataLayout &DL) const {
378 EVT VT = getTLI()->getValueType(DL, Ty);
379 return getTLI()->isIndexedLoadLegal(getISDIndexedMode(M), VT);
380 }
381
383 const DataLayout &DL) const {
384 EVT VT = getTLI()->getValueType(DL, Ty);
385 return getTLI()->isIndexedStoreLegal(getISDIndexedMode(M), VT);
386 }
387
390 }
391
394 }
395
399 }
400
403 }
404
406 int64_t BaseOffset, bool HasBaseReg,
407 int64_t Scale, unsigned AddrSpace) {
409 AM.BaseGV = BaseGV;
410 AM.BaseOffs = BaseOffset;
411 AM.HasBaseReg = HasBaseReg;
412 AM.Scale = Scale;
413 if (getTLI()->isLegalAddressingMode(DL, AM, Ty, AddrSpace))
414 return 0;
415 return -1;
416 }
417
418 bool isTruncateFree(Type *Ty1, Type *Ty2) {
419 return getTLI()->isTruncateFree(Ty1, Ty2);
420 }
421
423 return getTLI()->isProfitableToHoist(I);
424 }
425
426 bool useAA() const { return getST()->useAA(); }
427
428 bool isTypeLegal(Type *Ty) {
429 EVT VT = getTLI()->getValueType(DL, Ty);
430 return getTLI()->isTypeLegal(VT);
431 }
432
433 unsigned getRegUsageForType(Type *Ty) {
434 EVT ETy = getTLI()->getValueType(DL, Ty);
435 return getTLI()->getNumRegisters(Ty->getContext(), ETy);
436 }
437
441 return BaseT::getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
442 }
443
445 unsigned &JumpTableSize,
447 BlockFrequencyInfo *BFI) {
448 /// Try to find the estimated number of clusters. Note that the number of
449 /// clusters identified in this function could be different from the actual
450 /// numbers found in lowering. This function ignore switches that are
451 /// lowered with a mix of jump table / bit test / BTree. This function was
452 /// initially intended to be used when estimating the cost of switch in
453 /// inline cost heuristic, but it's a generic cost model to be used in other
454 /// places (e.g., in loop unrolling).
455 unsigned N = SI.getNumCases();
456 const TargetLoweringBase *TLI = getTLI();
457 const DataLayout &DL = this->getDataLayout();
458
459 JumpTableSize = 0;
460 bool IsJTAllowed = TLI->areJTsAllowed(SI.getParent()->getParent());
461
462 // Early exit if both a jump table and bit test are not allowed.
463 if (N < 1 || (!IsJTAllowed && DL.getIndexSizeInBits(0u) < N))
464 return N;
465
466 APInt MaxCaseVal = SI.case_begin()->getCaseValue()->getValue();
467 APInt MinCaseVal = MaxCaseVal;
468 for (auto CI : SI.cases()) {
469 const APInt &CaseVal = CI.getCaseValue()->getValue();
470 if (CaseVal.sgt(MaxCaseVal))
471 MaxCaseVal = CaseVal;
472 if (CaseVal.slt(MinCaseVal))
473 MinCaseVal = CaseVal;
474 }
475
476 // Check if suitable for a bit test
477 if (N <= DL.getIndexSizeInBits(0u)) {
479 for (auto I : SI.cases())
480 Dests.insert(I.getCaseSuccessor());
481
482 if (TLI->isSuitableForBitTests(Dests.size(), N, MinCaseVal, MaxCaseVal,
483 DL))
484 return 1;
485 }
486
487 // Check if suitable for a jump table.
488 if (IsJTAllowed) {
489 if (N < 2 || N < TLI->getMinimumJumpTableEntries())
490 return N;
491 uint64_t Range =
492 (MaxCaseVal - MinCaseVal)
493 .getLimitedValue(std::numeric_limits<uint64_t>::max() - 1) + 1;
494 // Check whether a range of clusters is dense enough for a jump table
495 if (TLI->isSuitableForJumpTable(&SI, N, Range, PSI, BFI)) {
496 JumpTableSize = Range;
497 return 1;
498 }
499 }
500 return N;
501 }
502
504 const TargetLoweringBase *TLI = getTLI();
505 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
506 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
507 }
508
510 const TargetMachine &TM = getTLI()->getTargetMachine();
511 // If non-PIC mode, do not generate a relative lookup table.
512 if (!TM.isPositionIndependent())
513 return false;
514
515 /// Relative lookup table entries consist of 32-bit offsets.
516 /// Do not generate relative lookup tables for large code models
517 /// in 64-bit achitectures where 32-bit offsets might not be enough.
518 if (TM.getCodeModel() == CodeModel::Medium ||
519 TM.getCodeModel() == CodeModel::Large)
520 return false;
521
522 Triple TargetTriple = TM.getTargetTriple();
523 if (!TargetTriple.isArch64Bit())
524 return false;
525
526 // TODO: Triggers issues on aarch64 on darwin, so temporarily disable it
527 // there.
528 if (TargetTriple.getArch() == Triple::aarch64 && TargetTriple.isOSDarwin())
529 return false;
530
531 return true;
532 }
533
534 bool haveFastSqrt(Type *Ty) {
535 const TargetLoweringBase *TLI = getTLI();
536 EVT VT = TLI->getValueType(DL, Ty);
537 return TLI->isTypeLegal(VT) &&
539 }
540
542 return true;
543 }
544
546 // Check whether FADD is available, as a proxy for floating-point in
547 // general.
548 const TargetLoweringBase *TLI = getTLI();
549 EVT VT = TLI->getValueType(DL, Ty);
553 }
554
556 const Function &Fn) const {
557 switch (Inst.getOpcode()) {
558 default:
559 break;
560 case Instruction::SDiv:
561 case Instruction::SRem:
562 case Instruction::UDiv:
563 case Instruction::URem: {
564 if (!isa<ConstantInt>(Inst.getOperand(1)))
565 return false;
566 EVT VT = getTLI()->getValueType(DL, Inst.getType());
567 return !getTLI()->isIntDivCheap(VT, Fn.getAttributes());
568 }
569 };
570
571 return false;
572 }
573
574 unsigned getInliningThresholdMultiplier() const { return 1; }
575 unsigned adjustInliningThreshold(const CallBase *CB) { return 0; }
576 unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const {
577 return 0;
578 }
579
580 int getInlinerVectorBonusPercent() const { return 150; }
581
585 // This unrolling functionality is target independent, but to provide some
586 // motivation for its intended use, for x86:
587
588 // According to the Intel 64 and IA-32 Architectures Optimization Reference
589 // Manual, Intel Core models and later have a loop stream detector (and
590 // associated uop queue) that can benefit from partial unrolling.
591 // The relevant requirements are:
592 // - The loop must have no more than 4 (8 for Nehalem and later) branches
593 // taken, and none of them may be calls.
594 // - The loop can have no more than 18 (28 for Nehalem and later) uops.
595
596 // According to the Software Optimization Guide for AMD Family 15h
597 // Processors, models 30h-4fh (Steamroller and later) have a loop predictor
598 // and loop buffer which can benefit from partial unrolling.
599 // The relevant requirements are:
600 // - The loop must have fewer than 16 branches
601 // - The loop must have less than 40 uops in all executed loop branches
602
603 // The number of taken branches in a loop is hard to estimate here, and
604 // benchmarking has revealed that it is better not to be conservative when
605 // estimating the branch count. As a result, we'll ignore the branch limits
606 // until someone finds a case where it matters in practice.
607
608 unsigned MaxOps;
609 const TargetSubtargetInfo *ST = getST();
610 if (PartialUnrollingThreshold.getNumOccurrences() > 0)
612 else if (ST->getSchedModel().LoopMicroOpBufferSize > 0)
613 MaxOps = ST->getSchedModel().LoopMicroOpBufferSize;
614 else
615 return;
616
617 // Scan the loop: don't unroll loops with calls.
618 for (BasicBlock *BB : L->blocks()) {
619 for (Instruction &I : *BB) {
620 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
621 if (const Function *F = cast<CallBase>(I).getCalledFunction()) {
622 if (!thisT()->isLoweredToCall(F))
623 continue;
624 }
625
626 if (ORE) {
627 ORE->emit([&]() {
628 return OptimizationRemark("TTI", "DontUnroll", L->getStartLoc(),
629 L->getHeader())
630 << "advising against unrolling the loop because it "
631 "contains a "
632 << ore::NV("Call", &I);
633 });
634 }
635 return;
636 }
637 }
638 }
639
640 // Enable runtime and partial unrolling up to the specified size.
641 // Enable using trip count upper bound to unroll loops.
642 UP.Partial = UP.Runtime = UP.UpperBound = true;
643 UP.PartialThreshold = MaxOps;
644
645 // Avoid unrolling when optimizing for size.
646 UP.OptSizeThreshold = 0;
648
649 // Set number of instructions optimized when "back edge"
650 // becomes "fall through" to default value of 2.
651 UP.BEInsns = 2;
652 }
653
656 PP.PeelCount = 0;
657 PP.AllowPeeling = true;
658 PP.AllowLoopNestsPeeling = false;
659 PP.PeelProfiledIterations = true;
660 }
661
663 AssumptionCache &AC,
664 TargetLibraryInfo *LibInfo,
665 HardwareLoopInfo &HWLoopInfo) {
666 return BaseT::isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
667 }
668
671 }
672
674 getPreferredTailFoldingStyle(bool IVUpdateMayOverflow = true) {
675 return BaseT::getPreferredTailFoldingStyle(IVUpdateMayOverflow);
676 }
677
678 std::optional<Instruction *> instCombineIntrinsic(InstCombiner &IC,
679 IntrinsicInst &II) {
680 return BaseT::instCombineIntrinsic(IC, II);
681 }
682
683 std::optional<Value *>
685 APInt DemandedMask, KnownBits &Known,
686 bool &KnownBitsComputed) {
687 return BaseT::simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
688 KnownBitsComputed);
689 }
690
692 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
693 APInt &UndefElts2, APInt &UndefElts3,
694 std::function<void(Instruction *, unsigned, APInt, APInt &)>
695 SimplifyAndSetOp) {
697 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
698 SimplifyAndSetOp);
699 }
700
701 virtual std::optional<unsigned>
703 return std::optional<unsigned>(
704 getST()->getCacheSize(static_cast<unsigned>(Level)));
705 }
706
707 virtual std::optional<unsigned>
709 std::optional<unsigned> TargetResult =
710 getST()->getCacheAssociativity(static_cast<unsigned>(Level));
711
712 if (TargetResult)
713 return TargetResult;
714
715 return BaseT::getCacheAssociativity(Level);
716 }
717
718 virtual unsigned getCacheLineSize() const {
719 return getST()->getCacheLineSize();
720 }
721
722 virtual unsigned getPrefetchDistance() const {
723 return getST()->getPrefetchDistance();
724 }
725
726 virtual unsigned getMinPrefetchStride(unsigned NumMemAccesses,
727 unsigned NumStridedMemAccesses,
728 unsigned NumPrefetches,
729 bool HasCall) const {
730 return getST()->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
731 NumPrefetches, HasCall);
732 }
733
734 virtual unsigned getMaxPrefetchIterationsAhead() const {
735 return getST()->getMaxPrefetchIterationsAhead();
736 }
737
738 virtual bool enableWritePrefetching() const {
739 return getST()->enableWritePrefetching();
740 }
741
742 virtual bool shouldPrefetchAddressSpace(unsigned AS) const {
743 return getST()->shouldPrefetchAddressSpace(AS);
744 }
745
746 /// @}
747
748 /// \name Vector TTI Implementations
749 /// @{
750
752 return TypeSize::getFixed(32);
753 }
754
755 std::optional<unsigned> getMaxVScale() const { return std::nullopt; }
756 std::optional<unsigned> getVScaleForTuning() const { return std::nullopt; }
757 bool isVScaleKnownToBeAPowerOfTwo() const { return false; }
758
759 /// Estimate the overhead of scalarizing an instruction. Insert and Extract
760 /// are set if the demanded result elements need to be inserted and/or
761 /// extracted from vectors.
763 const APInt &DemandedElts,
764 bool Insert, bool Extract,
766 /// FIXME: a bitfield is not a reasonable abstraction for talking about
767 /// which elements are needed from a scalable vector
768 if (isa<ScalableVectorType>(InTy))
770 auto *Ty = cast<FixedVectorType>(InTy);
771
772 assert(DemandedElts.getBitWidth() == Ty->getNumElements() &&
773 "Vector size mismatch");
774
776
777 for (int i = 0, e = Ty->getNumElements(); i < e; ++i) {
778 if (!DemandedElts[i])
779 continue;
780 if (Insert)
781 Cost += thisT()->getVectorInstrCost(Instruction::InsertElement, Ty,
782 CostKind, i, nullptr, nullptr);
783 if (Extract)
784 Cost += thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
785 CostKind, i, nullptr, nullptr);
786 }
787
788 return Cost;
789 }
790
791 /// Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
793 bool Extract,
795 if (isa<ScalableVectorType>(InTy))
797 auto *Ty = cast<FixedVectorType>(InTy);
798
799 APInt DemandedElts = APInt::getAllOnes(Ty->getNumElements());
800 return thisT()->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
801 CostKind);
802 }
803
804 /// Estimate the overhead of scalarizing an instructions unique
805 /// non-constant operands. The (potentially vector) types to use for each of
806 /// argument are passes via Tys.
811 assert(Args.size() == Tys.size() && "Expected matching Args and Tys");
812
814 SmallPtrSet<const Value*, 4> UniqueOperands;
815 for (int I = 0, E = Args.size(); I != E; I++) {
816 // Disregard things like metadata arguments.
817 const Value *A = Args[I];
818 Type *Ty = Tys[I];
819 if (!Ty->isIntOrIntVectorTy() && !Ty->isFPOrFPVectorTy() &&
820 !Ty->isPtrOrPtrVectorTy())
821 continue;
822
823 if (!isa<Constant>(A) && UniqueOperands.insert(A).second) {
824 if (auto *VecTy = dyn_cast<VectorType>(Ty))
825 Cost += getScalarizationOverhead(VecTy, /*Insert*/ false,
826 /*Extract*/ true, CostKind);
827 }
828 }
829
830 return Cost;
831 }
832
833 /// Estimate the overhead of scalarizing the inputs and outputs of an
834 /// instruction, with return type RetTy and arguments Args of type Tys. If
835 /// Args are unknown (empty), then the cost associated with one argument is
836 /// added as a heuristic.
842 RetTy, /*Insert*/ true, /*Extract*/ false, CostKind);
843 if (!Args.empty())
845 else
846 // When no information on arguments is provided, we add the cost
847 // associated with one argument as a heuristic.
848 Cost += getScalarizationOverhead(RetTy, /*Insert*/ false,
849 /*Extract*/ true, CostKind);
850
851 return Cost;
852 }
853
854 /// Estimate the cost of type-legalization and the legalized type.
855 std::pair<InstructionCost, MVT> getTypeLegalizationCost(Type *Ty) const {
856 LLVMContext &C = Ty->getContext();
857 EVT MTy = getTLI()->getValueType(DL, Ty);
858
860 // We keep legalizing the type until we find a legal kind. We assume that
861 // the only operation that costs anything is the split. After splitting
862 // we need to handle two types.
863 while (true) {
865
867 // Ensure we return a sensible simple VT here, since many callers of
868 // this function require it.
869 MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
870 return std::make_pair(InstructionCost::getInvalid(), VT);
871 }
872
873 if (LK.first == TargetLoweringBase::TypeLegal)
874 return std::make_pair(Cost, MTy.getSimpleVT());
875
876 if (LK.first == TargetLoweringBase::TypeSplitVector ||
878 Cost *= 2;
879
880 // Do not loop with f128 type.
881 if (MTy == LK.second)
882 return std::make_pair(Cost, MTy.getSimpleVT());
883
884 // Keep legalizing the type.
885 MTy = LK.second;
886 }
887 }
888
889 unsigned getMaxInterleaveFactor(ElementCount VF) { return 1; }
890
892 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
895 ArrayRef<const Value *> Args = ArrayRef<const Value *>(),
896 const Instruction *CxtI = nullptr) {
897 // Check if any of the operands are vector operands.
898 const TargetLoweringBase *TLI = getTLI();
899 int ISD = TLI->InstructionOpcodeToISD(Opcode);
900 assert(ISD && "Invalid opcode");
901
902 // TODO: Handle more cost kinds.
904 return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind,
905 Opd1Info, Opd2Info,
906 Args, CxtI);
907
908 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Ty);
909
910 bool IsFloat = Ty->isFPOrFPVectorTy();
911 // Assume that floating point arithmetic operations cost twice as much as
912 // integer operations.
913 InstructionCost OpCost = (IsFloat ? 2 : 1);
914
915 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
916 // The operation is legal. Assume it costs 1.
917 // TODO: Once we have extract/insert subvector cost we need to use them.
918 return LT.first * OpCost;
919 }
920
921 if (!TLI->isOperationExpand(ISD, LT.second)) {
922 // If the operation is custom lowered, then assume that the code is twice
923 // as expensive.
924 return LT.first * 2 * OpCost;
925 }
926
927 // An 'Expand' of URem and SRem is special because it may default
928 // to expanding the operation into a sequence of sub-operations
929 // i.e. X % Y -> X-(X/Y)*Y.
930 if (ISD == ISD::UREM || ISD == ISD::SREM) {
931 bool IsSigned = ISD == ISD::SREM;
932 if (TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIVREM : ISD::UDIVREM,
933 LT.second) ||
934 TLI->isOperationLegalOrCustom(IsSigned ? ISD::SDIV : ISD::UDIV,
935 LT.second)) {
936 unsigned DivOpc = IsSigned ? Instruction::SDiv : Instruction::UDiv;
937 InstructionCost DivCost = thisT()->getArithmeticInstrCost(
938 DivOpc, Ty, CostKind, Opd1Info, Opd2Info);
939 InstructionCost MulCost =
940 thisT()->getArithmeticInstrCost(Instruction::Mul, Ty, CostKind);
941 InstructionCost SubCost =
942 thisT()->getArithmeticInstrCost(Instruction::Sub, Ty, CostKind);
943 return DivCost + MulCost + SubCost;
944 }
945 }
946
947 // We cannot scalarize scalable vectors, so return Invalid.
948 if (isa<ScalableVectorType>(Ty))
950
951 // Else, assume that we need to scalarize this op.
952 // TODO: If one of the types get legalized by splitting, handle this
953 // similarly to what getCastInstrCost() does.
954 if (auto *VTy = dyn_cast<FixedVectorType>(Ty)) {
955 InstructionCost Cost = thisT()->getArithmeticInstrCost(
956 Opcode, VTy->getScalarType(), CostKind, Opd1Info, Opd2Info,
957 Args, CxtI);
958 // Return the cost of multiple scalar invocation plus the cost of
959 // inserting and extracting the values.
960 SmallVector<Type *> Tys(Args.size(), Ty);
961 return getScalarizationOverhead(VTy, Args, Tys, CostKind) +
962 VTy->getNumElements() * Cost;
963 }
964
965 // We don't know anything about this scalar instruction.
966 return OpCost;
967 }
968
970 ArrayRef<int> Mask,
971 VectorType *Ty, int &Index,
972 VectorType *&SubTy) const {
973 if (Mask.empty())
974 return Kind;
975 int NumSrcElts = Ty->getElementCount().getKnownMinValue();
976 switch (Kind) {
978 if (ShuffleVectorInst::isReverseMask(Mask, NumSrcElts))
979 return TTI::SK_Reverse;
980 if (ShuffleVectorInst::isZeroEltSplatMask(Mask, NumSrcElts))
981 return TTI::SK_Broadcast;
982 if (ShuffleVectorInst::isExtractSubvectorMask(Mask, NumSrcElts, Index) &&
983 (Index + Mask.size()) <= (size_t)NumSrcElts) {
984 SubTy = FixedVectorType::get(Ty->getElementType(), Mask.size());
986 }
987 break;
989 int NumSubElts;
990 if (Mask.size() > 2 && ShuffleVectorInst::isInsertSubvectorMask(
991 Mask, NumSrcElts, NumSubElts, Index)) {
992 if (Index + NumSubElts > NumSrcElts)
993 return Kind;
994 SubTy = FixedVectorType::get(Ty->getElementType(), NumSubElts);
996 }
997 if (ShuffleVectorInst::isSelectMask(Mask, NumSrcElts))
998 return TTI::SK_Select;
999 if (ShuffleVectorInst::isTransposeMask(Mask, NumSrcElts))
1000 return TTI::SK_Transpose;
1001 if (ShuffleVectorInst::isSpliceMask(Mask, NumSrcElts, Index))
1002 return TTI::SK_Splice;
1003 break;
1004 }
1005 case TTI::SK_Select:
1006 case TTI::SK_Reverse:
1007 case TTI::SK_Broadcast:
1008 case TTI::SK_Transpose:
1011 case TTI::SK_Splice:
1012 break;
1013 }
1014 return Kind;
1015 }
1016
1018 ArrayRef<int> Mask,
1020 VectorType *SubTp,
1021 ArrayRef<const Value *> Args = std::nullopt) {
1022 switch (improveShuffleKindFromMask(Kind, Mask, Tp, Index, SubTp)) {
1023 case TTI::SK_Broadcast:
1024 if (auto *FVT = dyn_cast<FixedVectorType>(Tp))
1025 return getBroadcastShuffleOverhead(FVT, CostKind);
1027 case TTI::SK_Select:
1028 case TTI::SK_Splice:
1029 case TTI::SK_Reverse:
1030 case TTI::SK_Transpose:
1033 if (auto *FVT = dyn_cast<FixedVectorType>(Tp))
1034 return getPermuteShuffleOverhead(FVT, CostKind);
1037 return getExtractSubvectorOverhead(Tp, CostKind, Index,
1038 cast<FixedVectorType>(SubTp));
1040 return getInsertSubvectorOverhead(Tp, CostKind, Index,
1041 cast<FixedVectorType>(SubTp));
1042 }
1043 llvm_unreachable("Unknown TTI::ShuffleKind");
1044 }
1045
1046 InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1049 const Instruction *I = nullptr) {
1050 if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I) == 0)
1051 return 0;
1052
1053 const TargetLoweringBase *TLI = getTLI();
1054 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1055 assert(ISD && "Invalid opcode");
1056 std::pair<InstructionCost, MVT> SrcLT = getTypeLegalizationCost(Src);
1057 std::pair<InstructionCost, MVT> DstLT = getTypeLegalizationCost(Dst);
1058
1059 TypeSize SrcSize = SrcLT.second.getSizeInBits();
1060 TypeSize DstSize = DstLT.second.getSizeInBits();
1061 bool IntOrPtrSrc = Src->isIntegerTy() || Src->isPointerTy();
1062 bool IntOrPtrDst = Dst->isIntegerTy() || Dst->isPointerTy();
1063
1064 switch (Opcode) {
1065 default:
1066 break;
1067 case Instruction::Trunc:
1068 // Check for NOOP conversions.
1069 if (TLI->isTruncateFree(SrcLT.second, DstLT.second))
1070 return 0;
1071 [[fallthrough]];
1072 case Instruction::BitCast:
1073 // Bitcast between types that are legalized to the same type are free and
1074 // assume int to/from ptr of the same size is also free.
1075 if (SrcLT.first == DstLT.first && IntOrPtrSrc == IntOrPtrDst &&
1076 SrcSize == DstSize)
1077 return 0;
1078 break;
1079 case Instruction::FPExt:
1080 if (I && getTLI()->isExtFree(I))
1081 return 0;
1082 break;
1083 case Instruction::ZExt:
1084 if (TLI->isZExtFree(SrcLT.second, DstLT.second))
1085 return 0;
1086 [[fallthrough]];
1087 case Instruction::SExt:
1088 if (I && getTLI()->isExtFree(I))
1089 return 0;
1090
1091 // If this is a zext/sext of a load, return 0 if the corresponding
1092 // extending load exists on target and the result type is legal.
1093 if (CCH == TTI::CastContextHint::Normal) {
1094 EVT ExtVT = EVT::getEVT(Dst);
1095 EVT LoadVT = EVT::getEVT(Src);
1096 unsigned LType =
1097 ((Opcode == Instruction::ZExt) ? ISD::ZEXTLOAD : ISD::SEXTLOAD);
1098 if (DstLT.first == SrcLT.first &&
1099 TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
1100 return 0;
1101 }
1102 break;
1103 case Instruction::AddrSpaceCast:
1104 if (TLI->isFreeAddrSpaceCast(Src->getPointerAddressSpace(),
1105 Dst->getPointerAddressSpace()))
1106 return 0;
1107 break;
1108 }
1109
1110 auto *SrcVTy = dyn_cast<VectorType>(Src);
1111 auto *DstVTy = dyn_cast<VectorType>(Dst);
1112
1113 // If the cast is marked as legal (or promote) then assume low cost.
1114 if (SrcLT.first == DstLT.first &&
1115 TLI->isOperationLegalOrPromote(ISD, DstLT.second))
1116 return SrcLT.first;
1117
1118 // Handle scalar conversions.
1119 if (!SrcVTy && !DstVTy) {
1120 // Just check the op cost. If the operation is legal then assume it costs
1121 // 1.
1122 if (!TLI->isOperationExpand(ISD, DstLT.second))
1123 return 1;
1124
1125 // Assume that illegal scalar instruction are expensive.
1126 return 4;
1127 }
1128
1129 // Check vector-to-vector casts.
1130 if (DstVTy && SrcVTy) {
1131 // If the cast is between same-sized registers, then the check is simple.
1132 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {
1133
1134 // Assume that Zext is done using AND.
1135 if (Opcode == Instruction::ZExt)
1136 return SrcLT.first;
1137
1138 // Assume that sext is done using SHL and SRA.
1139 if (Opcode == Instruction::SExt)
1140 return SrcLT.first * 2;
1141
1142 // Just check the op cost. If the operation is legal then assume it
1143 // costs
1144 // 1 and multiply by the type-legalization overhead.
1145 if (!TLI->isOperationExpand(ISD, DstLT.second))
1146 return SrcLT.first * 1;
1147 }
1148
1149 // If we are legalizing by splitting, query the concrete TTI for the cost
1150 // of casting the original vector twice. We also need to factor in the
1151 // cost of the split itself. Count that as 1, to be consistent with
1152 // getTypeLegalizationCost().
1153 bool SplitSrc =
1154 TLI->getTypeAction(Src->getContext(), TLI->getValueType(DL, Src)) ==
1156 bool SplitDst =
1157 TLI->getTypeAction(Dst->getContext(), TLI->getValueType(DL, Dst)) ==
1159 if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isVector() &&
1160 DstVTy->getElementCount().isVector()) {
1161 Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
1162 Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
1163 T *TTI = static_cast<T *>(this);
1164 // If both types need to be split then the split is free.
1165 InstructionCost SplitCost =
1166 (!SplitSrc || !SplitDst) ? TTI->getVectorSplitCost() : 0;
1167 return SplitCost +
1168 (2 * TTI->getCastInstrCost(Opcode, SplitDstTy, SplitSrcTy, CCH,
1169 CostKind, I));
1170 }
1171
1172 // Scalarization cost is Invalid, can't assume any num elements.
1173 if (isa<ScalableVectorType>(DstVTy))
1175
1176 // In other cases where the source or destination are illegal, assume
1177 // the operation will get scalarized.
1178 unsigned Num = cast<FixedVectorType>(DstVTy)->getNumElements();
1179 InstructionCost Cost = thisT()->getCastInstrCost(
1180 Opcode, Dst->getScalarType(), Src->getScalarType(), CCH, CostKind, I);
1181
1182 // Return the cost of multiple scalar invocation plus the cost of
1183 // inserting and extracting the values.
1184 return getScalarizationOverhead(DstVTy, /*Insert*/ true, /*Extract*/ true,
1185 CostKind) +
1186 Num * Cost;
1187 }
1188
1189 // We already handled vector-to-vector and scalar-to-scalar conversions.
1190 // This
1191 // is where we handle bitcast between vectors and scalars. We need to assume
1192 // that the conversion is scalarized in one way or another.
1193 if (Opcode == Instruction::BitCast) {
1194 // Illegal bitcasts are done by storing and loading from a stack slot.
1195 return (SrcVTy ? getScalarizationOverhead(SrcVTy, /*Insert*/ false,
1196 /*Extract*/ true, CostKind)
1197 : 0) +
1198 (DstVTy ? getScalarizationOverhead(DstVTy, /*Insert*/ true,
1199 /*Extract*/ false, CostKind)
1200 : 0);
1201 }
1202
1203 llvm_unreachable("Unhandled cast");
1204 }
1205
1207 VectorType *VecTy, unsigned Index) {
1209 return thisT()->getVectorInstrCost(Instruction::ExtractElement, VecTy,
1210 CostKind, Index, nullptr, nullptr) +
1211 thisT()->getCastInstrCost(Opcode, Dst, VecTy->getElementType(),
1213 }
1214
1216 const Instruction *I = nullptr) {
1217 return BaseT::getCFInstrCost(Opcode, CostKind, I);
1218 }
1219
1220 InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
1221 CmpInst::Predicate VecPred,
1223 const Instruction *I = nullptr) {
1224 const TargetLoweringBase *TLI = getTLI();
1225 int ISD = TLI->InstructionOpcodeToISD(Opcode);
1226 assert(ISD && "Invalid opcode");
1227
1228 // TODO: Handle other cost kinds.
1230 return BaseT::getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind,
1231 I);
1232
1233 // Selects on vectors are actually vector selects.
1234 if (ISD == ISD::SELECT) {
1235 assert(CondTy && "CondTy must exist");
1236 if (CondTy->isVectorTy())
1237 ISD = ISD::VSELECT;
1238 }
1239 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(ValTy);
1240
1241 if (!(ValTy->isVectorTy() && !LT.second.isVector()) &&
1242 !TLI->isOperationExpand(ISD, LT.second)) {
1243 // The operation is legal. Assume it costs 1. Multiply
1244 // by the type-legalization overhead.
1245 return LT.first * 1;
1246 }
1247
1248 // Otherwise, assume that the cast is scalarized.
1249 // TODO: If one of the types get legalized by splitting, handle this
1250 // similarly to what getCastInstrCost() does.
1251 if (auto *ValVTy = dyn_cast<VectorType>(ValTy)) {
1252 if (isa<ScalableVectorType>(ValTy))
1254
1255 unsigned Num = cast<FixedVectorType>(ValVTy)->getNumElements();
1256 if (CondTy)
1257 CondTy = CondTy->getScalarType();
1258 InstructionCost Cost = thisT()->getCmpSelInstrCost(
1259 Opcode, ValVTy->getScalarType(), CondTy, VecPred, CostKind, I);
1260
1261 // Return the cost of multiple scalar invocation plus the cost of
1262 // inserting and extracting the values.
1263 return getScalarizationOverhead(ValVTy, /*Insert*/ true,
1264 /*Extract*/ false, CostKind) +
1265 Num * Cost;
1266 }
1267
1268 // Unknown scalar opcode.
1269 return 1;
1270 }
1271
1274 unsigned Index, Value *Op0, Value *Op1) {
1275 return getRegUsageForType(Val->getScalarType());
1276 }
1277
1280 unsigned Index) {
1281 Value *Op0 = nullptr;
1282 Value *Op1 = nullptr;
1283 if (auto *IE = dyn_cast<InsertElementInst>(&I)) {
1284 Op0 = IE->getOperand(0);
1285 Op1 = IE->getOperand(1);
1286 }
1287 return thisT()->getVectorInstrCost(I.getOpcode(), Val, CostKind, Index, Op0,
1288 Op1);
1289 }
1290
1291 InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor,
1292 int VF,
1293 const APInt &DemandedDstElts,
1295 assert(DemandedDstElts.getBitWidth() == (unsigned)VF * ReplicationFactor &&
1296 "Unexpected size of DemandedDstElts.");
1297
1299
1300 auto *SrcVT = FixedVectorType::get(EltTy, VF);
1301 auto *ReplicatedVT = FixedVectorType::get(EltTy, VF * ReplicationFactor);
1302
1303 // The Mask shuffling cost is extract all the elements of the Mask
1304 // and insert each of them Factor times into the wide vector:
1305 //
1306 // E.g. an interleaved group with factor 3:
1307 // %mask = icmp ult <8 x i32> %vec1, %vec2
1308 // %interleaved.mask = shufflevector <8 x i1> %mask, <8 x i1> undef,
1309 // <24 x i32> <0,0,0,1,1,1,2,2,2,3,3,3,4,4,4,5,5,5,6,6,6,7,7,7>
1310 // The cost is estimated as extract all mask elements from the <8xi1> mask
1311 // vector and insert them factor times into the <24xi1> shuffled mask
1312 // vector.
1313 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF);
1314 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts,
1315 /*Insert*/ false,
1316 /*Extract*/ true, CostKind);
1317 Cost += thisT()->getScalarizationOverhead(ReplicatedVT, DemandedDstElts,
1318 /*Insert*/ true,
1319 /*Extract*/ false, CostKind);
1320
1321 return Cost;
1322 }
1323
1325 getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
1328 const Instruction *I = nullptr) {
1329 assert(!Src->isVoidTy() && "Invalid type");
1330 // Assume types, such as structs, are expensive.
1331 if (getTLI()->getValueType(DL, Src, true) == MVT::Other)
1332 return 4;
1333 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Src);
1334
1335 // Assuming that all loads of legal types cost 1.
1336 InstructionCost Cost = LT.first;
1338 return Cost;
1339
1340 const DataLayout &DL = this->getDataLayout();
1341 if (Src->isVectorTy() &&
1342 // In practice it's not currently possible to have a change in lane
1343 // length for extending loads or truncating stores so both types should
1344 // have the same scalable property.
1346 LT.second.getSizeInBits())) {
1347 // This is a vector load that legalizes to a larger type than the vector
1348 // itself. Unless the corresponding extending load or truncating store is
1349 // legal, then this will scalarize.
1351 EVT MemVT = getTLI()->getValueType(DL, Src);
1352 if (Opcode == Instruction::Store)
1353 LA = getTLI()->getTruncStoreAction(LT.second, MemVT);
1354 else
1355 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, LT.second, MemVT);
1356
1357 if (LA != TargetLowering::Legal && LA != TargetLowering::Custom) {
1358 // This is a vector load/store for some illegal type that is scalarized.
1359 // We must account for the cost of building or decomposing the vector.
1361 cast<VectorType>(Src), Opcode != Instruction::Store,
1362 Opcode == Instruction::Store, CostKind);
1363 }
1364 }
1365
1366 return Cost;
1367 }
1368
1370 Align Alignment, unsigned AddressSpace,
1372 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, true, false,
1373 CostKind);
1374 }
1375
1377 const Value *Ptr, bool VariableMask,
1378 Align Alignment,
1380 const Instruction *I = nullptr) {
1381 return getCommonMaskedMemoryOpCost(Opcode, DataTy, Alignment, VariableMask,
1382 true, CostKind);
1383 }
1384
1386 const Value *Ptr, bool VariableMask,
1387 Align Alignment,
1389 const Instruction *I) {
1390 // For a target without strided memory operations (or for an illegal
1391 // operation type on one which does), assume we lower to a gather/scatter
1392 // operation. (Which may in turn be scalarized.)
1393 return thisT()->getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
1394 Alignment, CostKind, I);
1395 }
1396
1398 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1399 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1400 bool UseMaskForCond = false, bool UseMaskForGaps = false) {
1401
1402 // We cannot scalarize scalable vectors, so return Invalid.
1403 if (isa<ScalableVectorType>(VecTy))
1405
1406 auto *VT = cast<FixedVectorType>(VecTy);
1407
1408 unsigned NumElts = VT->getNumElements();
1409 assert(Factor > 1 && NumElts % Factor == 0 && "Invalid interleave factor");
1410
1411 unsigned NumSubElts = NumElts / Factor;
1412 auto *SubVT = FixedVectorType::get(VT->getElementType(), NumSubElts);
1413
1414 // Firstly, the cost of load/store operation.
1416 if (UseMaskForCond || UseMaskForGaps)
1417 Cost = thisT()->getMaskedMemoryOpCost(Opcode, VecTy, Alignment,
1419 else
1420 Cost = thisT()->getMemoryOpCost(Opcode, VecTy, Alignment, AddressSpace,
1421 CostKind);
1422
1423 // Legalize the vector type, and get the legalized and unlegalized type
1424 // sizes.
1425 MVT VecTyLT = getTypeLegalizationCost(VecTy).second;
1426 unsigned VecTySize = thisT()->getDataLayout().getTypeStoreSize(VecTy);
1427 unsigned VecTyLTSize = VecTyLT.getStoreSize();
1428
1429 // Scale the cost of the memory operation by the fraction of legalized
1430 // instructions that will actually be used. We shouldn't account for the
1431 // cost of dead instructions since they will be removed.
1432 //
1433 // E.g., An interleaved load of factor 8:
1434 // %vec = load <16 x i64>, <16 x i64>* %ptr
1435 // %v0 = shufflevector %vec, undef, <0, 8>
1436 //
1437 // If <16 x i64> is legalized to 8 v2i64 loads, only 2 of the loads will be
1438 // used (those corresponding to elements [0:1] and [8:9] of the unlegalized
1439 // type). The other loads are unused.
1440 //
1441 // TODO: Note that legalization can turn masked loads/stores into unmasked
1442 // (legalized) loads/stores. This can be reflected in the cost.
1443 if (Cost.isValid() && VecTySize > VecTyLTSize) {
1444 // The number of loads of a legal type it will take to represent a load
1445 // of the unlegalized vector type.
1446 unsigned NumLegalInsts = divideCeil(VecTySize, VecTyLTSize);
1447
1448 // The number of elements of the unlegalized type that correspond to a
1449 // single legal instruction.
1450 unsigned NumEltsPerLegalInst = divideCeil(NumElts, NumLegalInsts);
1451
1452 // Determine which legal instructions will be used.
1453 BitVector UsedInsts(NumLegalInsts, false);
1454 for (unsigned Index : Indices)
1455 for (unsigned Elt = 0; Elt < NumSubElts; ++Elt)
1456 UsedInsts.set((Index + Elt * Factor) / NumEltsPerLegalInst);
1457
1458 // Scale the cost of the load by the fraction of legal instructions that
1459 // will be used.
1460 Cost = divideCeil(UsedInsts.count() * *Cost.getValue(), NumLegalInsts);
1461 }
1462
1463 // Then plus the cost of interleave operation.
1464 assert(Indices.size() <= Factor &&
1465 "Interleaved memory op has too many members");
1466
1467 const APInt DemandedAllSubElts = APInt::getAllOnes(NumSubElts);
1468 const APInt DemandedAllResultElts = APInt::getAllOnes(NumElts);
1469
1470 APInt DemandedLoadStoreElts = APInt::getZero(NumElts);
1471 for (unsigned Index : Indices) {
1472 assert(Index < Factor && "Invalid index for interleaved memory op");
1473 for (unsigned Elm = 0; Elm < NumSubElts; Elm++)
1474 DemandedLoadStoreElts.setBit(Index + Elm * Factor);
1475 }
1476
1477 if (Opcode == Instruction::Load) {
1478 // The interleave cost is similar to extract sub vectors' elements
1479 // from the wide vector, and insert them into sub vectors.
1480 //
1481 // E.g. An interleaved load of factor 2 (with one member of index 0):
1482 // %vec = load <8 x i32>, <8 x i32>* %ptr
1483 // %v0 = shuffle %vec, undef, <0, 2, 4, 6> ; Index 0
1484 // The cost is estimated as extract elements at 0, 2, 4, 6 from the
1485 // <8 x i32> vector and insert them into a <4 x i32> vector.
1486 InstructionCost InsSubCost = thisT()->getScalarizationOverhead(
1487 SubVT, DemandedAllSubElts,
1488 /*Insert*/ true, /*Extract*/ false, CostKind);
1489 Cost += Indices.size() * InsSubCost;
1490 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1491 /*Insert*/ false,
1492 /*Extract*/ true, CostKind);
1493 } else {
1494 // The interleave cost is extract elements from sub vectors, and
1495 // insert them into the wide vector.
1496 //
1497 // E.g. An interleaved store of factor 3 with 2 members at indices 0,1:
1498 // (using VF=4):
1499 // %v0_v1 = shuffle %v0, %v1, <0,4,undef,1,5,undef,2,6,undef,3,7,undef>
1500 // %gaps.mask = <true, true, false, true, true, false,
1501 // true, true, false, true, true, false>
1502 // call llvm.masked.store <12 x i32> %v0_v1, <12 x i32>* %ptr,
1503 // i32 Align, <12 x i1> %gaps.mask
1504 // The cost is estimated as extract all elements (of actual members,
1505 // excluding gaps) from both <4 x i32> vectors and insert into the <12 x
1506 // i32> vector.
1507 InstructionCost ExtSubCost = thisT()->getScalarizationOverhead(
1508 SubVT, DemandedAllSubElts,
1509 /*Insert*/ false, /*Extract*/ true, CostKind);
1510 Cost += ExtSubCost * Indices.size();
1511 Cost += thisT()->getScalarizationOverhead(VT, DemandedLoadStoreElts,
1512 /*Insert*/ true,
1513 /*Extract*/ false, CostKind);
1514 }
1515
1516 if (!UseMaskForCond)
1517 return Cost;
1518
1519 Type *I8Type = Type::getInt8Ty(VT->getContext());
1520
1521 Cost += thisT()->getReplicationShuffleCost(
1522 I8Type, Factor, NumSubElts,
1523 UseMaskForGaps ? DemandedLoadStoreElts : DemandedAllResultElts,
1524 CostKind);
1525
1526 // The Gaps mask is invariant and created outside the loop, therefore the
1527 // cost of creating it is not accounted for here. However if we have both
1528 // a MaskForGaps and some other mask that guards the execution of the
1529 // memory access, we need to account for the cost of And-ing the two masks
1530 // inside the loop.
1531 if (UseMaskForGaps) {
1532 auto *MaskVT = FixedVectorType::get(I8Type, NumElts);
1533 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::And, MaskVT,
1534 CostKind);
1535 }
1536
1537 return Cost;
1538 }
1539
1540 /// Get intrinsic cost based on arguments.
1543 // Check for generically free intrinsics.
1545 return 0;
1546
1547 // Assume that target intrinsics are cheap.
1548 Intrinsic::ID IID = ICA.getID();
1551
1552 if (ICA.isTypeBasedOnly())
1554
1555 Type *RetTy = ICA.getReturnType();
1556
1557 ElementCount RetVF =
1558 (RetTy->isVectorTy() ? cast<VectorType>(RetTy)->getElementCount()
1560 const IntrinsicInst *I = ICA.getInst();
1561 const SmallVectorImpl<const Value *> &Args = ICA.getArgs();
1562 FastMathFlags FMF = ICA.getFlags();
1563 switch (IID) {
1564 default:
1565 break;
1566
1567 case Intrinsic::powi:
1568 if (auto *RHSC = dyn_cast<ConstantInt>(Args[1])) {
1569 bool ShouldOptForSize = I->getParent()->getParent()->hasOptSize();
1570 if (getTLI()->isBeneficialToExpandPowI(RHSC->getSExtValue(),
1571 ShouldOptForSize)) {
1572 // The cost is modeled on the expansion performed by ExpandPowI in
1573 // SelectionDAGBuilder.
1574 APInt Exponent = RHSC->getValue().abs();
1575 unsigned ActiveBits = Exponent.getActiveBits();
1576 unsigned PopCount = Exponent.popcount();
1577 InstructionCost Cost = (ActiveBits + PopCount - 2) *
1578 thisT()->getArithmeticInstrCost(
1579 Instruction::FMul, RetTy, CostKind);
1580 if (RHSC->isNegative())
1581 Cost += thisT()->getArithmeticInstrCost(Instruction::FDiv, RetTy,
1582 CostKind);
1583 return Cost;
1584 }
1585 }
1586 break;
1587 case Intrinsic::cttz:
1588 // FIXME: If necessary, this should go in target-specific overrides.
1589 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCttz(RetTy))
1591 break;
1592
1593 case Intrinsic::ctlz:
1594 // FIXME: If necessary, this should go in target-specific overrides.
1595 if (RetVF.isScalar() && getTLI()->isCheapToSpeculateCtlz(RetTy))
1597 break;
1598
1599 case Intrinsic::memcpy:
1600 return thisT()->getMemcpyCost(ICA.getInst());
1601
1602 case Intrinsic::masked_scatter: {
1603 const Value *Mask = Args[3];
1604 bool VarMask = !isa<Constant>(Mask);
1605 Align Alignment = cast<ConstantInt>(Args[2])->getAlignValue();
1606 return thisT()->getGatherScatterOpCost(Instruction::Store,
1607 ICA.getArgTypes()[0], Args[1],
1608 VarMask, Alignment, CostKind, I);
1609 }
1610 case Intrinsic::masked_gather: {
1611 const Value *Mask = Args[2];
1612 bool VarMask = !isa<Constant>(Mask);
1613 Align Alignment = cast<ConstantInt>(Args[1])->getAlignValue();
1614 return thisT()->getGatherScatterOpCost(Instruction::Load, RetTy, Args[0],
1615 VarMask, Alignment, CostKind, I);
1616 }
1617 case Intrinsic::experimental_vp_strided_store: {
1618 const Value *Data = Args[0];
1619 const Value *Ptr = Args[1];
1620 const Value *Mask = Args[3];
1621 const Value *EVL = Args[4];
1622 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
1623 Align Alignment = I->getParamAlign(1).valueOrOne();
1624 return thisT()->getStridedMemoryOpCost(Instruction::Store,
1625 Data->getType(), Ptr, VarMask,
1626 Alignment, CostKind, I);
1627 }
1628 case Intrinsic::experimental_vp_strided_load: {
1629 const Value *Ptr = Args[0];
1630 const Value *Mask = Args[2];
1631 const Value *EVL = Args[3];
1632 bool VarMask = !isa<Constant>(Mask) || !isa<Constant>(EVL);
1633 Align Alignment = I->getParamAlign(0).valueOrOne();
1634 return thisT()->getStridedMemoryOpCost(Instruction::Load, RetTy, Ptr,
1635 VarMask, Alignment, CostKind, I);
1636 }
1637 case Intrinsic::experimental_stepvector: {
1638 if (isa<ScalableVectorType>(RetTy))
1640 // The cost of materialising a constant integer vector.
1642 }
1643 case Intrinsic::vector_extract: {
1644 // FIXME: Handle case where a scalable vector is extracted from a scalable
1645 // vector
1646 if (isa<ScalableVectorType>(RetTy))
1648 unsigned Index = cast<ConstantInt>(Args[1])->getZExtValue();
1649 return thisT()->getShuffleCost(
1650 TTI::SK_ExtractSubvector, cast<VectorType>(Args[0]->getType()),
1651 std::nullopt, CostKind, Index, cast<VectorType>(RetTy));
1652 }
1653 case Intrinsic::vector_insert: {
1654 // FIXME: Handle case where a scalable vector is inserted into a scalable
1655 // vector
1656 if (isa<ScalableVectorType>(Args[1]->getType()))
1658 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
1659 return thisT()->getShuffleCost(
1660 TTI::SK_InsertSubvector, cast<VectorType>(Args[0]->getType()),
1661 std::nullopt, CostKind, Index, cast<VectorType>(Args[1]->getType()));
1662 }
1663 case Intrinsic::experimental_vector_reverse: {
1664 return thisT()->getShuffleCost(
1665 TTI::SK_Reverse, cast<VectorType>(Args[0]->getType()), std::nullopt,
1666 CostKind, 0, cast<VectorType>(RetTy));
1667 }
1668 case Intrinsic::experimental_vector_splice: {
1669 unsigned Index = cast<ConstantInt>(Args[2])->getZExtValue();
1670 return thisT()->getShuffleCost(
1671 TTI::SK_Splice, cast<VectorType>(Args[0]->getType()), std::nullopt,
1672 CostKind, Index, cast<VectorType>(RetTy));
1673 }
1674 case Intrinsic::vector_reduce_add:
1675 case Intrinsic::vector_reduce_mul:
1676 case Intrinsic::vector_reduce_and:
1677 case Intrinsic::vector_reduce_or:
1678 case Intrinsic::vector_reduce_xor:
1679 case Intrinsic::vector_reduce_smax:
1680 case Intrinsic::vector_reduce_smin:
1681 case Intrinsic::vector_reduce_fmax:
1682 case Intrinsic::vector_reduce_fmin:
1683 case Intrinsic::vector_reduce_fmaximum:
1684 case Intrinsic::vector_reduce_fminimum:
1685 case Intrinsic::vector_reduce_umax:
1686 case Intrinsic::vector_reduce_umin: {
1687 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
1689 }
1690 case Intrinsic::vector_reduce_fadd:
1691 case Intrinsic::vector_reduce_fmul: {
1693 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
1695 }
1696 case Intrinsic::fshl:
1697 case Intrinsic::fshr: {
1698 const Value *X = Args[0];
1699 const Value *Y = Args[1];
1700 const Value *Z = Args[2];
1703 const TTI::OperandValueInfo OpInfoZ = TTI::getOperandInfo(Z);
1704 const TTI::OperandValueInfo OpInfoBW =
1706 isPowerOf2_32(RetTy->getScalarSizeInBits()) ? TTI::OP_PowerOf2
1707 : TTI::OP_None};
1708
1709 // fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
1710 // fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
1712 Cost +=
1713 thisT()->getArithmeticInstrCost(BinaryOperator::Or, RetTy, CostKind);
1714 Cost +=
1715 thisT()->getArithmeticInstrCost(BinaryOperator::Sub, RetTy, CostKind);
1716 Cost += thisT()->getArithmeticInstrCost(
1717 BinaryOperator::Shl, RetTy, CostKind, OpInfoX,
1718 {OpInfoZ.Kind, TTI::OP_None});
1719 Cost += thisT()->getArithmeticInstrCost(
1720 BinaryOperator::LShr, RetTy, CostKind, OpInfoY,
1721 {OpInfoZ.Kind, TTI::OP_None});
1722 // Non-constant shift amounts requires a modulo.
1723 if (!OpInfoZ.isConstant())
1724 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::URem, RetTy,
1725 CostKind, OpInfoZ, OpInfoBW);
1726 // For non-rotates (X != Y) we must add shift-by-zero handling costs.
1727 if (X != Y) {
1728 Type *CondTy = RetTy->getWithNewBitWidth(1);
1729 Cost +=
1730 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
1732 Cost +=
1733 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
1735 }
1736 return Cost;
1737 }
1738 case Intrinsic::get_active_lane_mask: {
1739 EVT ResVT = getTLI()->getValueType(DL, RetTy, true);
1740 EVT ArgType = getTLI()->getValueType(DL, ICA.getArgTypes()[0], true);
1741
1742 // If we're not expanding the intrinsic then we assume this is cheap
1743 // to implement.
1744 if (!getTLI()->shouldExpandGetActiveLaneMask(ResVT, ArgType)) {
1745 return getTypeLegalizationCost(RetTy).first;
1746 }
1747
1748 // Create the expanded types that will be used to calculate the uadd_sat
1749 // operation.
1750 Type *ExpRetTy = VectorType::get(
1751 ICA.getArgTypes()[0], cast<VectorType>(RetTy)->getElementCount());
1752 IntrinsicCostAttributes Attrs(Intrinsic::uadd_sat, ExpRetTy, {}, FMF);
1754 thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
1755 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, ExpRetTy, RetTy,
1757 return Cost;
1758 }
1759 }
1760
1761 // VP Intrinsics should have the same cost as their non-vp counterpart.
1762 // TODO: Adjust the cost to make the vp intrinsic cheaper than its non-vp
1763 // counterpart when the vector length argument is smaller than the maximum
1764 // vector length.
1765 // TODO: Support other kinds of VPIntrinsics
1766 if (VPIntrinsic::isVPIntrinsic(ICA.getID())) {
1767 std::optional<unsigned> FOp =
1769 if (FOp) {
1770 if (ICA.getID() == Intrinsic::vp_load) {
1771 Align Alignment;
1772 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1773 Alignment = VPI->getPointerAlignment().valueOrOne();
1774 unsigned AS = 0;
1775 if (ICA.getArgs().size() > 1)
1776 if (auto *PtrTy =
1777 dyn_cast<PointerType>(ICA.getArgs()[0]->getType()))
1778 AS = PtrTy->getAddressSpace();
1779 return thisT()->getMemoryOpCost(*FOp, ICA.getReturnType(), Alignment,
1780 AS, CostKind);
1781 }
1782 if (ICA.getID() == Intrinsic::vp_store) {
1783 Align Alignment;
1784 if (auto *VPI = dyn_cast_or_null<VPIntrinsic>(ICA.getInst()))
1785 Alignment = VPI->getPointerAlignment().valueOrOne();
1786 unsigned AS = 0;
1787 if (ICA.getArgs().size() >= 2)
1788 if (auto *PtrTy =
1789 dyn_cast<PointerType>(ICA.getArgs()[1]->getType()))
1790 AS = PtrTy->getAddressSpace();
1791 return thisT()->getMemoryOpCost(*FOp, Args[0]->getType(), Alignment,
1792 AS, CostKind);
1793 }
1795 return thisT()->getArithmeticInstrCost(*FOp, ICA.getReturnType(),
1796 CostKind);
1797 }
1798 }
1799
1800 std::optional<Intrinsic::ID> FID =
1802 if (FID) {
1803 // Non-vp version will have same Args/Tys except mask and vector length.
1804 assert(ICA.getArgs().size() >= 2 && ICA.getArgTypes().size() >= 2 &&
1805 "Expected VPIntrinsic to have Mask and Vector Length args and "
1806 "types");
1808
1809 // VPReduction intrinsics have a start value argument that their non-vp
1810 // counterparts do not have, except for the fadd and fmul non-vp
1811 // counterpart.
1813 *FID != Intrinsic::vector_reduce_fadd &&
1814 *FID != Intrinsic::vector_reduce_fmul)
1815 NewTys = NewTys.drop_front();
1816
1817 IntrinsicCostAttributes NewICA(*FID, ICA.getReturnType(), NewTys,
1818 ICA.getFlags());
1819 return thisT()->getIntrinsicInstrCost(NewICA, CostKind);
1820 }
1821 }
1822
1823 // Assume that we need to scalarize this intrinsic.)
1824 // Compute the scalarization overhead based on Args for a vector
1825 // intrinsic.
1826 InstructionCost ScalarizationCost = InstructionCost::getInvalid();
1827 if (RetVF.isVector() && !RetVF.isScalable()) {
1828 ScalarizationCost = 0;
1829 if (!RetTy->isVoidTy())
1830 ScalarizationCost += getScalarizationOverhead(
1831 cast<VectorType>(RetTy),
1832 /*Insert*/ true, /*Extract*/ false, CostKind);
1833 ScalarizationCost +=
1835 }
1836
1837 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
1838 ScalarizationCost);
1839 return thisT()->getTypeBasedIntrinsicInstrCost(Attrs, CostKind);
1840 }
1841
1842 /// Get intrinsic cost based on argument types.
1843 /// If ScalarizationCostPassed is std::numeric_limits<unsigned>::max(), the
1844 /// cost of scalarizing the arguments and the return value will be computed
1845 /// based on types.
1849 Intrinsic::ID IID = ICA.getID();
1850 Type *RetTy = ICA.getReturnType();
1851 const SmallVectorImpl<Type *> &Tys = ICA.getArgTypes();
1852 FastMathFlags FMF = ICA.getFlags();
1853 InstructionCost ScalarizationCostPassed = ICA.getScalarizationCost();
1854 bool SkipScalarizationCost = ICA.skipScalarizationCost();
1855
1856 VectorType *VecOpTy = nullptr;
1857 if (!Tys.empty()) {
1858 // The vector reduction operand is operand 0 except for fadd/fmul.
1859 // Their operand 0 is a scalar start value, so the vector op is operand 1.
1860 unsigned VecTyIndex = 0;
1861 if (IID == Intrinsic::vector_reduce_fadd ||
1862 IID == Intrinsic::vector_reduce_fmul)
1863 VecTyIndex = 1;
1864 assert(Tys.size() > VecTyIndex && "Unexpected IntrinsicCostAttributes");
1865 VecOpTy = dyn_cast<VectorType>(Tys[VecTyIndex]);
1866 }
1867
1868 // Library call cost - other than size, make it expensive.
1869 unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
1870 unsigned ISD = 0;
1871 switch (IID) {
1872 default: {
1873 // Scalable vectors cannot be scalarized, so return Invalid.
1874 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
1875 return isa<ScalableVectorType>(Ty);
1876 }))
1878
1879 // Assume that we need to scalarize this intrinsic.
1880 InstructionCost ScalarizationCost =
1881 SkipScalarizationCost ? ScalarizationCostPassed : 0;
1882 unsigned ScalarCalls = 1;
1883 Type *ScalarRetTy = RetTy;
1884 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
1885 if (!SkipScalarizationCost)
1886 ScalarizationCost = getScalarizationOverhead(
1887 RetVTy, /*Insert*/ true, /*Extract*/ false, CostKind);
1888 ScalarCalls = std::max(ScalarCalls,
1889 cast<FixedVectorType>(RetVTy)->getNumElements());
1890 ScalarRetTy = RetTy->getScalarType();
1891 }
1892 SmallVector<Type *, 4> ScalarTys;
1893 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
1894 Type *Ty = Tys[i];
1895 if (auto *VTy = dyn_cast<VectorType>(Ty)) {
1896 if (!SkipScalarizationCost)
1897 ScalarizationCost += getScalarizationOverhead(
1898 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
1899 ScalarCalls = std::max(ScalarCalls,
1900 cast<FixedVectorType>(VTy)->getNumElements());
1901 Ty = Ty->getScalarType();
1902 }
1903 ScalarTys.push_back(Ty);
1904 }
1905 if (ScalarCalls == 1)
1906 return 1; // Return cost of a scalar intrinsic. Assume it to be cheap.
1907
1908 IntrinsicCostAttributes ScalarAttrs(IID, ScalarRetTy, ScalarTys, FMF);
1909 InstructionCost ScalarCost =
1910 thisT()->getIntrinsicInstrCost(ScalarAttrs, CostKind);
1911
1912 return ScalarCalls * ScalarCost + ScalarizationCost;
1913 }
1914 // Look for intrinsics that can be lowered directly or turned into a scalar
1915 // intrinsic call.
1916 case Intrinsic::sqrt:
1917 ISD = ISD::FSQRT;
1918 break;
1919 case Intrinsic::sin:
1920 ISD = ISD::FSIN;
1921 break;
1922 case Intrinsic::cos:
1923 ISD = ISD::FCOS;
1924 break;
1925 case Intrinsic::exp:
1926 ISD = ISD::FEXP;
1927 break;
1928 case Intrinsic::exp2:
1929 ISD = ISD::FEXP2;
1930 break;
1931 case Intrinsic::exp10:
1932 ISD = ISD::FEXP10;
1933 break;
1934 case Intrinsic::log:
1935 ISD = ISD::FLOG;
1936 break;
1937 case Intrinsic::log10:
1938 ISD = ISD::FLOG10;
1939 break;
1940 case Intrinsic::log2:
1941 ISD = ISD::FLOG2;
1942 break;
1943 case Intrinsic::fabs:
1944 ISD = ISD::FABS;
1945 break;
1946 case Intrinsic::canonicalize:
1947 ISD = ISD::FCANONICALIZE;
1948 break;
1949 case Intrinsic::minnum:
1950 ISD = ISD::FMINNUM;
1951 break;
1952 case Intrinsic::maxnum:
1953 ISD = ISD::FMAXNUM;
1954 break;
1955 case Intrinsic::minimum:
1956 ISD = ISD::FMINIMUM;
1957 break;
1958 case Intrinsic::maximum:
1959 ISD = ISD::FMAXIMUM;
1960 break;
1961 case Intrinsic::copysign:
1962 ISD = ISD::FCOPYSIGN;
1963 break;
1964 case Intrinsic::floor:
1965 ISD = ISD::FFLOOR;
1966 break;
1967 case Intrinsic::ceil:
1968 ISD = ISD::FCEIL;
1969 break;
1970 case Intrinsic::trunc:
1971 ISD = ISD::FTRUNC;
1972 break;
1973 case Intrinsic::nearbyint:
1974 ISD = ISD::FNEARBYINT;
1975 break;
1976 case Intrinsic::rint:
1977 ISD = ISD::FRINT;
1978 break;
1979 case Intrinsic::lrint:
1980 ISD = ISD::LRINT;
1981 break;
1982 case Intrinsic::llrint:
1983 ISD = ISD::LLRINT;
1984 break;
1985 case Intrinsic::round:
1986 ISD = ISD::FROUND;
1987 break;
1988 case Intrinsic::roundeven:
1989 ISD = ISD::FROUNDEVEN;
1990 break;
1991 case Intrinsic::pow:
1992 ISD = ISD::FPOW;
1993 break;
1994 case Intrinsic::fma:
1995 ISD = ISD::FMA;
1996 break;
1997 case Intrinsic::fmuladd:
1998 ISD = ISD::FMA;
1999 break;
2000 case Intrinsic::experimental_constrained_fmuladd:
2001 ISD = ISD::STRICT_FMA;
2002 break;
2003 // FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
2004 case Intrinsic::lifetime_start:
2005 case Intrinsic::lifetime_end:
2006 case Intrinsic::sideeffect:
2007 case Intrinsic::pseudoprobe:
2008 case Intrinsic::arithmetic_fence:
2009 return 0;
2010 case Intrinsic::masked_store: {
2011 Type *Ty = Tys[0];
2012 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2013 return thisT()->getMaskedMemoryOpCost(Instruction::Store, Ty, TyAlign, 0,
2014 CostKind);
2015 }
2016 case Intrinsic::masked_load: {
2017 Type *Ty = RetTy;
2018 Align TyAlign = thisT()->DL.getABITypeAlign(Ty);
2019 return thisT()->getMaskedMemoryOpCost(Instruction::Load, Ty, TyAlign, 0,
2020 CostKind);
2021 }
2022 case Intrinsic::vector_reduce_add:
2023 case Intrinsic::vector_reduce_mul:
2024 case Intrinsic::vector_reduce_and:
2025 case Intrinsic::vector_reduce_or:
2026 case Intrinsic::vector_reduce_xor:
2027 return thisT()->getArithmeticReductionCost(
2028 getArithmeticReductionInstruction(IID), VecOpTy, std::nullopt,
2029 CostKind);
2030 case Intrinsic::vector_reduce_fadd:
2031 case Intrinsic::vector_reduce_fmul:
2032 return thisT()->getArithmeticReductionCost(
2033 getArithmeticReductionInstruction(IID), VecOpTy, FMF, CostKind);
2034 case Intrinsic::vector_reduce_smax:
2035 case Intrinsic::vector_reduce_smin:
2036 case Intrinsic::vector_reduce_umax:
2037 case Intrinsic::vector_reduce_umin:
2038 case Intrinsic::vector_reduce_fmax:
2039 case Intrinsic::vector_reduce_fmin:
2040 case Intrinsic::vector_reduce_fmaximum:
2041 case Intrinsic::vector_reduce_fminimum:
2042 return thisT()->getMinMaxReductionCost(getMinMaxReductionIntrinsicOp(IID),
2043 VecOpTy, ICA.getFlags(), CostKind);
2044 case Intrinsic::abs: {
2045 // abs(X) = select(icmp(X,0),X,sub(0,X))
2046 Type *CondTy = RetTy->getWithNewBitWidth(1);
2049 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2050 Pred, CostKind);
2051 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2052 Pred, CostKind);
2053 // TODO: Should we add an OperandValueProperties::OP_Zero property?
2054 Cost += thisT()->getArithmeticInstrCost(
2055 BinaryOperator::Sub, RetTy, CostKind, {TTI::OK_UniformConstantValue, TTI::OP_None});
2056 return Cost;
2057 }
2058 case Intrinsic::smax:
2059 case Intrinsic::smin:
2060 case Intrinsic::umax:
2061 case Intrinsic::umin: {
2062 // minmax(X,Y) = select(icmp(X,Y),X,Y)
2063 Type *CondTy = RetTy->getWithNewBitWidth(1);
2064 bool IsUnsigned = IID == Intrinsic::umax || IID == Intrinsic::umin;
2065 CmpInst::Predicate Pred =
2066 IsUnsigned ? CmpInst::ICMP_UGT : CmpInst::ICMP_SGT;
2068 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2069 Pred, CostKind);
2070 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2071 Pred, CostKind);
2072 return Cost;
2073 }
2074 case Intrinsic::sadd_sat:
2075 case Intrinsic::ssub_sat: {
2076 Type *CondTy = RetTy->getWithNewBitWidth(1);
2077
2078 Type *OpTy = StructType::create({RetTy, CondTy});
2079 Intrinsic::ID OverflowOp = IID == Intrinsic::sadd_sat
2080 ? Intrinsic::sadd_with_overflow
2081 : Intrinsic::ssub_with_overflow;
2083
2084 // SatMax -> Overflow && SumDiff < 0
2085 // SatMin -> Overflow && SumDiff >= 0
2087 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2088 nullptr, ScalarizationCostPassed);
2089 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2090 Cost += thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, RetTy, CondTy,
2091 Pred, CostKind);
2092 Cost += 2 * thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy,
2093 CondTy, Pred, CostKind);
2094 return Cost;
2095 }
2096 case Intrinsic::uadd_sat:
2097 case Intrinsic::usub_sat: {
2098 Type *CondTy = RetTy->getWithNewBitWidth(1);
2099
2100 Type *OpTy = StructType::create({RetTy, CondTy});
2101 Intrinsic::ID OverflowOp = IID == Intrinsic::uadd_sat
2102 ? Intrinsic::uadd_with_overflow
2103 : Intrinsic::usub_with_overflow;
2104
2106 IntrinsicCostAttributes Attrs(OverflowOp, OpTy, {RetTy, RetTy}, FMF,
2107 nullptr, ScalarizationCostPassed);
2108 Cost += thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2109 Cost +=
2110 thisT()->getCmpSelInstrCost(BinaryOperator::Select, RetTy, CondTy,
2112 return Cost;
2113 }
2114 case Intrinsic::smul_fix:
2115 case Intrinsic::umul_fix: {
2116 unsigned ExtSize = RetTy->getScalarSizeInBits() * 2;
2117 Type *ExtTy = RetTy->getWithNewBitWidth(ExtSize);
2118
2119 unsigned ExtOp =
2120 IID == Intrinsic::smul_fix ? Instruction::SExt : Instruction::ZExt;
2122
2124 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, RetTy, CCH, CostKind);
2125 Cost +=
2126 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2127 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, RetTy, ExtTy,
2128 CCH, CostKind);
2129 Cost += thisT()->getArithmeticInstrCost(Instruction::LShr, RetTy,
2130 CostKind,
2133 Cost += thisT()->getArithmeticInstrCost(Instruction::Shl, RetTy, CostKind,
2136 Cost += thisT()->getArithmeticInstrCost(Instruction::Or, RetTy, CostKind);
2137 return Cost;
2138 }
2139 case Intrinsic::sadd_with_overflow:
2140 case Intrinsic::ssub_with_overflow: {
2141 Type *SumTy = RetTy->getContainedType(0);
2142 Type *OverflowTy = RetTy->getContainedType(1);
2143 unsigned Opcode = IID == Intrinsic::sadd_with_overflow
2144 ? BinaryOperator::Add
2145 : BinaryOperator::Sub;
2146
2147 // Add:
2148 // Overflow -> (Result < LHS) ^ (RHS < 0)
2149 // Sub:
2150 // Overflow -> (Result < LHS) ^ (RHS > 0)
2152 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2153 Cost += 2 * thisT()->getCmpSelInstrCost(
2154 Instruction::ICmp, SumTy, OverflowTy,
2156 Cost += thisT()->getArithmeticInstrCost(BinaryOperator::Xor, OverflowTy,
2157 CostKind);
2158 return Cost;
2159 }
2160 case Intrinsic::uadd_with_overflow:
2161 case Intrinsic::usub_with_overflow: {
2162 Type *SumTy = RetTy->getContainedType(0);
2163 Type *OverflowTy = RetTy->getContainedType(1);
2164 unsigned Opcode = IID == Intrinsic::uadd_with_overflow
2165 ? BinaryOperator::Add
2166 : BinaryOperator::Sub;
2167 CmpInst::Predicate Pred = IID == Intrinsic::uadd_with_overflow
2170
2172 Cost += thisT()->getArithmeticInstrCost(Opcode, SumTy, CostKind);
2173 Cost +=
2174 thisT()->getCmpSelInstrCost(BinaryOperator::ICmp, SumTy, OverflowTy,
2175 Pred, CostKind);
2176 return Cost;
2177 }
2178 case Intrinsic::smul_with_overflow:
2179 case Intrinsic::umul_with_overflow: {
2180 Type *MulTy = RetTy->getContainedType(0);
2181 Type *OverflowTy = RetTy->getContainedType(1);
2182 unsigned ExtSize = MulTy->getScalarSizeInBits() * 2;
2183 Type *ExtTy = MulTy->getWithNewBitWidth(ExtSize);
2184 bool IsSigned = IID == Intrinsic::smul_with_overflow;
2185
2186 unsigned ExtOp = IsSigned ? Instruction::SExt : Instruction::ZExt;
2188
2190 Cost += 2 * thisT()->getCastInstrCost(ExtOp, ExtTy, MulTy, CCH, CostKind);
2191 Cost +=
2192 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2193 Cost += 2 * thisT()->getCastInstrCost(Instruction::Trunc, MulTy, ExtTy,
2194 CCH, CostKind);
2195 Cost += thisT()->getArithmeticInstrCost(Instruction::LShr, ExtTy,
2196 CostKind,
2199
2200 if (IsSigned)
2201 Cost += thisT()->getArithmeticInstrCost(Instruction::AShr, MulTy,
2202 CostKind,
2205
2206 Cost += thisT()->getCmpSelInstrCost(
2207 BinaryOperator::ICmp, MulTy, OverflowTy, CmpInst::ICMP_NE, CostKind);
2208 return Cost;
2209 }
2210 case Intrinsic::fptosi_sat:
2211 case Intrinsic::fptoui_sat: {
2212 if (Tys.empty())
2213 break;
2214 Type *FromTy = Tys[0];
2215 bool IsSigned = IID == Intrinsic::fptosi_sat;
2216
2218 IntrinsicCostAttributes Attrs1(Intrinsic::minnum, FromTy,
2219 {FromTy, FromTy});
2220 Cost += thisT()->getIntrinsicInstrCost(Attrs1, CostKind);
2221 IntrinsicCostAttributes Attrs2(Intrinsic::maxnum, FromTy,
2222 {FromTy, FromTy});
2223 Cost += thisT()->getIntrinsicInstrCost(Attrs2, CostKind);
2224 Cost += thisT()->getCastInstrCost(
2225 IsSigned ? Instruction::FPToSI : Instruction::FPToUI, RetTy, FromTy,
2227 if (IsSigned) {
2228 Type *CondTy = RetTy->getWithNewBitWidth(1);
2229 Cost += thisT()->getCmpSelInstrCost(
2230 BinaryOperator::FCmp, FromTy, CondTy, CmpInst::FCMP_UNO, CostKind);
2231 Cost += thisT()->getCmpSelInstrCost(
2232 BinaryOperator::Select, RetTy, CondTy, CmpInst::FCMP_UNO, CostKind);
2233 }
2234 return Cost;
2235 }
2236 case Intrinsic::ctpop:
2237 ISD = ISD::CTPOP;
2238 // In case of legalization use TCC_Expensive. This is cheaper than a
2239 // library call but still not a cheap instruction.
2240 SingleCallCost = TargetTransformInfo::TCC_Expensive;
2241 break;
2242 case Intrinsic::ctlz:
2243 ISD = ISD::CTLZ;
2244 break;
2245 case Intrinsic::cttz:
2246 ISD = ISD::CTTZ;
2247 break;
2248 case Intrinsic::bswap:
2249 ISD = ISD::BSWAP;
2250 break;
2251 case Intrinsic::bitreverse:
2252 ISD = ISD::BITREVERSE;
2253 break;
2254 }
2255
2256 const TargetLoweringBase *TLI = getTLI();
2257 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(RetTy);
2258
2259 if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2260 if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2261 TLI->isFAbsFree(LT.second)) {
2262 return 0;
2263 }
2264
2265 // The operation is legal. Assume it costs 1.
2266 // If the type is split to multiple registers, assume that there is some
2267 // overhead to this.
2268 // TODO: Once we have extract/insert subvector cost we need to use them.
2269 if (LT.first > 1)
2270 return (LT.first * 2);
2271 else
2272 return (LT.first * 1);
2273 } else if (!TLI->isOperationExpand(ISD, LT.second)) {
2274 // If the operation is custom lowered then assume
2275 // that the code is twice as expensive.
2276 return (LT.first * 2);
2277 }
2278
2279 // If we can't lower fmuladd into an FMA estimate the cost as a floating
2280 // point mul followed by an add.
2281 if (IID == Intrinsic::fmuladd)
2282 return thisT()->getArithmeticInstrCost(BinaryOperator::FMul, RetTy,
2283 CostKind) +
2284 thisT()->getArithmeticInstrCost(BinaryOperator::FAdd, RetTy,
2285 CostKind);
2286 if (IID == Intrinsic::experimental_constrained_fmuladd) {
2287 IntrinsicCostAttributes FMulAttrs(
2288 Intrinsic::experimental_constrained_fmul, RetTy, Tys);
2289 IntrinsicCostAttributes FAddAttrs(
2290 Intrinsic::experimental_constrained_fadd, RetTy, Tys);
2291 return thisT()->getIntrinsicInstrCost(FMulAttrs, CostKind) +
2292 thisT()->getIntrinsicInstrCost(FAddAttrs, CostKind);
2293 }
2294
2295 // Else, assume that we need to scalarize this intrinsic. For math builtins
2296 // this will emit a costly libcall, adding call overhead and spills. Make it
2297 // very expensive.
2298 if (auto *RetVTy = dyn_cast<VectorType>(RetTy)) {
2299 // Scalable vectors cannot be scalarized, so return Invalid.
2300 if (isa<ScalableVectorType>(RetTy) || any_of(Tys, [](const Type *Ty) {
2301 return isa<ScalableVectorType>(Ty);
2302 }))
2304
2305 InstructionCost ScalarizationCost =
2306 SkipScalarizationCost
2307 ? ScalarizationCostPassed
2308 : getScalarizationOverhead(RetVTy, /*Insert*/ true,
2309 /*Extract*/ false, CostKind);
2310
2311 unsigned ScalarCalls = cast<FixedVectorType>(RetVTy)->getNumElements();
2312 SmallVector<Type *, 4> ScalarTys;
2313 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
2314 Type *Ty = Tys[i];
2315 if (Ty->isVectorTy())
2316 Ty = Ty->getScalarType();
2317 ScalarTys.push_back(Ty);
2318 }
2319 IntrinsicCostAttributes Attrs(IID, RetTy->getScalarType(), ScalarTys, FMF);
2320 InstructionCost ScalarCost =
2321 thisT()->getIntrinsicInstrCost(Attrs, CostKind);
2322 for (unsigned i = 0, ie = Tys.size(); i != ie; ++i) {
2323 if (auto *VTy = dyn_cast<VectorType>(Tys[i])) {
2324 if (!ICA.skipScalarizationCost())
2325 ScalarizationCost += getScalarizationOverhead(
2326 VTy, /*Insert*/ false, /*Extract*/ true, CostKind);
2327 ScalarCalls = std::max(ScalarCalls,
2328 cast<FixedVectorType>(VTy)->getNumElements());
2329 }
2330 }
2331 return ScalarCalls * ScalarCost + ScalarizationCost;
2332 }
2333
2334 // This is going to be turned into a library call, make it expensive.
2335 return SingleCallCost;
2336 }
2337
2338 /// Compute a cost of the given call instruction.
2339 ///
2340 /// Compute the cost of calling function F with return type RetTy and
2341 /// argument types Tys. F might be nullptr, in this case the cost of an
2342 /// arbitrary call with the specified signature will be returned.
2343 /// This is used, for instance, when we estimate call of a vector
2344 /// counterpart of the given function.
2345 /// \param F Called function, might be nullptr.
2346 /// \param RetTy Return value types.
2347 /// \param Tys Argument types.
2348 /// \returns The cost of Call instruction.
2350 ArrayRef<Type *> Tys,
2352 return 10;
2353 }
2354
2355 unsigned getNumberOfParts(Type *Tp) {
2356 std::pair<InstructionCost, MVT> LT = getTypeLegalizationCost(Tp);
2357 return LT.first.isValid() ? *LT.first.getValue() : 0;
2358 }
2359
2361 const SCEV *) {
2362 return 0;
2363 }
2364
2365 /// Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
2366 /// We're assuming that reduction operation are performing the following way:
2367 ///
2368 /// %val1 = shufflevector<n x t> %val, <n x t> %undef,
2369 /// <n x i32> <i32 n/2, i32 n/2 + 1, ..., i32 n, i32 undef, ..., i32 undef>
2370 /// \----------------v-------------/ \----------v------------/
2371 /// n/2 elements n/2 elements
2372 /// %red1 = op <n x t> %val, <n x t> val1
2373 /// After this operation we have a vector %red1 where only the first n/2
2374 /// elements are meaningful, the second n/2 elements are undefined and can be
2375 /// dropped. All other operations are actually working with the vector of
2376 /// length n/2, not n, though the real vector length is still n.
2377 /// %val2 = shufflevector<n x t> %red1, <n x t> %undef,
2378 /// <n x i32> <i32 n/4, i32 n/4 + 1, ..., i32 n/2, i32 undef, ..., i32 undef>
2379 /// \----------------v-------------/ \----------v------------/
2380 /// n/4 elements 3*n/4 elements
2381 /// %red2 = op <n x t> %red1, <n x t> val2 - working with the vector of
2382 /// length n/2, the resulting vector has length n/4 etc.
2383 ///
2384 /// The cost model should take into account that the actual length of the
2385 /// vector is reduced on each iteration.
2388 // Targets must implement a default value for the scalable case, since
2389 // we don't know how many lanes the vector has.
2390 if (isa<ScalableVectorType>(Ty))
2392
2393 Type *ScalarTy = Ty->getElementType();
2394 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
2395 if ((Opcode == Instruction::Or || Opcode == Instruction::And) &&
2396 ScalarTy == IntegerType::getInt1Ty(Ty->getContext()) &&
2397 NumVecElts >= 2) {
2398 // Or reduction for i1 is represented as:
2399 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
2400 // %res = cmp ne iReduxWidth %val, 0
2401 // And reduction for i1 is represented as:
2402 // %val = bitcast <ReduxWidth x i1> to iReduxWidth
2403 // %res = cmp eq iReduxWidth %val, 11111
2404 Type *ValTy = IntegerType::get(Ty->getContext(), NumVecElts);
2405 return thisT()->getCastInstrCost(Instruction::BitCast, ValTy, Ty,
2407 thisT()->getCmpSelInstrCost(Instruction::ICmp, ValTy,
2410 }
2411 unsigned NumReduxLevels = Log2_32(NumVecElts);
2412 InstructionCost ArithCost = 0;
2413 InstructionCost ShuffleCost = 0;
2414 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
2415 unsigned LongVectorCount = 0;
2416 unsigned MVTLen =
2417 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
2418 while (NumVecElts > MVTLen) {
2419 NumVecElts /= 2;
2420 VectorType *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
2421 ShuffleCost +=
2422 thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
2423 CostKind, NumVecElts, SubTy);
2424 ArithCost += thisT()->getArithmeticInstrCost(Opcode, SubTy, CostKind);
2425 Ty = SubTy;
2426 ++LongVectorCount;
2427 }
2428
2429 NumReduxLevels -= LongVectorCount;
2430
2431 // The minimal length of the vector is limited by the real length of vector
2432 // operations performed on the current platform. That's why several final
2433 // reduction operations are performed on the vectors with the same
2434 // architecture-dependent length.
2435
2436 // By default reductions need one shuffle per reduction level.
2437 ShuffleCost +=
2438 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
2439 std::nullopt, CostKind, 0, Ty);
2440 ArithCost +=
2441 NumReduxLevels * thisT()->getArithmeticInstrCost(Opcode, Ty, CostKind);
2442 return ShuffleCost + ArithCost +
2443 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
2444 CostKind, 0, nullptr, nullptr);
2445 }
2446
2447 /// Try to calculate the cost of performing strict (in-order) reductions,
2448 /// which involves doing a sequence of floating point additions in lane
2449 /// order, starting with an initial value. For example, consider a scalar
2450 /// initial value 'InitVal' of type float and a vector of type <4 x float>:
2451 ///
2452 /// Vector = <float %v0, float %v1, float %v2, float %v3>
2453 ///
2454 /// %add1 = %InitVal + %v0
2455 /// %add2 = %add1 + %v1
2456 /// %add3 = %add2 + %v2
2457 /// %add4 = %add3 + %v3
2458 ///
2459 /// As a simple estimate we can say the cost of such a reduction is 4 times
2460 /// the cost of a scalar FP addition. We can only estimate the costs for
2461 /// fixed-width vectors here because for scalable vectors we do not know the
2462 /// runtime number of operations.
2465 // Targets must implement a default value for the scalable case, since
2466 // we don't know how many lanes the vector has.
2467 if (isa<ScalableVectorType>(Ty))
2469
2470 auto *VTy = cast<FixedVectorType>(Ty);
2472 VTy, /*Insert=*/false, /*Extract=*/true, CostKind);
2473 InstructionCost ArithCost = thisT()->getArithmeticInstrCost(
2474 Opcode, VTy->getElementType(), CostKind);
2475 ArithCost *= VTy->getNumElements();
2476
2477 return ExtractCost + ArithCost;
2478 }
2479
2481 std::optional<FastMathFlags> FMF,
2483 assert(Ty && "Unknown reduction vector type");
2485 return getOrderedReductionCost(Opcode, Ty, CostKind);
2486 return getTreeReductionCost(Opcode, Ty, CostKind);
2487 }
2488
2489 /// Try to calculate op costs for min/max reduction operations.
2490 /// \param CondTy Conditional type for the Select instruction.
2492 FastMathFlags FMF,
2494 // Targets must implement a default value for the scalable case, since
2495 // we don't know how many lanes the vector has.
2496 if (isa<ScalableVectorType>(Ty))
2498
2499 Type *ScalarTy = Ty->getElementType();
2500 unsigned NumVecElts = cast<FixedVectorType>(Ty)->getNumElements();
2501 unsigned NumReduxLevels = Log2_32(NumVecElts);
2502 InstructionCost MinMaxCost = 0;
2503 InstructionCost ShuffleCost = 0;
2504 std::pair<InstructionCost, MVT> LT = thisT()->getTypeLegalizationCost(Ty);
2505 unsigned LongVectorCount = 0;
2506 unsigned MVTLen =
2507 LT.second.isVector() ? LT.second.getVectorNumElements() : 1;
2508 while (NumVecElts > MVTLen) {
2509 NumVecElts /= 2;
2510 auto *SubTy = FixedVectorType::get(ScalarTy, NumVecElts);
2511
2512 ShuffleCost +=
2513 thisT()->getShuffleCost(TTI::SK_ExtractSubvector, Ty, std::nullopt,
2514 CostKind, NumVecElts, SubTy);
2515
2516 IntrinsicCostAttributes Attrs(IID, SubTy, {SubTy, SubTy}, FMF);
2517 MinMaxCost += getIntrinsicInstrCost(Attrs, CostKind);
2518 Ty = SubTy;
2519 ++LongVectorCount;
2520 }
2521
2522 NumReduxLevels -= LongVectorCount;
2523
2524 // The minimal length of the vector is limited by the real length of vector
2525 // operations performed on the current platform. That's why several final
2526 // reduction opertions are perfomed on the vectors with the same
2527 // architecture-dependent length.
2528 ShuffleCost +=
2529 NumReduxLevels * thisT()->getShuffleCost(TTI::SK_PermuteSingleSrc, Ty,
2530 std::nullopt, CostKind, 0, Ty);
2531 IntrinsicCostAttributes Attrs(IID, Ty, {Ty, Ty}, FMF);
2532 MinMaxCost += NumReduxLevels * getIntrinsicInstrCost(Attrs, CostKind);
2533 // The last min/max should be in vector registers and we counted it above.
2534 // So just need a single extractelement.
2535 return ShuffleCost + MinMaxCost +
2536 thisT()->getVectorInstrCost(Instruction::ExtractElement, Ty,
2537 CostKind, 0, nullptr, nullptr);
2538 }
2539
2540 InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned,
2541 Type *ResTy, VectorType *Ty,
2542 FastMathFlags FMF,
2544 // Without any native support, this is equivalent to the cost of
2545 // vecreduce.opcode(ext(Ty A)).
2546 VectorType *ExtTy = VectorType::get(ResTy, Ty);
2547 InstructionCost RedCost =
2548 thisT()->getArithmeticReductionCost(Opcode, ExtTy, FMF, CostKind);
2549 InstructionCost ExtCost = thisT()->getCastInstrCost(
2550 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
2552
2553 return RedCost + ExtCost;
2554 }
2555
2557 VectorType *Ty,
2559 // Without any native support, this is equivalent to the cost of
2560 // vecreduce.add(mul(ext(Ty A), ext(Ty B))) or
2561 // vecreduce.add(mul(A, B)).
2562 VectorType *ExtTy = VectorType::get(ResTy, Ty);
2563 InstructionCost RedCost = thisT()->getArithmeticReductionCost(
2564 Instruction::Add, ExtTy, std::nullopt, CostKind);
2565 InstructionCost ExtCost = thisT()->getCastInstrCost(
2566 IsUnsigned ? Instruction::ZExt : Instruction::SExt, ExtTy, Ty,
2568
2569 InstructionCost MulCost =
2570 thisT()->getArithmeticInstrCost(Instruction::Mul, ExtTy, CostKind);
2571
2572 return RedCost + MulCost + 2 * ExtCost;
2573 }
2574
2576
2577 /// @}
2578};
2579
2580/// Concrete BasicTTIImpl that can be used if no further customization
2581/// is needed.
2582class BasicTTIImpl : public BasicTTIImplBase<BasicTTIImpl> {
2584
2585 friend class BasicTTIImplBase<BasicTTIImpl>;
2586
2587 const TargetSubtargetInfo *ST;
2588 const TargetLoweringBase *TLI;
2589
2590 const TargetSubtargetInfo *getST() const { return ST; }
2591 const TargetLoweringBase *getTLI() const { return TLI; }
2592
2593public:
2594 explicit BasicTTIImpl(const TargetMachine *TM, const Function &F);
2595};
2596
2597} // end namespace llvm
2598
2599#endif // LLVM_CODEGEN_BASICTTIIMPL_H
This file implements a class to represent arbitrary precision integral constant values and operations...
This file implements the BitVector class.
static GCRegistry::Add< ErlangGC > A("erlang", "erlang-compatible garbage collector")
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This file contains the declarations for the subclasses of Constant, which represent the different fla...
static cl::opt< TargetTransformInfo::TargetCostKind > CostKind("cost-kind", cl::desc("Target cost kind"), cl::init(TargetTransformInfo::TCK_RecipThroughput), cl::values(clEnumValN(TargetTransformInfo::TCK_RecipThroughput, "throughput", "Reciprocal throughput"), clEnumValN(TargetTransformInfo::TCK_Latency, "latency", "Instruction latency"), clEnumValN(TargetTransformInfo::TCK_CodeSize, "code-size", "Code size"), clEnumValN(TargetTransformInfo::TCK_SizeAndLatency, "size-latency", "Code size and latency")))
return RetTy
static GCMetadataPrinterRegistry::Add< ErlangGCPrinter > X("erlang", "erlang-compatible garbage collector")
#define F(x, y, z)
Definition: MD5.cpp:55
#define I(x, y, z)
Definition: MD5.cpp:58
mir Rename Register Operands
static const Function * getCalledFunction(const Value *V, bool &IsNoBuiltin)
LLVMContext & Context
static GCMetadataPrinterRegistry::Add< OcamlGCMetadataPrinter > Y("ocaml", "ocaml 3.10-compatible collector")
const char LLVMTargetMachineRef TM
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file defines the SmallPtrSet class.
This file defines the SmallVector class.
static SymbolRef::Type getType(const Symbol *Sym)
Definition: TapiFile.cpp:40
This file describes how to lower LLVM code to machine code.
This file provides helpers for the implementation of a TargetTransformInfo-conforming class.
This pass exposes codegen information to IR-level passes.
Class for arbitrary precision integers.
Definition: APInt.h:76
static APInt getAllOnes(unsigned numBits)
Return an APInt of a specified width with all bits set.
Definition: APInt.h:212
void setBit(unsigned BitPosition)
Set the given bit to 1 whose position is given as "bitPosition".
Definition: APInt.h:1308
bool sgt(const APInt &RHS) const
Signed greater than comparison.
Definition: APInt.h:1179
unsigned getBitWidth() const
Return the number of bits in the APInt.
Definition: APInt.h:1439
bool slt(const APInt &RHS) const
Signed less than comparison.
Definition: APInt.h:1108
static APInt getZero(unsigned numBits)
Get the '0' value for the specified bit-width.
Definition: APInt.h:178
an instruction to allocate memory on the stack
Definition: Instructions.h:59
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory),...
Definition: ArrayRef.h:41
ArrayRef< T > drop_front(size_t N=1) const
Drop the first N elements of the array.
Definition: ArrayRef.h:204
size_t size() const
size - Get the array size.
Definition: ArrayRef.h:165
ArrayRef< T > drop_back(size_t N=1) const
Drop the last N elements of the array.
Definition: ArrayRef.h:210
A cache of @llvm.assume calls within a function.
LLVM Basic Block Representation.
Definition: BasicBlock.h:60
Base class which can be used to help build a TTI implementation.
Definition: BasicTTIImpl.h:80
bool isTypeLegal(Type *Ty)
Definition: BasicTTIImpl.h:428
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
Get intrinsic cost based on arguments.
bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
Definition: BasicTTIImpl.h:286
virtual unsigned getPrefetchDistance() const
Definition: BasicTTIImpl.h:722
InstructionCost getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef< unsigned > Indices, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, bool UseMaskForCond=false, bool UseMaskForGaps=false)
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
InstructionCost getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace)
Definition: BasicTTIImpl.h:405
void getUnrollingPreferences(Loop *L, ScalarEvolution &SE, TTI::UnrollingPreferences &UP, OptimizationRemarkEmitter *ORE)
Definition: BasicTTIImpl.h:582
bool preferToKeepConstantsAttached(const Instruction &Inst, const Function &Fn) const
Definition: BasicTTIImpl.h:555
unsigned getMaxInterleaveFactor(ElementCount VF)
Definition: BasicTTIImpl.h:889
unsigned getNumberOfParts(Type *Tp)
InstructionCost getMaskedMemoryOpCost(unsigned Opcode, Type *DataTy, Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind)
InstructionCost getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index)
TypeSize getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const
Definition: BasicTTIImpl.h:751
std::optional< unsigned > getVScaleForTuning() const
Definition: BasicTTIImpl.h:756
InstructionCost getOrderedReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind)
Try to calculate the cost of performing strict (in-order) reductions, which involves doing a sequence...
bool isTruncateFree(Type *Ty1, Type *Ty2)
Definition: BasicTTIImpl.h:418
InstructionCost getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index, Value *Op0, Value *Op1)
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo)
Definition: BasicTTIImpl.h:662
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info={TTI::OK_AnyValue, TTI::OP_None}, TTI::OperandValueInfo Opd2Info={TTI::OK_AnyValue, TTI::OP_None}, ArrayRef< const Value * > Args=ArrayRef< const Value * >(), const Instruction *CxtI=nullptr)
Definition: BasicTTIImpl.h:891
InstructionCost getTreeReductionCost(unsigned Opcode, VectorType *Ty, TTI::TargetCostKind CostKind)
Try to calculate arithmetic and shuffle op costs for reduction intrinsics.
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI)
Definition: BasicTTIImpl.h:669
virtual bool shouldPrefetchAddressSpace(unsigned AS) const
Definition: BasicTTIImpl.h:742
InstructionCost getStridedMemoryOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I)
bool isLegalICmpImmediate(int64_t imm)
Definition: BasicTTIImpl.h:335
bool isProfitableToHoist(Instruction *I)
Definition: BasicTTIImpl.h:422
virtual unsigned getMaxPrefetchIterationsAhead() const
Definition: BasicTTIImpl.h:734
InstructionCost getVectorInstrCost(const Instruction &I, Type *Val, TTI::TargetCostKind CostKind, unsigned Index)
std::optional< unsigned > getMaxVScale() const
Definition: BasicTTIImpl.h:755
TTI::ShuffleKind improveShuffleKindFromMask(TTI::ShuffleKind Kind, ArrayRef< int > Mask, VectorType *Ty, int &Index, VectorType *&SubTy) const
Definition: BasicTTIImpl.h:969
InstructionCost getExtendedReductionCost(unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind)
unsigned getRegUsageForType(Type *Ty)
Definition: BasicTTIImpl.h:433
bool shouldBuildRelLookupTables() const
Definition: BasicTTIImpl.h:509
InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF, TTI::TargetCostKind CostKind)
Try to calculate op costs for min/max reduction operations.
unsigned getCallerAllocaCost(const CallBase *CB, const AllocaInst *AI) const
Definition: BasicTTIImpl.h:576
InstructionCost getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo={TTI::OK_AnyValue, TTI::OP_None}, const Instruction *I=nullptr)
InstructionCost getShuffleCost(TTI::ShuffleKind Kind, VectorType *Tp, ArrayRef< int > Mask, TTI::TargetCostKind CostKind, int Index, VectorType *SubTp, ArrayRef< const Value * > Args=std::nullopt)
InstructionCost getGatherScatterOpCost(unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI, unsigned &JumpTableSize, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI)
Definition: BasicTTIImpl.h:444
bool isIndexedLoadLegal(TTI::MemIndexedMode M, Type *Ty, const DataLayout &DL) const
Definition: BasicTTIImpl.h:376
bool isLSRCostLess(TTI::LSRCost C1, TTI::LSRCost C2)
Definition: BasicTTIImpl.h:388
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed)
Definition: BasicTTIImpl.h:684
bool shouldFoldTerminatingConditionAfterLSR() const
Definition: BasicTTIImpl.h:396
virtual unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
Definition: BasicTTIImpl.h:726
bool hasBranchDivergence(const Function *F=nullptr)
Definition: BasicTTIImpl.h:280
bool isIndexedStoreLegal(TTI::MemIndexedMode M, Type *Ty, const DataLayout &DL) const
Definition: BasicTTIImpl.h:382
unsigned getAssumedAddrSpace(const Value *V) const
Definition: BasicTTIImpl.h:308
InstructionCost getOperandsScalarizationOverhead(ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind)
Estimate the overhead of scalarizing an instructions unique non-constant operands.
Definition: BasicTTIImpl.h:808
InstructionCost getAddressComputationCost(Type *Ty, ScalarEvolution *, const SCEV *)
InstructionCost getScalarizationOverhead(VectorType *InTy, const APInt &DemandedElts, bool Insert, bool Extract, TTI::TargetCostKind CostKind)
Estimate the overhead of scalarizing an instruction.
Definition: BasicTTIImpl.h:762
int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset)
Definition: BasicTTIImpl.h:352
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind)
Definition: BasicTTIImpl.h:438
bool isFCmpOrdCheaperThanFCmpZero(Type *Ty)
Definition: BasicTTIImpl.h:541
virtual std::optional< unsigned > getCacheSize(TargetTransformInfo::CacheLevel Level) const
Definition: BasicTTIImpl.h:702
bool isAlwaysUniform(const Value *V)
Definition: BasicTTIImpl.h:284
TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true)
Definition: BasicTTIImpl.h:674
bool allowsMisalignedMemoryAccesses(LLVMContext &Context, unsigned BitWidth, unsigned AddressSpace, Align Alignment, unsigned *Fast) const
Definition: BasicTTIImpl.h:272
unsigned getStoreMinimumVF(unsigned VF, Type *ScalarMemTy, Type *ScalarValTy) const
Definition: BasicTTIImpl.h:356
InstructionCost getScalarizationOverhead(VectorType *InTy, bool Insert, bool Extract, TTI::TargetCostKind CostKind)
Helper wrapper for the DemandedElts variant of getScalarizationOverhead.
Definition: BasicTTIImpl.h:792
virtual std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
Definition: BasicTTIImpl.h:708
virtual bool enableWritePrefetching() const
Definition: BasicTTIImpl.h:738
Value * rewriteIntrinsicWithAddressSpace(IntrinsicInst *II, Value *OldV, Value *NewV) const
Definition: BasicTTIImpl.h:322
void getPeelingPreferences(Loop *L, ScalarEvolution &SE, TTI::PeelingPreferences &PP)
Definition: BasicTTIImpl.h:654
InstructionCost getMulAccReductionCost(bool IsUnsigned, Type *ResTy, VectorType *Ty, TTI::TargetCostKind CostKind)
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
bool collectFlatAddressOperands(SmallVectorImpl< int > &OpIndexes, Intrinsic::ID IID) const
Definition: BasicTTIImpl.h:299
InstructionCost getCallInstrCost(Function *F, Type *RetTy, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind)
Compute a cost of the given call instruction.
InstructionCost getArithmeticReductionCost(unsigned Opcode, VectorType *Ty, std::optional< FastMathFlags > FMF, TTI::TargetCostKind CostKind)
InstructionCost getFPOpCost(Type *Ty)
Definition: BasicTTIImpl.h:545
InstructionCost getVectorSplitCost()
std::pair< InstructionCost, MVT > getTypeLegalizationCost(Type *Ty) const
Estimate the cost of type-legalization and the legalized type.
Definition: BasicTTIImpl.h:855
bool haveFastSqrt(Type *Ty)
Definition: BasicTTIImpl.h:534
std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const
Definition: BasicTTIImpl.h:318
unsigned getInliningThresholdMultiplier() const
Definition: BasicTTIImpl.h:574
InstructionCost getReplicationShuffleCost(Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, TTI::TargetCostKind CostKind)
virtual ~BasicTTIImplBase()=default
bool isLegalAddScalableImmediate(int64_t Imm)
Definition: BasicTTIImpl.h:331
InstructionCost getScalarizationOverhead(VectorType *RetTy, ArrayRef< const Value * > Args, ArrayRef< Type * > Tys, TTI::TargetCostKind CostKind)
Estimate the overhead of scalarizing the inputs and outputs of an instruction, with return type RetTy...
Definition: BasicTTIImpl.h:837
bool isVScaleKnownToBeAPowerOfTwo() const
Definition: BasicTTIImpl.h:757
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II)
Definition: BasicTTIImpl.h:678
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const
Definition: BasicTTIImpl.h:290
bool isLegalAddImmediate(int64_t imm)
Definition: BasicTTIImpl.h:327
unsigned getFlatAddressSpace()
Definition: BasicTTIImpl.h:294
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I=nullptr)
virtual unsigned getCacheLineSize() const
Definition: BasicTTIImpl.h:718
bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const
Definition: BasicTTIImpl.h:304
bool isSourceOfDivergence(const Value *V)
Definition: BasicTTIImpl.h:282
int getInlinerVectorBonusPercent() const
Definition: BasicTTIImpl.h:580
InstructionCost getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind)
Get intrinsic cost based on argument types.
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp)
Definition: BasicTTIImpl.h:691
bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale, unsigned AddrSpace, Instruction *I=nullptr, int64_t ScalableOffset=0)
Definition: BasicTTIImpl.h:339
bool isSingleThreaded() const
Definition: BasicTTIImpl.h:312
BasicTTIImplBase(const TargetMachine *TM, const DataLayout &DL)
Definition: BasicTTIImpl.h:263
unsigned adjustInliningThreshold(const CallBase *CB)
Definition: BasicTTIImpl.h:575
bool isProfitableLSRChainElement(Instruction *I)
Definition: BasicTTIImpl.h:401
Concrete BasicTTIImpl that can be used if no further customization is needed.
size_type count() const
count - Returns the number of bits which are set.
Definition: BitVector.h:162
BitVector & set()
Definition: BitVector.h:351
BlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate IR basic block frequen...
Base class for all callable instructions (InvokeInst and CallInst) Holds everything related to callin...
Definition: InstrTypes.h:1461
static Type * makeCmpResultType(Type *opnd_type)
Create a result type for fcmp/icmp.
Definition: InstrTypes.h:1329
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:960
@ ICMP_UGT
unsigned greater than
Definition: InstrTypes.h:983
@ ICMP_SGT
signed greater than
Definition: InstrTypes.h:987
@ ICMP_ULT
unsigned less than
Definition: InstrTypes.h:985
@ ICMP_EQ
equal
Definition: InstrTypes.h:981
@ ICMP_NE
not equal
Definition: InstrTypes.h:982
@ FCMP_UNO
1 0 0 0 True if unordered: isnan(X) | isnan(Y)
Definition: InstrTypes.h:970
A parsed version of the target data layout string in and methods for querying it.
Definition: DataLayout.h:110
TypeSize getTypeStoreSizeInBits(Type *Ty) const
Returns the maximum number of bits that may be overwritten by storing the specified type; always a mu...
Definition: DataLayout.h:484
unsigned getIndexSizeInBits(unsigned AS) const
Size in bits of index used for address calculation in getelementptr.
Definition: DataLayout.h:420
constexpr bool isVector() const
One or more elements.
Definition: TypeSize.h:311
static constexpr ElementCount getFixed(ScalarTy MinVal)
Definition: TypeSize.h:296
constexpr bool isScalar() const
Exactly one element.
Definition: TypeSize.h:307
Convenience struct for specifying and reasoning about fast-math flags.
Definition: FMF.h:20
Class to represent fixed width SIMD vectors.
Definition: DerivedTypes.h:539
unsigned getNumElements() const
Definition: DerivedTypes.h:582
static FixedVectorType * get(Type *ElementType, unsigned NumElts)
Definition: Type.cpp:692
bool isTargetIntrinsic() const
isTargetIntrinsic - Returns true if this function is an intrinsic and the intrinsic is specific to a ...
Definition: Function.cpp:885
AttributeList getAttributes() const
Return the attribute list for this Function.
Definition: Function.h:338
The core instruction combiner logic.
Definition: InstCombiner.h:47
static InstructionCost getInvalid(CostType Val=0)
std::optional< CostType > getValue() const
This function is intended to be used as sparingly as possible, since the class provides the full rang...
unsigned getOpcode() const
Returns a member of one of the enums like Instruction::Add.
Definition: Instruction.h:252
static IntegerType * get(LLVMContext &C, unsigned NumBits)
This static method is the primary way of constructing an IntegerType.
Definition: Type.cpp:278
const SmallVectorImpl< Type * > & getArgTypes() const
const SmallVectorImpl< const Value * > & getArgs() const
InstructionCost getScalarizationCost() const
const IntrinsicInst * getInst() const
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:47
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:67
Represents a single loop in the control flow graph.
Definition: LoopInfo.h:44
virtual bool shouldPrefetchAddressSpace(unsigned AS) const
virtual unsigned getMinPrefetchStride(unsigned NumMemAccesses, unsigned NumStridedMemAccesses, unsigned NumPrefetches, bool HasCall) const
Return the minimum stride necessary to trigger software prefetching.
virtual bool enableWritePrefetching() const
virtual unsigned getMaxPrefetchIterationsAhead() const
Return the maximum prefetch distance in terms of loop iterations.
virtual unsigned getPrefetchDistance() const
Return the preferred prefetch distance in terms of instructions.
virtual std::optional< unsigned > getCacheAssociativity(unsigned Level) const
Return the cache associatvity for the given level of cache.
virtual std::optional< unsigned > getCacheLineSize(unsigned Level) const
Return the target cache line size in bytes at a given level.
Machine Value Type.
TypeSize getStoreSize() const
Return the number of bytes overwritten by a store of the specified value type.
The optimization diagnostic interface.
void emit(DiagnosticInfoOptimizationBase &OptDiag)
Output the remark via the diagnostic handler and to the optimization record file.
Diagnostic information for applied optimization remarks.
static PointerType * get(Type *ElementType, unsigned AddressSpace)
This constructs a pointer to an object of the specified type in a numbered address space.
Analysis providing profile information.
This class represents an analyzed expression in the program.
The main scalar evolution driver.
static bool isZeroEltSplatMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses all elements with the same value as the first element of exa...
static bool isSpliceMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is a splice mask, concatenating the two inputs together and then ext...
static bool isSelectMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask chooses elements from its source vectors without lane crossings.
static bool isExtractSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &Index)
Return true if this shuffle mask is an extract subvector mask.
static bool isReverseMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask swaps the order of elements from exactly one source vector.
static bool isTransposeMask(ArrayRef< int > Mask, int NumSrcElts)
Return true if this shuffle mask is a transpose mask.
static bool isInsertSubvectorMask(ArrayRef< int > Mask, int NumSrcElts, int &NumSubElts, int &Index)
Return true if this shuffle mask is an insert subvector mask.
size_type size() const
Definition: SmallPtrSet.h:94
std::pair< iterator, bool > insert(PtrType Ptr)
Inserts Ptr if and only if there is no element in the container equal to Ptr.
Definition: SmallPtrSet.h:342
SmallPtrSet - This class implements a set which is optimized for holding SmallSize or less elements.
Definition: SmallPtrSet.h:427
bool empty() const
Definition: SmallVector.h:94
size_t size() const
Definition: SmallVector.h:91
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: SmallVector.h:586
void push_back(const T &Elt)
Definition: SmallVector.h:426
This is a 'vector' (really, a variable-sized array), optimized for the case when the array is small.
Definition: SmallVector.h:1209
static StructType * create(LLVMContext &Context, StringRef Name)
This creates an identified struct.
Definition: Type.cpp:513
Multiway switch.
Provides information about what library functions are available for the current target.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
bool isOperationExpand(unsigned Op, EVT VT) const
Return true if the specified operation is illegal on this target or unlikely to be made legal with cu...
int InstructionOpcodeToISD(unsigned Opcode) const
Get the ISD node that corresponds to the Instruction class opcode.
bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const
Return true if the specified indexed load is legal on this target.
EVT getValueType(const DataLayout &DL, Type *Ty, bool AllowUnknown=false) const
Return the EVT corresponding to this LLVM type.
LegalizeAction
This enum indicates whether operations are valid for a target, and if not, what action should be used...
virtual bool isLegalICmpImmediate(int64_t) const
Return true if the specified immediate is legal icmp immediate, that is the target has icmp instructi...
const TargetMachine & getTargetMachine() const
virtual bool isZExtFree(Type *FromTy, Type *ToTy) const
Return true if any actual instruction that defines a value of type FromTy implicitly zero-extends the...
virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases, uint64_t Range, ProfileSummaryInfo *PSI, BlockFrequencyInfo *BFI) const
Return true if lowering to a jump table is suitable for a set of case clusters which may contain NumC...
virtual bool areJTsAllowed(const Function *Fn) const
Return true if lowering to a jump table is allowed.
bool isOperationLegalOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal using promotion.
virtual unsigned getNumRegisters(LLVMContext &Context, EVT VT, std::optional< MVT > RegisterVT=std::nullopt) const
Return the number of registers that this ValueType will eventually require.
virtual bool isCheapToSpeculateCttz(Type *Ty) const
Return true if it is cheap to speculate a call to intrinsic cttz.
bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const
Return true if the specified store with truncation is legal on this target.
virtual bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace=0, Align Alignment=Align(1), MachineMemOperand::Flags Flags=MachineMemOperand::MONone, unsigned *=nullptr) const
Determine if the target supports unaligned memory accesses.
virtual bool isTruncateFree(Type *FromTy, Type *ToTy) const
Return true if it's free to truncate a value of type FromTy to type ToTy.
virtual EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const
For types supported by the target, this is an identity function.
bool isTypeLegal(EVT VT) const
Return true if the target has native support for the specified value type.
bool isSuitableForBitTests(unsigned NumDests, unsigned NumCmps, const APInt &Low, const APInt &High, const DataLayout &DL) const
Return true if lowering to a bit test is suitable for a set of case clusters which contains NumDests ...
virtual bool isLegalAddImmediate(int64_t) const
Return true if the specified immediate is legal add immediate, that is the target has add instruction...
virtual bool isFreeAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast from SrcAS to DestAS is "cheap", such that e.g.
LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT) const
Return how this store with truncation should be treated: either it is legal, needs to be promoted to ...
LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, EVT MemVT) const
Return how this load with extension should be treated: either it is legal, needs to be promoted to a ...
virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const
Return true if integer divide is usually cheaper than a sequence of several shifts,...
bool isOperationLegalOrCustom(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
virtual bool isProfitableToHoist(Instruction *I) const
bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const
Return true if the specified indexed load is legal on this target.
bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const
Return true if the specified load with extension is legal on this target.
virtual bool isCheapToSpeculateCtlz(Type *Ty) const
Return true if it is cheap to speculate a call to intrinsic ctlz.
virtual int64_t getPreferredLargeGEPBaseOffset(int64_t MinOffset, int64_t MaxOffset) const
Return the prefered common base offset.
LegalizeKind getTypeConversion(LLVMContext &Context, EVT VT) const
Return pair that represents the legalization kind (first) that needs to happen to EVT (second) in ord...
LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const
Return how we should legalize values of this type, either it is already legal (return 'Legal') or we ...
virtual bool isLegalAddScalableImmediate(int64_t) const
Return true if adding the specified scalable immediate is legal, that is the target has add instructi...
bool isBeneficialToExpandPowI(int64_t Exponent, bool OptForSize) const
Return true if it is beneficial to expand an @llvm.powi.
virtual bool isFAbsFree(EVT VT) const
Return true if an fabs operation is free to the point where it is never worthwhile to replace it with...
virtual bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, unsigned AddrSpace, Instruction *I=nullptr) const
Return true if the addressing mode represented by AM is legal for this target, for a load/store of th...
bool isOperationLegalOrCustomOrPromote(unsigned Op, EVT VT, bool LegalOnly=false) const
Return true if the specified operation is legal on this target or can be made legal with custom lower...
std::pair< LegalizeTypeAction, EVT > LegalizeKind
LegalizeKind holds the legalization kind that needs to happen to EVT in order to type-legalize it.
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:76
virtual std::pair< const Value *, unsigned > getPredicatedAddrSpace(const Value *V) const
If the specified predicate checks whether a generic pointer falls within a specified address space,...
virtual bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const
Returns true if a cast between SrcAS and DestAS is a noop.
virtual unsigned getAssumedAddrSpace(const Value *V) const
If the specified generic pointer could be assumed as a pointer to a specific address space,...
TargetOptions Options
ThreadModel::Model ThreadModel
ThreadModel - This flag specifies the type of threading model to assume for things like atomics.
TargetSubtargetInfo - Generic base class for all target subtargets.
virtual bool useAA() const
Enable use of alias analysis during code generation (during MI scheduling, DAGCombine,...
const DataLayout & getDataLayout() const
std::optional< Value * > simplifyDemandedVectorEltsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, APInt &UndefElts2, APInt &UndefElts3, std::function< void(Instruction *, unsigned, APInt, APInt &)> SimplifyAndSetOp) const
bool isLSRCostLess(const TTI::LSRCost &C1, const TTI::LSRCost &C2) const
bool isProfitableLSRChainElement(Instruction *I) const
InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, TTI::TargetCostKind CostKind) const
bool isHardwareLoopProfitable(Loop *L, ScalarEvolution &SE, AssumptionCache &AC, TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind, const Instruction *I) const
std::optional< unsigned > getCacheAssociativity(TargetTransformInfo::CacheLevel Level) const
InstructionCost getArithmeticInstrCost(unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, TTI::OperandValueInfo Opd1Info, TTI::OperandValueInfo Opd2Info, ArrayRef< const Value * > Args, const Instruction *CxtI=nullptr) const
InstructionCost getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, TTI::TargetCostKind CostKind, const Instruction *I) const
bool isLoweredToCall(const Function *F) const
bool preferPredicateOverEpilogue(TailFoldingInfo *TFI) const
TailFoldingStyle getPreferredTailFoldingStyle(bool IVUpdateMayOverflow=true) const
InstructionCost getCFInstrCost(unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I=nullptr) const
std::optional< Value * > simplifyDemandedUseBitsIntrinsic(InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, bool &KnownBitsComputed) const
std::optional< Instruction * > instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const
CRTP base class for use as a mix-in that aids implementing a TargetTransformInfo-compatible class.
InstructionCost getGEPCost(Type *PointeeType, const Value *Ptr, ArrayRef< const Value * > Operands, Type *AccessType, TTI::TargetCostKind CostKind)
This pass provides access to the codegen interfaces that are needed for IR-level transformations.
InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, TTI::CastContextHint CCH, TTI::TargetCostKind CostKind=TTI::TCK_SizeAndLatency, const Instruction *I=nullptr) const
static OperandValueInfo getOperandInfo(const Value *V)
Collect properties of V used in cost analysis, e.g. OP_PowerOf2.
TargetCostKind
The kind of cost model.
@ TCK_RecipThroughput
Reciprocal throughput.
@ TCK_CodeSize
Instruction code size.
static bool requiresOrderedReduction(std::optional< FastMathFlags > FMF)
A helper function to determine the type of reduction algorithm used for a given Opcode and set of Fas...
@ TCC_Expensive
The cost of a 'div' instruction on x86.
@ TCC_Basic
The cost of a typical 'add' instruction.
MemIndexedMode
The type of load/store indexing.
@ MIM_PostInc
Post-incrementing.
@ MIM_PostDec
Post-decrementing.
ShuffleKind
The various kinds of shuffle patterns for vector queries.
@ SK_InsertSubvector
InsertSubvector. Index indicates start offset.
@ SK_Select
Selects elements from the corresponding lane of either source operand.
@ SK_PermuteSingleSrc
Shuffle elements of single source vector with any shuffle mask.
@ SK_Transpose
Transpose two vectors.
@ SK_Splice
Concatenates elements from the first input vector with elements of the second input vector.
@ SK_Broadcast
Broadcast element 0 to all other elements.
@ SK_PermuteTwoSrc
Merge elements from two source vectors into one with any shuffle mask.
@ SK_Reverse
Reverse the order of the vector.
@ SK_ExtractSubvector
ExtractSubvector Index indicates start offset.
CastContextHint
Represents a hint about the context in which a cast is used.
@ None
The cast is not used with a load/store of any kind.
@ Normal
The cast is used with a normal load/store.
CacheLevel
The possible cache levels.
Triple - Helper class for working with autoconf configuration names.
Definition: Triple.h:44
ArchType getArch() const
Get the parsed architecture type of this triple.
Definition: Triple.h:361
bool isArch64Bit() const
Test whether the architecture is 64-bit.
Definition: Triple.cpp:1538
bool isOSDarwin() const
Is this a "Darwin" OS (macOS, iOS, tvOS, watchOS, XROS, or DriverKit).
Definition: Triple.h:542
static constexpr TypeSize getFixed(ScalarTy ExactSize)
Definition: TypeSize.h:330
The instances of the Type class are immutable: once they are created, they are never changed.
Definition: Type.h:45
bool isVectorTy() const
True if this is an instance of VectorType.
Definition: Type.h:265
bool isIntOrIntVectorTy() const
Return true if this is an integer type or a vector of integer types.
Definition: Type.h:234
static IntegerType * getInt1Ty(LLVMContext &C)
unsigned getScalarSizeInBits() const LLVM_READONLY
If this is a vector type, return the getPrimitiveSizeInBits value for the element type.
Type * getWithNewBitWidth(unsigned NewBitWidth) const
Given an integer or vector type, change the lane bitwidth to NewBitwidth, whilst keeping the old numb...
LLVMContext & getContext() const
Return the LLVMContext in which this type was uniqued.
Definition: Type.h:129
static IntegerType * getInt8Ty(LLVMContext &C)
bool isPtrOrPtrVectorTy() const
Return true if this is a pointer type or a vector of pointer types.
Definition: Type.h:262
bool isFPOrFPVectorTy() const
Return true if this is a FP type or a vector of FP.
Definition: Type.h:216
Type * getScalarType() const
If this is a vector type, return the element type, otherwise return 'this'.
Definition: Type.h:348
Value * getOperand(unsigned i) const
Definition: User.h:169
static bool isVPBinOp(Intrinsic::ID ID)
static std::optional< unsigned > getFunctionalOpcodeForVP(Intrinsic::ID ID)
static std::optional< Intrinsic::ID > getFunctionalIntrinsicIDForVP(Intrinsic::ID ID)
static bool isVPIntrinsic(Intrinsic::ID)
static bool isVPReduction(Intrinsic::ID ID)
LLVM Value Representation.
Definition: Value.h:74
Type * getType() const
All values are typed, get the type of this value.
Definition: Value.h:255
Base class of all SIMD vector types.
Definition: DerivedTypes.h:403
static VectorType * getHalfElementsVectorType(VectorType *VTy)
This static method returns a VectorType with half as many elements as the input type and the same ele...
Definition: DerivedTypes.h:507
ElementCount getElementCount() const
Return an ElementCount instance to represent the (possibly scalable) number of elements in the vector...
Definition: DerivedTypes.h:641
static VectorType * get(Type *ElementType, ElementCount EC)
This static method is the primary way to construct an VectorType.
Definition: Type.cpp:676
Type * getElementType() const
Definition: DerivedTypes.h:436
static constexpr bool isKnownLT(const FixedOrScalableQuantity &LHS, const FixedOrScalableQuantity &RHS)
Definition: TypeSize.h:203
constexpr bool isScalable() const
Returns whether the quantity is scaled by a runtime quantity (vscale).
Definition: TypeSize.h:171
constexpr ScalarTy getKnownMinValue() const
Returns the minimum value this quantity can represent.
Definition: TypeSize.h:168
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
APInt ScaleBitMask(const APInt &A, unsigned NewBitWidth, bool MatchAllBits=false)
Splat/Merge neighboring bits to widen/narrow the bitmask represented by.
Definition: APInt.cpp:3011
@ Fast
Attempts to make calls as fast as possible (e.g.
Definition: CallingConv.h:41
@ C
The default llvm calling convention, compatible with C.
Definition: CallingConv.h:34
@ BSWAP
Byte Swap and Counting operators.
Definition: ISDOpcodes.h:714
@ FMA
FMA - Perform a * b + c with no intermediate rounding step.
Definition: ISDOpcodes.h:483
@ FADD
Simple binary floating point operators.
Definition: ISDOpcodes.h:390
@ SDIVREM
SDIVREM/UDIVREM - Divide two integers and produce both a quotient and remainder result.
Definition: ISDOpcodes.h:255
@ BRIND
BRIND - Indirect branch.
Definition: ISDOpcodes.h:1052
@ BR_JT
BR_JT - Jumptable branch.
Definition: ISDOpcodes.h:1056
@ FCANONICALIZE
Returns platform specific canonical encoding of a floating point number.
Definition: ISDOpcodes.h:500
@ SELECT
Select(COND, TRUEVAL, FALSEVAL).
Definition: ISDOpcodes.h:727
@ FMINNUM
FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two values.
Definition: ISDOpcodes.h:971
@ VSELECT
Select with a vector condition (op #0) and two vector operands (ops #1 and #2), returning a vector re...
Definition: ISDOpcodes.h:736
@ FMINIMUM
FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0 as less than 0....
Definition: ISDOpcodes.h:984
@ FCOPYSIGN
FCOPYSIGN(X, Y) - Return the value of X with the sign of Y.
Definition: ISDOpcodes.h:493
MemIndexedMode
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
Definition: ISDOpcodes.h:1472
DiagnosticInfoOptimizationBase::Argument NV
This is an optimization pass for GlobalISel generic memory operations.
Definition: AddressRanges.h:18
Intrinsic::ID getMinMaxReductionIntrinsicOp(Intrinsic::ID RdxID)
Returns the min/max intrinsic used when expanding a min/max reduction.
Definition: LoopUtils.cpp:950
uint64_t divideCeil(uint64_t Numerator, uint64_t Denominator)
Returns the integer ceil(Numerator / Denominator).
Definition: MathExtras.h:417
AddressSpace
Definition: NVPTXBaseInfo.h:21
unsigned getArithmeticReductionInstruction(Intrinsic::ID RdxID)
Returns the arithmetic instruction opcode used when expanding a reduction.
Definition: LoopUtils.cpp:921
bool any_of(R &&range, UnaryPredicate P)
Provide wrappers to std::any_of which take ranges instead of having to pass begin/end explicitly.
Definition: STLExtras.h:1738
unsigned Log2_32(uint32_t Value)
Return the floor log base 2 of the specified value, -1 if the value is zero.
Definition: MathExtras.h:313
constexpr bool isPowerOf2_32(uint32_t Value)
Return true if the argument is a power of two > 0.
Definition: MathExtras.h:264
constexpr unsigned BitWidth
Definition: BitmaskEnum.h:191
InstructionCost Cost
cl::opt< unsigned > PartialUnrollingThreshold
#define N
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:39
Extended Value Type.
Definition: ValueTypes.h:34
bool isSimple() const
Test if the given EVT is simple (as opposed to being extended).
Definition: ValueTypes.h:136
static EVT getEVT(Type *Ty, bool HandleUnknown=false)
Return the value type corresponding to the specified type.
Definition: ValueTypes.cpp:628
MVT getSimpleVT() const
Return the SimpleValueType held in the specified simple EVT.
Definition: ValueTypes.h:306
static EVT getIntegerVT(LLVMContext &Context, unsigned BitWidth)
Returns the EVT that represents an integer with the given number of bits.
Definition: ValueTypes.h:64
Attributes of a target dependent hardware loop.
This struct is a compact representation of a valid (power of two) or undefined (0) alignment.
Definition: Alignment.h:117
This represents an addressing mode of: BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + ScalableOffset*...
bool AllowPeeling
Allow peeling off loop iterations.
bool AllowLoopNestsPeeling
Allow peeling off loop iterations for loop nests.
bool PeelProfiledIterations
Allow peeling basing on profile.
unsigned PeelCount
A forced peeling factor (the number of bodied of the original loop that should be peeled off before t...
Parameters that control the generic loop unrolling transformation.
bool UpperBound
Allow using trip count upper bound to unroll loops.
unsigned PartialOptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size, like OptSizeThreshold,...
unsigned PartialThreshold
The cost threshold for the unrolled loop, like Threshold, but used for partial/runtime unrolling (set...
bool Runtime
Allow runtime unrolling (unrolling of loops to expand the size of the loop body even when the number ...
bool Partial
Allow partial unrolling (unrolling of loops to expand the size of the loop body, not only to eliminat...
unsigned OptSizeThreshold
The cost threshold for the unrolled loop when optimizing for size (set to UINT_MAX to disable).