LLVM  9.0.0svn
CallingConvLower.cpp
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1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements the CCState class, used for lowering and implementing
10 // calling conventions.
11 //
12 //===----------------------------------------------------------------------===//
13 
20 #include "llvm/IR/DataLayout.h"
21 #include "llvm/Support/Debug.h"
25 #include <algorithm>
26 
27 using namespace llvm;
28 
31  : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
32  TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
33  // No stack is used.
34  StackOffset = 0;
35  MaxStackArgAlign = 1;
36 
38  UsedRegs.resize((TRI.getNumRegs()+31)/32);
39 }
40 
41 /// Allocate space on the stack large enough to pass an argument by value.
42 /// The size and alignment information of the argument is encoded in
43 /// its parameter attribute.
44 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
45  MVT LocVT, CCValAssign::LocInfo LocInfo,
46  int MinSize, int MinAlign,
47  ISD::ArgFlagsTy ArgFlags) {
48  unsigned Align = ArgFlags.getByValAlign();
49  unsigned Size = ArgFlags.getByValSize();
50  if (MinSize > (int)Size)
51  Size = MinSize;
52  if (MinAlign > (int)Align)
53  Align = MinAlign;
54  ensureMaxAlignment(Align);
55  MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Align);
56  Size = unsigned(alignTo(Size, MinAlign));
57  unsigned Offset = AllocateStack(Size, Align);
58  addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
59 }
60 
61 /// Mark a register and all of its aliases as allocated.
62 void CCState::MarkAllocated(unsigned Reg) {
63  for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
64  UsedRegs[*AI/32] |= 1 << (*AI&31);
65 }
66 
67 bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
68  if (!isAllocated(Reg))
69  return false;
70 
71  for (auto const &ValAssign : Locs) {
72  if (ValAssign.isRegLoc()) {
73  for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
74  AI.isValid(); ++AI) {
75  if (*AI == Reg)
76  return false;
77  }
78  }
79  }
80  return true;
81 }
82 
83 /// Analyze an array of argument values,
84 /// incorporating info about the formals into this state.
85 void
87  CCAssignFn Fn) {
88  unsigned NumArgs = Ins.size();
89 
90  for (unsigned i = 0; i != NumArgs; ++i) {
91  MVT ArgVT = Ins[i].VT;
92  ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
93  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
94 #ifndef NDEBUG
95  dbgs() << "Formal argument #" << i << " has unhandled type "
96  << EVT(ArgVT).getEVTString() << '\n';
97 #endif
98  llvm_unreachable(nullptr);
99  }
100  }
101 }
102 
103 /// Analyze the return values of a function, returning true if the return can
104 /// be performed without sret-demotion and false otherwise.
106  CCAssignFn Fn) {
107  // Determine which register each value should be copied into.
108  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
109  MVT VT = Outs[i].VT;
110  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
111  if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
112  return false;
113  }
114  return true;
115 }
116 
117 /// Analyze the returned values of a return,
118 /// incorporating info about the result values into this state.
120  CCAssignFn Fn) {
121  // Determine which register each value should be copied into.
122  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
123  MVT VT = Outs[i].VT;
124  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
125  if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
126 #ifndef NDEBUG
127  dbgs() << "Return operand #" << i << " has unhandled type "
128  << EVT(VT).getEVTString() << '\n';
129 #endif
130  llvm_unreachable(nullptr);
131  }
132  }
133 }
134 
135 /// Analyze the outgoing arguments to a call,
136 /// incorporating info about the passed values into this state.
138  CCAssignFn Fn) {
139  unsigned NumOps = Outs.size();
140  for (unsigned i = 0; i != NumOps; ++i) {
141  MVT ArgVT = Outs[i].VT;
142  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
143  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
144 #ifndef NDEBUG
145  dbgs() << "Call operand #" << i << " has unhandled type "
146  << EVT(ArgVT).getEVTString() << '\n';
147 #endif
148  llvm_unreachable(nullptr);
149  }
150  }
151 }
152 
153 /// Same as above except it takes vectors of types and argument flags.
156  CCAssignFn Fn) {
157  unsigned NumOps = ArgVTs.size();
158  for (unsigned i = 0; i != NumOps; ++i) {
159  MVT ArgVT = ArgVTs[i];
160  ISD::ArgFlagsTy ArgFlags = Flags[i];
161  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
162 #ifndef NDEBUG
163  dbgs() << "Call operand #" << i << " has unhandled type "
164  << EVT(ArgVT).getEVTString() << '\n';
165 #endif
166  llvm_unreachable(nullptr);
167  }
168  }
169 }
170 
171 /// Analyze the return values of a call, incorporating info about the passed
172 /// values into this state.
174  CCAssignFn Fn) {
175  for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
176  MVT VT = Ins[i].VT;
177  ISD::ArgFlagsTy Flags = Ins[i].Flags;
178  if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
179 #ifndef NDEBUG
180  dbgs() << "Call result #" << i << " has unhandled type "
181  << EVT(VT).getEVTString() << '\n';
182 #endif
183  llvm_unreachable(nullptr);
184  }
185  }
186 }
187 
188 /// Same as above except it's specialized for calls that produce a single value.
190  if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
191 #ifndef NDEBUG
192  dbgs() << "Call result has unhandled type "
193  << EVT(VT).getEVTString() << '\n';
194 #endif
195  llvm_unreachable(nullptr);
196  }
197 }
198 
200  if (VT.isVector())
201  return true; // Assume -msse-regparm might be in effect.
202  if (!VT.isInteger())
203  return false;
205  return true;
206  return false;
207 }
208 
210  MVT VT, CCAssignFn Fn) {
211  unsigned SavedStackOffset = StackOffset;
212  unsigned SavedMaxStackArgAlign = MaxStackArgAlign;
213  unsigned NumLocs = Locs.size();
214 
215  // Set the 'inreg' flag if it is used for this calling convention.
216  ISD::ArgFlagsTy Flags;
217  if (isValueTypeInRegForCC(CallingConv, VT))
218  Flags.setInReg();
219 
220  // Allocate something of this value type repeatedly until we get assigned a
221  // location in memory.
222  bool HaveRegParm = true;
223  while (HaveRegParm) {
224  if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
225 #ifndef NDEBUG
226  dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
227  << " while computing remaining regparms\n";
228 #endif
229  llvm_unreachable(nullptr);
230  }
231  HaveRegParm = Locs.back().isRegLoc();
232  }
233 
234  // Copy all the registers from the value locations we added.
235  assert(NumLocs < Locs.size() && "CC assignment failed to add location");
236  for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
237  if (Locs[I].isRegLoc())
238  Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
239 
240  // Clear the assigned values and stack memory. We leave the registers marked
241  // as allocated so that future queries don't return the same registers, i.e.
242  // when i64 and f64 are both passed in GPRs.
243  StackOffset = SavedStackOffset;
244  MaxStackArgAlign = SavedMaxStackArgAlign;
245  Locs.resize(NumLocs);
246 }
247 
249  SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
250  CCAssignFn Fn) {
251  // Oftentimes calling conventions will not user register parameters for
252  // variadic functions, so we need to assume we're not variadic so that we get
253  // all the registers that might be used in a non-variadic call.
254  SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
255  SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
256 
257  for (MVT RegVT : RegParmTypes) {
258  SmallVector<MCPhysReg, 8> RemainingRegs;
259  getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
260  const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
261  const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
262  for (MCPhysReg PReg : RemainingRegs) {
263  unsigned VReg = MF.addLiveIn(PReg, RC);
264  Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
265  }
266  }
267 }
268 
270  CallingConv::ID CallerCC, MachineFunction &MF,
271  LLVMContext &C,
273  CCAssignFn CalleeFn, CCAssignFn CallerFn) {
274  if (CalleeCC == CallerCC)
275  return true;
277  CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
278  CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
279 
281  CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
282  CCInfo2.AnalyzeCallResult(Ins, CallerFn);
283 
284  if (RVLocs1.size() != RVLocs2.size())
285  return false;
286  for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
287  const CCValAssign &Loc1 = RVLocs1[I];
288  const CCValAssign &Loc2 = RVLocs2[I];
289  if (Loc1.getLocInfo() != Loc2.getLocInfo())
290  return false;
291  bool RegLoc1 = Loc1.isRegLoc();
292  if (RegLoc1 != Loc2.isRegLoc())
293  return false;
294  if (RegLoc1) {
295  if (Loc1.getLocReg() != Loc2.getLocReg())
296  return false;
297  } else {
298  if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
299  return false;
300  }
301  }
302  return true;
303 }
uint64_t CallInst * C
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
bool isInteger() const
Return true if this is an integer or a vector integer type.
LLVMContext & Context
This class represents lattice values for constants.
Definition: AllocatorList.h:23
Describes a register that needs to be forwarded from the prologue to a musttail call.
bool isVector() const
Return true if this is a vector value type.
bool isAllocated(unsigned Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
void push_back(const T &Elt)
Definition: SmallVector.h:211
unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
unsigned Reg
virtual const TargetLowering * getTargetLowering() const
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change...
virtual void HandleByVal(CCState *, unsigned &, unsigned) const
Target-specific cleanup for formal ByVal parameters.
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
unsigned const TargetRegisterInfo * TRI
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:684
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:41
void addLoc(const CCValAssign &V)
X86_FastCall - &#39;fast&#39; analog of X86_StdCall.
Definition: CallingConv.h:91
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
LocInfo getLocInfo() const
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
unsigned getByValSize() const
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:609
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
Definition: CallingConv.h:157
Machine Value Type.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:64
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
MCRegAliasIterator enumerates all registers aliasing Reg.
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:114
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
Extended Value Type.
Definition: ValueTypes.h:33
size_t size() const
Definition: SmallVector.h:52
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type...
CCState - This class holds information needed while lowering arguments and return values...
CCValAssign - Represent assignment of one arg/retval to a location.
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
unsigned getByValAlign() const
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
A utility class that uses RAII to save and restore the value of a variable.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls...
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
unsigned getLocMemOffset() const
#define I(x, y, z)
Definition: MD5.cpp:58
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
uint32_t Size
Definition: Profile.cpp:46
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
bool isRegLoc() const
void clearByValRegsInfo()
bool IsShadowAllocatedReg(unsigned Reg) const
A shadow allocated register is a register that was allocated but wasn&#39;t added to the location list (L...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
This file provides utility classes that use RAII to save and restore values.
unsigned getLocReg() const
unsigned AllocateStack(unsigned Size, unsigned Align)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
This file describes how to lower LLVM code to machine code.
void ensureMaxAlignment(unsigned Align)
void resize(size_type N)
Definition: SmallVector.h:344