LLVM  6.0.0svn
CallingConvLower.cpp
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1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the CCState class, used for lowering and implementing
11 // calling conventions.
12 //
13 //===----------------------------------------------------------------------===//
14 
21 #include "llvm/IR/DataLayout.h"
22 #include "llvm/Support/Debug.h"
26 #include <algorithm>
27 
28 using namespace llvm;
29 
32  : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
33  TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
34  // No stack is used.
35  StackOffset = 0;
36  MaxStackArgAlign = 1;
37 
39  UsedRegs.resize((TRI.getNumRegs()+31)/32);
40 }
41 
42 /// Allocate space on the stack large enough to pass an argument by value.
43 /// The size and alignment information of the argument is encoded in
44 /// its parameter attribute.
45 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
46  MVT LocVT, CCValAssign::LocInfo LocInfo,
47  int MinSize, int MinAlign,
48  ISD::ArgFlagsTy ArgFlags) {
49  unsigned Align = ArgFlags.getByValAlign();
50  unsigned Size = ArgFlags.getByValSize();
51  if (MinSize > (int)Size)
52  Size = MinSize;
53  if (MinAlign > (int)Align)
54  Align = MinAlign;
55  ensureMaxAlignment(Align);
56  MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Align);
57  Size = unsigned(alignTo(Size, MinAlign));
58  unsigned Offset = AllocateStack(Size, Align);
59  addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
60 }
61 
62 /// Mark a register and all of its aliases as allocated.
63 void CCState::MarkAllocated(unsigned Reg) {
64  for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
65  UsedRegs[*AI/32] |= 1 << (*AI&31);
66 }
67 
68 bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
69  if (!isAllocated(Reg))
70  return false;
71 
72  for (auto const &ValAssign : Locs) {
73  if (ValAssign.isRegLoc()) {
74  for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
75  AI.isValid(); ++AI) {
76  if (*AI == Reg)
77  return false;
78  }
79  }
80  }
81  return true;
82 }
83 
84 /// Analyze an array of argument values,
85 /// incorporating info about the formals into this state.
86 void
88  CCAssignFn Fn) {
89  unsigned NumArgs = Ins.size();
90 
91  for (unsigned i = 0; i != NumArgs; ++i) {
92  MVT ArgVT = Ins[i].VT;
93  ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
94  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
95 #ifndef NDEBUG
96  dbgs() << "Formal argument #" << i << " has unhandled type "
97  << EVT(ArgVT).getEVTString() << '\n';
98 #endif
99  llvm_unreachable(nullptr);
100  }
101  }
102 }
103 
104 /// Analyze the return values of a function, returning true if the return can
105 /// be performed without sret-demotion and false otherwise.
107  CCAssignFn Fn) {
108  // Determine which register each value should be copied into.
109  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
110  MVT VT = Outs[i].VT;
111  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
112  if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
113  return false;
114  }
115  return true;
116 }
117 
118 /// Analyze the returned values of a return,
119 /// incorporating info about the result values into this state.
121  CCAssignFn Fn) {
122  // Determine which register each value should be copied into.
123  for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
124  MVT VT = Outs[i].VT;
125  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
126  if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
127 #ifndef NDEBUG
128  dbgs() << "Return operand #" << i << " has unhandled type "
129  << EVT(VT).getEVTString() << '\n';
130 #endif
131  llvm_unreachable(nullptr);
132  }
133  }
134 }
135 
136 /// Analyze the outgoing arguments to a call,
137 /// incorporating info about the passed values into this state.
139  CCAssignFn Fn) {
140  unsigned NumOps = Outs.size();
141  for (unsigned i = 0; i != NumOps; ++i) {
142  MVT ArgVT = Outs[i].VT;
143  ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
144  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
145 #ifndef NDEBUG
146  dbgs() << "Call operand #" << i << " has unhandled type "
147  << EVT(ArgVT).getEVTString() << '\n';
148 #endif
149  llvm_unreachable(nullptr);
150  }
151  }
152 }
153 
154 /// Same as above except it takes vectors of types and argument flags.
157  CCAssignFn Fn) {
158  unsigned NumOps = ArgVTs.size();
159  for (unsigned i = 0; i != NumOps; ++i) {
160  MVT ArgVT = ArgVTs[i];
161  ISD::ArgFlagsTy ArgFlags = Flags[i];
162  if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
163 #ifndef NDEBUG
164  dbgs() << "Call operand #" << i << " has unhandled type "
165  << EVT(ArgVT).getEVTString() << '\n';
166 #endif
167  llvm_unreachable(nullptr);
168  }
169  }
170 }
171 
172 /// Analyze the return values of a call, incorporating info about the passed
173 /// values into this state.
175  CCAssignFn Fn) {
176  for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
177  MVT VT = Ins[i].VT;
178  ISD::ArgFlagsTy Flags = Ins[i].Flags;
179  if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
180 #ifndef NDEBUG
181  dbgs() << "Call result #" << i << " has unhandled type "
182  << EVT(VT).getEVTString() << '\n';
183 #endif
184  llvm_unreachable(nullptr);
185  }
186  }
187 }
188 
189 /// Same as above except it's specialized for calls that produce a single value.
191  if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
192 #ifndef NDEBUG
193  dbgs() << "Call result has unhandled type "
194  << EVT(VT).getEVTString() << '\n';
195 #endif
196  llvm_unreachable(nullptr);
197  }
198 }
199 
201  if (VT.isVector())
202  return true; // Assume -msse-regparm might be in effect.
203  if (!VT.isInteger())
204  return false;
206  return true;
207  return false;
208 }
209 
211  MVT VT, CCAssignFn Fn) {
212  unsigned SavedStackOffset = StackOffset;
213  unsigned SavedMaxStackArgAlign = MaxStackArgAlign;
214  unsigned NumLocs = Locs.size();
215 
216  // Set the 'inreg' flag if it is used for this calling convention.
217  ISD::ArgFlagsTy Flags;
218  if (isValueTypeInRegForCC(CallingConv, VT))
219  Flags.setInReg();
220 
221  // Allocate something of this value type repeatedly until we get assigned a
222  // location in memory.
223  bool HaveRegParm = true;
224  while (HaveRegParm) {
225  if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
226 #ifndef NDEBUG
227  dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
228  << " while computing remaining regparms\n";
229 #endif
230  llvm_unreachable(nullptr);
231  }
232  HaveRegParm = Locs.back().isRegLoc();
233  }
234 
235  // Copy all the registers from the value locations we added.
236  assert(NumLocs < Locs.size() && "CC assignment failed to add location");
237  for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
238  if (Locs[I].isRegLoc())
239  Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
240 
241  // Clear the assigned values and stack memory. We leave the registers marked
242  // as allocated so that future queries don't return the same registers, i.e.
243  // when i64 and f64 are both passed in GPRs.
244  StackOffset = SavedStackOffset;
245  MaxStackArgAlign = SavedMaxStackArgAlign;
246  Locs.resize(NumLocs);
247 }
248 
250  SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
251  CCAssignFn Fn) {
252  // Oftentimes calling conventions will not user register parameters for
253  // variadic functions, so we need to assume we're not variadic so that we get
254  // all the registers that might be used in a non-variadic call.
255  SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
256  SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
257 
258  for (MVT RegVT : RegParmTypes) {
259  SmallVector<MCPhysReg, 8> RemainingRegs;
260  getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
261  const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
262  const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
263  for (MCPhysReg PReg : RemainingRegs) {
264  unsigned VReg = MF.addLiveIn(PReg, RC);
265  Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
266  }
267  }
268 }
269 
271  CallingConv::ID CallerCC, MachineFunction &MF,
272  LLVMContext &C,
274  CCAssignFn CalleeFn, CCAssignFn CallerFn) {
275  if (CalleeCC == CallerCC)
276  return true;
278  CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
279  CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
280 
282  CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
283  CCInfo2.AnalyzeCallResult(Ins, CallerFn);
284 
285  if (RVLocs1.size() != RVLocs2.size())
286  return false;
287  for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
288  const CCValAssign &Loc1 = RVLocs1[I];
289  const CCValAssign &Loc2 = RVLocs2[I];
290  if (Loc1.getLocInfo() != Loc2.getLocInfo())
291  return false;
292  bool RegLoc1 = Loc1.isRegLoc();
293  if (RegLoc1 != Loc2.isRegLoc())
294  return false;
295  if (RegLoc1) {
296  if (Loc1.getLocReg() != Loc2.getLocReg())
297  return false;
298  } else {
299  if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
300  return false;
301  }
302  }
303  return true;
304 }
uint64_t CallInst * C
void AnalyzeCallResult(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeCallResult - Analyze the return values of a call, incorporating info about the passed values i...
void push_back(const T &Elt)
Definition: SmallVector.h:212
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
bool isInteger() const
Return true if this is an integer or a vector integer type.
LLVMContext & Context
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Describes a register that needs to be forwarded from the prologue to a musttail call.
LLVM_ATTRIBUTE_ALWAYS_INLINE size_type size() const
Definition: SmallVector.h:136
bool isVector() const
Return true if this is a vector value type.
bool isAllocated(unsigned Reg) const
isAllocated - Return true if the specified register (or an alias) is allocated.
unsigned addLiveIn(unsigned PReg, const TargetRegisterClass *RC)
addLiveIn - Add the specified physical register as a live-in value and create a corresponding virtual...
void AnalyzeFormalArguments(const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn Fn)
AnalyzeFormalArguments - Analyze an array of argument values, incorporating info about the formals in...
virtual const TargetLowering * getTargetLowering() const
bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, CCState &State)
CCAssignFn - This function assigns a location for Val, updating State to reflect the change...
virtual void HandleByVal(CCState *, unsigned &, unsigned) const
Target-specific cleanup for formal ByVal parameters.
virtual const TargetRegisterClass * getRegClassFor(MVT VT) const
Return the register class that should be used for the specified value type.
uint64_t alignTo(uint64_t Value, uint64_t Align, uint64_t Skew=0)
Returns the next integer (mod 2**64) that is greater than or equal to Value and is a multiple of Alig...
Definition: MathExtras.h:677
bool CheckReturn(const SmallVectorImpl< ISD::OutputArg > &ArgsFlags, CCAssignFn Fn)
CheckReturn - Analyze the return values of a function, returning true if the return can be performed ...
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
void addLoc(const CCValAssign &V)
Reg
All possible values of the reg field in the ModR/M byte.
static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT)
LocInfo getLocInfo() const
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
const RegList & Regs
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
unsigned getByValSize() const
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
constexpr uint64_t MinAlign(uint64_t A, uint64_t B)
A and B are either alignments or offsets.
Definition: MathExtras.h:602
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
Machine Value Type.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
This is an important class for using LLVM in a threaded context.
Definition: LLVMContext.h:69
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
MSVC calling convention that passes vectors and vector aggregates in SSE registers.
Definition: CallingConv.h:158
MCRegAliasIterator enumerates all registers aliasing Reg.
std::string getEVTString() const
This function returns value type as a string, e.g. "i32".
Definition: ValueTypes.cpp:120
static bool resultsCompatible(CallingConv::ID CalleeCC, CallingConv::ID CallerCC, MachineFunction &MF, LLVMContext &C, const SmallVectorImpl< ISD::InputArg > &Ins, CCAssignFn CalleeFn, CCAssignFn CallerFn)
Returns true if the results of the two calling conventions are compatible.
Extended Value Type.
Definition: ValueTypes.h:34
void HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT, CCValAssign::LocInfo LocInfo, int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags)
Allocate space on the stack large enough to pass an argument by value.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void getRemainingRegParmsForType(SmallVectorImpl< MCPhysReg > &Regs, MVT VT, CCAssignFn Fn)
Compute the remaining unused register parameters that would be used for the given value type...
CCState - This class holds information needed while lowering arguments and return values...
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
CCValAssign - Represent assignment of one arg/retval to a location.
CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF, SmallVectorImpl< CCValAssign > &locs, LLVMContext &C)
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
unsigned getByValAlign() const
void AnalyzeCallOperands(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeCallOperands - Analyze the outgoing arguments to a call, incorporating info about the passed v...
A utility class that uses RAII to save and restore the value of a variable.
void analyzeMustTailForwardedRegisters(SmallVectorImpl< ForwardedRegister > &Forwards, ArrayRef< MVT > RegParmTypes, CCAssignFn Fn)
Compute the set of registers that need to be preserved and forwarded to any musttail calls...
unsigned getLocMemOffset() const
#define I(x, y, z)
Definition: MD5.cpp:58
void AnalyzeReturn(const SmallVectorImpl< ISD::OutputArg > &Outs, CCAssignFn Fn)
AnalyzeReturn - Analyze the returned values of a return, incorporating info about the result values i...
static CCValAssign getMem(unsigned ValNo, MVT ValVT, unsigned Offset, MVT LocVT, LocInfo HTP)
bool isRegLoc() const
void clearByValRegsInfo()
bool IsShadowAllocatedReg(unsigned Reg) const
A shadow allocated register is a register that was allocated but wasn&#39;t added to the location list (L...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
This file provides utility classes that use RAII to save and restore values.
unsigned getLocReg() const
unsigned AllocateStack(unsigned Size, unsigned Align)
AllocateStack - Allocate a chunk of stack space with the specified size and alignment.
X86_FastCall - &#39;fast&#39; analog of X86_StdCall.
Definition: CallingConv.h:92
This file describes how to lower LLVM code to machine code.
void ensureMaxAlignment(unsigned Align)
void resize(size_type N)
Definition: SmallVector.h:355