LLVM  7.0.0svn
Macros | Functions | Variables
DAGCombiner.cpp File Reference
#include "llvm/ADT/APFloat.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/None.h"
#include "llvm/ADT/Optional.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/AliasAnalysis.h"
#include "llvm/Analysis/MemoryLocation.h"
#include "llvm/CodeGen/DAGCombine.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
#include "llvm/CodeGen/TargetLowering.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/Constant.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Function.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Metadata.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/KnownBits.h"
#include "llvm/Support/MachineValueType.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <functional>
#include <iterator>
#include <string>
#include <tuple>
#include <utility>
#include <vector>

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "dagcombine"
 

Functions

 STATISTIC (NodesCombined, "Number of dag nodes combined")
 
 STATISTIC (PreIndexedNodes, "Number of pre-indexed nodes created")
 
 STATISTIC (PostIndexedNodes, "Number of post-indexed nodes created")
 
 STATISTIC (OpsNarrowed, "Number of load/op/store narrowed")
 
 STATISTIC (LdStFP2Int, "Number of fp load/store pairs transformed to int")
 
 STATISTIC (SlicedLoads, "Number of load sliced")
 
static char isNegatibleForFree (SDValue Op, bool LegalOperations, const TargetLowering &TLI, const TargetOptions *Options, unsigned Depth=0)
 Return 1 if we can compute the negated form of the specified expression for the same cost as the expression itself, or 2 if we can compute the negated form more cheaply than the expression itself. More...
 
static SDValue GetNegatedExpression (SDValue Op, SelectionDAG &DAG, bool LegalOperations, unsigned Depth=0)
 If isNegatibleForFree returns true, return the newly negated expression. More...
 
static void zeroExtendToMatch (APInt &LHS, APInt &RHS, unsigned Offset=0)
 
static SDValue peekThroughBitcast (SDValue V)
 
static SDNodeisConstantFPBuildVectorOrConstantFP (SDValue N)
 
static bool isConstantOrConstantVector (SDValue N, bool NoOpaques=false)
 
static bool isNullConstantOrNullSplatConstant (SDValue N)
 
static bool isOneConstantOrOneSplatConstant (SDValue N)
 
static bool isAllOnesConstantOrAllOnesSplatConstant (SDValue N)
 
static bool isAnyConstantBuildVector (const SDNode *N)
 
static SDValue getInputChainForNode (SDNode *N)
 Given a node, return its input chain if it has one, otherwise return a null sd operand. More...
 
static ConstantSDNodegetAsNonOpaqueConstant (SDValue N)
 If N is a ConstantSDNode with isOpaque() == false return it casted to a ConstantSDNode pointer else nullptr. More...
 
static SDValue foldAddSubBoolOfMaskedVal (SDNode *N, SelectionDAG &DAG)
 
static SDValue getAsCarry (const TargetLowering &TLI, SDValue V)
 
static SDValue flipBoolean (SDValue V, const SDLoc &DL, EVT VT, SelectionDAG &DAG, const TargetLowering &TLI)
 
static bool isBooleanFlip (SDValue V, EVT VT, const TargetLowering &TLI)
 
static SDValue tryFoldToZero (const SDLoc &DL, const TargetLowering &TLI, EVT VT, SelectionDAG &DAG, bool LegalOperations, bool LegalTypes)
 
static bool isDivRemLibcallAvailable (SDNode *Node, bool isSigned, const TargetLowering &TLI)
 Return true if divmod libcall is available. More...
 
static SDValue simplifyDivRem (SDNode *N, SelectionDAG &DAG)
 
static bool isBSwapHWordElement (SDValue N, MutableArrayRef< SDNode *> Parts)
 Return true if the specified node is an element that makes up a 32-bit packed halfword byteswap. More...
 
static bool matchRotateSub (SDValue Pos, SDValue Neg, unsigned EltSize, SelectionDAG &DAG)
 
static const Optional< ByteProvider > calculateByteProvider (SDValue Op, unsigned Index, unsigned Depth, bool Root=false)
 Recursively traverses the expression calculating the origin of the requested byte of the given value. More...
 
static SDValue combineMinNumMaxNum (const SDLoc &DL, EVT VT, SDValue LHS, SDValue RHS, SDValue True, SDValue False, ISD::CondCode CC, const TargetLowering &TLI, SelectionDAG &DAG)
 Generate Min/Max node. More...
 
static std::pair< SDValue, SDValueSplitVSETCC (const SDNode *N, SelectionDAG &DAG)
 
static SDValue ConvertSelectToConcatVector (SDNode *N, SelectionDAG &DAG)
 
static SDNodetryToFoldExtendOfConstant (SDNode *N, const TargetLowering &TLI, SelectionDAG &DAG, bool LegalTypes, bool LegalOperations)
 Try to fold a sext/zext/aext dag node into a ConstantSDNode or a build_vector of constants. More...
 
static bool ExtendUsesToFormExtLoad (EVT VT, SDNode *N, SDValue N0, unsigned ExtOpc, SmallVectorImpl< SDNode *> &ExtendNodes, const TargetLowering &TLI)
 
static SDValue tryToFoldExtOfExtload (SelectionDAG &DAG, DAGCombiner &Combiner, const TargetLowering &TLI, EVT VT, bool LegalOperations, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType)
 
static SDValue tryToFoldExtOfLoad (SelectionDAG &DAG, DAGCombiner &Combiner, const TargetLowering &TLI, EVT VT, bool LegalOperations, SDNode *N, SDValue N0, ISD::LoadExtType ExtLoadType, ISD::NodeType ExtOpc)
 
static SDValue foldExtendedSignBitTest (SDNode *N, SelectionDAG &DAG, bool LegalOperations)
 
static bool isTruncateOf (SelectionDAG &DAG, SDValue N, SDValue &Op, KnownBits &Known)
 
static SDNodegetBuildPairElt (SDNode *N, unsigned i)
 
static unsigned getPPCf128HiElementSelector (const SelectionDAG &DAG)
 
static SDValue foldBitcastedFPLogic (SDNode *N, SelectionDAG &DAG, const TargetLowering &TLI)
 
static bool isContractable (SDNode *N)
 
static bool isFMulNegTwo (SDValue &N)
 
static bool CanCombineFCOPYSIGN_EXTEND_ROUND (SDNode *N)
 copysign(x, fp_extend(y)) -> copysign(x, y) copysign(x, fp_round(y)) -> copysign(x, y) More...
 
static SDValue foldFPToIntToFP (SDNode *N, SelectionDAG &DAG, const TargetLowering &TLI)
 
static SDValue FoldIntToFPToInt (SDNode *N, SelectionDAG &DAG)
 
static bool canFoldInAddressingMode (SDNode *N, SDNode *Use, SelectionDAG &DAG, const TargetLowering &TLI)
 Return true if 'Use' is a load or a store that uses N as its base pointer and that N may be folded in the load / store addressing mode. More...
 
static bool areUsedBitsDense (const APInt &UsedBits)
 Check that all bits set in UsedBits form a dense region, i.e., UsedBits looks like 0..0 1..1 0..0. More...
 
static bool areSlicesNextToEachOther (const LoadedSlice &First, const LoadedSlice &Second)
 Check whether or not First and Second are next to each other in memory. More...
 
static void adjustCostForPairing (SmallVectorImpl< LoadedSlice > &LoadedSlices, LoadedSlice::Cost &GlobalLSCost)
 Adjust the GlobalLSCost according to the target paring capabilities and the layout of the slices. More...
 
static bool isSlicingProfitable (SmallVectorImpl< LoadedSlice > &LoadedSlices, const APInt &UsedBits, bool ForCodeSize)
 Check the profitability of all involved LoadedSlice. More...
 
static std::pair< unsigned, unsignedCheckForMaskedLoad (SDValue V, SDValue Ptr, SDValue Chain)
 Check to see if V is (and load (ptr), imm), where the load is having specific bytes cleared out. More...
 
static SDNodeShrinkLoadReplaceStoreWithStore (const std::pair< unsigned, unsigned > &MaskInfo, SDValue IVal, StoreSDNode *St, DAGCombiner *DC)
 Check to see if IVal is something that provides a value as specified by MaskInfo. More...
 
static SDValue combineConcatVectorOfScalars (SDNode *N, SelectionDAG &DAG)
 
static SDValue combineConcatVectorOfExtracts (SDNode *N, SelectionDAG &DAG)
 
static SDValue narrowExtractedVectorBinOp (SDNode *Extract, SelectionDAG &DAG)
 If we are extracting a subvector produced by a wide binary operator with at at least one operand that was the result of a vector concatenation, then try to use the narrow vector operands directly to avoid the concatenation and extraction. More...
 
static SDValue narrowExtractedVectorLoad (SDNode *Extract, SelectionDAG &DAG)
 If we are extracting a subvector from a wide vector load, convert to a narrow load to eliminate the extraction: (extract_subvector (load wide vector)) –> (load narrow vector) More...
 
static SDValue partitionShuffleOfConcats (SDNode *N, SelectionDAG &DAG)
 
static SDValue combineShuffleOfScalars (ShuffleVectorSDNode *SVN, SelectionDAG &DAG, const TargetLowering &TLI)
 
static SDValue combineShuffleToVectorExtend (ShuffleVectorSDNode *SVN, SelectionDAG &DAG, const TargetLowering &TLI, bool LegalOperations, bool LegalTypes)
 
static SDValue combineTruncationShuffle (ShuffleVectorSDNode *SVN, SelectionDAG &DAG)
 
static SDValue combineShuffleOfSplat (ArrayRef< int > UserMask, ShuffleVectorSDNode *Splat, SelectionDAG &DAG)
 
static int getShuffleMaskIndexOfOneElementFromOp0IntoOp1 (ArrayRef< int > Mask)
 If the shuffle mask is taking exactly one element from the first vector operand and passing through all other elements from the second vector operand, return the index of the mask element that is choosing an element from the first operand. More...
 
static SDValue replaceShuffleOfInsert (ShuffleVectorSDNode *Shuf, SelectionDAG &DAG)
 If a shuffle inserts exactly one element from a source vector operand into another vector operand and we can access the specified element as a scalar, then we can eliminate the shuffle. More...
 

Variables

static cl::opt< boolCombinerGlobalAA ("combiner-global-alias-analysis", cl::Hidden, cl::desc("Enable DAG combiner's use of IR alias analysis"))
 
static cl::opt< boolUseTBAA ("combiner-use-tbaa", cl::Hidden, cl::init(true), cl::desc("Enable DAG combiner's use of TBAA"))
 
static cl::opt< std::string > CombinerAAOnlyFunc ("combiner-aa-only-func", cl::Hidden, cl::desc("Only use DAG-combiner alias analysis in this" " function"))
 
static cl::opt< boolStressLoadSlicing ("combiner-stress-load-slicing", cl::Hidden, cl::desc("Bypass the profitability model of load slicing"), cl::init(false))
 Hidden option to stress test load slicing, i.e., when this option is enabled, load slicing bypasses most of its profitability guards. More...
 
static cl::opt< boolMaySplitLoadIndex ("combiner-split-load-index", cl::Hidden, cl::init(true), cl::desc("DAG combiner may split indexing from loads"))
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "dagcombine"

Definition at line 79 of file DAGCombiner.cpp.

Function Documentation

◆ adjustCostForPairing()

static void adjustCostForPairing ( SmallVectorImpl< LoadedSlice > &  LoadedSlices,
LoadedSlice::Cost &  GlobalLSCost 
)
static

Adjust the GlobalLSCost according to the target paring capabilities and the layout of the slices.

Precondition
GlobalLSCost should account for at least as many loads as there is in the slices in LoadedSlices.

Definition at line 12827 of file DAGCombiner.cpp.

References areSlicesNextToEachOther(), assert(), llvm::SmallVectorTemplateCommon< T >::begin(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::SmallVectorTemplateCommon< T >::size(), and llvm::sort().

Referenced by isSlicingProfitable().

◆ areSlicesNextToEachOther()

static bool areSlicesNextToEachOther ( const LoadedSlice &  First,
const LoadedSlice &  Second 
)
static

Check whether or not First and Second are next to each other in memory.

This means that there is no hole between the bits loaded by First and the bits loaded by Second.

Definition at line 12812 of file DAGCombiner.cpp.

References areUsedBitsDense(), and assert().

Referenced by adjustCostForPairing().

◆ areUsedBitsDense()

static bool areUsedBitsDense ( const APInt UsedBits)
static

Check that all bits set in UsedBits form a dense region, i.e., UsedBits looks like 0..0 1..1 0..0.

Definition at line 12795 of file DAGCombiner.cpp.

References llvm::APInt::countLeadingZeros(), llvm::APInt::countTrailingZeros(), llvm::APInt::getActiveBits(), llvm::APInt::isAllOnesValue(), llvm::APInt::lshr(), and llvm::APInt::trunc().

Referenced by areSlicesNextToEachOther(), and isSlicingProfitable().

◆ calculateByteProvider()

static const Optional<ByteProvider> calculateByteProvider ( SDValue  Op,
unsigned  Index,
unsigned  Depth,
bool  Root = false 
)
static

Recursively traverses the expression calculating the origin of the requested byte of the given value.

Returns None if the provider can't be calculated.

For all the values except the root of the expression verifies that the value has exactly one use and if it's not true return None. This way if the origin of the byte is returned it's guaranteed that the values which contribute to the byte are not used outside of this expression.

Because the parts of the expression are not allowed to have more than one use this function iterates over trees, not DAGs. So it never visits the same node more than once.

Definition at line 5406 of file DAGCombiner.cpp.

References llvm::ISD::ABS, llvm::ISD::ADD, llvm::ARMBuildAttrs::Allowed, llvm::TargetLoweringBase::allowsMemoryAccess(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::BITREVERSE, llvm::ISD::BRCOND, llvm::ISD::BSWAP, C, llvm::SelectionDAG::computeKnownBits(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::ISD::CopyFromReg, llvm::APInt::countTrailingZeros(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::dyn_cast(), llvm::SmallPtrSetImplBase::empty(), llvm::BaseIndexOffset::equalBaseIndex(), llvm::CallingConv::Fast, llvm::SelectionDAG::FoldConstantArithmetic(), llvm::MemSDNode::getAddressSpace(), llvm::MemSDNode::getAlignment(), llvm::SelectionDAG::getAllOnesConstant(), llvm::APInt::getAllOnesValue(), llvm::ConstantSDNode::getAPIntValue(), getAsNonOpaqueConstant(), llvm::LoadSDNode::getBasePtr(), llvm::TargetLoweringBase::getBooleanContents(), llvm::APInt::getBoolValue(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::SDNode::getFlags(), llvm::APInt::getHighBitsSet(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getLoad(), llvm::APInt::getLowBitsSet(), getMemory(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::LoadSDNode::getOffset(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSelectCC(), llvm::SelectionDAG::getSetCC(), llvm::ISD::getSetCCInverse(), llvm::SDValue::getSimpleValueType(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), llvm::ConstantSDNode::getZExtValue(), llvm::APInt::getZExtValue(), llvm::TargetLoweringBase::hasAndNot(), llvm::SDNodeFlags::hasExact(), llvm::SDNode::hasNUsesOfValue(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::SmallPtrSetImpl< PtrType >::insert(), INT64_MAX, llvm::isAllOnesConstant(), isAllOnesConstantOrAllOnesSplatConstant(), llvm::DataLayout::isBigEndian(), llvm::ISD::isBuildVectorAllZeros(), llvm::TargetLoweringBase::isCondCodeLegal(), llvm::BuildVectorSDNode::isConstant(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), isConstantOrConstantVector(), llvm::isConstOrConstSplat(), llvm::TargetLowering::isConstTrueVal(), llvm::TargetLowering::isDesirableToCommuteWithShift(), llvm::LSBaseSDNode::isIndexed(), llvm::isInt(), llvm::EVT::isInteger(), llvm::SelectionDAG::isKnownNeverZero(), llvm::APInt::isNegative(), llvm::isNullConstant(), isNullConstantOrNullSplatConstant(), llvm::ConstantSDNode::isNullValue(), llvm::isOneConstant(), llvm::ConstantSDNode::isOpaque(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::APInt::isPowerOf2(), llvm::EVT::isScalarInteger(), isShift(), llvm::TargetLoweringBase::isTruncateFree(), llvm::TargetLowering::isTypeDesirableForOp(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::MemSDNode::isVolatile(), llvm_unreachable, llvm::ISD::LOAD, llvm::Log2_32(), llvm::APInt::lshrInPlace(), llvm::BitmaskEnumDetail::Mask(), llvm::SelectionDAG::MaskedValueIsZero(), llvm::BaseIndexOffset::match(), llvm::ISD::matchBinaryPredicate(), llvm::ISD::matchUnaryPredicate(), llvm::ISD::MUL, llvm::None, llvm::KnownBits::One, llvm::ISD::OR, Other, P, llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::SelectionDAG::SignBitIsZero(), llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, std::swap(), llvm::ISD::TRUNCATE, tryFoldToZero(), llvm::APInt::uge(), llvm::SDNode::use_begin(), X, llvm::ISD::XOR, Y, llvm::KnownBits::Zero, llvm::ISD::ZERO_EXTEND, zeroExtendToMatch(), llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::ISD::ZEXTLOAD.

◆ CanCombineFCOPYSIGN_EXTEND_ROUND()

static bool CanCombineFCOPYSIGN_EXTEND_ROUND ( SDNode N)
inlinestatic

◆ canFoldInAddressingMode()

static bool canFoldInAddressingMode ( SDNode N,
SDNode Use,
SelectionDAG DAG,
const TargetLowering TLI 
)
static

Return true if 'Use' is a load or a store that uses N as its base pointer and that N may be folded in the load / store addressing mode.

Definition at line 11941 of file DAGCombiner.cpp.

References llvm::ISD::ADD, llvm::AfterLegalizeDAG, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, AS, assert(), llvm::ISD::BITCAST, llvm::SmallVectorImpl< T >::clear(), llvm::dbgs(), llvm::SDNode::dump(), llvm::dyn_cast(), llvm::MemSDNode::getAAInfo(), llvm::DataLayout::getABITypeAlignment(), llvm::LSBaseSDNode::getAddressingMode(), getAlignment(), llvm::MemSDNode::getAlignment(), llvm::LoadSDNode::getBasePtr(), llvm::StoreSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::TargetRegisterInfo::getCommonSubClass(), llvm::SelectionDAG::getConstant(), llvm::ConstantSDNode::getConstantIntValue(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::MachineMemOperand::getFlags(), llvm::SelectionDAG::getIndexedLoad(), llvm::SelectionDAG::getIndexedStore(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getLoad(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::LoadSDNode::getOffset(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::TargetLowering::getPostIndexedAddressParts(), llvm::TargetLowering::getPreIndexedAddressParts(), llvm::TargetLoweringBase::getRegClassFor(), llvm::TargetSubtargetInfo::getRegisterInfo(), llvm::ConstantSDNode::getSExtValue(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSimpleVT(), llvm::MemSDNode::getSrcValueOffset(), llvm::SelectionDAG::getSubtarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::EVT::getTypeForEVT(), llvm::SelectionDAG::getUNDEF(), llvm::SDUse::getUser(), llvm::SDValue::getValue(), llvm::StoreSDNode::getValue(), llvm::SDNode::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::MachinePointerInfo::getWithOffset(), llvm::SDNode::hasAnyUseOfValue(), llvm::SDNode::hasOneUse(), llvm::SDNode::hasPredecessorHelper(), llvm::SelectionDAG::InferPtrAlignment(), llvm::DataLayout::isBigEndian(), llvm::EVT::isExtended(), llvm::TargetLoweringBase::isIndexedLoadLegal(), llvm::TargetLoweringBase::isIndexedStoreLegal(), llvm::TargetLoweringBase::isLegalAddImmediate(), llvm::TargetLoweringBase::isLegalAddressingMode(), isLoad(), llvm::ISD::isNON_TRUNCStore(), llvm::ISD::isNormalLoad(), llvm::isNullConstant(), llvm::TargetLoweringBase::isOperationLegal(), llvm::SDNode::isPredecessorOf(), llvm::TargetLoweringBase::isTruncateFree(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::LSBaseSDNode::isUnindexed(), llvm::MemSDNode::isVolatile(), llvm::ARM_MB::LD, LLVM_DEBUG, llvm::ISD::LOAD, llvm::AArch64CC::LS, MaySplitLoadIndex, llvm::MinAlign(), N, llvm::ISD::NON_EXTLOAD, llvm::CodeGenOpt::None, llvm::operator!=(), llvm::operator+=(), llvm::operator<(), llvm::operator<=(), llvm::operator==(), llvm::operator>(), llvm::operator>=(), llvm::MVT::Other, llvm::ISD::POST_DEC, llvm::ISD::POST_INC, llvm::ISD::PRE_DEC, llvm::ISD::PRE_INC, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::APInt::setAllBits(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::ARM_MB::ST, llvm::ISD::SUB, std::swap(), llvm::ISD::TargetConstant, llvm::ISD::TokenFactor, TRI, llvm::RegState::Undef, llvm::ISD::UNINDEXED, llvm::MVT::Untyped, llvm::SDNode::use_begin(), llvm::SDNode::use_empty(), llvm::SDNode::use_end(), llvm::Value::uses(), llvm::SDNode::uses(), and llvm::ISD::ZERO_EXTEND.

◆ CheckForMaskedLoad()

static std::pair<unsigned, unsigned> CheckForMaskedLoad ( SDValue  V,
SDValue  Ptr,
SDValue  Chain 
)
static

◆ combineConcatVectorOfExtracts()

static SDValue combineConcatVectorOfExtracts ( SDNode N,
SelectionDAG DAG 
)
static

Definition at line 15847 of file DAGCombiner.cpp.

References llvm::AfterLegalizeVectorOps, llvm::all_of(), llvm::ISD::allOperandsUndef(), llvm::SmallVectorImpl< T >::append(), assert(), llvm::ISD::BITCAST, llvm::EVT::bitsLE(), llvm::ISD::BUILD_VECTOR, combineConcatVectorOfScalars(), llvm::dyn_cast(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getBuildVector(), llvm::SDValue::getConstantOperandVal(), llvm::SelectionDAG::getContext(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVectorShuffle(), llvm::EVT::getVectorVT(), llvm::ConstantSDNode::getZExtValue(), llvm::tgtok::In, llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::TargetLoweringBase::isShuffleMaskLegal(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::BitmaskEnumDetail::Mask(), llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::SDNode::ops(), llvm::peekThroughBitcast(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::NVPTX::PTXLdStInstCode::Scalar, llvm::ISD::SCALAR_TO_VECTOR, llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::TRUNCATE, and llvm::ISD::UNDEF.

◆ combineConcatVectorOfScalars()

static SDValue combineConcatVectorOfScalars ( SDNode N,
SelectionDAG DAG 
)
static

◆ combineMinNumMaxNum()

static SDValue combineMinNumMaxNum ( const SDLoc DL,
EVT  VT,
SDValue  LHS,
SDValue  RHS,
SDValue  True,
SDValue  False,
ISD::CondCode  CC,
const TargetLowering TLI,
SelectionDAG DAG 
)
static

Generate Min/Max node.

Definition at line 6794 of file DAGCombiner.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::EVT::bitsEq(), llvm::TargetLoweringBase::convertSelectOfConstantsToMath(), llvm::dyn_cast(), llvm::ISD::FMAXNUM, llvm::ISD::FMINNUM, llvm::TargetLoweringBase::getBooleanContents(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getTarget(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::MVT::i1, llvm::isBitwiseNot(), llvm::EVT::isFloatingPoint(), llvm::EVT::isInteger(), llvm::SelectionDAG::isKnownNeverNaN(), llvm::isNullConstant(), llvm::isOneConstant(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::TargetMachine::Options, llvm::ISD::OR, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::TargetLoweringBase::shouldNormalizeToSelectSequence(), llvm::ISD::SIGN_EXTEND, llvm::TargetOptions::UnsafeFPMath, llvm::SDValue::use_empty(), llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.

◆ combineShuffleOfScalars()

static SDValue combineShuffleOfScalars ( ShuffleVectorSDNode SVN,
SelectionDAG DAG,
const TargetLowering TLI 
)
static

◆ combineShuffleOfSplat()

static SDValue combineShuffleOfSplat ( ArrayRef< int >  UserMask,
ShuffleVectorSDNode Splat,
SelectionDAG DAG 
)
static

◆ combineShuffleToVectorExtend()

static SDValue combineShuffleToVectorExtend ( ShuffleVectorSDNode SVN,
SelectionDAG DAG,
const TargetLowering TLI,
bool  LegalOperations,
bool  LegalTypes 
)
static

◆ combineTruncationShuffle()

static SDValue combineTruncationShuffle ( ShuffleVectorSDNode SVN,
SelectionDAG DAG 
)
static

◆ ConvertSelectToConcatVector()

static SDValue ConvertSelectToConcatVector ( SDNode N,
SelectionDAG DAG 
)
static

Definition at line 7096 of file DAGCombiner.cpp.

References llvm::ISD::ABS, llvm::MCID::Add, llvm::ISD::ADD, llvm::AfterLegalizeTypes, assert(), llvm::ISD::BRCOND, llvm::ISD::BUILD_VECTOR, llvm::EVT::changeVectorElementTypeToInteger(), llvm::ISD::CONCAT_VECTORS, llvm::TargetLoweringBase::convertSelectOfConstantsToMath(), llvm::Data, llvm::dyn_cast(), llvm::MemSDNode::getAAInfo(), llvm::MaskedLoadStoreSDNode::getBasePtr(), llvm::MaskedGatherScatterSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::MaskedGatherScatterSDNode::getIndex(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::MaskedLoadStoreSDNode::getMask(), llvm::MaskedGatherScatterSDNode::getMask(), llvm::SelectionDAG::getMaskedGather(), llvm::SelectionDAG::getMaskedLoad(), llvm::SelectionDAG::getMaskedScatter(), llvm::SelectionDAG::getMaskedStore(), llvm::MemSDNode::getMemoryVT(), llvm::SelectionDAG::getMergeValues(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getOriginalAlignment(), llvm::MemSDNode::getPointerInfo(), llvm::MemSDNode::getRanges(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::MaskedGatherScatterSDNode::getScale(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSetCC(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::GetSplitDestVTs(), llvm::MaskedLoadSDNode::getSrc0(), llvm::EVT::getStoreSize(), llvm::TargetLoweringBase::getTypeAction(), llvm::SDValue::getValue(), llvm::MaskedStoreSDNode::getValue(), llvm::MaskedGatherScatterSDNode::getValue(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVTList(), llvm::SDNode::getVTList(), llvm::MachinePointerInfo::getWithOffset(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::MipsISD::Hi, llvm::TargetLowering::IncrementMemoryAddress(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::ISD::isBuildVectorOfConstantSDNodes(), llvm::MaskedStoreSDNode::isCompressingStore(), llvm::MaskedLoadSDNode::isExpandingLoad(), llvm::TargetLoweringBase::isLoadExtLegalOrCustom(), llvm::isNullConstant(), isNullConstantOrNullSplatConstant(), llvm::ConstantSDNode::isNullValue(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::ISD::isSignedIntSetCC(), llvm::MaskedStoreSDNode::isTruncatingStore(), llvm::SDValue::isUndef(), llvm::SDNode::isUndef(), llvm::MipsISD::Lo, llvm::ISD::LOAD, llvm::MachineMemOperand::MOLoad, llvm::MachineMemOperand::MOStore, N, llvm::ISD::NON_EXTLOAD, llvm::MVT::Other, llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SEXTLOAD, llvm::ISD::SIGN_EXTEND, llvm::SelectionDAG::SplitVector(), SplitVSETCC(), llvm::ISD::SRA, llvm::ISD::SUB, llvm::ISD::TokenFactor, llvm::TargetLoweringBase::TypeSplitVector, llvm::SDNode::use_begin(), llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZEXTLOAD.

◆ ExtendUsesToFormExtLoad()

static bool ExtendUsesToFormExtLoad ( EVT  VT,
SDNode N,
SDValue  N0,
unsigned  ExtOpc,
SmallVectorImpl< SDNode *> &  ExtendNodes,
const TargetLowering TLI 
)
static

Definition at line 7741 of file DAGCombiner.cpp.

References llvm::MCID::Add, llvm::ISD::ADD, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), B, llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, llvm::ISD::CopyToReg, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::MemSDNode::getAAInfo(), llvm::MemSDNode::getAlignment(), llvm::LoadSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::MachineMemOperand::getFlags(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::SDValue::getResNo(), llvm::SDUse::getResNo(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::GetSplitDestVTs(), llvm::EVT::getStoreSize(), llvm::SDUse::getUser(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::MachinePointerInfo::getWithOffset(), llvm::SDValue::hasOneUse(), llvm::LSBaseSDNode::isIndexed(), llvm::TargetLoweringBase::isLoadExtLegal(), llvm::TargetLoweringBase::isLoadExtLegalOrCustom(), llvm::ISD::isNON_EXTLoad(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::EVT::isPow2VectorType(), llvm::ISD::isSignedIntSetCC(), llvm::TargetLoweringBase::isTruncateFree(), llvm::ISD::isUNINDEXEDLoad(), llvm::EVT::isVector(), llvm::TargetLoweringBase::isVectorLoadExtDesirable(), llvm::MemSDNode::isVolatile(), llvm::ISD::LOAD, llvm::MinAlign(), llvm::ISD::OR, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::SETCC, llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::SRL, llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::SDNode::use_begin(), llvm::SDNode::use_end(), llvm::ISD::VSELECT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::APInt::zext(), and llvm::ISD::ZEXTLOAD.

Referenced by foldExtendedSignBitTest(), isTruncateOf(), and tryToFoldExtOfLoad().

◆ flipBoolean()

static SDValue flipBoolean ( SDValue  V,
const SDLoc DL,
EVT  VT,
SelectionDAG DAG,
const TargetLowering TLI 
)
static

◆ foldAddSubBoolOfMaskedVal()

static SDValue foldAddSubBoolOfMaskedVal ( SDNode N,
SelectionDAG DAG 
)
static

◆ foldBitcastedFPLogic()

static SDValue foldBitcastedFPLogic ( SDNode N,
SelectionDAG DAG,
const TargetLowering TLI 
)
static

Definition at line 9467 of file DAGCombiner.cpp.

References llvm::AfterLegalizeDAG, llvm::TargetLoweringBase::allowsMemoryAccess(), llvm::ISD::AND, llvm::SmallVectorImpl< T >::append(), assert(), llvm::SmallVectorTemplateCommon< T >::back(), llvm::ISD::BITCAST, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ShuffleVectorSDNode::commuteMask(), llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::dyn_cast(), llvm::ISD::EXTRACT_ELEMENT, llvm::ISD::FABS, llvm::CallingConv::Fast, llvm::ISD::FCOPYSIGN, llvm::ISD::FNEG, llvm::MemSDNode::getAAInfo(), llvm::MemSDNode::getAddressSpace(), llvm::MemSDNode::getAlignment(), llvm::ConstantSDNode::getAPIntValue(), llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getBuildVector(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::MachineMemOperand::getFlags(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getLoad(), llvm::ShuffleVectorSDNode::getMask(), llvm::MemSDNode::getMemOperand(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), getPPCf128HiElementSelector(), llvm::APInt::getSignMask(), llvm::EVT::getSizeInBits(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVectorShuffle(), llvm::EVT::getVectorVT(), llvm::TargetLoweringBase::hasBigEndianPartOrdering(), llvm::TargetLoweringBase::hasBitPreservingFPLogic(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::MipsISD::Hi, llvm::MVT::i64, llvm::DataLayout::isBigEndian(), llvm::ISD::isBuildVectorOfConstantFPSDNodes(), llvm::ISD::isBuildVectorOfConstantSDNodes(), isConstant(), llvm::TargetLoweringBase::isFAbsFree(), llvm::EVT::isFloatingPoint(), llvm::TargetLoweringBase::isFNegFree(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::TargetLoweringBase::isLoadBitCastBeneficial(), llvm::ISD::isNormalLoad(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isShuffleMaskLegal(), llvm::DefaultDOTGraphTraits::isSimple(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), isVolatile(), llvm::SPII::Load, llvm::ISD::LOAD, llvm::APInt::lshrInPlace(), llvm::SDNode::op_values(), llvm::ISD::OR, llvm::MVT::ppcf128, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::reverse(), llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SIGN_EXTEND, llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::SRL, std::swap(), llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::ISD::VECTOR_SHUFFLE, X, llvm::ISD::XOR, llvm::APInt::zext(), and llvm::APInt::zextOrTrunc().

◆ foldExtendedSignBitTest()

static SDValue foldExtendedSignBitTest ( SDNode N,
SelectionDAG DAG,
bool  LegalOperations 
)
static

Definition at line 8104 of file DAGCombiner.cpp.

References llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), llvm::EVT::changeVectorElementTypeToInteger(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::ISD::Constant, llvm::TargetLoweringBase::convertSelectOfConstantsToMath(), ExtendUsesToFormExtLoad(), llvm::SelectionDAG::getAllOnesConstant(), llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getBoolConstant(), llvm::TargetLoweringBase::getBooleanContents(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSetCC(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::EVT::getSizeInBits(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::SDNode::getValueType(), llvm::SDValue::hasOneUse(), llvm::MVT::i1, llvm::isAllOnesConstant(), llvm::TargetLoweringBase::isLoadExtLegal(), llvm::TargetLoweringBase::isOperationLegal(), llvm::LSBaseSDNode::isUnindexed(), llvm::EVT::isVector(), llvm::ISD::OR, llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::SETCC, llvm::ISD::SETGT, llvm::APInt::sext(), llvm::ISD::SEXTLOAD, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::SelectionDAG::SignBitIsZero(), llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::TRUNCATE, tryToFoldExtendOfConstant(), tryToFoldExtOfExtload(), tryToFoldExtOfLoad(), X, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::TargetLoweringBase::ZeroOrNegativeOneBooleanContent, and llvm::ISD::ZEXTLOAD.

Referenced by isTruncateOf().

◆ foldFPToIntToFP()

static SDValue foldFPToIntToFP ( SDNode N,
SelectionDAG DAG,
const TargetLowering TLI 
)
static

◆ FoldIntToFPToInt()

static SDValue FoldIntToFPToInt ( SDNode N,
SelectionDAG DAG 
)
static

Definition at line 11405 of file DAGCombiner.cpp.

References llvm::AfterLegalizeDAG, llvm::ISD::AND, llvm::ISD::BITCAST, llvm::EVT::bitsLT(), llvm::ISD::BR_CC, llvm::ISD::BRCOND, llvm::APFloat::changeSign(), llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::dyn_cast(), llvm::object::Equal, llvm::SelectionDAG::EVTToAPFloatSemantics(), llvm::ISD::EXTLOAD, llvm::MVT::f16, llvm::MVT::f80, llvm::ISD::FABS, llvm::ISD::FCEIL, llvm::ISD::FCOPYSIGN, llvm::ISD::FFLOOR, llvm::ISD::FMAXNUM, llvm::ISD::FMINNUM, llvm::ISD::FMUL, llvm::ISD::FNEARBYINT, llvm::ISD::FNEG, llvm::ISD::FP16_TO_FP, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FRINT, llvm::ISD::FTRUNC, llvm::CondCodeSDNode::get(), llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getBitcast(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getConstantFP(), llvm::ConstantFPSDNode::getConstantFPValue(), llvm::SDValue::getConstantOperandVal(), llvm::SDNode::getConstantOperandVal(), llvm::SelectionDAG::getExtLoad(), llvm::SDNode::getFlags(), llvm::SelectionDAG::getIntPtrConstant(), llvm::MemSDNode::getMemOperand(), GetNegatedExpression(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::TargetLoweringBase::getOperationAction(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSetCC(), llvm::APInt::getSignMask(), llvm::EVT::getSizeInBits(), llvm::APInt::getSplat(), llvm::SelectionDAG::getTarget(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SDValue::getValue(), llvm::HandleSDNode::getValue(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::tgtok::In, isConstantFPBuildVectorOrConstantFP(), llvm::isConstOrConstSplatFP(), llvm::TargetLoweringBase::isFAbsFree(), llvm::TargetLoweringBase::isFNegFree(), llvm::TargetLoweringBase::isFPImmLegal(), llvm::EVT::isInteger(), llvm::TargetLoweringBase::isLoadExtLegal(), isNegatibleForFree(), llvm::ISD::isNormalLoad(), llvm::isOneConstant(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::APInt::isPowerOf2(), llvm::EVT::isVector(), llvm::TargetLoweringBase::Legal, llvm::APInt::logBase2(), llvm::maxnum(), llvm::minnum(), llvm::TargetMachine::Options, llvm::MVT::Other, llvm::APFloatBase::semanticsPrecision(), llvm::ISD::SETCC, llvm::ISD::SETEQ, llvm::ISD::SETNE, llvm::ISD::SIGN_EXTEND, llvm::ISD::SINT_TO_FP, llvm::ISD::SRL, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::TargetOptions::UnsafeFPMath, llvm::SDNode::use_begin(), llvm::ISD::XOR, and llvm::ISD::ZERO_EXTEND.

◆ getAsCarry()

static SDValue getAsCarry ( const TargetLowering TLI,
SDValue  V 
)
static

◆ getAsNonOpaqueConstant()

static ConstantSDNode* getAsNonOpaqueConstant ( SDValue  N)
static

◆ getBuildPairElt()

static SDNode* getBuildPairElt ( SDNode N,
unsigned  i 
)
static

◆ getInputChainForNode()

static SDValue getInputChainForNode ( SDNode N)
static

◆ GetNegatedExpression()

static SDValue GetNegatedExpression ( SDValue  Op,
SelectionDAG DAG,
bool  LegalOperations,
unsigned  Depth = 0 
)
static

◆ getPPCf128HiElementSelector()

static unsigned getPPCf128HiElementSelector ( const SelectionDAG DAG)
static

◆ getShuffleMaskIndexOfOneElementFromOp0IntoOp1()

static int getShuffleMaskIndexOfOneElementFromOp0IntoOp1 ( ArrayRef< int >  Mask)
static

If the shuffle mask is taking exactly one element from the first vector operand and passing through all other elements from the second vector operand, return the index of the mask element that is choosing an element from the first operand.

Otherwise, return -1.

Definition at line 16626 of file DAGCombiner.cpp.

References llvm::ArrayRef< T >::size().

Referenced by replaceShuffleOfInsert().

◆ isAllOnesConstantOrAllOnesSplatConstant()

static bool isAllOnesConstantOrAllOnesSplatConstant ( SDValue  N)
static

◆ isAnyConstantBuildVector()

static bool isAnyConstantBuildVector ( const SDNode N)
static

Definition at line 943 of file DAGCombiner.cpp.

References llvm::ISD::ABS, llvm::ISD::ADD, llvm::ISD::ADDC, llvm::ISD::ADDCARRY, llvm::ISD::ADDE, llvm::AfterLegalizeDAG, llvm::AfterLegalizeTypes, llvm::AfterLegalizeVectorOps, llvm::SelectionDAG::allnodes(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::BITCAST, llvm::ISD::BITREVERSE, llvm::ISD::BR_CC, llvm::ISD::BRCOND, llvm::ISD::BSWAP, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::ISD::BUILTIN_OP_END, llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, llvm::SmallPtrSetImpl< PtrType >::count(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::dbgs(), llvm::ISD::DELETED_NODE, llvm::SelectionDAG::DeleteNode(), llvm::NVPTXISD::Dummy, llvm::SDNode::dump(), llvm::SetVector< T, SmallVector< T, N >, SmallDenseSet< T, N > >::empty(), llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::empty(), llvm::DenseMapBase< DenseMap< KeyT, ValueT, KeyInfoT, BucketT >, KeyT, ValueT, KeyInfoT, BucketT >::erase(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FCEIL, llvm::ISD::FCOPYSIGN, llvm::ISD::FDIV, llvm::ISD::FFLOOR, llvm::ISD::FMA, llvm::ISD::FMAXNUM, llvm::ISD::FMINNUM, llvm::ISD::FMUL, llvm::ISD::FNEG, llvm::SelectionDAG::FoldConstantArithmetic(), llvm::ISD::FP16_TO_FP, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FP_ROUND_INREG, llvm::ISD::FP_TO_FP16, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FREM, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::ISD::FTRUNC, llvm::LoadSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::SDNode::getFlags(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNodeIfExists(), llvm::SDNode::getNumValues(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SelectionDAG::getRoot(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::SDNode::getValueType(), llvm::SDNode::getVTList(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::TargetLoweringBase::hasTargetDAGCombine(), llvm::SetVector< T, SmallVector< T, N >, SmallDenseSet< T, N > >::insert(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::isBuildVectorOfConstantFPSDNodes(), llvm::ISD::isBuildVectorOfConstantSDNodes(), llvm::EVT::isByteSized(), llvm::TargetLoweringBase::isCommutativeBinOp(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), llvm::TargetLowering::IsDesirableToPromoteOp(), llvm::EVT::isInteger(), llvm::ISD::isNON_EXTLoad(), llvm::TargetLoweringBase::isOperationLegal(), llvm::SDNode::isPredecessorOf(), llvm::TargetLowering::isTypeDesirableForOp(), llvm::ISD::isUNINDEXEDLoad(), llvm::EVT::isVector(), llvm::ARM_MB::LD, llvm::SelectionDAG::LegalizeOp(), LLVM_DEBUG, llvm::SPII::Load, llvm::ISD::LOAD, llvm::ISD::MERGE_VALUES, llvm::ISD::MGATHER, llvm::ISD::MLOAD, llvm::ISD::MSCATTER, llvm::ISD::MSTORE, llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, N, llvm::TargetLowering::TargetLoweringOpt::New, llvm::TargetLowering::TargetLoweringOpt::Old, llvm::SDNode::op_values(), llvm::ISD::OR, llvm::TargetLowering::PerformDAGCombine(), llvm::SetVector< T, SmallVector< T, N >, SmallDenseSet< T, N > >::pop_back_val(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SelectionDAG::RemoveDeadNodes(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SDIV, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETCCCARRY, llvm::SelectionDAG::setRoot(), llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::TargetLowering::SimplifyDemandedBits(), llvm::TargetLowering::SimplifyDemandedVectorElts(), llvm::ISD::SINT_TO_FP, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SMUL_LOHI, llvm::ISD::SMULO, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::SUBCARRY, llvm::ISD::SUBE, std::swap(), llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UDIV, llvm::ISD::UINT_TO_FP, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UMUL_LOHI, llvm::ISD::UMULO, llvm::ISD::UREM, llvm::SDNode::use_empty(), llvm::ISD::USUBO, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSELECT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZERO_EXTEND_VECTOR_INREG.

Referenced by combineShuffleOfScalars().

◆ isBooleanFlip()

static bool isBooleanFlip ( SDValue  V,
EVT  VT,
const TargetLowering TLI 
)
static

◆ isBSwapHWordElement()

static bool isBSwapHWordElement ( SDValue  N,
MutableArrayRef< SDNode *>  Parts 
)
static

Return true if the specified node is an element that makes up a 32-bit packed halfword byteswap.

((x & 0x000000ff) << 8) | ((x & 0x0000ff00) >> 8) | ((x & 0x00ff0000) << 8) | ((x & 0xff000000) >> 8)

Definition at line 4706 of file DAGCombiner.cpp.

References llvm::ISD::AND, assert(), llvm::ISD::BSWAP, C, llvm::ShuffleVectorSDNode::commuteMask(), llvm::dyn_cast(), llvm::SelectionDAG::FoldConstantArithmetic(), llvm::SelectionDAG::getAllOnesConstant(), llvm::ConstantSDNode::getAPIntValue(), getAsNonOpaqueConstant(), llvm::SelectionDAG::getConstant(), llvm::ShuffleVectorSDNode::getMaskElt(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVectorShuffle(), llvm::ConstantSDNode::getZExtValue(), llvm::SDNode::hasOneUse(), llvm::MVT::i32, llvm::APInt::intersects(), llvm::isAllOnesConstant(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), llvm::isNullConstant(), llvm::ConstantSDNode::isOpaque(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::TargetLoweringBase::isShuffleMaskLegal(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::BitmaskEnumDetail::Mask(), llvm::SelectionDAG::MaskedValueIsZero(), llvm::ISD::matchBinaryPredicate(), llvm::ISD::OR, llvm::AArch64_AM::ROR, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SHL, llvm::ISD::SRL, std::swap(), and X.

◆ isConstantFPBuildVectorOrConstantFP()

static SDNode* isConstantFPBuildVectorOrConstantFP ( SDValue  N)
static

◆ isConstantOrConstantVector()

static bool isConstantOrConstantVector ( SDValue  N,
bool  NoOpaques = false 
)
static

◆ isContractable()

static bool isContractable ( SDNode N)
static

◆ isDivRemLibcallAvailable()

static bool isDivRemLibcallAvailable ( SDNode Node,
bool  isSigned,
const TargetLowering TLI 
)
static

◆ isFMulNegTwo()

static bool isFMulNegTwo ( SDValue N)
static

Definition at line 10487 of file DAGCombiner.cpp.

References llvm::MCID::Add, llvm::AfterLegalizeDAG, llvm::TargetLowering::combineRepeatedFPDivisors(), llvm::ISD::ConstantFP, llvm::dyn_cast(), llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FDIV, llvm::ISD::FMA, llvm::ISD::FMUL, llvm::ISD::FNEG, llvm::ISD::FP_EXTEND, llvm::ISD::FP_ROUND, llvm::ISD::FREM, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::SelectionDAG::getConstantFP(), llvm::SDNode::getFlags(), GetNegatedExpression(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::APFloat::getSemantics(), llvm::SelectionDAG::getTarget(), llvm::SDNode::getValueType(), llvm::SDNodeFlags::hasAllowReassociation(), llvm::SDNodeFlags::hasAllowReciprocal(), llvm::SDNodeFlags::hasApproximateFuncs(), llvm::SDNodeFlags::hasNoNaNs(), llvm::SDNodeFlags::hasNoSignedZeros(), llvm::SDValue::hasOneUse(), llvm::SetVector< T, Vector, Set >::insert(), isConstantFPBuildVectorOrConstantFP(), llvm::isConstOrConstSplatFP(), isContractable(), llvm::ConstantFPSDNode::isExactlyValue(), llvm::TargetLoweringBase::isFPImmLegal(), llvm::TargetLoweringBase::isFsqrtCheap(), isNegatibleForFree(), llvm::ConstantFPSDNode::isNegative(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::EVT::isVector(), llvm::ConstantFPSDNode::isZero(), LLVM_FALLTHROUGH, llvm::TargetOptions::NoSignedZerosFPMath, llvm::APFloatBase::opInexact, llvm::APFloatBase::opOK, llvm::TargetMachine::Options, llvm::APFloatBase::rmNearestTiesToEven, llvm::MCID::Select, llvm::ISD::SELECT, llvm::ISD::SETCC, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::SetVector< T, Vector, Set >::size(), std::swap(), llvm::TargetOptions::UnsafeFPMath, llvm::SDNode::use_size(), Users, llvm::SDNode::uses(), and X.

◆ isNegatibleForFree()

static char isNegatibleForFree ( SDValue  Op,
bool  LegalOperations,
const TargetLowering TLI,
const TargetOptions Options,
unsigned  Depth = 0 
)
static

◆ isNullConstantOrNullSplatConstant()

static bool isNullConstantOrNullSplatConstant ( SDValue  N)
static

◆ isOneConstantOrOneSplatConstant()

static bool isOneConstantOrOneSplatConstant ( SDValue  N)
static

◆ isSlicingProfitable()

static bool isSlicingProfitable ( SmallVectorImpl< LoadedSlice > &  LoadedSlices,
const APInt UsedBits,
bool  ForCodeSize 
)
static

Check the profitability of all involved LoadedSlice.

Currently, it is considered profitable if there is exactly two involved slices (1) which are (2) next to each other in memory, and whose cost (

See also
LoadedSlice::Cost) is smaller than the original load (3).

Note: The order of the elements in LoadedSlices may be modified, but not the elements themselves.

FIXME: When the cost model will be mature enough, we can relax constraints (1) and (2).

Definition at line 12894 of file DAGCombiner.cpp.

References adjustCostForPairing(), llvm::AfterLegalizeDAG, areUsedBitsDense(), assert(), llvm::SDNode::getConstantOperandVal(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDValue::getValue(), llvm::SDNode::getValueSizeInBits(), llvm::SDNode::getValueType(), llvm::SDNode::hasOneUse(), llvm::EVT::isInteger(), llvm::ISD::isNormalLoad(), llvm::isPowerOf2_32(), llvm::MemSDNode::isVolatile(), llvm::ISD::LOAD, llvm::AArch64CC::LS, N, llvm::MVT::Other, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::ISD::SRL, StressLoadSlicing, llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, llvm::SDNode::use_begin(), and llvm::SDNode::use_end().

◆ isTruncateOf()

static bool isTruncateOf ( SelectionDAG DAG,
SDValue  N,
SDValue Op,
KnownBits Known 
)
static

Definition at line 8346 of file DAGCombiner.cpp.

References llvm::ISD::ADD, llvm::ISD::ADDCARRY, llvm::ISD::ADDE, llvm::AfterLegalizeVectorOps, llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::ANY_EXTEND_VECTOR_INREG, assert(), llvm::ISD::BITCAST, llvm::EVT::bitsGT(), llvm::EVT::bitsLE(), llvm::EVT::bitsLT(), llvm::ISD::BUILD_VECTOR, C, llvm::EVT::changeVectorElementTypeToInteger(), llvm::SelectionDAG::computeKnownBits(), llvm::SelectionDAG::ComputeNumSignBits(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, llvm::KnownBits::countMinLeadingZeros(), llvm::APInt::countTrailingOnes(), llvm::dyn_cast(), ExtendUsesToFormExtLoad(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, foldExtendedSignBitTest(), llvm::MemSDNode::getAAInfo(), llvm::MemSDNode::getAlignment(), llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::ConstantSDNode::getAPIntValue(), llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getBitcast(), llvm::APInt::getBitsSet(), llvm::KnownBits::getBitWidth(), llvm::SelectionDAG::getBuildVector(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::GetDemandedBits(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::MachineMemOperand::getFlags(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getLoad(), llvm::APInt::getLowBitsSet(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getNumOperands(), llvm::APInt::getOneBitSet(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSetCC(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::SelectionDAG::getSignExtendVectorInReg(), llvm::EVT::getSizeInBits(), llvm::EVT::getStoreSizeInBits(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), llvm::SelectionDAG::getVTList(), llvm::MachinePointerInfo::getWithOffset(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::SDNode::hasAnyUseOfValue(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::MVT::i1, llvm::MVT::i32, llvm::DataLayout::isBigEndian(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), llvm::ISD::isEXTLoad(), llvm::DataLayout::isLittleEndian(), llvm::TargetLoweringBase::isLoadExtLegal(), llvm::APInt::isMask(), llvm::TargetLoweringBase::isNarrowingProfitable(), llvm::ISD::isNON_EXTLoad(), llvm::isNullConstant(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::APInt::isSubsetOf(), llvm::TargetLoweringBase::isTruncateFree(), llvm::TargetLowering::isTypeDesirableForOp(), llvm::isUIntN(), llvm::SDValue::isUndef(), llvm::LSBaseSDNode::isUnindexed(), llvm::ISD::isUNINDEXEDLoad(), llvm::EVT::isVector(), isVolatile(), llvm::MemSDNode::isVolatile(), llvm::TargetLoweringBase::isZExtFree(), llvm::ISD::isZEXTLoad(), llvm::SPII::Load, llvm::ISD::LOAD, llvm::Log2_32(), llvm::SelectionDAG::MaskedValueIsZero(), llvm::MinAlign(), N, llvm::ISD::NON_EXTLOAD, llvm::ISD::OR, llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::ISD::SELECT, llvm::ISD::SETCC, llvm::ISD::SETNE, llvm::SDNodeFlags::setNoUnsignedWrap(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SIGN_EXTEND_VECTOR_INREG, llvm::SmallVectorTemplateCommon< T >::size(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Size, llvm::ISD::SRA, llvm::ISD::SRL, llvm::SelectionDAG::transferDbgValues(), llvm::ISD::TRUNCATE, tryToFoldExtendOfConstant(), tryToFoldExtOfExtload(), tryToFoldExtOfLoad(), llvm::SDNode::use_begin(), X, llvm::ISD::XOR, Y, llvm::KnownBits::Zero, llvm::ISD::ZERO_EXTEND, llvm::ISD::ZERO_EXTEND_VECTOR_INREG, llvm::APInt::zext(), and llvm::ISD::ZEXTLOAD.

◆ matchRotateSub()

static bool matchRotateSub ( SDValue  Pos,
SDValue  Neg,
unsigned  EltSize,
SelectionDAG DAG 
)
static

◆ narrowExtractedVectorBinOp()

static SDValue narrowExtractedVectorBinOp ( SDNode Extract,
SelectionDAG DAG 
)
static

◆ narrowExtractedVectorLoad()

static SDValue narrowExtractedVectorLoad ( SDNode Extract,
SelectionDAG DAG 
)
static

If we are extracting a subvector from a wide vector load, convert to a narrow load to eliminate the extraction: (extract_subvector (load wide vector)) –> (load narrow vector)

Definition at line 16171 of file DAGCombiner.cpp.

References llvm::AfterLegalizeDAG, assert(), llvm::EVT::bitsEq(), llvm::ISD::BUILD_VECTOR, llvm::ISD::CONCAT_VECTORS, llvm::dyn_cast(), llvm::ISD::EXTRACT_SUBVECTOR, llvm::SelectionDAG::getBitcast(), llvm::SelectionDAG::getBuildVector(), llvm::SDNode::getConstantOperandVal(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMachineFunction(), llvm::MachineFunction::getMachineMemOperand(), llvm::SelectionDAG::getMemBasePlusOffset(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::EVT::getSizeInBits(), llvm::EVT::getStoreSize(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::EVT::getVectorVT(), llvm::ConstantSDNode::getZExtValue(), llvm::ISD::INSERT_SUBVECTOR, llvm::DataLayout::isBigEndian(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustomOrPromote(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::ISD::LOAD, llvm::makeArrayRef(), llvm::SelectionDAG::makeEquivalentMemoryOrdering(), narrowExtractedVectorBinOp(), llvm::SDNode::op_begin(), llvm::peekThroughBitcast(), and llvm::ISD::TRUNCATE.

◆ partitionShuffleOfConcats()

static SDValue partitionShuffleOfConcats ( SDNode N,
SelectionDAG DAG 
)
static

◆ peekThroughBitcast()

static SDValue peekThroughBitcast ( SDValue  V)
static

◆ replaceShuffleOfInsert()

static SDValue replaceShuffleOfInsert ( ShuffleVectorSDNode Shuf,
SelectionDAG DAG 
)
static

If a shuffle inserts exactly one element from a source vector operand into another vector operand and we can access the specified element as a scalar, then we can eliminate the shuffle.

Definition at line 16650 of file DAGCombiner.cpp.

References llvm::MCID::Add, llvm::ISD::ADD, llvm::AfterLegalizeDAG, llvm::AfterLegalizeVectorOps, llvm::AAResults::alias(), llvm::ISD::AND, Arg, assert(), B, llvm::ArrayRef< T >::begin(), llvm::ISD::BITCAST, llvm::tgtok::Bits, llvm::EVT::bitsGE(), llvm::EVT::bitsGT(), llvm::EVT::bitsLT(), llvm::ISD::BUILD_VECTOR, llvm::TargetLowering::BuildSDIV(), llvm::TargetLowering::BuildSDIVPow2(), llvm::TargetLowering::BuildUDIV(), C, llvm::SmallVectorImpl< T >::clear(), CombinerAAOnlyFunc, CombinerGlobalAA, combineShuffleOfScalars(), combineShuffleOfSplat(), combineShuffleToVectorExtend(), combineTruncationShuffle(), llvm::ShuffleVectorSDNode::commuteMask(), llvm::ISD::CONCAT_VECTORS, llvm::ISD::ConstantFP, llvm::ISD::CopyFromReg, llvm::APInt::countLeadingZeros(), llvm::APInt::countPopulation(), llvm::ISD::CTLZ, llvm::ISD::CTLZ_ZERO_UNDEF, llvm::ISD::CTTZ, llvm::ISD::CTTZ_ZERO_UNDEF, llvm::Depth, llvm::dyn_cast(), llvm::SmallVectorBase::empty(), Enabled, llvm::ArrayRef< T >::end(), llvm::ISD::EntryToken, llvm::BaseIndexOffset::equalBaseIndex(), llvm::StringRef::equals(), llvm::SelectionDAG::EVTToAPFloatSemantics(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, F(), llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FABS, llvm::ISD::FADD, llvm::ISD::FMUL, llvm::SelectionDAG::FoldConstantVectorArithmetic(), llvm::ISD::FP16_TO_FP, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::ArrayType::get(), llvm::ConstantArray::get(), llvm::MemSDNode::getAAInfo(), llvm::MachinePointerInfo::getAddrSpace(), getAlignment(), llvm::MemSDNode::getAlignment(), llvm::ConstantSDNode::getAPIntValue(), getAsNonOpaqueConstant(), llvm::BaseIndexOffset::getBase(), llvm::MemSDNode::getBasePtr(), llvm::LoadSDNode::getBasePtr(), llvm::SelectionDAG::getBitcast(), llvm::APInt::getBitWidth(), llvm::TargetLoweringBase::getBooleanContents(), llvm::SelectionDAG::getBuildVector(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getCommutedVectorShuffle(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getConstantFP(), llvm::SDValue::getConstantOperandVal(), llvm::MachinePointerInfo::getConstantPool(), llvm::SelectionDAG::getConstantPool(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::TargetLoweringBase::getDivRefinementSteps(), llvm::SelectionDAG::getEntryNode(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::MachineMemOperand::getFlags(), llvm::SDNode::getFlags(), llvm::Function::getFnAttribute(), llvm::MachineFunction::getFrameInfo(), llvm::MachineFunction::getFunction(), llvm::TargetLoweringBase::getGatherAllAliasesMaxDepth(), llvm::BaseIndexOffset::getIndex(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getIntPtrConstant(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMachineFunction(), llvm::ShuffleVectorSDNode::getMask(), llvm::ShuffleVectorSDNode::getMaskElt(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::MachineFunction::getName(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDValue::getNumOperands(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::TargetLoweringBase::getOperationAction(), llvm::MemSDNode::getOriginalAlignment(), llvm::MemSDNode::getPointerInfo(), llvm::TargetLoweringBase::getPointerTy(), llvm::DataLayout::getPrefTypeAlignment(), llvm::TargetLowering::getRecipEstimate(), llvm::TargetLoweringBase::getRecipEstimateDivEnabled(), llvm::TargetLoweringBase::getRecipEstimateSqrtEnabled(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSetCC(), getShuffleMaskIndexOfOneElementFromOp0IntoOp1(), llvm::EVT::getSizeInBits(), llvm::APFloat::getSmallestNormalized(), llvm::ShuffleVectorSDNode::getSplatIndex(), llvm::TargetLowering::getSqrtEstimate(), llvm::TargetLoweringBase::getSqrtRefinementSteps(), llvm::MemSDNode::getSrcValueOffset(), llvm::EVT::getStoreSize(), llvm::SelectionDAG::getSubtarget(), llvm::Value::getType(), llvm::DataLayout::getTypeAllocSize(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValue(), llvm::MachineMemOperand::getValue(), llvm::Attribute::getValueAsString(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVectorShuffle(), llvm::EVT::getVectorVT(), llvm::SelectionDAG::getZeroExtendInReg(), llvm::TargetLoweringBase::hasAndNot(), llvm::SDNode::hasAnyUseOfValue(), llvm::SDValue::hasOneUse(), llvm::MVT::i1, llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::isAllOnesConstant(), llvm::APInt::isAllOnesValue(), llvm::ConstantSDNode::isAllOnesValue(), llvm::DataLayout::isBigEndian(), llvm::isConstOrConstSplat(), llvm::isConstOrConstSplatFP(), llvm::MachineFrameInfo::isFixedObjectIndex(), llvm::TargetLoweringBase::isFPImmLegal(), llvm::LSBaseSDNode::isIndexed(), llvm::EVT::isInteger(), llvm::MemSDNode::isInvariant(), llvm::isNullConstant(), llvm::ConstantSDNode::isNullValue(), llvm::ConstantSDNode::isOne(), llvm::isOneConstant(), llvm::SDNode::isOnlyUserOf(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::SDNode::isPredecessorOf(), llvm::EVT::isScalarInteger(), llvm::TargetLoweringBase::isShuffleMaskLegal(), llvm::ShuffleVectorSDNode::isSplat(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::SDNode::isUndef(), llvm::EVT::isVector(), llvm::TargetLoweringBase::isVectorClearMaskLegal(), isVolatile(), llvm::MemSDNode::isVolatile(), llvm::ConstantFPSDNode::isZero(), llvm::TargetLoweringBase::Legal, llvm::SPII::Load, llvm::ISD::LOAD, llvm::APInt::lshrInPlace(), llvm::BitmaskEnumDetail::Mask(), llvm::BaseIndexOffset::match(), llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MOInvariant, N, llvm::NoAlias, llvm::ISD::NON_EXTLOAD, llvm::CodeGenOpt::None, llvm::SDNode::op_begin(), llvm::SDNode::op_end(), llvm::Function::optForMinSize(), llvm::MVT::Other, partitionShuffleOfConcats(), llvm::peekThroughBitcast(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::SmallVectorTemplateBase< T, isPodLike >::push_back(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::ISD::SCALAR_TO_VECTOR, second, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETOLT, llvm::ISD::SETULT, llvm::ISD::SHL, llvm::TargetLowering::SimplifySetCC(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::ArrayRef< T >::size(), Split(), llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUB, std::swap(), llvm::ISD::TokenFactor, llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::TargetSubtargetInfo::useAA(), UseTBAA, llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::VSELECT, llvm::MemSDNode::writeMem(), llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::TargetLoweringBase::ZeroOrOneBooleanContent.

◆ ShrinkLoadReplaceStoreWithStore()

static SDNode* ShrinkLoadReplaceStoreWithStore ( const std::pair< unsigned, unsigned > &  MaskInfo,
SDValue  IVal,
StoreSDNode St,
DAGCombiner *  DC 
)
static

Check to see if IVal is something that provides a value as specified by MaskInfo.

If so, replace the specified store with a narrower store of truncated IVal.

Definition at line 13108 of file DAGCombiner.cpp.

References llvm::ISD::ADD, llvm::AfterLegalizeTypes, llvm::AfterLegalizeVectorOps, llvm::TargetLoweringBase::aggressivelyPreferBuildVectorSources(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Align, llvm::all_of(), llvm::ISD::allOperandsUndef(), llvm::TargetLoweringBase::allowsMemoryAccess(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::SmallVectorImpl< T >::append(), assert(), llvm::SmallVectorTemplateCommon< T >::back(), llvm::SmallVectorTemplateCommon< T >::begin(), llvm::ISD::BITCAST, llvm::APFloat::bitcastToAPInt(), llvm::EVT::bitsEq(), llvm::EVT::bitsGT(), llvm::EVT::bitsLT(), llvm::ISD::BUILD_VECTOR, C, llvm::TargetLoweringBase::canMergeStoresTo(), CheckForMaskedLoad(), Concat, llvm::ISD::CONCAT_VECTORS, llvm::ISD::Constant, Context, llvm::SmallPtrSetImpl< PtrType >::count(), llvm::APInt::countLeadingZeros(), llvm::APInt::countTrailingZeros(), llvm::ISD::DELETED_NODE, llvm::dyn_cast(), E, llvm::SmallVectorBase::empty(), llvm::SmallVectorTemplateCommon< T >::end(), llvm::BaseIndexOffset::equalBaseIndex(), llvm::SmallVectorImpl< T >::erase(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_SUBVECTOR, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::MVT::f128, llvm::MVT::f16, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::f80, llvm::CallingConv::Fast, llvm::find(), llvm::ISD::FP_ROUND, llvm::MemSDNode::getAAInfo(), llvm::DataLayout::getABITypeAlignment(), llvm::MemSDNode::getAddressSpace(), llvm::MachinePointerInfo::getAddrSpace(), llvm::MemSDNode::getAlignment(), llvm::APInt::getAllOnesValue(), llvm::SelectionDAG::getAnyExtOrTrunc(), llvm::ConstantSDNode::getAPIntValue(), llvm::BaseIndexOffset::getBase(), llvm::MemSDNode::getBasePtr(), llvm::LoadSDNode::getBasePtr(), llvm::StoreSDNode::getBasePtr(), llvm::SelectionDAG::getBitcast(), llvm::APInt::getBitsSet(), llvm::SelectionDAG::getBuildVector(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getConstantFP(), llvm::SDValue::getConstantOperandVal(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::SelectionDAG::GetDemandedBits(), llvm::SelectionDAG::getExtLoad(), llvm::MachineMemOperand::getFlags(), llvm::MachineFunction::getFunction(), llvm::EVT::getIntegerVT(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getLoad(), llvm::APInt::getLowBitsSet(), llvm::SelectionDAG::getMachineFunction(), llvm::ShuffleVectorSDNode::getMaskElt(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::APInt::getNullValue(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::MemSDNode::getPointerInfo(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getScalarType(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSExtOrTrunc(), llvm::SDNode::getSimpleValueType(), llvm::EVT::getSizeInBits(), llvm::getSplatValue(), llvm::MemSDNode::getSrcValueOffset(), llvm::SelectionDAG::getStore(), llvm::EVT::getStoreSize(), llvm::EVT::getStoreSizeInBits(), llvm::SelectionDAG::getTruncStore(), llvm::TargetLoweringBase::getTypeAction(), llvm::EVT::getTypeForEVT(), llvm::TargetLoweringBase::getTypeToTransformTo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValue(), llvm::StoreSDNode::getValue(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::TargetLoweringBase::getVectorIdxTy(), llvm::EVT::getVectorNumElements(), llvm::SelectionDAG::getVectorShuffle(), llvm::EVT::getVectorVT(), llvm::MachinePointerInfo::getWithOffset(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::ConstantSDNode::getZExtValue(), llvm::APInt::getZExtValue(), llvm::Function::hasFnAttribute(), llvm::SDNode::hasNUsesOfValue(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::TargetLoweringBase::hasPairedLoad(), llvm::SDNode::hasPredecessor(), llvm::SDNode::hasPredecessorHelper(), llvm::MipsISD::Hi, I, llvm::MVT::i32, llvm::MVT::i64, llvm::tgtok::In, llvm::SelectionDAG::InferPtrAlignment(), llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::ISD::INSERT_SUBVECTOR, llvm::ISD::INSERT_VECTOR_ELT, llvm::APInt::isAllOnesValue(), llvm::DataLayout::isBigEndian(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), llvm::TargetLowering::isDesirableToTransformToIntegerOp(), llvm::TargetLoweringBase::isExtractSubvectorCheap(), llvm::LSBaseSDNode::isIndexed(), llvm::EVT::isInteger(), llvm::DataLayout::isLittleEndian(), llvm::TargetLoweringBase::isLoadExtLegal(), llvm::TargetLoweringBase::isMultiStoresCheaperThanBitsMerge(), llvm::TargetLoweringBase::isNarrowingProfitable(), llvm::MemSDNode::isNonTemporal(), llvm::ISD::isNormalLoad(), llvm::ISD::isNormalStore(), llvm::isNullConstant(), llvm::isNullFPConstant(), llvm::TargetLoweringBase::isOperationExpand(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::isPowerOf2_32(), llvm::EVT::isScalarInteger(), llvm::TargetLoweringBase::isShuffleMaskLegal(), llvm::EVT::isSimple(), llvm::TargetLoweringBase::isStoreBitCastBeneficial(), llvm::TargetLoweringBase::isTruncateFree(), llvm::StoreSDNode::isTruncatingStore(), llvm::TargetLoweringBase::isTruncStoreLegal(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::LSBaseSDNode::isUnindexed(), llvm::EVT::isVector(), llvm::MemSDNode::isVolatile(), llvm::Left, llvm_unreachable, llvm::MipsISD::Lo, llvm::SPII::Load, llvm::ISD::LOAD, llvm::BitmaskEnumDetail::Mask(), llvm::SelectionDAG::MaskedValueIsZero(), llvm::BaseIndexOffset::match(), llvm::max(), llvm::TargetLoweringBase::mergeStoresAfterLegalization(), llvm::MinAlign(), llvm::MachineMemOperand::MODereferenceable, llvm::MachineMemOperand::MONone, llvm::ISD::MUL, N, llvm::NextPowerOf2(), llvm::ISD::NON_EXTLOAD, llvm::CodeGenOpt::None, llvm::SDNode::ops(), llvm::ISD::OR, llvm::MVT::Other, Other, llvm::peekThroughBitcast(), llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::pop_back(), llvm::SmallVectorImpl< T >::pop_back_val(), llvm::PowerOf2Ceil(), llvm::MVT::ppcf128, llvm::SmallVectorTemplateBase< T, isPodLike< T >::value >::push_back(), llvm::SelectionDAG::ReplaceAllUsesOfValuesWith(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::Right, llvm::ISD::SCALAR_TO_VECTOR, llvm::APInt::setBit(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::TargetLoweringBase::shouldReduceLoadWidth(), llvm::MVT::SimpleTy, llvm::ISD::SINT_TO_FP, llvm::SmallPtrSetImplBase::size(), llvm::SmallVectorTemplateCommon< T >::size(), llvm::sort(), splitMergedValStore(), llvm::ISD::SRL, llvm::ARM_MB::ST, llvm::ISD::STORE, llvm::TargetLoweringBase::storeOfVectorConstantIsCheap(), std::swap(), llvm::ISD::TargetConstantFP, llvm::ISD::TokenFactor, llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::TargetLoweringBase::TypePromoteInteger, llvm::APInt::uge(), llvm::ISD::UINT_TO_FP, llvm::ISD::UNDEF, llvm::SDNode::use_begin(), llvm::SDNode::use_empty(), llvm::SDNode::use_end(), llvm::SDNode::uses(), llvm::ISD::VECTOR_SHUFFLE, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::ISD::ZEXTLOAD, and llvm::APInt::zextOrTrunc().

◆ simplifyDivRem()

static SDValue simplifyDivRem ( SDNode N,
SelectionDAG DAG 
)
static

Definition at line 2995 of file DAGCombiner.cpp.

References llvm::MCID::Add, llvm::ISD::ADD, llvm::ISD::ADDC, llvm::AfterLegalizeDAG, llvm::AfterLegalizeTypes, llvm::TargetLoweringBase::allowsMemoryAccess(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::AssertZext, B, llvm::ISD::BITCAST, llvm::tgtok::Bits, llvm::EVT::bitsGE(), llvm::ISD::BSWAP, C, llvm::TargetLoweringBase::convertSetCCLogicToBitwiseLogic(), llvm::APInt::countTrailingOnes(), llvm::ISD::CTTZ, llvm::dbgs(), llvm::MipsISD::DivRem, llvm::SDNode::dump(), llvm::dyn_cast(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::SelectionDAG::FoldConstantArithmetic(), llvm::LSBaseSDNode::getAddressingMode(), llvm::MemSDNode::getAddressSpace(), llvm::SelectionDAG::getAllOnesConstant(), llvm::APInt::getAllOnesValue(), llvm::ConstantSDNode::getAPIntValue(), getAsNonOpaqueConstant(), llvm::Function::getAttributes(), llvm::MemSDNode::getBasePtr(), llvm::LoadSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getContext(), llvm::SelectionDAG::getDataLayout(), llvm::LoadSDNode::getExtensionType(), llvm::SelectionDAG::getExtLoad(), llvm::SDNode::getFlags(), llvm::MachineFunction::getFunction(), llvm::APInt::getHighBitsSet(), llvm::EVT::getIntegerVT(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMachineFunction(), llvm::ShuffleVectorSDNode::getMask(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::APInt::getMinSignedBits(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::APInt::getNullValue(), llvm::SDValue::getNumOperands(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::LoadSDNode::getOffset(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::SDValue::getResNo(), llvm::EVT::getScalarSizeInBits(), llvm::SDValue::getScalarValueSizeInBits(), llvm::SelectionDAG::getSelect(), llvm::SelectionDAG::getSetCC(), llvm::ISD::getSetCCAndOperation(), llvm::ISD::getSetCCOrOperation(), llvm::ISD::getSetCCSwappedOperands(), llvm::APInt::getSExtValue(), llvm::TargetLoweringBase::getShiftAmountTy(), llvm::SDValue::getSimpleValueType(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValue(), llvm::StoreSDNode::getValue(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVectorShuffle(), llvm::SDNode::getVTList(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::ConstantSDNode::getZExtValue(), llvm::APInt::getZExtValue(), llvm::MVT::Glue, llvm::SDNode::hasAnyUseOfValue(), llvm::SDNodeFlags::hasExact(), llvm::SDValue::hasOneUse(), llvm::SDNode::hasOneUse(), llvm::HasValue(), llvm::MipsISD::Hi, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::SmallPtrSetImpl< PtrType >::insert(), llvm::isAllOnesConstant(), isAllOnesConstantOrAllOnesSplatConstant(), llvm::APInt::isAllOnesValue(), llvm::ConstantSDNode::isAllOnesValue(), llvm::ISD::isBuildVectorAllOnes(), llvm::ISD::isBuildVectorAllZeros(), llvm::TargetLoweringBase::isCondCodeLegal(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), isConstantOrConstantVector(), llvm::isConstOrConstSplat(), llvm::EVT::isExtended(), llvm::ISD::isEXTLoad(), llvm::TargetLoweringBase::isIntDivCheap(), llvm::EVT::isInteger(), llvm::SelectionDAG::isKnownNeverZero(), llvm::SelectionDAG::isKnownToBeAPowerOfTwo(), llvm::TargetLoweringBase::isLegalAddImmediate(), llvm::TargetLoweringBase::isLoadExtLegal(), llvm::APInt::isMask(), llvm::APInt::isMinSignedValue(), llvm::TargetLoweringBase::isNarrowingProfitable(), llvm::isNullConstant(), isNullConstantOrNullSplatConstant(), llvm::ConstantSDNode::isOne(), llvm::isOneConstant(), llvm::ConstantSDNode::isOpaque(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::EVT::isRound(), llvm::ISD::isSEXTLoad(), llvm::EVT::isSimple(), llvm::TargetLoweringBase::isTruncateFree(), llvm::TargetLoweringBase::isTruncStoreLegal(), llvm::TargetLowering::isTypeDesirableForOp(), llvm::TargetLoweringBase::isTypeLegal(), llvm::SDValue::isUndef(), llvm::SelectionDAG::isUndef(), llvm::ISD::isUNINDEXEDLoad(), llvm::EVT::isVector(), llvm::MemSDNode::isVolatile(), llvm::TargetLoweringBase::isZExtFree(), LLVM_DEBUG, llvm_unreachable, llvm::MipsISD::Lo, llvm::SPII::Load, llvm::ISD::LOAD, llvm::APInt::lshr(), llvm::BitmaskEnumDetail::Mask(), llvm::SelectionDAG::MaskedValueIsZero(), llvm::ISD::matchBinaryPredicate(), llvm::ISD::matchUnaryPredicate(), llvm::ISD::MUL, llvm::ISD::MULHS, llvm::ISD::MULHU, llvm::ISD::NON_EXTLOAD, llvm::SDNode::ops(), llvm::ISD::OR, llvm::MVT::Other, llvm::TargetLoweringBase::preferShiftsToClearExtremeBits(), llvm::SelectionDAG::ReplaceAllUsesOfValueWith(), llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::ISD::SADDO, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SDIV, llvm::ISD::SDIVREM, llvm::ISD::SETCC, llvm::ISD::SETCC_INVALID, llvm::ISD::SETEQ, llvm::ISD::SETGT, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETUGE, llvm::ISD::SHL, llvm::APInt::shl(), llvm::TargetLoweringBase::shouldReduceLoadWidth(), llvm::ISD::SIGN_EXTEND, llvm::SelectionDAG::SignBitIsZero(), llvm::SmallPtrSetImplBase::size(), llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Size, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::SPII::Store, llvm::ISD::SUB, std::swap(), T1, llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::ISD::UADDO, llvm::ISD::UDIV, llvm::ISD::UDIVREM, llvm::APInt::ult(), llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::MVT::Untyped, llvm::SelectionDAG::UpdateNodeOperands(), llvm::ISD::UREM, llvm::ISD::VECTOR_SHUFFLE, X, llvm::ISD::XOR, Y, llvm::ISD::ZERO_EXTEND, llvm::ISD::ZEXTLOAD, and llvm::APInt::zextOrTrunc().

◆ SplitVSETCC()

static std::pair<SDValue, SDValue> SplitVSETCC ( const SDNode N,
SelectionDAG DAG 
)
static

◆ STATISTIC() [1/6]

STATISTIC ( NodesCombined  ,
"Number of dag nodes combined"   
)

◆ STATISTIC() [2/6]

STATISTIC ( PreIndexedNodes  ,
"Number of pre-indexed nodes created"   
)

◆ STATISTIC() [3/6]

STATISTIC ( PostIndexedNodes  ,
"Number of post-indexed nodes created"   
)

◆ STATISTIC() [4/6]

STATISTIC ( OpsNarrowed  ,
"Number of load/op/store narrowed"   
)

◆ STATISTIC() [5/6]

STATISTIC ( LdStFP2Int  ,
"Number of fp load/store pairs transformed to int"   
)

◆ STATISTIC() [6/6]

STATISTIC ( SlicedLoads  ,
"Number of load sliced"   
)

◆ tryFoldToZero()

static SDValue tryFoldToZero ( const SDLoc DL,
const TargetLowering TLI,
EVT  VT,
SelectionDAG DAG,
bool  LegalOperations,
bool  LegalTypes 
)
static

Definition at line 2503 of file DAGCombiner.cpp.

References llvm::ISD::ABS, llvm::ISD::ADD, llvm::AfterLegalizeVectorOps, llvm::ISD::AND, assert(), llvm::ISD::BUILD_VECTOR, C, llvm::ISD::CARRY_FALSE, foldAddSubBoolOfMaskedVal(), llvm::SelectionDAG::FoldConstantArithmetic(), llvm::ConstantSDNode::getAPIntValue(), getAsNonOpaqueConstant(), llvm::APInt::getBitWidth(), llvm::SelectionDAG::getConstant(), llvm::SDNode::getFlags(), llvm::SelectionDAG::getGlobalAddress(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::ConstantSDNode::getSExtValue(), llvm::APInt::getSignMask(), llvm::SelectionDAG::getUNDEF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::VTSDNode::getVT(), llvm::SDNode::getVTList(), llvm::SelectionDAG::getZExtOrTrunc(), llvm::ConstantSDNode::getZExtValue(), llvm::ISD::GlobalAddress, llvm::MVT::Glue, llvm::SDNode::hasAnyUseOfValue(), llvm::SDNodeFlags::hasNoSignedWrap(), llvm::SDNodeFlags::hasNoUnsignedWrap(), llvm::SDNode::hasOneUse(), llvm::MVT::i1, llvm::isAllOnesConstant(), isAllOnesConstantOrAllOnesSplatConstant(), llvm::APInt::isAllOnesValue(), llvm::ISD::isBuildVectorAllZeros(), llvm::SelectionDAG::isConstantIntBuildVectorOrConstantInt(), isConstantOrConstantVector(), llvm::ISD::isConstantSplatVector(), llvm::isConstOrConstSplat(), llvm::SelectionDAG::isKnownToBeAPowerOfTwo(), llvm::isNullConstant(), isNullConstantOrNullSplatConstant(), llvm::APInt::isNullValue(), llvm::TargetLowering::isOffsetFoldingLegal(), llvm::APInt::isOneValue(), llvm::TargetLoweringBase::isOperationLegal(), llvm::TargetLoweringBase::isOperationLegalOrCustom(), llvm::SDValue::isUndef(), llvm::EVT::isVector(), llvm::SelectionDAG::MaskedValueIsZero(), llvm::ISD::MUL, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::USUBO, llvm::ISD::XOR, and Y.

Referenced by calculateByteProvider().

◆ tryToFoldExtendOfConstant()

static SDNode* tryToFoldExtendOfConstant ( SDNode N,
const TargetLowering TLI,
SelectionDAG DAG,
bool  LegalTypes,
bool  LegalOperations 
)
static

◆ tryToFoldExtOfExtload()

static SDValue tryToFoldExtOfExtload ( SelectionDAG DAG,
DAGCombiner &  Combiner,
const TargetLowering TLI,
EVT  VT,
bool  LegalOperations,
SDNode N,
SDValue  N0,
ISD::LoadExtType  ExtLoadType 
)
static

◆ tryToFoldExtOfLoad()

static SDValue tryToFoldExtOfLoad ( SelectionDAG DAG,
DAGCombiner &  Combiner,
const TargetLowering TLI,
EVT  VT,
bool  LegalOperations,
SDNode N,
SDValue  N0,
ISD::LoadExtType  ExtLoadType,
ISD::NodeType  ExtOpc 
)
static

◆ zeroExtendToMatch()

static void zeroExtendToMatch ( APInt LHS,
APInt RHS,
unsigned  Offset = 0 
)
static

Variable Documentation

◆ CombinerAAOnlyFunc

cl::opt<std::string> CombinerAAOnlyFunc("combiner-aa-only-func", cl::Hidden, cl::desc("Only use DAG-combiner alias analysis in this" " function"))
static

Referenced by replaceShuffleOfInsert().

◆ CombinerGlobalAA

cl::opt<bool> CombinerGlobalAA("combiner-global-alias-analysis", cl::Hidden, cl::desc("Enable DAG combiner's use of IR alias analysis"))
static

Referenced by replaceShuffleOfInsert().

◆ MaySplitLoadIndex

cl::opt<bool> MaySplitLoadIndex("combiner-split-load-index", cl::Hidden, cl::init(true), cl::desc("DAG combiner may split indexing from loads"))
static

Referenced by canFoldInAddressingMode().

◆ StressLoadSlicing

cl::opt<bool> StressLoadSlicing("combiner-stress-load-slicing", cl::Hidden, cl::desc("Bypass the profitability model of load slicing"), cl::init(false))
static

Hidden option to stress test load slicing, i.e., when this option is enabled, load slicing bypasses most of its profitability guards.

Referenced by isSlicingProfitable().

◆ UseTBAA

cl::opt<bool> UseTBAA("combiner-use-tbaa", cl::Hidden, cl::init(true), cl::desc("Enable DAG combiner's use of TBAA"))
static

Referenced by replaceShuffleOfInsert().