LLVM  10.0.0svn
DWARFExpression.cpp
Go to the documentation of this file.
1 //===-- DWARFExpression.cpp -----------------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
12 #include "llvm/MC/MCRegisterInfo.h"
13 #include "llvm/Support/Format.h"
14 #include <cassert>
15 #include <cstdint>
16 #include <vector>
17 
18 using namespace llvm;
19 using namespace dwarf;
20 
21 namespace llvm {
22 
23 typedef std::vector<DWARFExpression::Operation::Description> DescVector;
24 
25 static DescVector getDescriptions() {
26  DescVector Descriptions;
28  typedef Op::Description Desc;
29 
30  Descriptions.resize(0xff);
31  Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr);
32  Descriptions[DW_OP_deref] = Desc(Op::Dwarf2);
33  Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1);
34  Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1);
35  Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2);
36  Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2);
37  Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4);
38  Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4);
39  Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8);
40  Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8);
41  Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB);
42  Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
43  Descriptions[DW_OP_dup] = Desc(Op::Dwarf2);
44  Descriptions[DW_OP_drop] = Desc(Op::Dwarf2);
45  Descriptions[DW_OP_over] = Desc(Op::Dwarf2);
46  Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1);
47  Descriptions[DW_OP_swap] = Desc(Op::Dwarf2);
48  Descriptions[DW_OP_rot] = Desc(Op::Dwarf2);
49  Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2);
50  Descriptions[DW_OP_abs] = Desc(Op::Dwarf2);
51  Descriptions[DW_OP_and] = Desc(Op::Dwarf2);
52  Descriptions[DW_OP_div] = Desc(Op::Dwarf2);
53  Descriptions[DW_OP_minus] = Desc(Op::Dwarf2);
54  Descriptions[DW_OP_mod] = Desc(Op::Dwarf2);
55  Descriptions[DW_OP_mul] = Desc(Op::Dwarf2);
56  Descriptions[DW_OP_neg] = Desc(Op::Dwarf2);
57  Descriptions[DW_OP_not] = Desc(Op::Dwarf2);
58  Descriptions[DW_OP_or] = Desc(Op::Dwarf2);
59  Descriptions[DW_OP_plus] = Desc(Op::Dwarf2);
60  Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB);
61  Descriptions[DW_OP_shl] = Desc(Op::Dwarf2);
62  Descriptions[DW_OP_shr] = Desc(Op::Dwarf2);
63  Descriptions[DW_OP_shra] = Desc(Op::Dwarf2);
64  Descriptions[DW_OP_xor] = Desc(Op::Dwarf2);
65  Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2);
66  Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2);
67  Descriptions[DW_OP_eq] = Desc(Op::Dwarf2);
68  Descriptions[DW_OP_ge] = Desc(Op::Dwarf2);
69  Descriptions[DW_OP_gt] = Desc(Op::Dwarf2);
70  Descriptions[DW_OP_le] = Desc(Op::Dwarf2);
71  Descriptions[DW_OP_lt] = Desc(Op::Dwarf2);
72  Descriptions[DW_OP_ne] = Desc(Op::Dwarf2);
73  for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA)
74  Descriptions[LA] = Desc(Op::Dwarf2);
75  for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA)
76  Descriptions[LA] = Desc(Op::Dwarf2);
77  for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA)
78  Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
79  Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB);
80  Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB);
81  Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB);
82  Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB);
83  Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1);
84  Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1);
85  Descriptions[DW_OP_nop] = Desc(Op::Dwarf2);
86  Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3);
87  Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2);
88  Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
89  Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
90  Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
91  Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
92  Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
93  Descriptions[DW_OP_implicit_value] =
94  Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
95  Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
96  Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
97  Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
98  Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
99  Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
100  Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB);
101 
102  Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef);
103  Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB);
104 
105  return Descriptions;
106 }
107 
109  // FIXME: Make this constexpr once all compilers are smart enough to do it.
110  static DescVector Descriptions = getDescriptions();
111  // Handle possible corrupted or unsupported operation.
112  if (OpCode >= Descriptions.size())
113  return {};
114  return Descriptions[OpCode];
115 }
116 
117 static uint8_t getRefAddrSize(uint8_t AddrSize, uint16_t Version) {
118  return (Version == 2) ? AddrSize : 4;
119 }
120 
122  uint8_t AddressSize, uint64_t Offset) {
123  Opcode = Data.getU8(&Offset);
124 
125  Desc = getOpDesc(Opcode);
126  if (Desc.Version == Operation::DwarfNA) {
127  EndOffset = Offset;
128  return false;
129  }
130 
131  for (unsigned Operand = 0; Operand < 2; ++Operand) {
132  unsigned Size = Desc.Op[Operand];
133  unsigned Signed = Size & Operation::SignBit;
134 
135  if (Size == Operation::SizeNA)
136  break;
137 
138  switch (Size & ~Operation::SignBit) {
139  case Operation::Size1:
140  Operands[Operand] = Data.getU8(&Offset);
141  if (Signed)
142  Operands[Operand] = (int8_t)Operands[Operand];
143  break;
144  case Operation::Size2:
145  Operands[Operand] = Data.getU16(&Offset);
146  if (Signed)
147  Operands[Operand] = (int16_t)Operands[Operand];
148  break;
149  case Operation::Size4:
150  Operands[Operand] = Data.getU32(&Offset);
151  if (Signed)
152  Operands[Operand] = (int32_t)Operands[Operand];
153  break;
154  case Operation::Size8:
155  Operands[Operand] = Data.getU64(&Offset);
156  break;
157  case Operation::SizeAddr:
158  if (AddressSize == 8) {
159  Operands[Operand] = Data.getU64(&Offset);
160  } else if (AddressSize == 4) {
161  Operands[Operand] = Data.getU32(&Offset);
162  } else {
163  assert(AddressSize == 2);
164  Operands[Operand] = Data.getU16(&Offset);
165  }
166  break;
167  case Operation::SizeRefAddr:
168  if (getRefAddrSize(AddressSize, Version) == 8) {
169  Operands[Operand] = Data.getU64(&Offset);
170  } else if (getRefAddrSize(AddressSize, Version) == 4) {
171  Operands[Operand] = Data.getU32(&Offset);
172  } else {
173  assert(getRefAddrSize(AddressSize, Version) == 2);
174  Operands[Operand] = Data.getU16(&Offset);
175  }
176  break;
177  case Operation::SizeLEB:
178  if (Signed)
179  Operands[Operand] = Data.getSLEB128(&Offset);
180  else
181  Operands[Operand] = Data.getULEB128(&Offset);
182  break;
183  case Operation::BaseTypeRef:
184  Operands[Operand] = Data.getULEB128(&Offset);
185  break;
186  case Operation::SizeBlock:
187  // We need a size, so this cannot be the first operand
188  if (Operand == 0)
189  return false;
190  // Store the offset of the block as the value.
191  Operands[Operand] = Offset;
192  Offset += Operands[Operand - 1];
193  break;
194  default:
195  llvm_unreachable("Unknown DWARFExpression Op size");
196  }
197 
198  OperandEndOffsets[Operand] = Offset;
199  }
200 
201  EndOffset = Offset;
202  return true;
203 }
204 
205 static bool prettyPrintRegisterOp(raw_ostream &OS, uint8_t Opcode,
206  uint64_t Operands[2],
207  const MCRegisterInfo *MRI, bool isEH) {
208  if (!MRI)
209  return false;
210 
211  uint64_t DwarfRegNum;
212  unsigned OpNum = 0;
213 
214  if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx)
215  DwarfRegNum = Operands[OpNum++];
216  else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
217  DwarfRegNum = Opcode - DW_OP_breg0;
218  else
219  DwarfRegNum = Opcode - DW_OP_reg0;
220 
221  int LLVMRegNum = MRI->getLLVMRegNum(DwarfRegNum, isEH);
222  if (LLVMRegNum >= 0) {
223  if (const char *RegName = MRI->getName(LLVMRegNum)) {
224  if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
225  Opcode == DW_OP_bregx)
226  OS << format(" %s%+" PRId64, RegName, Operands[OpNum]);
227  else
228  OS << ' ' << RegName;
229  return true;
230  }
231  }
232 
233  return false;
234 }
235 
237  const DWARFExpression *Expr,
238  const MCRegisterInfo *RegInfo,
239  DWARFUnit *U,
240  bool isEH) {
241  if (Error) {
242  OS << "<decoding error>";
243  return false;
244  }
245 
247  assert(!Name.empty() && "DW_OP has no name!");
248  OS << Name;
249 
250  if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
251  (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
252  Opcode == DW_OP_bregx || Opcode == DW_OP_regx)
253  if (prettyPrintRegisterOp(OS, Opcode, Operands, RegInfo, isEH))
254  return true;
255 
256  for (unsigned Operand = 0; Operand < 2; ++Operand) {
257  unsigned Size = Desc.Op[Operand];
258  unsigned Signed = Size & Operation::SignBit;
259 
260  if (Size == Operation::SizeNA)
261  break;
262 
263  if (Size == Operation::BaseTypeRef && U) {
264  auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
265  if (Die && Die.getTag() == dwarf::DW_TAG_base_type) {
266  OS << format(" (0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]);
267  if (auto Name = Die.find(dwarf::DW_AT_name))
268  OS << " \"" << Name->getAsCString() << "\"";
269  } else {
270  OS << format(" <invalid base_type ref: 0x%" PRIx64 ">",
271  Operands[Operand]);
272  }
273  } else if (Size == Operation::SizeBlock) {
274  uint64_t Offset = Operands[Operand];
275  for (unsigned i = 0; i < Operands[Operand - 1]; ++i)
276  OS << format(" 0x%02x", Expr->Data.getU8(&Offset));
277  } else {
278  if (Signed)
279  OS << format(" %+" PRId64, (int64_t)Operands[Operand]);
280  else if (Opcode != DW_OP_entry_value &&
281  Opcode != DW_OP_GNU_entry_value)
282  OS << format(" 0x%" PRIx64, Operands[Operand]);
283  }
284  }
285  return true;
286 }
287 
289  DWARFUnit *U, bool IsEH) const {
290  uint32_t EntryValExprSize = 0;
291  for (auto &Op : *this) {
292  if (!Op.print(OS, this, RegInfo, U, IsEH)) {
293  uint64_t FailOffset = Op.getEndOffset();
294  while (FailOffset < Data.getData().size())
295  OS << format(" %02x", Data.getU8(&FailOffset));
296  return;
297  }
298 
299  if (Op.getCode() == DW_OP_entry_value ||
300  Op.getCode() == DW_OP_GNU_entry_value) {
301  OS << "(";
302  EntryValExprSize = Op.getRawOperand(0);
303  continue;
304  }
305 
306  if (EntryValExprSize) {
307  EntryValExprSize--;
308  if (EntryValExprSize == 0)
309  OS << ")";
310  }
311 
312  if (Op.getEndOffset() < Data.getData().size())
313  OS << ", ";
314  }
315 }
316 
318 
319  for (unsigned Operand = 0; Operand < 2; ++Operand) {
320  unsigned Size = Desc.Op[Operand];
321 
322  if (Size == Operation::SizeNA)
323  break;
324 
325  if (Size == Operation::BaseTypeRef) {
326  auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]);
327  if (!Die || Die.getTag() != dwarf::DW_TAG_base_type) {
328  Error = true;
329  return false;
330  }
331  }
332  }
333 
334  return true;
335 }
336 
338  for (auto &Op : *this)
339  if (!Op.verify(U))
340  return false;
341 
342  return true;
343 }
344 
345 } // namespace llvm
static bool prettyPrintRegisterOp(raw_ostream &OS, uint8_t Opcode, uint64_t Operands[2], const MCRegisterInfo *MRI, bool isEH)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
uint64_t getULEB128(uint64_t *offset_ptr) const
Extract a unsigned LEB128 value from *offset_ptr.
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
uint32_t getU32(uint64_t *offset_ptr) const
Extract a uint32_t value from *offset_ptr.
format_object< Ts... > format(const char *Fmt, const Ts &... Vals)
These are helper functions used to produce formatted output.
Definition: Format.h:124
This class represents an Operation in the Expression.
int64_t getSLEB128(uint64_t *offset_ptr) const
Extract a signed LEB128 value from *offset_ptr.
bool verify(DWARFUnit *U)
LLVM_NODISCARD bool empty() const
empty - Check if the string is empty.
Definition: StringRef.h:126
bool print(raw_ostream &OS, const DWARFExpression *Expr, const MCRegisterInfo *RegInfo, DWARFUnit *U, bool isEH)
static DescVector getDescriptions()
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
unsigned const MachineRegisterInfo * MRI
static uint8_t getRefAddrSize(uint8_t AddrSize, uint16_t Version)
uint8_t getU8(uint64_t *offset_ptr) const
Extract a uint8_t value from *offset_ptr.
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
StringRef OperationEncodingString(unsigned Encoding)
Definition: Dwarf.cpp:138
uint64_t getOffset() const
Definition: DWARFUnit.h:278
void print(raw_ostream &OS, const MCRegisterInfo *RegInfo, DWARFUnit *U, bool IsEH=false) const
DWARFDie getDIEForOffset(uint64_t Offset)
Return the DIE object for a given offset inside the unit&#39;s DIE vector.
Definition: DWARFUnit.h:473
This file contains constants used for implementing Dwarf debug support.
const char * getName(MCRegister RegNo) const
Return the human-readable symbolic target-specific name for the specified physical register...
uint64_t getU64(uint64_t *offset_ptr) const
Extract a uint64_t value from *offset_ptr.
std::vector< DWARFExpression::Operation::Description > DescVector
Description of the encoding of one expression Op.
uint32_t Size
Definition: Profile.cpp:46
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Lightweight error class with error context and mandatory checking.
Definition: Error.h:157
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
uint16_t getU16(uint64_t *offset_ptr) const
Extract a uint16_t value from *offset_ptr.
const uint64_t Version
Definition: InstrProf.h:984
int getLLVMRegNum(unsigned RegNum, bool isEH) const
Map a dwarf register back to a target register.
bool extract(DataExtractor Data, uint16_t Version, uint8_t AddressSize, uint64_t Offset)
static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode)