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ExecutionDomainFix.h
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1 //==-- llvm/CodeGen/ExecutionDomainFix.h - Execution Domain Fix -*- C++ -*--==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file Execution Domain Fix pass.
10 ///
11 /// Some X86 SSE instructions like mov, and, or, xor are available in different
12 /// variants for different operand types. These variant instructions are
13 /// equivalent, but on Nehalem and newer cpus there is extra latency
14 /// transferring data between integer and floating point domains. ARM cores
15 /// have similar issues when they are configured with both VFP and NEON
16 /// pipelines.
17 ///
18 /// This pass changes the variant instructions to minimize domain crossings.
19 //
20 //===----------------------------------------------------------------------===//
21 
22 #ifndef LLVM_CODEGEN_EXECUTIONDOMAINFIX_H
23 #define LLVM_CODEGEN_EXECUTIONDOMAINFIX_H
24 
25 #include "llvm/ADT/SmallVector.h"
30 
31 namespace llvm {
32 
33 class MachineBasicBlock;
34 class MachineInstr;
35 class TargetInstrInfo;
36 
37 /// A DomainValue is a bit like LiveIntervals' ValNo, but it also keeps track
38 /// of execution domains.
39 ///
40 /// An open DomainValue represents a set of instructions that can still switch
41 /// execution domain. Multiple registers may refer to the same open
42 /// DomainValue - they will eventually be collapsed to the same execution
43 /// domain.
44 ///
45 /// A collapsed DomainValue represents a single register that has been forced
46 /// into one of more execution domains. There is a separate collapsed
47 /// DomainValue for each register, but it may contain multiple execution
48 /// domains. A register value is initially created in a single execution
49 /// domain, but if we were forced to pay the penalty of a domain crossing, we
50 /// keep track of the fact that the register is now available in multiple
51 /// domains.
52 struct DomainValue {
53  /// Basic reference counting.
54  unsigned Refs = 0;
55 
56  /// Bitmask of available domains. For an open DomainValue, it is the still
57  /// possible domains for collapsing. For a collapsed DomainValue it is the
58  /// domains where the register is available for free.
59  unsigned AvailableDomains;
60 
61  /// Pointer to the next DomainValue in a chain. When two DomainValues are
62  /// merged, Victim.Next is set to point to Victor, so old DomainValue
63  /// references can be updated by following the chain.
65 
66  /// Twiddleable instructions using or defining these registers.
68 
69  DomainValue() { clear(); }
70 
71  /// A collapsed DomainValue has no instructions to twiddle - it simply keeps
72  /// track of the domains where the registers are already available.
73  bool isCollapsed() const { return Instrs.empty(); }
74 
75  /// Is domain available?
76  bool hasDomain(unsigned domain) const {
77  assert(domain <
78  static_cast<unsigned>(std::numeric_limits<unsigned>::digits) &&
79  "undefined behavior");
80  return AvailableDomains & (1u << domain);
81  }
82 
83  /// Mark domain as available.
84  void addDomain(unsigned domain) { AvailableDomains |= 1u << domain; }
85 
86  // Restrict to a single domain available.
87  void setSingleDomain(unsigned domain) { AvailableDomains = 1u << domain; }
88 
89  /// Return bitmask of domains that are available and in mask.
90  unsigned getCommonDomains(unsigned mask) const {
91  return AvailableDomains & mask;
92  }
93 
94  /// First domain available.
95  unsigned getFirstDomain() const {
96  return countTrailingZeros(AvailableDomains);
97  }
98 
99  /// Clear this DomainValue and point to next which has all its data.
100  void clear() {
101  AvailableDomains = 0;
102  Next = nullptr;
103  Instrs.clear();
104  }
105 };
106 
110 
111  const TargetRegisterClass *const RC;
112  MachineFunction *MF;
113  const TargetInstrInfo *TII;
114  const TargetRegisterInfo *TRI;
115  std::vector<SmallVector<int, 1>> AliasMap;
116  const unsigned NumRegs;
117  /// Value currently in each register, or NULL when no value is being tracked.
118  /// This counts as a DomainValue reference.
119  using LiveRegsDVInfo = std::vector<DomainValue *>;
120  LiveRegsDVInfo LiveRegs;
121  /// Keeps domain information for all registers. Note that this
122  /// is different from the usual definition notion of liveness. The CPU
123  /// doesn't care whether or not we consider a register killed.
125  OutRegsInfoMap MBBOutRegsInfos;
126 
127  ReachingDefAnalysis *RDA;
128 
129 public:
130  ExecutionDomainFix(char &PassID, const TargetRegisterClass &RC)
131  : MachineFunctionPass(PassID), RC(&RC), NumRegs(RC.getNumRegs()) {}
132 
133  void getAnalysisUsage(AnalysisUsage &AU) const override {
134  AU.setPreservesAll();
137  }
138 
139  bool runOnMachineFunction(MachineFunction &MF) override;
140 
144  }
145 
146 private:
147  /// Translate TRI register number to a list of indices into our smaller tables
148  /// of interesting registers.
150  regIndices(unsigned Reg) const;
151 
152  /// DomainValue allocation.
153  DomainValue *alloc(int domain = -1);
154 
155  /// Add reference to DV.
156  DomainValue *retain(DomainValue *DV) {
157  if (DV)
158  ++DV->Refs;
159  return DV;
160  }
161 
162  /// Release a reference to DV. When the last reference is released,
163  /// collapse if needed.
164  void release(DomainValue *);
165 
166  /// Follow the chain of dead DomainValues until a live DomainValue is reached.
167  /// Update the referenced pointer when necessary.
168  DomainValue *resolve(DomainValue *&);
169 
170  /// Set LiveRegs[rx] = dv, updating reference counts.
171  void setLiveReg(int rx, DomainValue *DV);
172 
173  /// Kill register rx, recycle or collapse any DomainValue.
174  void kill(int rx);
175 
176  /// Force register rx into domain.
177  void force(int rx, unsigned domain);
178 
179  /// Collapse open DomainValue into given domain. If there are multiple
180  /// registers using dv, they each get a unique collapsed DomainValue.
181  void collapse(DomainValue *dv, unsigned domain);
182 
183  /// All instructions and registers in B are moved to A, and B is released.
184  bool merge(DomainValue *A, DomainValue *B);
185 
186  /// Set up LiveRegs by merging predecessor live-out values.
187  void enterBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
188 
189  /// Update live-out values.
190  void leaveBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
191 
192  /// Process he given basic block.
193  void processBasicBlock(const LoopTraversal::TraversedMBBInfo &TraversedMBB);
194 
195  /// Visit given insturcion.
196  bool visitInstr(MachineInstr *);
197 
198  /// Update def-ages for registers defined by MI.
199  /// If Kill is set, also kill off DomainValues clobbered by the defs.
200  void processDefs(MachineInstr *, bool Kill);
201 
202  /// A soft instruction can be changed to work in other domains given by mask.
203  void visitSoftInstr(MachineInstr *, unsigned mask);
204 
205  /// A hard instruction only works in one domain. All input registers will be
206  /// forced into that domain.
207  void visitHardInstr(MachineInstr *, unsigned domain);
208 };
209 
210 } // namespace llvm
211 
212 #endif // LLVM_CODEGEN_EXECUTIONDOMAINFIX_H
unsigned getCommonDomains(unsigned mask) const
Return bitmask of domains that are available and in mask.
void addDomain(unsigned domain)
Mark domain as available.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned getFirstDomain() const
First domain available.
unsigned Reg
unsigned const TargetRegisterInfo * TRI
unsigned AvailableDomains
Bitmask of available domains.
MachineFunctionProperties getRequiredProperties() const override
This class provides the reaching def analysis.
unsigned countTrailingZeros(T Val, ZeroBehavior ZB=ZB_Width)
Count number of 0&#39;s from the least significant bit to the most stopping at the first 1...
Definition: MathExtras.h:156
AnalysisUsage & addRequired()
void clear()
Clear this DomainValue and point to next which has all its data.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const HexagonInstrInfo * TII
DomainValue * Next
Pointer to the next DomainValue in a chain.
TargetInstrInfo - Interface to description of machine instruction set.
bool hasDomain(unsigned domain) const
Is domain available?
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
Represent the analysis usage information of a pass.
ExecutionDomainFix(char &PassID, const TargetRegisterClass &RC)
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
Basic Register Allocator
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:837
void setSingleDomain(unsigned domain)
A BumpPtrAllocator that allows only elements of a specific type to be allocated.
Definition: Allocator.h:446
A range adaptor for a pair of iterators.
void setPreservesAll()
Set by analyses that do not transform their input at all.
A DomainValue is a bit like LiveIntervals&#39; ValNo, but it also keeps track of execution domains...
MachineFunctionProperties & set(Property P)
Representation of each machine instruction.
Definition: MachineInstr.h:63
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:55
SmallVector< MachineInstr *, 8 > Instrs
Twiddleable instructions using or defining these registers.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
unsigned Refs
Basic reference counting.
bool isCollapsed() const
A collapsed DomainValue has no instructions to twiddle - it simply keeps track of the domains where t...
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
Properties which a MachineFunction may have at a given point in time.