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FastISel.h
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1 //===- FastISel.h - Definition of the FastISel class ------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file defines the FastISel class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_FASTISEL_H
16 #define LLVM_CODEGEN_FASTISEL_H
17 
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringRef.h"
23 #include "llvm/IR/Attributes.h"
24 #include "llvm/IR/CallSite.h"
25 #include "llvm/IR/CallingConv.h"
26 #include "llvm/IR/DebugLoc.h"
27 #include "llvm/IR/DerivedTypes.h"
28 #include "llvm/IR/InstrTypes.h"
29 #include "llvm/IR/IntrinsicInst.h"
31 #include <algorithm>
32 #include <cstdint>
33 #include <utility>
34 
35 namespace llvm {
36 
37 class AllocaInst;
38 class BasicBlock;
39 class CallInst;
40 class Constant;
41 class ConstantFP;
42 class DataLayout;
43 class FunctionLoweringInfo;
44 class LoadInst;
45 class MachineConstantPool;
46 class MachineFrameInfo;
47 class MachineFunction;
48 class MachineInstr;
49 class MachineMemOperand;
50 class MachineOperand;
51 class MachineRegisterInfo;
52 class MCContext;
53 class MCInstrDesc;
54 class MCSymbol;
55 class TargetInstrInfo;
56 class TargetLibraryInfo;
57 class TargetMachine;
58 class TargetRegisterClass;
59 class TargetRegisterInfo;
60 class Type;
61 class User;
62 class Value;
63 
64 /// This is a fast-path instruction selection class that generates poor
65 /// code and doesn't support illegal types or non-trivial lowering, but runs
66 /// quickly.
67 class FastISel {
68 public:
72  Type *RetTy = nullptr;
73  bool RetSExt : 1;
74  bool RetZExt : 1;
75  bool IsVarArg : 1;
76  bool IsInReg : 1;
77  bool DoesNotReturn : 1;
79  bool IsPatchPoint : 1;
80 
81  // IsTailCall Should be modified by implementations of FastLowerCall
82  // that perform tail call conversions.
83  bool IsTailCall = false;
84 
85  unsigned NumFixedArgs = -1;
87  const Value *Callee = nullptr;
88  MCSymbol *Symbol = nullptr;
90  ImmutableCallSite *CS = nullptr;
91  MachineInstr *Call = nullptr;
92  unsigned ResultReg = 0;
93  unsigned NumResultRegs = 0;
94 
100 
104 
106  const Value *Target, ArgListTy &&ArgsList,
107  ImmutableCallSite &Call) {
108  RetTy = ResultTy;
109  Callee = Target;
110 
111  IsInReg = Call.hasRetAttr(Attribute::InReg);
112  DoesNotReturn = Call.doesNotReturn();
113  IsVarArg = FuncTy->isVarArg();
115  RetSExt = Call.hasRetAttr(Attribute::SExt);
116  RetZExt = Call.hasRetAttr(Attribute::ZExt);
117 
118  CallConv = Call.getCallingConv();
119  Args = std::move(ArgsList);
120  NumFixedArgs = FuncTy->getNumParams();
121 
122  CS = &Call;
123 
124  return *this;
125  }
126 
128  MCSymbol *Target, ArgListTy &&ArgsList,
129  ImmutableCallSite &Call,
130  unsigned FixedArgs = ~0U) {
131  RetTy = ResultTy;
132  Callee = Call.getCalledValue();
133  Symbol = Target;
134 
135  IsInReg = Call.hasRetAttr(Attribute::InReg);
136  DoesNotReturn = Call.doesNotReturn();
137  IsVarArg = FuncTy->isVarArg();
139  RetSExt = Call.hasRetAttr(Attribute::SExt);
140  RetZExt = Call.hasRetAttr(Attribute::ZExt);
141 
142  CallConv = Call.getCallingConv();
143  Args = std::move(ArgsList);
144  NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
145 
146  CS = &Call;
147 
148  return *this;
149  }
150 
152  const Value *Target, ArgListTy &&ArgsList,
153  unsigned FixedArgs = ~0U) {
154  RetTy = ResultTy;
155  Callee = Target;
156  CallConv = CC;
157  Args = std::move(ArgsList);
158  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
159  return *this;
160  }
161 
163  CallingConv::ID CC, Type *ResultTy,
164  StringRef Target, ArgListTy &&ArgsList,
165  unsigned FixedArgs = ~0U);
166 
168  MCSymbol *Target, ArgListTy &&ArgsList,
169  unsigned FixedArgs = ~0U) {
170  RetTy = ResultTy;
171  Symbol = Target;
172  CallConv = CC;
173  Args = std::move(ArgsList);
174  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
175  return *this;
176  }
177 
179  IsTailCall = Value;
180  return *this;
181  }
182 
185  return *this;
186  }
187 
188  ArgListTy &getArgs() { return Args; }
189 
190  void clearOuts() {
191  OutVals.clear();
192  OutFlags.clear();
193  OutRegs.clear();
194  }
195 
196  void clearIns() {
197  Ins.clear();
198  InRegs.clear();
199  }
200  };
201 
202 protected:
211  const DataLayout &DL;
217 
218  /// The position of the last instruction for materializing constants
219  /// for use in the current block. It resets to EmitStartPt when it makes sense
220  /// (for example, it's usually profitable to avoid function calls between the
221  /// definition and the use)
223 
224  /// The top most instruction in the current block that is allowed for
225  /// emitting local variables. LastLocalValue resets to EmitStartPt when it
226  /// makes sense (for example, on function calls)
228 
229  /// Last local value flush point. On a subsequent flush, no local value will
230  /// sink past this point.
232 
233 public:
234  virtual ~FastISel();
235 
236  /// Return the position of the last instruction emitted for
237  /// materializing constants for use in the current block.
239 
240  /// Update the position of the last instruction emitted for
241  /// materializing constants for use in the current block.
243  EmitStartPt = I;
244  LastLocalValue = I;
245  }
246 
247  /// Set the current block to which generated machine instructions will
248  /// be appended.
249  void startNewBlock();
250 
251  /// Flush the local value map and sink local values if possible.
252  void finishBasicBlock();
253 
254  /// Return current debug location information.
255  DebugLoc getCurDebugLoc() const { return DbgLoc; }
256 
257  /// Do "fast" instruction selection for function arguments and append
258  /// the machine instructions to the current block. Returns true when
259  /// successful.
260  bool lowerArguments();
261 
262  /// Do "fast" instruction selection for the given LLVM IR instruction
263  /// and append the generated machine instructions to the current block.
264  /// Returns true if selection was successful.
265  bool selectInstruction(const Instruction *I);
266 
267  /// Do "fast" instruction selection for the given LLVM IR operator
268  /// (Instruction or ConstantExpr), and append generated machine instructions
269  /// to the current block. Return true if selection was successful.
270  bool selectOperator(const User *I, unsigned Opcode);
271 
272  /// Create a virtual register and arrange for it to be assigned the
273  /// value for the given LLVM value.
274  unsigned getRegForValue(const Value *V);
275 
276  /// Look up the value to see if its value is already cached in a
277  /// register. It may be defined by instructions across blocks or defined
278  /// locally.
279  unsigned lookUpRegForValue(const Value *V);
280 
281  /// This is a wrapper around getRegForValue that also takes care of
282  /// truncating or sign-extending the given getelementptr index value.
283  std::pair<unsigned, bool> getRegForGEPIndex(const Value *Idx);
284 
285  /// We're checking to see if we can fold \p LI into \p FoldInst. Note
286  /// that we could have a sequence where multiple LLVM IR instructions are
287  /// folded into the same machineinstr. For example we could have:
288  ///
289  /// A: x = load i32 *P
290  /// B: y = icmp A, 42
291  /// C: br y, ...
292  ///
293  /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
294  /// (and any other folded instructions) because it is between A and C.
295  ///
296  /// If we succeed folding, return true.
297  bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
298 
299  /// The specified machine instr operand is a vreg, and that vreg is
300  /// being provided by the specified load instruction. If possible, try to
301  /// fold the load as an operand to the instruction, returning true if
302  /// possible.
303  ///
304  /// This method should be implemented by targets.
305  virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
306  const LoadInst * /*LI*/) {
307  return false;
308  }
309 
310  /// Reset InsertPt to prepare for inserting instructions into the
311  /// current block.
312  void recomputeInsertPt();
313 
314  /// Remove all dead instructions between the I and E.
317 
318  struct SavePoint {
321  };
322 
323  /// Prepare InsertPt to begin inserting instructions into the local
324  /// value area and return the old insert position.
326 
327  /// Reset InsertPt to the given old insert position.
328  void leaveLocalValueArea(SavePoint Old);
329 
330 protected:
331  explicit FastISel(FunctionLoweringInfo &FuncInfo,
332  const TargetLibraryInfo *LibInfo,
333  bool SkipTargetIndependentISel = false);
334 
335  /// This method is called by target-independent code when the normal
336  /// FastISel process fails to select an instruction. This gives targets a
337  /// chance to emit code for anything that doesn't fit into FastISel's
338  /// framework. It returns true if it was successful.
339  virtual bool fastSelectInstruction(const Instruction *I) = 0;
340 
341  /// This method is called by target-independent code to do target-
342  /// specific argument lowering. It returns true if it was successful.
343  virtual bool fastLowerArguments();
344 
345  /// This method is called by target-independent code to do target-
346  /// specific call lowering. It returns true if it was successful.
347  virtual bool fastLowerCall(CallLoweringInfo &CLI);
348 
349  /// This method is called by target-independent code to do target-
350  /// specific intrinsic lowering. It returns true if it was successful.
351  virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
352 
353  /// This method is called by target-independent code to request that an
354  /// instruction with the given type and opcode be emitted.
355  virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
356 
357  /// This method is called by target-independent code to request that an
358  /// instruction with the given type, opcode, and register operand be emitted.
359  virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
360  bool Op0IsKill);
361 
362  /// This method is called by target-independent code to request that an
363  /// instruction with the given type, opcode, and register operands be emitted.
364  virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
365  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
366 
367  /// This method is called by target-independent code to request that an
368  /// instruction with the given type, opcode, and register and immediate
369  /// operands be emitted.
370  virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
371  bool Op0IsKill, uint64_t Imm);
372 
373  /// This method is a wrapper of fastEmit_ri.
374  ///
375  /// It first tries to emit an instruction with an immediate operand using
376  /// fastEmit_ri. If that fails, it materializes the immediate into a register
377  /// and try fastEmit_rr instead.
378  unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
379  uint64_t Imm, MVT ImmType);
380 
381  /// This method is called by target-independent code to request that an
382  /// instruction with the given type, opcode, and immediate operand be emitted.
383  virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
384 
385  /// This method is called by target-independent code to request that an
386  /// instruction with the given type, opcode, and floating-point immediate
387  /// operand be emitted.
388  virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
389  const ConstantFP *FPImm);
390 
391  /// Emit a MachineInstr with no operands and a result register in the
392  /// given register class.
393  unsigned fastEmitInst_(unsigned MachineInstOpcode,
394  const TargetRegisterClass *RC);
395 
396  /// Emit a MachineInstr with one register operand and a result register
397  /// in the given register class.
398  unsigned fastEmitInst_r(unsigned MachineInstOpcode,
399  const TargetRegisterClass *RC, unsigned Op0,
400  bool Op0IsKill);
401 
402  /// Emit a MachineInstr with two register operands and a result
403  /// register in the given register class.
404  unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
405  const TargetRegisterClass *RC, unsigned Op0,
406  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
407 
408  /// Emit a MachineInstr with three register operands and a result
409  /// register in the given register class.
410  unsigned fastEmitInst_rrr(unsigned MachineInstOpcode,
411  const TargetRegisterClass *RC, unsigned Op0,
412  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
413  unsigned Op2, bool Op2IsKill);
414 
415  /// Emit a MachineInstr with a register operand, an immediate, and a
416  /// result register in the given register class.
417  unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
418  const TargetRegisterClass *RC, unsigned Op0,
419  bool Op0IsKill, uint64_t Imm);
420 
421  /// Emit a MachineInstr with one register operand and two immediate
422  /// operands.
423  unsigned fastEmitInst_rii(unsigned MachineInstOpcode,
424  const TargetRegisterClass *RC, unsigned Op0,
425  bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
426 
427  /// Emit a MachineInstr with a floating point immediate, and a result
428  /// register in the given register class.
429  unsigned fastEmitInst_f(unsigned MachineInstOpcode,
430  const TargetRegisterClass *RC,
431  const ConstantFP *FPImm);
432 
433  /// Emit a MachineInstr with two register operands, an immediate, and a
434  /// result register in the given register class.
435  unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
436  const TargetRegisterClass *RC, unsigned Op0,
437  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
438  uint64_t Imm);
439 
440  /// Emit a MachineInstr with a single immediate operand, and a result
441  /// register in the given register class.
442  unsigned fastEmitInst_i(unsigned MachineInstOpcode,
443  const TargetRegisterClass *RC, uint64_t Imm);
444 
445  /// Emit a MachineInstr for an extract_subreg from a specified index of
446  /// a superregister to a specified type.
447  unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill,
448  uint32_t Idx);
449 
450  /// Emit MachineInstrs to compute the value of Op with all but the
451  /// least significant bit set to zero.
452  unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
453 
454  /// Emit an unconditional branch to the given block, unless it is the
455  /// immediate (fall-through) successor, and update the CFG.
456  void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc);
457 
458  /// Emit an unconditional branch to \p FalseMBB, obtains the branch weight
459  /// and adds TrueMBB and FalseMBB to the successor list.
460  void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
461  MachineBasicBlock *FalseMBB);
462 
463  /// Update the value map to include the new mapping for this
464  /// instruction, or insert an extra copy to get the result in a previous
465  /// determined register.
466  ///
467  /// NOTE: This is only necessary because we might select a block that uses a
468  /// value before we select the block that defines the value. It might be
469  /// possible to fix this by selecting blocks in reverse postorder.
470  void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs = 1);
471 
472  unsigned createResultReg(const TargetRegisterClass *RC);
473 
474  /// Try to constrain Op so that it is usable by argument OpNum of the
475  /// provided MCInstrDesc. If this fails, create a new virtual register in the
476  /// correct class and COPY the value there.
477  unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
478  unsigned OpNum);
479 
480  /// Emit a constant in a register using target-specific logic, such as
481  /// constant pool loads.
482  virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
483 
484  /// Emit an alloca address in a register using target-specific logic.
485  virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
486 
487  /// Emit the floating-point constant +0.0 in a register using target-
488  /// specific logic.
489  virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
490  return 0;
491  }
492 
493  /// Check if \c Add is an add that can be safely folded into \c GEP.
494  ///
495  /// \c Add can be folded into \c GEP if:
496  /// - \c Add is an add,
497  /// - \c Add's size matches \c GEP's,
498  /// - \c Add is in the same basic block as \c GEP, and
499  /// - \c Add has a constant operand.
500  bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
501 
502  /// Test whether the given value has exactly one use.
503  bool hasTrivialKill(const Value *V);
504 
505  /// Create a machine mem operand from the given instruction.
507 
509 
510  bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
511  bool lowerCallTo(const CallInst *CI, const char *SymName,
512  unsigned NumArgs);
513  bool lowerCallTo(CallLoweringInfo &CLI);
514 
516  switch (II->getIntrinsicID()) {
517  case Intrinsic::sadd_with_overflow:
518  case Intrinsic::uadd_with_overflow:
519  case Intrinsic::smul_with_overflow:
520  case Intrinsic::umul_with_overflow:
521  return true;
522  default:
523  return false;
524  }
525  }
526 
527  bool lowerCall(const CallInst *I);
528  /// Select and emit code for a binary operator instruction, which has
529  /// an opcode which directly corresponds to the given ISD opcode.
530  bool selectBinaryOp(const User *I, unsigned ISDOpcode);
531  bool selectFNeg(const User *I);
532  bool selectGetElementPtr(const User *I);
533  bool selectStackmap(const CallInst *I);
534  bool selectPatchpoint(const CallInst *I);
535  bool selectCall(const User *I);
536  bool selectIntrinsicCall(const IntrinsicInst *II);
537  bool selectBitCast(const User *I);
538  bool selectCast(const User *I, unsigned Opcode);
539  bool selectExtractValue(const User *U);
540  bool selectInsertValue(const User *I);
541  bool selectXRayCustomEvent(const CallInst *II);
542  bool selectXRayTypedEvent(const CallInst *II);
543 
544 private:
545  /// Handle PHI nodes in successor blocks.
546  ///
547  /// Emit code to ensure constants are copied into registers when needed.
548  /// Remember the virtual registers that need to be added to the Machine PHI
549  /// nodes as input. We cannot just directly add them, because expansion might
550  /// result in multiple MBB's for one BB. As such, the start of the BB might
551  /// correspond to a different MBB than the end.
552  bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
553 
554  /// Helper for materializeRegForValue to materialize a constant in a
555  /// target-independent way.
556  unsigned materializeConstant(const Value *V, MVT VT);
557 
558  /// Helper for getRegForVale. This function is called when the value
559  /// isn't already available in a register and must be materialized with new
560  /// instructions.
561  unsigned materializeRegForValue(const Value *V, MVT VT);
562 
563  /// Clears LocalValueMap and moves the area for the new local variables
564  /// to the beginning of the block. It helps to avoid spilling cached variables
565  /// across heavy instructions like calls.
566  void flushLocalValueMap();
567 
568  /// Removes dead local value instructions after SavedLastLocalvalue.
569  void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
570 
571  struct InstOrderMap {
573  MachineInstr *FirstTerminator = nullptr;
574  unsigned FirstTerminatorOrder = std::numeric_limits<unsigned>::max();
575 
576  void initialize(MachineBasicBlock *MBB,
577  MachineBasicBlock::iterator LastFlushPoint);
578  };
579 
580  /// Sinks the local value materialization instruction LocalMI to its first use
581  /// in the basic block, or deletes it if it is not used.
582  void sinkLocalValueMaterialization(MachineInstr &LocalMI, unsigned DefReg,
583  InstOrderMap &OrderMap);
584 
585  /// Insertion point before trying to select the current instruction.
586  MachineBasicBlock::iterator SavedInsertPt;
587 
588  /// Add a stackmap or patchpoint intrinsic call's live variable
589  /// operands to a stackmap or patchpoint machine instruction.
590  bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
591  const CallInst *CI, unsigned StartIdx);
592  bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
593  const Value *Callee, bool ForceRetVoidTy,
594  CallLoweringInfo &CLI);
595 };
596 
597 } // end namespace llvm
598 
599 #endif // LLVM_CODEGEN_FASTISEL_H
uint64_t CallInst * C
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
Definition: FastISel.cpp:2065
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
This class is the base class for the comparison instructions.
Definition: InstrTypes.h:675
Type
MessagePack types as defined in the standard, with the exception of Integer being divided into a sign...
Definition: MsgPackReader.h:49
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
Definition: FastISel.cpp:2215
MachineConstantPool & MCP
Definition: FastISel.h:208
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
bool lowerCall(const CallInst *I)
Definition: FastISel.cpp:1230
CallingConv::ID getCallingConv() const
Get the calling convention of the call.
Definition: CallSite.h:312
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Definition: FastISel.h:482
Various leaf nodes.
Definition: ISDOpcodes.h:60
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
bool selectXRayTypedEvent(const CallInst *II)
Definition: FastISel.cpp:1050
ImmutableCallSite * CS
Definition: FastISel.h:90
bool selectGetElementPtr(const User *I)
Definition: FastISel.cpp:665
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Definition: FastISel.cpp:565
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
bool selectStackmap(const CallInst *I)
Definition: FastISel.cpp:780
This class represents a function call, abstracting a target machine&#39;s calling convention.
unsigned Reg
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
Definition: FastISel.h:305
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
Definition: FastISel.cpp:2363
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Definition: FastISel.cpp:1916
A debug info location.
Definition: DebugLoc.h:34
SmallVector< unsigned, 4 > InRegs
Definition: FastISel.h:99
block Block Frequency true
An instruction for reading from memory.
Definition: Instructions.h:168
Hexagon Common GEP
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1929
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
Definition: FastISel.h:489
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
Definition: FastISel.cpp:1910
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
Definition: FastISel.cpp:1576
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
Definition: FastISel.cpp:2115
MachineFunction * MF
Definition: FastISel.h:205
DenseMap< const Value *, unsigned > LocalValueMap
Definition: FastISel.h:203
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Definition: FastISel.cpp:2093
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:242
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
Definition: FastISel.cpp:2159
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
Definition: FastISel.cpp:2412
A description of a memory reference used in the backend.
bool doesNotReturn() const
Determine if the call cannot return.
Definition: CallSite.h:497
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:151
TargetLoweringBase::ArgListTy ArgListTy
Definition: FastISel.h:70
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
Definition: FastISel.cpp:2346
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
Definition: FastISel.cpp:2020
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Definition: FastISel.h:227
This file contains the simple types necessary to represent the attributes associated with functions a...
InstrTy * getInstruction() const
Definition: CallSite.h:92
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
MachineBasicBlock::iterator LastFlushPoint
Last local value flush point.
Definition: FastISel.h:231
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
const TargetMachine & TM
Definition: FastISel.h:210
bool selectIntrinsicCall(const IntrinsicInst *II)
Definition: FastISel.cpp:1315
bool selectCast(const User *I, unsigned Opcode)
Definition: FastISel.cpp:1475
Context object for machine code objects.
Definition: MCContext.h:63
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:100
This is a fast-path instruction selection class that generates poor code and doesn&#39;t support illegal ...
Definition: FastISel.h:67
Class to represent function types.
Definition: DerivedTypes.h:103
SmallVector< ISD::InputArg, 4 > Ins
Definition: FastISel.h:98
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Definition: FastISel.cpp:1994
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
Definition: FastISel.cpp:1777
DebugLoc getCurDebugLoc() const
Return current debug location information.
Definition: FastISel.h:255
bool selectExtractValue(const User *U)
Definition: FastISel.cpp:1737
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
Definition: FastISel.cpp:361
bool isVarArg() const
Definition: DerivedTypes.h:123
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
Definition: FastISel.cpp:2011
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
Definition: FastISel.cpp:329
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:238
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
Definition: FastISel.cpp:474
void finishBasicBlock()
Flush the local value map and sink local values if possible.
Definition: FastISel.cpp:143
TargetInstrInfo - Interface to description of machine instruction set.
bool selectInsertValue(const User *I)
virtual ~FastISel()
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
Definition: FastISel.h:105
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:167
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
C - The default llvm calling convention, compatible with C.
Definition: CallingConv.h:35
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
Definition: FastISel.cpp:543
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
Definition: FastISel.h:96
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:139
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:264
MachineFrameInfo & MFI
Definition: FastISel.h:207
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1918
bool SkipTargetIndependentISel
Definition: FastISel.h:216
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We&#39;re checking to see if we can fold LI into FoldInst.
Definition: FastISel.cpp:2290
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Definition: FastISel.cpp:145
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:685
std::pair< unsigned, bool > getRegForGEPIndex(const Value *Idx)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
Definition: FastISel.cpp:506
bool selectXRayCustomEvent(const CallInst *II)
Definition: FastISel.cpp:1031
const TargetRegisterInfo & TRI
Definition: FastISel.h:214
std::vector< ArgListEntry > ArgListTy
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool selectFNeg(const User *I)
Emit an FNeg operation.
Definition: FastISel.cpp:1694
CallLoweringInfo & setTailCall(bool Value=true)
Definition: FastISel.h:178
SmallVector< Value *, 16 > OutVals
Definition: FastISel.h:95
const TargetInstrInfo & TII
Definition: FastISel.h:212
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
Definition: FastISel.h:222
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
Definition: FastISel.cpp:529
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
Definition: IntrinsicInst.h:51
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1923
bool isCommutativeIntrinsic(IntrinsicInst const *II)
Definition: FastISel.h:515
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1938
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call, unsigned FixedArgs=~0U)
Definition: FastISel.h:127
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
bool selectCall(const User *I)
Definition: FastISel.cpp:1269
Provides information about what library functions are available for the current target.
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
Definition: FastISel.cpp:1675
const TargetLibraryInfo * LibInfo
Definition: FastISel.h:215
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
Definition: FastISel.cpp:2041
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
Definition: FastISel.cpp:485
void startNewBlock()
Set the current block to which generated machine instructions will be appended.
Definition: FastISel.cpp:129
bool selectBitCast(const User *I)
Definition: FastISel.cpp:1508
Target - Wrapper for Target specific information.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1933
SmallVector< unsigned, 16 > OutRegs
Definition: FastISel.h:97
const DataLayout & DL
Definition: FastISel.h:211
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
Definition: FastISel.cpp:574
static void initialize(TargetLibraryInfoImpl &TLI, const Triple &T, ArrayRef< StringRef > StandardNames)
Initialize the set of available library functions based on the specified target triple.
DebugLoc DbgLoc
Definition: FastISel.h:209
could "use" a pointer
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Definition: FastISel.cpp:556
Representation of each machine instruction.
Definition: MachineInstr.h:64
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
Definition: FastISel.cpp:1912
bool selectPatchpoint(const CallInst *I)
Definition: FastISel.cpp:893
MachineRegisterInfo & MRI
Definition: FastISel.h:206
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
Definition: FastISel.cpp:1095
Establish a view to a call site for examination.
Definition: CallSite.h:714
unsigned fastEmitInst_i(unsigned MachineInstOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Definition: FastISel.cpp:2185
#define I(x, y, z)
Definition: MD5.cpp:58
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
Definition: FastISel.h:485
const TargetLowering & TLI
Definition: FastISel.h:213
unsigned createResultReg(const TargetRegisterClass *RC)
Definition: FastISel.cpp:1990
CallLoweringInfo & setIsPatchPoint(bool Value=true)
Definition: FastISel.h:183
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
Definition: FastISel.cpp:1947
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
Definition: FastISel.cpp:2201
MachineBasicBlock::iterator InsertPt
Definition: FastISel.h:319
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
Definition: FastISel.cpp:1895
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
Definition: FastISel.cpp:1908
bool hasRetAttr(Attribute::AttrKind Kind) const
Return true if this return value has the given attribute.
Definition: CallSite.h:372
LLVM Value Representation.
Definition: Value.h:73
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
void fastEmitBranch(MachineBasicBlock *MSucc, const DebugLoc &DbgLoc)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
Definition: FastISel.cpp:1655
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
unsigned fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
Definition: FastISel.cpp:2140
FunctionLoweringInfo & FuncInfo
Definition: FastISel.h:204
bool use_empty() const
Definition: Value.h:323
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:44
This file describes how to lower LLVM code to machine code.
an instruction to allocate memory on the stack
Definition: Instructions.h:60