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FastISel.h
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1 //===- FastISel.h - Definition of the FastISel class ------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file defines the FastISel class.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_CODEGEN_FASTISEL_H
16 #define LLVM_CODEGEN_FASTISEL_H
17 
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/StringRef.h"
24 #include "llvm/IR/Attributes.h"
25 #include "llvm/IR/CallSite.h"
26 #include "llvm/IR/CallingConv.h"
27 #include "llvm/IR/DebugLoc.h"
28 #include "llvm/IR/DerivedTypes.h"
29 #include "llvm/IR/InstrTypes.h"
30 #include "llvm/IR/IntrinsicInst.h"
31 #include <algorithm>
32 #include <cstdint>
33 #include <utility>
34 
35 namespace llvm {
36 
37 class AllocaInst;
38 class BasicBlock;
39 class CallInst;
40 class Constant;
41 class ConstantFP;
42 class DataLayout;
43 class FunctionLoweringInfo;
44 class LoadInst;
45 class MachineConstantPool;
46 class MachineFrameInfo;
47 class MachineFunction;
48 class MachineInstr;
49 class MachineMemOperand;
50 class MachineOperand;
51 class MachineRegisterInfo;
52 class MCContext;
53 class MCInstrDesc;
54 class MCSymbol;
55 class TargetInstrInfo;
56 class TargetLibraryInfo;
57 class TargetMachine;
58 class TargetRegisterClass;
59 class TargetRegisterInfo;
60 class Type;
61 class User;
62 class Value;
63 
64 /// \brief This is a fast-path instruction selection class that generates poor
65 /// code and doesn't support illegal types or non-trivial lowering, but runs
66 /// quickly.
67 class FastISel {
68 public:
72  Type *RetTy = nullptr;
73  bool RetSExt : 1;
74  bool RetZExt : 1;
75  bool IsVarArg : 1;
76  bool IsInReg : 1;
77  bool DoesNotReturn : 1;
79  bool IsPatchPoint : 1;
80 
81  // \brief IsTailCall Should be modified by implementations of FastLowerCall
82  // that perform tail call conversions.
83  bool IsTailCall = false;
84 
85  unsigned NumFixedArgs = -1;
87  const Value *Callee = nullptr;
88  MCSymbol *Symbol = nullptr;
90  ImmutableCallSite *CS = nullptr;
91  MachineInstr *Call = nullptr;
92  unsigned ResultReg = 0;
93  unsigned NumResultRegs = 0;
94 
100 
104 
106  const Value *Target, ArgListTy &&ArgsList,
107  ImmutableCallSite &Call) {
108  RetTy = ResultTy;
109  Callee = Target;
110 
111  IsInReg = Call.hasRetAttr(Attribute::InReg);
112  DoesNotReturn = Call.doesNotReturn();
113  IsVarArg = FuncTy->isVarArg();
115  RetSExt = Call.hasRetAttr(Attribute::SExt);
116  RetZExt = Call.hasRetAttr(Attribute::ZExt);
117 
118  CallConv = Call.getCallingConv();
119  Args = std::move(ArgsList);
120  NumFixedArgs = FuncTy->getNumParams();
121 
122  CS = &Call;
123 
124  return *this;
125  }
126 
128  MCSymbol *Target, ArgListTy &&ArgsList,
129  ImmutableCallSite &Call,
130  unsigned FixedArgs = ~0U) {
131  RetTy = ResultTy;
132  Callee = Call.getCalledValue();
133  Symbol = Target;
134 
135  IsInReg = Call.hasRetAttr(Attribute::InReg);
136  DoesNotReturn = Call.doesNotReturn();
137  IsVarArg = FuncTy->isVarArg();
139  RetSExt = Call.hasRetAttr(Attribute::SExt);
140  RetZExt = Call.hasRetAttr(Attribute::ZExt);
141 
142  CallConv = Call.getCallingConv();
143  Args = std::move(ArgsList);
144  NumFixedArgs = (FixedArgs == ~0U) ? FuncTy->getNumParams() : FixedArgs;
145 
146  CS = &Call;
147 
148  return *this;
149  }
150 
152  const Value *Target, ArgListTy &&ArgsList,
153  unsigned FixedArgs = ~0U) {
154  RetTy = ResultTy;
155  Callee = Target;
156  CallConv = CC;
157  Args = std::move(ArgsList);
158  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
159  return *this;
160  }
161 
163  CallingConv::ID CC, Type *ResultTy,
164  StringRef Target, ArgListTy &&ArgsList,
165  unsigned FixedArgs = ~0U);
166 
168  MCSymbol *Target, ArgListTy &&ArgsList,
169  unsigned FixedArgs = ~0U) {
170  RetTy = ResultTy;
171  Symbol = Target;
172  CallConv = CC;
173  Args = std::move(ArgsList);
174  NumFixedArgs = (FixedArgs == ~0U) ? Args.size() : FixedArgs;
175  return *this;
176  }
177 
179  IsTailCall = Value;
180  return *this;
181  }
182 
185  return *this;
186  }
187 
188  ArgListTy &getArgs() { return Args; }
189 
190  void clearOuts() {
191  OutVals.clear();
192  OutFlags.clear();
193  OutRegs.clear();
194  }
195 
196  void clearIns() {
197  Ins.clear();
198  InRegs.clear();
199  }
200  };
201 
202 protected:
211  const DataLayout &DL;
217 
218  /// \brief The position of the last instruction for materializing constants
219  /// for use in the current block. It resets to EmitStartPt when it makes sense
220  /// (for example, it's usually profitable to avoid function calls between the
221  /// definition and the use)
223 
224  /// \brief The top most instruction in the current block that is allowed for
225  /// emitting local variables. LastLocalValue resets to EmitStartPt when it
226  /// makes sense (for example, on function calls)
228 
229 public:
230  virtual ~FastISel();
231 
232  /// \brief Return the position of the last instruction emitted for
233  /// materializing constants for use in the current block.
235 
236  /// \brief Update the position of the last instruction emitted for
237  /// materializing constants for use in the current block.
239  EmitStartPt = I;
240  LastLocalValue = I;
241  }
242 
243  /// \brief Set the current block to which generated machine instructions will
244  /// be appended, and clear the local CSE map.
245  void startNewBlock();
246 
247  /// \brief Return current debug location information.
248  DebugLoc getCurDebugLoc() const { return DbgLoc; }
249 
250  /// \brief Do "fast" instruction selection for function arguments and append
251  /// the machine instructions to the current block. Returns true when
252  /// successful.
253  bool lowerArguments();
254 
255  /// \brief Do "fast" instruction selection for the given LLVM IR instruction
256  /// and append the generated machine instructions to the current block.
257  /// Returns true if selection was successful.
258  bool selectInstruction(const Instruction *I);
259 
260  /// \brief Do "fast" instruction selection for the given LLVM IR operator
261  /// (Instruction or ConstantExpr), and append generated machine instructions
262  /// to the current block. Return true if selection was successful.
263  bool selectOperator(const User *I, unsigned Opcode);
264 
265  /// \brief Create a virtual register and arrange for it to be assigned the
266  /// value for the given LLVM value.
267  unsigned getRegForValue(const Value *V);
268 
269  /// \brief Look up the value to see if its value is already cached in a
270  /// register. It may be defined by instructions across blocks or defined
271  /// locally.
272  unsigned lookUpRegForValue(const Value *V);
273 
274  /// \brief This is a wrapper around getRegForValue that also takes care of
275  /// truncating or sign-extending the given getelementptr index value.
276  std::pair<unsigned, bool> getRegForGEPIndex(const Value *V);
277 
278  /// \brief We're checking to see if we can fold \p LI into \p FoldInst. Note
279  /// that we could have a sequence where multiple LLVM IR instructions are
280  /// folded into the same machineinstr. For example we could have:
281  ///
282  /// A: x = load i32 *P
283  /// B: y = icmp A, 42
284  /// C: br y, ...
285  ///
286  /// In this scenario, \p LI is "A", and \p FoldInst is "C". We know about "B"
287  /// (and any other folded instructions) because it is between A and C.
288  ///
289  /// If we succeed folding, return true.
290  bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst);
291 
292  /// \brief The specified machine instr operand is a vreg, and that vreg is
293  /// being provided by the specified load instruction. If possible, try to
294  /// fold the load as an operand to the instruction, returning true if
295  /// possible.
296  ///
297  /// This method should be implemented by targets.
298  virtual bool tryToFoldLoadIntoMI(MachineInstr * /*MI*/, unsigned /*OpNo*/,
299  const LoadInst * /*LI*/) {
300  return false;
301  }
302 
303  /// \brief Reset InsertPt to prepare for inserting instructions into the
304  /// current block.
305  void recomputeInsertPt();
306 
307  /// \brief Remove all dead instructions between the I and E.
310 
311  struct SavePoint {
314  };
315 
316  /// \brief Prepare InsertPt to begin inserting instructions into the local
317  /// value area and return the old insert position.
319 
320  /// \brief Reset InsertPt to the given old insert position.
321  void leaveLocalValueArea(SavePoint Old);
322 
323 protected:
324  explicit FastISel(FunctionLoweringInfo &FuncInfo,
325  const TargetLibraryInfo *LibInfo,
326  bool SkipTargetIndependentISel = false);
327 
328  /// \brief This method is called by target-independent code when the normal
329  /// FastISel process fails to select an instruction. This gives targets a
330  /// chance to emit code for anything that doesn't fit into FastISel's
331  /// framework. It returns true if it was successful.
332  virtual bool fastSelectInstruction(const Instruction *I) = 0;
333 
334  /// \brief This method is called by target-independent code to do target-
335  /// specific argument lowering. It returns true if it was successful.
336  virtual bool fastLowerArguments();
337 
338  /// \brief This method is called by target-independent code to do target-
339  /// specific call lowering. It returns true if it was successful.
340  virtual bool fastLowerCall(CallLoweringInfo &CLI);
341 
342  /// \brief This method is called by target-independent code to do target-
343  /// specific intrinsic lowering. It returns true if it was successful.
344  virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II);
345 
346  /// \brief This method is called by target-independent code to request that an
347  /// instruction with the given type and opcode be emitted.
348  virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode);
349 
350  /// \brief This method is called by target-independent code to request that an
351  /// instruction with the given type, opcode, and register operand be emitted.
352  virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
353  bool Op0IsKill);
354 
355  /// \brief This method is called by target-independent code to request that an
356  /// instruction with the given type, opcode, and register operands be emitted.
357  virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
358  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
359 
360  /// \brief This method is called by target-independent code to request that an
361  /// instruction with the given type, opcode, and register and immediate
362  /// operands be emitted.
363  virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0,
364  bool Op0IsKill, uint64_t Imm);
365 
366  /// \brief This method is a wrapper of fastEmit_ri.
367  ///
368  /// It first tries to emit an instruction with an immediate operand using
369  /// fastEmit_ri. If that fails, it materializes the immediate into a register
370  /// and try fastEmit_rr instead.
371  unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
372  uint64_t Imm, MVT ImmType);
373 
374  /// \brief This method is called by target-independent code to request that an
375  /// instruction with the given type, opcode, and immediate operand be emitted.
376  virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm);
377 
378  /// \brief This method is called by target-independent code to request that an
379  /// instruction with the given type, opcode, and floating-point immediate
380  /// operand be emitted.
381  virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode,
382  const ConstantFP *FPImm);
383 
384  /// \brief Emit a MachineInstr with no operands and a result register in the
385  /// given register class.
386  unsigned fastEmitInst_(unsigned MachineInstOpcode,
387  const TargetRegisterClass *RC);
388 
389  /// \brief Emit a MachineInstr with one register operand and a result register
390  /// in the given register class.
391  unsigned fastEmitInst_r(unsigned MachineInstOpcode,
392  const TargetRegisterClass *RC, unsigned Op0,
393  bool Op0IsKill);
394 
395  /// \brief Emit a MachineInstr with two register operands and a result
396  /// register in the given register class.
397  unsigned fastEmitInst_rr(unsigned MachineInstOpcode,
398  const TargetRegisterClass *RC, unsigned Op0,
399  bool Op0IsKill, unsigned Op1, bool Op1IsKill);
400 
401  /// \brief Emit a MachineInstr with three register operands and a result
402  /// register in the given register class.
403  unsigned fastEmitInst_rrr(unsigned MachineInstOpcode,
404  const TargetRegisterClass *RC, unsigned Op0,
405  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
406  unsigned Op2, bool Op2IsKill);
407 
408  /// \brief Emit a MachineInstr with a register operand, an immediate, and a
409  /// result register in the given register class.
410  unsigned fastEmitInst_ri(unsigned MachineInstOpcode,
411  const TargetRegisterClass *RC, unsigned Op0,
412  bool Op0IsKill, uint64_t Imm);
413 
414  /// \brief Emit a MachineInstr with one register operand and two immediate
415  /// operands.
416  unsigned fastEmitInst_rii(unsigned MachineInstOpcode,
417  const TargetRegisterClass *RC, unsigned Op0,
418  bool Op0IsKill, uint64_t Imm1, uint64_t Imm2);
419 
420  /// \brief Emit a MachineInstr with a floating point immediate, and a result
421  /// register in the given register class.
422  unsigned fastEmitInst_f(unsigned MachineInstOpcode,
423  const TargetRegisterClass *RC,
424  const ConstantFP *FPImm);
425 
426  /// \brief Emit a MachineInstr with two register operands, an immediate, and a
427  /// result register in the given register class.
428  unsigned fastEmitInst_rri(unsigned MachineInstOpcode,
429  const TargetRegisterClass *RC, unsigned Op0,
430  bool Op0IsKill, unsigned Op1, bool Op1IsKill,
431  uint64_t Imm);
432 
433  /// \brief Emit a MachineInstr with a single immediate operand, and a result
434  /// register in the given register class.
435  unsigned fastEmitInst_i(unsigned MachineInstrOpcode,
436  const TargetRegisterClass *RC, uint64_t Imm);
437 
438  /// \brief Emit a MachineInstr for an extract_subreg from a specified index of
439  /// a superregister to a specified type.
440  unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill,
441  uint32_t Idx);
442 
443  /// \brief Emit MachineInstrs to compute the value of Op with all but the
444  /// least significant bit set to zero.
445  unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill);
446 
447  /// \brief Emit an unconditional branch to the given block, unless it is the
448  /// immediate (fall-through) successor, and update the CFG.
449  void fastEmitBranch(MachineBasicBlock *MBB, const DebugLoc &DL);
450 
451  /// Emit an unconditional branch to \p FalseMBB, obtains the branch weight
452  /// and adds TrueMBB and FalseMBB to the successor list.
453  void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB,
454  MachineBasicBlock *FalseMBB);
455 
456  /// \brief Update the value map to include the new mapping for this
457  /// instruction, or insert an extra copy to get the result in a previous
458  /// determined register.
459  ///
460  /// NOTE: This is only necessary because we might select a block that uses a
461  /// value before we select the block that defines the value. It might be
462  /// possible to fix this by selecting blocks in reverse postorder.
463  void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs = 1);
464 
465  unsigned createResultReg(const TargetRegisterClass *RC);
466 
467  /// \brief Try to constrain Op so that it is usable by argument OpNum of the
468  /// provided MCInstrDesc. If this fails, create a new virtual register in the
469  /// correct class and COPY the value there.
470  unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
471  unsigned OpNum);
472 
473  /// \brief Emit a constant in a register using target-specific logic, such as
474  /// constant pool loads.
475  virtual unsigned fastMaterializeConstant(const Constant *C) { return 0; }
476 
477  /// \brief Emit an alloca address in a register using target-specific logic.
478  virtual unsigned fastMaterializeAlloca(const AllocaInst *C) { return 0; }
479 
480  /// \brief Emit the floating-point constant +0.0 in a register using target-
481  /// specific logic.
482  virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF) {
483  return 0;
484  }
485 
486  /// \brief Check if \c Add is an add that can be safely folded into \c GEP.
487  ///
488  /// \c Add can be folded into \c GEP if:
489  /// - \c Add is an add,
490  /// - \c Add's size matches \c GEP's,
491  /// - \c Add is in the same basic block as \c GEP, and
492  /// - \c Add has a constant operand.
493  bool canFoldAddIntoGEP(const User *GEP, const Value *Add);
494 
495  /// \brief Test whether the given value has exactly one use.
496  bool hasTrivialKill(const Value *V);
497 
498  /// \brief Create a machine mem operand from the given instruction.
500 
502 
503  bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs);
504  bool lowerCallTo(const CallInst *CI, const char *SymbolName,
505  unsigned NumArgs);
506  bool lowerCallTo(CallLoweringInfo &CLI);
507 
509  switch (II->getIntrinsicID()) {
510  case Intrinsic::sadd_with_overflow:
511  case Intrinsic::uadd_with_overflow:
512  case Intrinsic::smul_with_overflow:
513  case Intrinsic::umul_with_overflow:
514  return true;
515  default:
516  return false;
517  }
518  }
519 
520  bool lowerCall(const CallInst *I);
521  /// \brief Select and emit code for a binary operator instruction, which has
522  /// an opcode which directly corresponds to the given ISD opcode.
523  bool selectBinaryOp(const User *I, unsigned ISDOpcode);
524  bool selectFNeg(const User *I);
525  bool selectGetElementPtr(const User *I);
526  bool selectStackmap(const CallInst *I);
527  bool selectPatchpoint(const CallInst *I);
528  bool selectCall(const User *Call);
529  bool selectIntrinsicCall(const IntrinsicInst *II);
530  bool selectBitCast(const User *I);
531  bool selectCast(const User *I, unsigned Opcode);
532  bool selectExtractValue(const User *I);
533  bool selectInsertValue(const User *I);
534  bool selectXRayCustomEvent(const CallInst *II);
535 
536 private:
537  /// \brief Handle PHI nodes in successor blocks.
538  ///
539  /// Emit code to ensure constants are copied into registers when needed.
540  /// Remember the virtual registers that need to be added to the Machine PHI
541  /// nodes as input. We cannot just directly add them, because expansion might
542  /// result in multiple MBB's for one BB. As such, the start of the BB might
543  /// correspond to a different MBB than the end.
544  bool handlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
545 
546  /// \brief Helper for materializeRegForValue to materialize a constant in a
547  /// target-independent way.
548  unsigned materializeConstant(const Value *V, MVT VT);
549 
550  /// \brief Helper for getRegForVale. This function is called when the value
551  /// isn't already available in a register and must be materialized with new
552  /// instructions.
553  unsigned materializeRegForValue(const Value *V, MVT VT);
554 
555  /// \brief Clears LocalValueMap and moves the area for the new local variables
556  /// to the beginning of the block. It helps to avoid spilling cached variables
557  /// across heavy instructions like calls.
558  void flushLocalValueMap();
559 
560  /// \brief Removes dead local value instructions after SavedLastLocalvalue.
561  void removeDeadLocalValueCode(MachineInstr *SavedLastLocalValue);
562 
563  /// \brief Insertion point before trying to select the current instruction.
564  MachineBasicBlock::iterator SavedInsertPt;
565 
566  /// \brief Add a stackmap or patchpoint intrinsic call's live variable
567  /// operands to a stackmap or patchpoint machine instruction.
568  bool addStackMapLiveVars(SmallVectorImpl<MachineOperand> &Ops,
569  const CallInst *CI, unsigned StartIdx);
570  bool lowerCallOperands(const CallInst *CI, unsigned ArgIdx, unsigned NumArgs,
571  const Value *Callee, bool ForceRetVoidTy,
572  CallLoweringInfo &CLI);
573 };
574 
575 } // end namespace llvm
576 
577 #endif // LLVM_CODEGEN_FASTISEL_H
uint64_t CallInst * C
unsigned fastEmitInst_rrr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, unsigned Op2, bool Op2IsKill)
Emit a MachineInstr with three register operands and a result register in the given register class...
Definition: FastISel.cpp:1870
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:109
The MachineConstantPool class keeps track of constants referenced by a function which must be spilled...
This class is the base class for the comparison instructions.
Definition: InstrTypes.h:843
unsigned fastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill)
Emit MachineInstrs to compute the value of Op with all but the least significant bit set to zero...
Definition: FastISel.cpp:2020
MachineConstantPool & MCP
Definition: FastISel.h:208
bool lowerCall(const CallInst *I)
Definition: FastISel.cpp:1041
CallingConv::ID getCallingConv() const
Get the calling convention of the call.
Definition: CallSite.h:312
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
virtual unsigned fastMaterializeConstant(const Constant *C)
Emit a constant in a register using target-specific logic, such as constant pool loads.
Definition: FastISel.h:475
Various leaf nodes.
Definition: ISDOpcodes.h:60
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
ImmutableCallSite * CS
Definition: FastISel.h:90
bool selectGetElementPtr(const User *I)
Definition: FastISel.cpp:497
void leaveLocalValueArea(SavePoint Old)
Reset InsertPt to the given old insert position.
Definition: FastISel.cpp:397
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
bool selectStackmap(const CallInst *I)
Definition: FastISel.cpp:612
This class represents a function call, abstracting a target machine&#39;s calling convention.
virtual bool tryToFoldLoadIntoMI(MachineInstr *, unsigned, const LoadInst *)
The specified machine instr operand is a vreg, and that vreg is being provided by the specified load ...
Definition: FastISel.h:298
MachineMemOperand * createMachineMemOperandFor(const Instruction *I) const
Create a machine mem operand from the given instruction.
Definition: FastISel.cpp:2170
virtual unsigned fastEmit_(MVT VT, MVT RetVT, unsigned Opcode)
This method is called by target-independent code to request that an instruction with the given type a...
Definition: FastISel.cpp:1721
A debug info location.
Definition: DebugLoc.h:34
SmallVector< unsigned, 4 > InRegs
Definition: FastISel.h:99
An instruction for reading from memory.
Definition: Instructions.h:164
Hexagon Common GEP
virtual unsigned fastEmit_i(MVT VT, MVT RetVT, unsigned Opcode, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1734
virtual unsigned fastMaterializeFloatZero(const ConstantFP *CF)
Emit the floating-point constant +0.0 in a register using target- specific logic. ...
Definition: FastISel.h:482
virtual bool fastLowerCall(CallLoweringInfo &CLI)
This method is called by target-independent code to do target- specific call lowering.
Definition: FastISel.cpp:1715
bool selectInstruction(const Instruction *I)
Do "fast" instruction selection for the given LLVM IR instruction and append the generated machine in...
Definition: FastISel.cpp:1381
unsigned fastEmitInst_rii(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm1, uint64_t Imm2)
Emit a MachineInstr with one register operand and two immediate operands.
Definition: FastISel.cpp:1920
MachineFunction * MF
Definition: FastISel.h:205
DenseMap< const Value *, unsigned > LocalValueMap
Definition: FastISel.h:203
unsigned fastEmitInst_ri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, uint64_t Imm)
Emit a MachineInstr with a register operand, an immediate, and a result register in the given registe...
Definition: FastISel.cpp:1898
void setLastLocalValue(MachineInstr *I)
Update the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:238
unsigned fastEmitInst_rri(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill, uint64_t Imm)
Emit a MachineInstr with two register operands, an immediate, and a result register in the given regi...
Definition: FastISel.cpp:1964
CmpInst::Predicate optimizeCmpPredicate(const CmpInst *CI) const
Definition: FastISel.cpp:2219
A description of a memory reference used in the backend.
bool doesNotReturn() const
Determine if the call cannot return.
Definition: CallSite.h:497
constexpr char SymbolName[]
Key for Kernel::Metadata::mSymbolName.
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, const Value *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:151
TargetLoweringBase::ArgListTy ArgListTy
Definition: FastISel.h:70
unsigned fastEmitInst_i(unsigned MachineInstrOpcode, const TargetRegisterClass *RC, uint64_t Imm)
Emit a MachineInstr with a single immediate operand, and a result register in the given register clas...
Definition: FastISel.cpp:1990
bool canFoldAddIntoGEP(const User *GEP, const Value *Add)
Check if Add is an add that can be safely folded into GEP.
Definition: FastISel.cpp:2153
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
unsigned fastEmitInst_r(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill)
Emit a MachineInstr with one register operand and a result register in the given register class...
Definition: FastISel.cpp:1825
MachineInstr * EmitStartPt
The top most instruction in the current block that is allowed for emitting local variables.
Definition: FastISel.h:227
Reg
All possible values of the reg field in the ModR/M byte.
This file contains the simple types necessary to represent the attributes associated with functions a...
InstrTy * getInstruction() const
Definition: CallSite.h:92
The MachineFrameInfo class represents an abstract stack frame until prolog/epilog code is inserted...
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
const TargetMachine & TM
Definition: FastISel.h:210
bool selectIntrinsicCall(const IntrinsicInst *II)
Definition: FastISel.cpp:1126
bool selectCast(const User *I, unsigned Opcode)
Definition: FastISel.cpp:1280
Context object for machine code objects.
Definition: MCContext.h:59
ValTy * getCalledValue() const
Return the pointer to function that is being called.
Definition: CallSite.h:100
This is a fast-path instruction selection class that generates poor code and doesn&#39;t support illegal ...
Definition: FastISel.h:67
Class to represent function types.
Definition: DerivedTypes.h:103
SmallVector< ISD::InputArg, 4 > Ins
Definition: FastISel.h:98
unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op, unsigned OpNum)
Try to constrain Op so that it is usable by argument OpNum of the provided MCInstrDesc.
Definition: FastISel.cpp:1799
bool selectOperator(const User *I, unsigned Opcode)
Do "fast" instruction selection for the given LLVM IR operator (Instruction or ConstantExpr), and append generated machine instructions to the current block.
Definition: FastISel.cpp:1582
DebugLoc getCurDebugLoc() const
Return current debug location information.
Definition: FastISel.h:248
C - The default llvm calling convention, compatible with C.
Definition: CallingConv.h:35
unsigned getRegForValue(const Value *V)
Create a virtual register and arrange for it to be assigned the value for the given LLVM value...
Definition: FastISel.cpp:195
bool isVarArg() const
Definition: DerivedTypes.h:123
unsigned fastEmitInst_(unsigned MachineInstOpcode, const TargetRegisterClass *RC)
Emit a MachineInstr with no operands and a result register in the given register class.
Definition: FastISel.cpp:1816
bool hasTrivialKill(const Value *V)
Test whether the given value has exactly one use.
Definition: FastISel.cpp:163
MachineInstr * getLastLocalValue()
Return the position of the last instruction emitted for materializing constants for use in the curren...
Definition: FastISel.h:234
unsigned lookUpRegForValue(const Value *V)
Look up the value to see if its value is already cached in a register.
Definition: FastISel.cpp:308
TargetInstrInfo - Interface to description of machine instruction set.
bool selectInsertValue(const User *I)
virtual ~FastISel()
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, const Value *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call)
Definition: FastISel.h:105
Machine Value Type.
LLVM Basic Block Representation.
Definition: BasicBlock.h:59
CallLoweringInfo & setCallee(CallingConv::ID CC, Type *ResultTy, MCSymbol *Target, ArgListTy &&ArgsList, unsigned FixedArgs=~0U)
Definition: FastISel.h:167
The instances of the Type class are immutable: once they are created, they are never changed...
Definition: Type.h:46
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
This is an important base class in LLVM.
Definition: Constant.h:42
void removeDeadCode(MachineBasicBlock::iterator I, MachineBasicBlock::iterator E)
Remove all dead instructions between the I and E.
Definition: FastISel.cpp:375
SmallVector< ISD::ArgFlagsTy, 16 > OutFlags
Definition: FastISel.h:96
unsigned getNumParams() const
Return the number of fixed parameters this function type requires.
Definition: DerivedTypes.h:139
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:264
MachineFrameInfo & MFI
Definition: FastISel.h:207
virtual unsigned fastEmit_r(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1723
bool SkipTargetIndependentISel
Definition: FastISel.h:216
bool tryToFoldLoad(const LoadInst *LI, const Instruction *FoldInst)
We&#39;re checking to see if we can fold LI into FoldInst.
Definition: FastISel.cpp:2097
bool lowerArguments()
Do "fast" instruction selection for function arguments and append the machine instructions to the cur...
Definition: FastISel.cpp:136
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:853
bool selectXRayCustomEvent(const CallInst *II)
Definition: FastISel.cpp:863
const TargetRegisterInfo & TRI
Definition: FastISel.h:214
std::vector< ArgListEntry > ArgListTy
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
bool selectFNeg(const User *I)
Emit an FNeg operation.
Definition: FastISel.cpp:1499
CallLoweringInfo & setTailCall(bool Value=true)
Definition: FastISel.h:178
SmallVector< Value *, 16 > OutVals
Definition: FastISel.h:95
const TargetInstrInfo & TII
Definition: FastISel.h:212
MachineInstr * LastLocalValue
The position of the last instruction for materializing constants for use in the current block...
Definition: FastISel.h:222
void recomputeInsertPt()
Reset InsertPt to prepare for inserting instructions into the current block.
Definition: FastISel.cpp:361
Intrinsic::ID getIntrinsicID() const
Return the intrinsic ID of this intrinsic.
Definition: IntrinsicInst.h:51
virtual unsigned fastEmit_rr(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1728
bool isCommutativeIntrinsic(IntrinsicInst const *II)
Definition: FastISel.h:508
virtual unsigned fastEmit_ri(MVT VT, MVT RetVT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1743
CallLoweringInfo & setCallee(Type *ResultTy, FunctionType *FuncTy, MCSymbol *Target, ArgListTy &&ArgsList, ImmutableCallSite &Call, unsigned FixedArgs=~0U)
Definition: FastISel.h:127
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
Provides information about what library functions are available for the current target.
void finishCondBranch(const BasicBlock *BranchBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB)
Emit an unconditional branch to FalseMBB, obtains the branch weight and adds TrueMBB and FalseMBB to ...
Definition: FastISel.cpp:1480
const TargetLibraryInfo * LibInfo
Definition: FastISel.h:215
unsigned fastEmitInst_rr(unsigned MachineInstOpcode, const TargetRegisterClass *RC, unsigned Op0, bool Op0IsKill, unsigned Op1, bool Op1IsKill)
Emit a MachineInstr with two register operands and a result register in the given register class...
Definition: FastISel.cpp:1846
void updateValueMap(const Value *I, unsigned Reg, unsigned NumRegs=1)
Update the value map to include the new mapping for this instruction, or insert an extra copy to get ...
Definition: FastISel.cpp:319
void startNewBlock()
Set the current block to which generated machine instructions will be appended, and clear the local C...
Definition: FastISel.cpp:124
bool selectBitCast(const User *I)
Definition: FastISel.cpp:1313
Target - Wrapper for Target specific information.
virtual unsigned fastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm)
This method is called by target-independent code to request that an instruction with the given type...
Definition: FastISel.cpp:1738
SmallVector< unsigned, 16 > OutRegs
Definition: FastISel.h:97
const DataLayout & DL
Definition: FastISel.h:211
bool selectBinaryOp(const User *I, unsigned ISDOpcode)
Select and emit code for a binary operator instruction, which has an opcode which directly correspond...
Definition: FastISel.cpp:406
DebugLoc DbgLoc
Definition: FastISel.h:209
bool selectCall(const User *Call)
Definition: FastISel.cpp:1080
could "use" a pointer
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
SavePoint enterLocalValueArea()
Prepare InsertPt to begin inserting instructions into the local value area and return the old insert ...
Definition: FastISel.cpp:388
Representation of each machine instruction.
Definition: MachineInstr.h:59
Basic Alias true
virtual bool fastLowerIntrinsicCall(const IntrinsicInst *II)
This method is called by target-independent code to do target- specific intrinsic lowering...
Definition: FastISel.cpp:1717
bool selectPatchpoint(const CallInst *I)
Definition: FastISel.cpp:725
bool selectExtractValue(const User *I)
Definition: FastISel.cpp:1542
MachineRegisterInfo & MRI
Definition: FastISel.h:206
bool lowerCallTo(const CallInst *CI, MCSymbol *Symbol, unsigned NumArgs)
Definition: FastISel.cpp:906
Establish a view to a call site for examination.
Definition: CallSite.h:713
#define I(x, y, z)
Definition: MD5.cpp:58
FunctionLoweringInfo - This contains information that is global to a function that is used when lower...
virtual unsigned fastMaterializeAlloca(const AllocaInst *C)
Emit an alloca address in a register using target-specific logic.
Definition: FastISel.h:478
const TargetLowering & TLI
Definition: FastISel.h:213
unsigned createResultReg(const TargetRegisterClass *RC)
Definition: FastISel.cpp:1795
CallLoweringInfo & setIsPatchPoint(bool Value=true)
Definition: FastISel.h:183
unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType)
This method is a wrapper of fastEmit_ri.
Definition: FastISel.cpp:1752
unsigned fastEmitInst_extractsubreg(MVT RetVT, unsigned Op0, bool Op0IsKill, uint32_t Idx)
Emit a MachineInstr for an extract_subreg from a specified index of a superregister to a specified ty...
Definition: FastISel.cpp:2006
MachineBasicBlock::iterator InsertPt
Definition: FastISel.h:312
FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, bool SkipTargetIndependentISel=false)
Definition: FastISel.cpp:1700
virtual bool fastLowerArguments()
This method is called by target-independent code to do target- specific argument lowering.
Definition: FastISel.cpp:1713
bool hasRetAttr(Attribute::AttrKind Kind) const
Return true if this return value has the given attribute.
Definition: CallSite.h:372
LLVM Value Representation.
Definition: Value.h:73
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:57
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
virtual bool fastSelectInstruction(const Instruction *I)=0
This method is called by target-independent code when the normal FastISel process fails to select an ...
unsigned fastEmitInst_f(unsigned MachineInstOpcode, const TargetRegisterClass *RC, const ConstantFP *FPImm)
Emit a MachineInstr with a floating point immediate, and a result register in the given register clas...
Definition: FastISel.cpp:1945
FunctionLoweringInfo & FuncInfo
Definition: FastISel.h:204
void fastEmitBranch(MachineBasicBlock *MBB, const DebugLoc &DL)
Emit an unconditional branch to the given block, unless it is the immediate (fall-through) successor...
Definition: FastISel.cpp:1460
bool use_empty() const
Definition: Value.h:328
A wrapper class for inspecting calls to intrinsic functions.
Definition: IntrinsicInst.h:44
This file describes how to lower LLVM code to machine code.
an instruction to allocate memory on the stack
Definition: Instructions.h:60
std::pair< unsigned, bool > getRegForGEPIndex(const Value *V)
This is a wrapper around getRegForValue that also takes care of truncating or sign-extending the give...
Definition: FastISel.cpp:338