LLVM  9.0.0svn
Typedefs | Functions
GCNHazardRecognizer.cpp File Reference
#include "GCNHazardRecognizer.h"
#include "AMDGPUSubtarget.h"
#include "SIDefines.h"
#include "SIInstrInfo.h"
#include "SIRegisterInfo.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
#include "Utils/AMDGPUBaseInfo.h"
#include "llvm/ADT/iterator_range.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/Support/ErrorHandling.h"
#include <algorithm>
#include <cassert>
#include <limits>
#include <set>
#include <vector>
Include dependency graph for GCNHazardRecognizer.cpp:

Go to the source code of this file.

Typedefs

typedef function_ref< bool(MachineInstr *, int WaitStates)> IsExpiredFn
 

Functions

static bool isDivFMas (unsigned Opcode)
 
static bool isSGetReg (unsigned Opcode)
 
static bool isSSetReg (unsigned Opcode)
 
static bool isRWLane (unsigned Opcode)
 
static bool isRFE (unsigned Opcode)
 
static bool isSMovRel (unsigned Opcode)
 
static bool isSendMsgTraceDataOrGDS (const SIInstrInfo &TII, const MachineInstr &MI)
 
static bool isPermlane (const MachineInstr &MI)
 
static unsigned getHWReg (const SIInstrInfo *TII, const MachineInstr &RegInstr)
 
static void insertNoopInBundle (MachineInstr *MI, const SIInstrInfo &TII)
 
static int getWaitStatesSince (GCNHazardRecognizer::IsHazardFn IsHazard, MachineBasicBlock *MBB, MachineBasicBlock::reverse_instr_iterator I, int WaitStates, IsExpiredFn IsExpired, DenseSet< const MachineBasicBlock *> &Visited)
 
static int getWaitStatesSince (GCNHazardRecognizer::IsHazardFn IsHazard, MachineInstr *MI, IsExpiredFn IsExpired)
 
static void addRegUnits (const SIRegisterInfo &TRI, BitVector &BV, unsigned Reg)
 
static void addRegsToSet (const SIRegisterInfo &TRI, iterator_range< MachineInstr::const_mop_iterator > Ops, BitVector &Set)
 

Typedef Documentation

◆ IsExpiredFn

typedef function_ref<bool(MachineInstr *, int WaitStates)> IsExpiredFn

Definition at line 338 of file GCNHazardRecognizer.cpp.

Function Documentation

◆ addRegsToSet()

static void addRegsToSet ( const SIRegisterInfo TRI,
iterator_range< MachineInstr::const_mop_iterator Ops,
BitVector Set 
)
static

Definition at line 456 of file GCNHazardRecognizer.cpp.

References llvm::MachineInstrBuilder::addImm(), addRegUnits(), llvm::BitVector::anyCommon(), assert(), llvm::BuildMI(), llvm::RegState::Dead, llvm::AMDGPU::decodeWaitcnt(), llvm::tgtok::Def, llvm::RegState::Define, llvm::MachineInstr::defs(), llvm::SIInstrFlags::DPP, E, llvm::MachineInstr::getDebugLoc(), llvm::MachineInstr::getDesc(), llvm::GCNSubtarget::getGeneration(), getHWReg(), llvm::MachineOperand::getImm(), llvm::GCNSubtarget::getInstrInfo(), llvm::SIInstrInfo::getInstSizeInBytes(), llvm::AMDGPU::getIsaVersion(), llvm::AMDGPU::getMIMGInfo(), llvm::SIInstrInfo::getNamedOperand(), llvm::AMDGPU::getNamedOperandIdx(), llvm::MachineInstr::getNumDefs(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineInstr::getParent(), llvm::SIRegisterInfo::getPhysRegClass(), llvm::MachineOperand::getReg(), llvm::AMDGPU::getRegBitWidth(), llvm::MachineFunction::getRegInfo(), llvm::GCNSubtarget::getRegisterInfo(), getWaitStatesSince(), llvm::GCNSubtarget::has12DWordStoreHazard(), llvm::GCNSubtarget::hasLdsBranchVmemWARHazard(), llvm::GCNSubtarget::hasNSAtoVMEMBug(), llvm::GCNSubtarget::hasSMEMtoVectorWriteHazard(), llvm::GCNSubtarget::hasSMovFedHazard(), llvm::GCNSubtarget::hasVcmpxExecWARHazard(), llvm::GCNSubtarget::hasVcmpxPermlaneHazard(), llvm::GCNSubtarget::hasVMEMtoScalarWriteHazard(), I, llvm::AMDGPU::Hwreg::ID_TRAPSTS, llvm::MachineInstr::implicit_operands(), Info, llvm::MachineInstr::isBranch(), llvm::SIInstrInfo::isBufferSMRD(), llvm::MachineInstr::isDebugInstr(), llvm::MachineOperand::isDef(), llvm::SIInstrInfo::isDS(), llvm::SIInstrInfo::isFLAT(), llvm::MachineOperand::isImplicit(), llvm::SIInstrInfo::isMIMG(), llvm::SIInstrInfo::isMTBUF(), llvm::SIInstrInfo::isMUBUF(), isPermlane(), llvm::MachineOperand::isReg(), llvm::SIInstrInfo::isSALU(), llvm::SIInstrInfo::isSegmentSpecificFLAT(), llvm::SIRegisterInfo::isSGPRClass(), llvm::SIRegisterInfo::isSGPRReg(), llvm::SIInstrInfo::isSMRD(), llvm::SIInstrInfo::isSOPP(), llvm::SIInstrInfo::isVALU(), llvm::SIRegisterInfo::isVGPR(), llvm::SIInstrInfo::isVMEM(), llvm::SIInstrInfo::isVOPC(), llvm::GCNSubtarget::isXNACKEnabled(), llvm::RegState::Kill, llvm::max(), llvm::MachineInstr::mayStore(), MI, llvm::AMDGPU::MIMGInfo::MIMGEncoding, llvm::InlineAsm::MIOp_FirstOperand, llvm::MachineInstr::modifiesRegister(), MRI, llvm::BitVector::none(), llvm::MCInstrDesc::OpInfo, Reg, llvm::MCOperandInfo::RegClass, llvm::AMDGPUSubtarget::SEA_ISLANDS, llvm::SIInstrFlags::SMRD, llvm::AMDGPUSubtarget::SOUTHERN_ISLANDS, llvm::RegState::Undef, llvm::MachineInstr::uses(), llvm::SIInstrFlags::VALU, and llvm::AMDGPUSubtarget::VOLCANIC_ISLANDS.

◆ addRegUnits()

static void addRegUnits ( const SIRegisterInfo TRI,
BitVector BV,
unsigned  Reg 
)
static

◆ getHWReg()

static unsigned getHWReg ( const SIInstrInfo TII,
const MachineInstr RegInstr 
)
static

◆ getWaitStatesSince() [1/2]

static int getWaitStatesSince ( GCNHazardRecognizer::IsHazardFn  IsHazard,
MachineBasicBlock MBB,
MachineBasicBlock::reverse_instr_iterator  I,
int  WaitStates,
IsExpiredFn  IsExpired,
DenseSet< const MachineBasicBlock *> &  Visited 
)
static

◆ getWaitStatesSince() [2/2]

static int getWaitStatesSince ( GCNHazardRecognizer::IsHazardFn  IsHazard,
MachineInstr MI,
IsExpiredFn  IsExpired 
)
static

◆ insertNoopInBundle()

static void insertNoopInBundle ( MachineInstr MI,
const SIInstrInfo TII 
)
static

◆ isDivFMas()

static bool isDivFMas ( unsigned  Opcode)
static

◆ isPermlane()

static bool isPermlane ( const MachineInstr MI)
static

Definition at line 118 of file GCNHazardRecognizer.cpp.

References llvm::MachineInstr::getOpcode().

Referenced by addRegsToSet().

◆ isRFE()

static bool isRFE ( unsigned  Opcode)
static

◆ isRWLane()

static bool isRWLane ( unsigned  Opcode)
static

◆ isSendMsgTraceDataOrGDS()

static bool isSendMsgTraceDataOrGDS ( const SIInstrInfo TII,
const MachineInstr MI 
)
static

◆ isSGetReg()

static bool isSGetReg ( unsigned  Opcode)
static

◆ isSMovRel()

static bool isSMovRel ( unsigned  Opcode)
static

◆ isSSetReg()

static bool isSSetReg ( unsigned  Opcode)
static