LLVM  8.0.0svn
GCNIterativeScheduler.h
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1 //===- GCNIterativeScheduler.h - GCN Scheduler ------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
11 #define LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
12 
13 #include "GCNRegPressure.h"
14 #include "llvm/ADT/ArrayRef.h"
17 #include "llvm/Support/Allocator.h"
18 #include <limits>
19 #include <memory>
20 #include <vector>
21 
22 namespace llvm {
23 
24 class MachineInstr;
25 class SUnit;
26 class raw_ostream;
27 
30 
31 public:
32  enum StrategyKind {
37  };
38 
40  StrategyKind S);
41 
42  void schedule() override;
43 
47  unsigned RegionInstrs) override;
48 
49  void finalizeSchedule() override;
50 
51 protected:
53 
55  std::vector<MachineInstr *> Schedule;
57  };
58 
59  struct Region {
60  // Fields except for BestSchedule are supposed to reflect current IR state
61  // `const` fields are to emphasize they shouldn't change for any schedule.
63  // End is either a boundary instruction or end of basic block
65  const unsigned NumRegionInstrs;
67 
68  // best schedule for the region so far (not scheduled yet)
69  std::unique_ptr<TentativeSchedule> BestSchedule;
70  };
71 
73  std::vector<Region*> Regions;
74 
78 
79  class BuildDAG;
81 
82  template <typename Range>
84  Range &&Schedule) const;
85 
87  MachineBasicBlock::iterator End) const;
88 
90  return getRegionPressure(R.Begin, R.End);
91  }
92 
93  void setBestSchedule(Region &R,
95  const GCNRegPressure &MaxRP = GCNRegPressure());
96 
97  void scheduleBest(Region &R);
98 
99  std::vector<MachineInstr*> detachSchedule(ScheduleRef Schedule) const;
100 
101  void sortRegionsByPressure(unsigned TargetOcc);
102 
103  template <typename Range>
104  void scheduleRegion(Region &R, Range &&Schedule,
105  const GCNRegPressure &MaxRP = GCNRegPressure());
106 
107  unsigned tryMaximizeOccupancy(unsigned TargetOcc =
109 
110  void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy = true);
111  void scheduleMinReg(bool force = false);
112  void scheduleILP(bool TryMaximizeOccupancy = true);
113 
114  void printRegions(raw_ostream &OS) const;
115  void printSchedResult(raw_ostream &OS,
116  const Region *R,
117  const GCNRegPressure &RP) const;
118  void printSchedRP(raw_ostream &OS,
119  const GCNRegPressure &Before,
120  const GCNRegPressure &After) const;
121 };
122 
123 } // end namespace llvm
124 
125 #endif // LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
unsigned tryMaximizeOccupancy(unsigned TargetOcc=std::numeric_limits< unsigned >::max())
uint64_t CallInst * C
void enterRegion(MachineBasicBlock *BB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned RegionInstrs) override
Implement the ScheduleDAGInstrs interface for handling the next scheduling region.
GCNRegPressure getRegionPressure(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End) const
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
void sortRegionsByPressure(unsigned TargetOcc)
SpecificBumpPtrAllocator< Region > Alloc
std::vector< Region * > Regions
std::vector< MachineInstr * > detachSchedule(ScheduleRef Schedule) const
This file defines the MallocAllocator and BumpPtrAllocator interfaces.
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
void printRegions(raw_ostream &OS) const
void finalizeSchedule() override
Allow targets to perform final scheduling actions at the level of the whole MachineFunction.
void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy=true)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:33
void printSchedRP(raw_ostream &OS, const GCNRegPressure &Before, const GCNRegPressure &After) const
void setBestSchedule(Region &R, ScheduleRef Schedule, const GCNRegPressure &MaxRP=GCNRegPressure())
GCNRegPressure getSchedulePressure(const Region &R, Range &&Schedule) const
void schedule() override
Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
A BumpPtrAllocator that allows only elements of a specific type to be allocated.
Definition: Allocator.h:415
const MachineBasicBlock::iterator End
ScheduleDAGMILive(MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S)
void printSchedResult(raw_ostream &OS, const Region *R, const GCNRegPressure &RP) const
GCNIterativeScheduler(MachineSchedContext *C, StrategyKind S)
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
void scheduleRegion(Region &R, Range &&Schedule, const GCNRegPressure &MaxRP=GCNRegPressure())
void scheduleMinReg(bool force=false)
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
MachineBasicBlock * BB
The block in which to insert instructions.
void scheduleILP(bool TryMaximizeOccupancy=true)
GCNRegPressure getRegionPressure(const Region &R) const
std::unique_ptr< TentativeSchedule > BestSchedule