LLVM  10.0.0svn
GCNIterativeScheduler.h
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1 //===- GCNIterativeScheduler.h - GCN Scheduler ------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
10 #define LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
11 
12 #include "GCNRegPressure.h"
13 #include "llvm/ADT/ArrayRef.h"
16 #include "llvm/Support/Allocator.h"
17 #include <limits>
18 #include <memory>
19 #include <vector>
20 
21 namespace llvm {
22 
23 class MachineInstr;
24 class SUnit;
25 class raw_ostream;
26 
29 
30 public:
31  enum StrategyKind {
36  };
37 
39  StrategyKind S);
40 
41  void schedule() override;
42 
46  unsigned RegionInstrs) override;
47 
48  void finalizeSchedule() override;
49 
50 protected:
52 
54  std::vector<MachineInstr *> Schedule;
56  };
57 
58  struct Region {
59  // Fields except for BestSchedule are supposed to reflect current IR state
60  // `const` fields are to emphasize they shouldn't change for any schedule.
62  // End is either a boundary instruction or end of basic block
64  const unsigned NumRegionInstrs;
66 
67  // best schedule for the region so far (not scheduled yet)
68  std::unique_ptr<TentativeSchedule> BestSchedule;
69  };
70 
72  std::vector<Region*> Regions;
73 
77 
78  class BuildDAG;
80 
81  template <typename Range>
83  Range &&Schedule) const;
84 
86  MachineBasicBlock::iterator End) const;
87 
89  return getRegionPressure(R.Begin, R.End);
90  }
91 
92  void setBestSchedule(Region &R,
94  const GCNRegPressure &MaxRP = GCNRegPressure());
95 
96  void scheduleBest(Region &R);
97 
98  std::vector<MachineInstr*> detachSchedule(ScheduleRef Schedule) const;
99 
100  void sortRegionsByPressure(unsigned TargetOcc);
101 
102  template <typename Range>
103  void scheduleRegion(Region &R, Range &&Schedule,
104  const GCNRegPressure &MaxRP = GCNRegPressure());
105 
106  unsigned tryMaximizeOccupancy(unsigned TargetOcc =
108 
109  void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy = true);
110  void scheduleMinReg(bool force = false);
111  void scheduleILP(bool TryMaximizeOccupancy = true);
112 
113  void printRegions(raw_ostream &OS) const;
114  void printSchedResult(raw_ostream &OS,
115  const Region *R,
116  const GCNRegPressure &RP) const;
117  void printSchedRP(raw_ostream &OS,
118  const GCNRegPressure &Before,
119  const GCNRegPressure &After) const;
120 };
121 
122 } // end namespace llvm
123 
124 #endif // LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
unsigned tryMaximizeOccupancy(unsigned TargetOcc=std::numeric_limits< unsigned >::max())
uint64_t CallInst * C
void enterRegion(MachineBasicBlock *BB, MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End, unsigned RegionInstrs) override
Implement the ScheduleDAGInstrs interface for handling the next scheduling region.
GCNRegPressure getRegionPressure(MachineBasicBlock::iterator Begin, MachineBasicBlock::iterator End) const
GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
void sortRegionsByPressure(unsigned TargetOcc)
SpecificBumpPtrAllocator< Region > Alloc
std::vector< Region * > Regions
std::vector< MachineInstr * > detachSchedule(ScheduleRef Schedule) const
This file defines the MallocAllocator and BumpPtrAllocator interfaces.
ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while...
void printRegions(raw_ostream &OS) const
void finalizeSchedule() override
Allow targets to perform final scheduling actions at the level of the whole MachineFunction.
void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy=true)
ArrayRef - Represent a constant reference to an array (0 or more elements consecutively in memory)...
Definition: APInt.h:32
void printSchedRP(raw_ostream &OS, const GCNRegPressure &Before, const GCNRegPressure &After) const
void setBestSchedule(Region &R, ScheduleRef Schedule, const GCNRegPressure &MaxRP=GCNRegPressure())
GCNRegPressure getSchedulePressure(const Region &R, Range &&Schedule) const
void schedule() override
Implement ScheduleDAGInstrs interface for scheduling a sequence of reorderable instructions.
A BumpPtrAllocator that allows only elements of a specific type to be allocated.
Definition: Allocator.h:441
const MachineBasicBlock::iterator End
ScheduleDAGMILive(MachineSchedContext *C, std::unique_ptr< MachineSchedStrategy > S)
void printSchedResult(raw_ostream &OS, const Region *R, const GCNRegPressure &RP) const
GCNIterativeScheduler(MachineSchedContext *C, StrategyKind S)
MachineSchedContext provides enough context from the MachineScheduler pass for the target to instanti...
void scheduleRegion(Region &R, Range &&Schedule, const GCNRegPressure &MaxRP=GCNRegPressure())
void scheduleMinReg(bool force=false)
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
MachineBasicBlock * BB
The block in which to insert instructions.
void scheduleILP(bool TryMaximizeOccupancy=true)
GCNRegPressure getRegionPressure(const Region &R) const
std::unique_ptr< TentativeSchedule > BestSchedule