LLVM  10.0.0svn
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1 //===- llvm/CodeGen/GlobalISel/GISelKnownBits.h ---------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// Provides analysis for querying information about KnownBits during GISel
10 /// passes.
11 //
12 //===----------------------------------------------------------------------===//
18 #include "llvm/CodeGen/Register.h"
19 #include "llvm/IR/PassManager.h"
20 #include "llvm/InitializePasses.h"
21 #include "llvm/Pass.h"
22 #include "llvm/Support/KnownBits.h"
24 namespace llvm {
26 class TargetLowering;
27 class DataLayout;
30  MachineFunction &MF;
32  const TargetLowering &TL;
33  const DataLayout &DL;
35 public:
37  virtual ~GISelKnownBits() = default;
38  void setMF(MachineFunction &MF);
39  virtual void computeKnownBitsImpl(Register R, KnownBits &Known,
40  const APInt &DemandedElts,
41  unsigned Depth = 0);
43  // KnownBitsAPI
45  // Calls getKnownBits for first operand def of MI.
50  /// \return true if 'V & Mask' is known to be zero in DemandedElts. We use
51  /// this predicate to simplify operations downstream.
52  /// Mask is known to be zero for bits that V cannot have.
53  bool maskedValueIsZero(Register Val, const APInt &Mask) {
54  return Mask.isSubsetOf(getKnownBits(Val).Zero);
55  }
57  /// \return true if the sign bit of Op is known to be zero. We use this
58  /// predicate to simplify operations downstream.
61  // FIXME: Is this the right place for G_FRAME_INDEX? Should it be in
62  // TargetLowering?
64  const APInt &DemandedElts,
65  unsigned Depth = 0);
66  static Align inferAlignmentForFrameIdx(int FrameIdx, int Offset,
67  const MachineFunction &MF);
68  static void computeKnownBitsForAlignment(KnownBits &Known,
69  MaybeAlign Alignment);
71  // Try to infer alignment for MI.
72  static MaybeAlign inferPtrAlignment(const MachineInstr &MI);
74  // Observer API. No-op for non-caching implementation.
75  void erasingInstr(MachineInstr &MI) override{};
76  void createdInstr(MachineInstr &MI) override{};
77  void changingInstr(MachineInstr &MI) override{};
78  void changedInstr(MachineInstr &MI) override{};
80 protected:
81  unsigned getMaxDepth() const { return 6; }
82 };
84 /// To use KnownBitsInfo analysis in a pass,
85 /// KnownBitsInfo &Info = getAnalysis<GISelKnownBitsInfoAnalysis>().get(MF);
86 /// Add to observer if the Info is caching.
87 /// WrapperObserver.addObserver(Info);
89 /// Eventually add other features such as caching/ser/deserializing
90 /// to MIR etc. Those implementations can derive from GISelKnownBits
91 /// and override computeKnownBitsImpl.
93  std::unique_ptr<GISelKnownBits> Info;
95 public:
96  static char ID;
99  }
101  if (!Info)
102  Info = std::make_unique<GISelKnownBits>(MF);
103  return *Info.get();
104  }
105  void getAnalysisUsage(AnalysisUsage &AU) const override;
106  bool runOnMachineFunction(MachineFunction &MF) override;
107  void releaseMemory() override { Info.reset(); }
108 };
109 } // namespace llvm
111 #endif // ifdef
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
void changedInstr(MachineInstr &MI) override
This instruction was mutated in some way.
bool maskedValueIsZero(Register Val, const APInt &Mask)
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
This class represents lattice values for constants.
Definition: AllocatorList.h:23
GISelKnownBits(MachineFunction &MF)
bool isSubsetOf(const APInt &RHS) const
This operation checks that all bits set in this APInt are also set in RHS.
Definition: APInt.h:1328
virtual ~GISelKnownBits()=default
void initializeGISelKnownBitsAnalysisPass(PassRegistry &)
static MaybeAlign inferPtrAlignment(const MachineInstr &MI)
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
unsigned getMaxDepth() const
static void computeKnownBitsForAlignment(KnownBits &Known, MaybeAlign Alignment)
This class defines information used to lower LLVM code to legal SelectionDAG operators that the targe...
void computeKnownBitsForFrameIndex(Register R, KnownBits &Known, const APInt &DemandedElts, unsigned Depth=0)
Analysis containing CSE Info
Definition: CSEInfo.cpp:20
To use KnownBitsInfo analysis in a pass, KnownBitsInfo &Info = getAnalysis<GISelKnownBitsInfoAnalysis...
APInt getKnownZeroes(Register R)
bool signBitIsZero(Register Op)
Abstract class that contains various methods for clients to notify about changes. ...
KnownBits getKnownBits(Register R)
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
Represent the analysis usage information of a pass.
static Align inferAlignmentForFrameIdx(int FrameIdx, int Offset, const MachineFunction &MF)
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:40
void createdInstr(MachineInstr &MI) override
An instruction has been created and inserted into the function.
APInt getKnownOnes(Register R)
This struct is a compact representation of a valid (power of two) or undefined (0) alignment...
Definition: Alignment.h:117
Class for arbitrary precision integers.
Definition: APInt.h:69
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
virtual void computeKnownBitsImpl(Register R, KnownBits &Known, const APInt &DemandedElts, unsigned Depth=0)
void changingInstr(MachineInstr &MI) override
This instruction is about to be mutated in some way.
Representation of each machine instruction.
Definition: MachineInstr.h:63
void setMF(MachineFunction &MF)
void erasingInstr(MachineInstr &MI) override
An instruction is about to be erased.
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
IRTranslator LLVM IR MI
This header defines various interfaces for pass management in LLVM.
Wrapper class representing virtual and physical registers.
Definition: Register.h:19