LLVM  7.0.0svn
Namespaces | Macros | Enumerations | Functions | Variables
HexagonFrameLowering.cpp File Reference
#include "HexagonFrameLowering.h"
#include "HexagonBlockRanges.h"
#include "HexagonInstrInfo.h"
#include "HexagonMachineFunctionInfo.h"
#include "HexagonRegisterInfo.h"
#include "HexagonSubtarget.h"
#include "HexagonTargetMachine.h"
#include "MCTargetDesc/HexagonBaseInfo.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/None.h"
#include "llvm/ADT/Optional.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/RegisterScavenging.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Function.h"
#include "llvm/MC/MCDwarf.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Pass.h"
#include "llvm/Support/CodeGen.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <iterator>
#include <limits>
#include <map>
#include <utility>
#include <vector>

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Macros

#define DEBUG_TYPE   "hexagon-pei"
 

Enumerations

enum  SpillKind { SK_ToMem, SK_FromMem, SK_FromMemTailcall }
 

Functions

void llvm::initializeHexagonCallFrameInformationPass (PassRegistry &)
 
FunctionPassllvm::createHexagonCallFrameInformation ()
 
 INITIALIZE_PASS (HexagonCallFrameInformation, "hexagon-cfi", "Hexagon call frame information", false, false) FunctionPass *llvm
 
static unsigned getMax32BitSubRegister (unsigned Reg, const TargetRegisterInfo &TRI, bool hireg=true)
 Map a register pair Reg to the subregister that has the greater "number", i.e. More...
 
static unsigned getMaxCalleeSavedReg (const std::vector< CalleeSavedInfo > &CSI, const TargetRegisterInfo &TRI)
 Returns the callee saved register with the largest id in the vector. More...
 
static bool needsStackFrame (const MachineBasicBlock &MBB, const BitVector &CSR, const HexagonRegisterInfo &HRI)
 Checks if the basic block contains any instruction that needs a stack frame to be already in place. More...
 
static bool hasTailCall (const MachineBasicBlock &MBB)
 Returns true if MBB has a machine instructions that indicates a tail call in the block. More...
 
static bool hasReturn (const MachineBasicBlock &MBB)
 Returns true if MBB contains an instruction that returns. More...
 
static MachineInstrgetReturn (MachineBasicBlock &MBB)
 Returns the "return" instruction from this block, or nullptr if there isn't any. More...
 
static bool isRestoreCall (unsigned Opc)
 
static bool isOptNone (const MachineFunction &MF)
 
static bool isOptSize (const MachineFunction &MF)
 
static bool isMinSize (const MachineFunction &MF)
 
static Optional< MachineBasicBlock::iteratorfindCFILocation (MachineBasicBlock &B)
 
static const chargetSpillFunctionFor (unsigned MaxReg, SpillKind SpillType, bool Stkchk=false)
 
static bool needToReserveScavengingSpillSlots (MachineFunction &MF, const HexagonRegisterInfo &HRI, const TargetRegisterClass *RC)
 Returns true if there are no caller-saved registers available in class RC. More...
 
static void dump_registers (BitVector &Regs, const TargetRegisterInfo &TRI)
 

Variables

static cl::opt< boolDisableDeallocRet ("disable-hexagon-dealloc-ret", cl::Hidden, cl::desc("Disable Dealloc Return for Hexagon target"))
 
static cl::opt< unsignedNumberScavengerSlots ("number-scavenger-slots", cl::Hidden, cl::desc("Set the number of scavenger slots"), cl::init(2), cl::ZeroOrMore)
 
static cl::opt< int > SpillFuncThreshold ("spill-func-threshold", cl::Hidden, cl::desc("Specify O2(not Os) spill func threshold"), cl::init(6), cl::ZeroOrMore)
 
static cl::opt< int > SpillFuncThresholdOs ("spill-func-threshold-Os", cl::Hidden, cl::desc("Specify Os spill func threshold"), cl::init(1), cl::ZeroOrMore)
 
static cl::opt< boolEnableStackOVFSanitizer ("enable-stackovf-sanitizer", cl::Hidden, cl::desc("Enable runtime checks for stack overflow."), cl::init(false), cl::ZeroOrMore)
 
static cl::opt< boolEnableShrinkWrapping ("hexagon-shrink-frame", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable stack frame shrink wrapping"))
 
static cl::opt< unsignedShrinkLimit ("shrink-frame-limit", cl::init(std::numeric_limits< unsigned >::max()), cl::Hidden, cl::ZeroOrMore, cl::desc("Max count of stack frame shrink-wraps"))
 
static cl::opt< boolEnableSaveRestoreLong ("enable-save-restore-long", cl::Hidden, cl::desc("Enable long calls for save-restore stubs."), cl::init(false), cl::ZeroOrMore)
 
static cl::opt< boolEliminateFramePointer ("hexagon-fp-elim", cl::init(true), cl::Hidden, cl::desc("Refrain from using FP whenever possible"))
 
static cl::opt< boolOptimizeSpillSlots ("hexagon-opt-spill", cl::Hidden, cl::init(true), cl::desc("Optimize spill slots"))
 
static cl::opt< unsignedSpillOptMax ("spill-opt-max", cl::Hidden, cl::init(std::numeric_limits< unsigned >::max()))
 
static unsigned SpillOptCount = 0
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-pei"

Definition at line 66 of file HexagonFrameLowering.cpp.

Enumeration Type Documentation

◆ SpillKind

enum SpillKind
Enumerator
SK_ToMem 
SK_FromMem 
SK_FromMemTailcall 

Definition at line 1003 of file HexagonFrameLowering.cpp.

Function Documentation

◆ dump_registers()

static void dump_registers ( BitVector Regs,
const TargetRegisterInfo TRI 
)
static

◆ findCFILocation()

static Optional<MachineBasicBlock::iterator> findCFILocation ( MachineBasicBlock B)
static

◆ getMax32BitSubRegister()

static unsigned getMax32BitSubRegister ( unsigned  Reg,
const TargetRegisterInfo TRI,
bool  hireg = true 
)
static

Map a register pair Reg to the subregister that has the greater "number", i.e.

D3 (aka R7:6) will be mapped to R7, etc.

Definition at line 245 of file HexagonFrameLowering.cpp.

References llvm::MCRegisterInfo::DiffListIterator::isValid(), and Reg.

Referenced by getMaxCalleeSavedReg().

◆ getMaxCalleeSavedReg()

static unsigned getMaxCalleeSavedReg ( const std::vector< CalleeSavedInfo > &  CSI,
const TargetRegisterInfo TRI 
)
static

Returns the callee saved register with the largest id in the vector.

Definition at line 265 of file HexagonFrameLowering.cpp.

References E, getMax32BitSubRegister(), getReg(), I, and Reg.

Referenced by llvm::HexagonFrameLowering::getFrameIndexReference().

◆ getReturn()

static MachineInstr* getReturn ( MachineBasicBlock MBB)
static

Returns the "return" instruction from this block, or nullptr if there isn't any.

Definition at line 355 of file HexagonFrameLowering.cpp.

References I.

Referenced by llvm::HexagonFrameLowering::emitPrologue().

◆ getSpillFunctionFor()

static const char* getSpillFunctionFor ( unsigned  MaxReg,
SpillKind  SpillType,
bool  Stkchk = false 
)
static

◆ hasReturn()

static bool hasReturn ( const MachineBasicBlock MBB)
static

Returns true if MBB contains an instruction that returns.

Definition at line 346 of file HexagonFrameLowering.cpp.

References E, llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getFirstTerminator(), and I.

Referenced by llvm::createX86PadShortFunctions(), and llvm::HexagonFrameLowering::getFrameIndexReference().

◆ hasTailCall()

static bool hasTailCall ( const MachineBasicBlock MBB)
static

Returns true if MBB has a machine instructions that indicates a tail call in the block.

Definition at line 337 of file HexagonFrameLowering.cpp.

References llvm::MachineBasicBlock::end(), llvm::MachineBasicBlock::getLastNonDebugInstr(), and I.

Referenced by llvm::HexagonFrameLowering::getFrameIndexReference().

◆ INITIALIZE_PASS()

INITIALIZE_PASS ( HexagonCallFrameInformation  ,
"hexagon-cfi"  ,
"Hexagon call frame information"  ,
false  ,
false   
)

Definition at line 236 of file HexagonFrameLowering.cpp.

◆ isMinSize()

static bool isMinSize ( const MachineFunction MF)
inlinestatic

◆ isOptNone()

static bool isOptNone ( const MachineFunction MF)
inlinestatic

◆ isOptSize()

static bool isOptSize ( const MachineFunction MF)
inlinestatic

◆ isRestoreCall()

static bool isRestoreCall ( unsigned  Opc)
static

Definition at line 362 of file HexagonFrameLowering.cpp.

Referenced by llvm::HexagonFrameLowering::emitPrologue().

◆ needsStackFrame()

static bool needsStackFrame ( const MachineBasicBlock MBB,
const BitVector CSR,
const HexagonRegisterInfo HRI 
)
static

◆ needToReserveScavengingSpillSlots()

static bool needToReserveScavengingSpillSlots ( MachineFunction MF,
const HexagonRegisterInfo HRI,
const TargetRegisterClass RC 
)
static

Variable Documentation

◆ DisableDeallocRet

cl::opt<bool> DisableDeallocRet("disable-hexagon-dealloc-ret", cl::Hidden, cl::desc("Disable Dealloc Return for Hexagon target"))
static

◆ EliminateFramePointer

cl::opt<bool> EliminateFramePointer("hexagon-fp-elim", cl::init(true), cl::Hidden, cl::desc("Refrain from using FP whenever possible"))
static

◆ EnableSaveRestoreLong

cl::opt<bool> EnableSaveRestoreLong("enable-save-restore-long", cl::Hidden, cl::desc("Enable long calls for save-restore stubs."), cl::init(false), cl::ZeroOrMore)
static

◆ EnableShrinkWrapping

cl::opt<bool> EnableShrinkWrapping("hexagon-shrink-frame", cl::init(true), cl::Hidden, cl::ZeroOrMore, cl::desc("Enable stack frame shrink wrapping"))
static

◆ EnableStackOVFSanitizer

cl::opt<bool> EnableStackOVFSanitizer("enable-stackovf-sanitizer", cl::Hidden, cl::desc("Enable runtime checks for stack overflow."), cl::init(false), cl::ZeroOrMore)
static

◆ NumberScavengerSlots

cl::opt<unsigned> NumberScavengerSlots("number-scavenger-slots", cl::Hidden, cl::desc("Set the number of scavenger slots"), cl::init(2), cl::ZeroOrMore)
static

◆ OptimizeSpillSlots

cl::opt<bool> OptimizeSpillSlots("hexagon-opt-spill", cl::Hidden, cl::init(true), cl::desc("Optimize spill slots"))
static

◆ ShrinkLimit

cl::opt<unsigned> ShrinkLimit("shrink-frame-limit", cl::init(std::numeric_limits< unsigned >::max()), cl::Hidden, cl::ZeroOrMore, cl::desc("Max count of stack frame shrink-wraps"))
static

Referenced by isMinSize().

◆ SpillFuncThreshold

cl::opt<int> SpillFuncThreshold("spill-func-threshold", cl::Hidden, cl::desc("Specify O2(not Os) spill func threshold"), cl::init(6), cl::ZeroOrMore)
static

◆ SpillFuncThresholdOs

cl::opt<int> SpillFuncThresholdOs("spill-func-threshold-Os", cl::Hidden, cl::desc("Specify Os spill func threshold"), cl::init(1), cl::ZeroOrMore)
static

◆ SpillOptCount

unsigned SpillOptCount = 0
static

Definition at line 192 of file HexagonFrameLowering.cpp.

◆ SpillOptMax

cl::opt<unsigned> SpillOptMax("spill-opt-max", cl::Hidden, cl::init(std::numeric_limits< unsigned >::max()))
static