LLVM  6.0.0svn
Namespaces | Macros | Functions | Variables
HexagonISelDAGToDAG.cpp File Reference
#include "Hexagon.h"
#include "HexagonISelLowering.h"
#include "HexagonMachineFunctionInfo.h"
#include "HexagonTargetMachine.h"
#include "llvm/CodeGen/FunctionLoweringInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "HexagonGenDAGISel.inc"
Include dependency graph for HexagonISelDAGToDAG.cpp:

Go to the source code of this file.

Namespaces

 llvm
 Compute iterated dominance frontiers using a linear time algorithm.
 

Macros

#define DEBUG_TYPE   "hexagon-isel"
 

Functions

FunctionPassllvm::createHexagonISelDag (HexagonTargetMachine &TM, CodeGenOpt::Level OptLevel)
 
static bool doesIntrinsicReturnPredicate (unsigned ID)
 
static bool isMemOPCandidate (SDNode *I, SDNode *U)
 
static bool isOpcodeHandled (const SDNode *N)
 
static unsigned getPowerOf2Factor (SDValue Val)
 
static bool willShiftRightEliminate (SDValue V, unsigned Amount)
 
static bool isTargetConstant (const SDValue &V)
 

Variables

static cl::opt< boolEnableAddressRebalancing ("isel-rebalance-addr", cl::Hidden, cl::init(true), cl::desc("Rebalance address calculation trees to improve " "instruction selection"))
 
static cl::opt< boolRebalanceOnlyForOptimizations ("rebalance-only-opt", cl::Hidden, cl::init(false), cl::desc("Rebalance address tree only if this allows optimizations"))
 
static cl::opt< boolRebalanceOnlyImbalancedTrees ("rebalance-only-imbal", cl::Hidden, cl::init(false), cl::desc("Rebalance address tree only if it is imbalanced"))
 
static cl::opt< boolCheckSingleUse ("hexagon-isel-su", cl::Hidden, cl::init(true), cl::desc("Enable checking of SDNode's single-use status"))
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "hexagon-isel"

Definition at line 26 of file HexagonISelDAGToDAG.cpp.

Function Documentation

◆ doesIntrinsicReturnPredicate()

static bool doesIntrinsicReturnPredicate ( unsigned  ID)
static

Definition at line 174 of file HexagonISelDAGToDAG.cpp.

References llvm::array_lengthof(), assert(), llvm::tgtok::Bit, llvm::ISD::BITCAST, llvm::APFloat::bitcastToAPInt(), llvm::tgtok::Bits, C, llvm::ISD::Constant, llvm::ISD::ConstantFP, llvm::InlineAsm::Constraint_i, llvm::InlineAsm::Constraint_m, llvm::InlineAsm::Constraint_o, llvm::InlineAsm::Constraint_v, llvm::Default, llvm::dyn_cast(), llvm::ISD::EXTLOAD, F(), llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FrameIndex, llvm::LSBaseSDNode::getAddressingMode(), llvm::LoadSDNode::getBasePtr(), llvm::StoreSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::LoadSDNode::getExtensionType(), llvm::HexagonSubtarget::getFrameLowering(), llvm::MVT::getIntegerVT(), llvm::SDNode::getMachineOpcode(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::MemSDNode::getMemOperand(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SDNode::getNumOperands(), llvm::LoadSDNode::getOffset(), llvm::StoreSDNode::getOffset(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getScalarSizeInBits(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::HexagonMachineFunctionInfo::getStackAlignBaseVReg(), llvm::TargetFrameLowering::getStackAlignment(), llvm::HandleSDNode::getValue(), llvm::StoreSDNode::getValue(), llvm::ConstantFPSDNode::getValueAPF(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::MachineFrameInfo::hasVarSizedObjects(), I, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::ISD::INTRINSIC_W_CHAIN, llvm::ISD::INTRINSIC_WO_CHAIN, llvm::SDNode::isMachineOpcode(), llvm::MemSDNode::isNonTemporal(), llvm::EVT::isSimple(), llvm::StoreSDNode::isTruncatingStore(), llvm::HexagonInstrInfo::isValidAutoIncImm(), llvm::EVT::isVector(), llvm::ARM_MB::LD, llvm_unreachable, llvm::ISD::LOAD, llvm::BitmaskEnumDetail::Mask(), llvm::HexagonII::MemAccesSizeMask, llvm::HexagonII::MemAccessSizePos, llvm::ISD::MUL, N, llvm::AArch64CC::NE, llvm::ISD::NON_EXTLOAD, llvm::MVT::Other, llvm::MCID::Select, llvm::MachineSDNode::setMemRefs(), llvm::SDNode::setNodeId(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::MVT::SimpleTy, llvm::AMDGPU::HSAMD::Kernel::Arg::Key::Size, llvm::ARM_MB::ST, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ISD::UNINDEXED, llvm::MVT::v128i8, llvm::MVT::v16i32, llvm::MVT::v16i64, llvm::MVT::v32i16, llvm::MVT::v32i32, llvm::MVT::v64i16, llvm::MVT::v64i8, llvm::MVT::v8i64, llvm::ISD::ZERO_EXTEND, and llvm::ISD::ZEXTLOAD.

◆ getPowerOf2Factor()

static unsigned getPowerOf2Factor ( SDValue  Val)
static

◆ isMemOPCandidate()

static bool isMemOPCandidate ( SDNode I,
SDNode U 
)
static

Definition at line 908 of file HexagonISelDAGToDAG.cpp.

References llvm::ISD::ADD, llvm::alignTo(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, assert(), llvm::ISD::AssertSext, llvm::ISD::AssertZext, llvm::ISD::BlockAddress, llvm::BuildMI(), C, CheckSingleUse, llvm::HexagonISD::CONST32, llvm::HexagonISD::CONST32_GP, llvm::ISD::Constant, llvm::countLeadingZeros(), llvm::countTrailingOnes(), llvm::countTrailingZeros(), llvm::HexagonISD::CP, D, llvm::dbgs(), DC, DEBUG_WITH_TYPE, llvm::dyn_cast(), E, EnableAddressRebalancing, llvm::ISD::ExternalSymbol, llvm::ISD::FrameIndex, llvm::MachineBasicBlock::front(), llvm::MemSDNode::getAlignment(), llvm::ConstantSDNode::getAPIntValue(), llvm::APInt::getBitWidth(), llvm::SelectionDAG::getConstant(), llvm::LoadSDNode::getExtensionType(), llvm::HexagonSubtarget::getFrameLowering(), llvm::SelectionDAG::getMachineNode(), llvm::SDNode::getMachineOpcode(), llvm::MachineFrameInfo::getMaxAlignment(), llvm::MemSDNode::getMemoryVT(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getNumOperands(), llvm::SDNode::getNumValues(), llvm::MachineFrameInfo::getObjectAlignment(), llvm::getOffset(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::EVT::getSimpleVT(), llvm::EVT::getSizeInBits(), llvm::EVT::getStoreSize(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::VTSDNode::getVT(), llvm::ConstantSDNode::getZExtValue(), llvm::SDNode::hasOneUse(), I, llvm::MVT::i1, llvm::MVT::i32, llvm::MVT::i64, llvm::MachineFrameInfo::isFixedObjectIndex(), llvm::isInt< 16 >(), llvm::EVT::isInteger(), llvm::isPowerOf2_32(), llvm::EVT::isSimple(), llvm::HexagonISD::JT, llvm::ISD::LOAD, llvm::BitmaskEnumDetail::Mask(), N, llvm::ISD::OR, llvm::SelectionDAG::ReplaceAllUsesWith(), llvm::PPCISD::SC, llvm::ISD::SELECT, llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ARM_MB::SY, T, T1, llvm::ISD::TargetGlobalAddress, llvm::SDNode::use_begin(), llvm::SDNode::use_end(), llvm::ISD::XOR, Y, and llvm::ISD::ZERO_EXTEND.

◆ isOpcodeHandled()

static bool isOpcodeHandled ( const SDNode N)
static

◆ isTargetConstant()

static bool isTargetConstant ( const SDValue V)
static

◆ willShiftRightEliminate()

static bool willShiftRightEliminate ( SDValue  V,
unsigned  Amount 
)
static
Returns
true if V>>Amount will eliminate V's operation on its child

Definition at line 1791 of file HexagonISelDAGToDAG.cpp.

References llvm::SDValue::getConstantOperandVal(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::ISD::MUL, and llvm::ISD::SHL.

Referenced by isTargetConstant().

Variable Documentation

◆ CheckSingleUse

cl::opt<bool> CheckSingleUse("hexagon-isel-su", cl::Hidden, cl::init(true), cl::desc("Enable checking of SDNode's single-use status"))
static

Referenced by isMemOPCandidate().

◆ EnableAddressRebalancing

cl::opt<bool> EnableAddressRebalancing("isel-rebalance-addr", cl::Hidden, cl::init(true), cl::desc("Rebalance address calculation trees to improve " "instruction selection"))
static

Referenced by isMemOPCandidate().

◆ RebalanceOnlyForOptimizations

cl::opt<bool> RebalanceOnlyForOptimizations("rebalance-only-opt", cl::Hidden, cl::init(false), cl::desc("Rebalance address tree only if this allows optimizations"))
static

Referenced by isTargetConstant().

◆ RebalanceOnlyImbalancedTrees

cl::opt<bool> RebalanceOnlyImbalancedTrees("rebalance-only-imbal", cl::Hidden, cl::init(false), cl::desc("Rebalance address tree only if it is imbalanced"))
static

Referenced by isTargetConstant().