LLVM  6.0.0svn
HexagonMCChecker.h
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1 //===- HexagonMCChecker.h - Instruction bundle checking ---------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the checking of insns inside a bundle according to the
11 // packet constraint rules of the Hexagon ISA.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
16 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
17 
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/Support/SMLoc.h"
22 #include <set>
23 #include <utility>
24 
25 namespace llvm {
26 
27 class MCContext;
28 class MCInst;
29 class MCInstrInfo;
30 class MCRegisterInfo;
31 class MCSubtargetInfo;
32 
33 /// Check for a valid bundle.
35  MCContext &Context;
36  MCInst &MCB;
37  const MCRegisterInfo &RI;
38  MCInstrInfo const &MCII;
39  MCSubtargetInfo const &STI;
40  bool ReportErrors;
41 
42  /// Set of definitions: register #, if predicated, if predicated true.
43  using PredSense = std::pair<unsigned, bool>;
44  static const PredSense Unconditional;
45  using PredSet = std::multiset<PredSense>;
46  using PredSetIterator = std::multiset<PredSense>::iterator;
47 
48  using DefsIterator = DenseMap<unsigned, PredSet>::iterator;
50 
51  /// Information about how a new-value register is defined or used:
52  /// PredReg = predicate register, 0 if use/def not predicated,
53  /// Cond = true/false for if(PredReg)/if(!PredReg) respectively,
54  /// IsFloat = true if definition produces a floating point value
55  /// (not valid for uses),
56  /// IsNVJ = true if the use is a new-value branch (not valid for
57  /// definitions).
58  struct NewSense {
59  unsigned PredReg;
60  bool IsFloat, IsNVJ, Cond;
61 
62  // The special-case "constructors":
63  static NewSense Jmp(bool isNVJ) {
64  NewSense NS = {/*PredReg=*/0, /*IsFloat=*/false, /*IsNVJ=*/isNVJ,
65  /*Cond=*/false};
66  return NS;
67  }
68  static NewSense Use(unsigned PR, bool True) {
69  NewSense NS = {/*PredReg=*/PR, /*IsFloat=*/false, /*IsNVJ=*/false,
70  /*Cond=*/True};
71  return NS;
72  }
73  static NewSense Def(unsigned PR, bool True, bool Float) {
74  NewSense NS = {/*PredReg=*/PR, /*IsFloat=*/Float, /*IsNVJ=*/false,
75  /*Cond=*/True};
76  return NS;
77  }
78  };
79 
80  /// Set of definitions that produce new register:
84 
85  /// Set of weak definitions whose clashes should be enforced selectively.
86  using SoftDefsIterator = std::set<unsigned>::iterator;
87  std::set<unsigned> SoftDefs;
88 
89  /// Set of temporary definitions not committed to the register file.
90  using TmpDefsIterator = std::set<unsigned>::iterator;
91  std::set<unsigned> TmpDefs;
92 
93  /// Set of new predicates used.
94  using NewPredsIterator = std::set<unsigned>::iterator;
95  std::set<unsigned> NewPreds;
96 
97  /// Set of predicates defined late.
98  using LatePredsIterator = std::multiset<unsigned>::iterator;
99  std::multiset<unsigned> LatePreds;
100 
101  /// Set of uses.
102  using UsesIterator = std::set<unsigned>::iterator;
103  std::set<unsigned> Uses;
104 
105  /// Set of new values used: new register, if new-value jump.
106  using NewUsesIterator = DenseMap<unsigned, NewSense>::iterator;
108 
109  /// Pre-defined set of read-only registers.
110  using ReadOnlyIterator = std::set<unsigned>::iterator;
111  std::set<unsigned> ReadOnly;
112 
113  void init();
114  void init(MCInst const &);
115  void initReg(MCInst const &, unsigned, unsigned &PredReg, bool &isTrue);
116 
117  bool registerUsed(unsigned Register);
118 
119  // Checks performed.
120  bool checkBranches();
121  bool checkPredicates();
122  bool checkNewValues();
123  bool checkRegisters();
124  bool checkRegistersReadOnly();
125  bool checkEndloopBranches();
126  void checkRegisterCurDefs();
127  bool checkSolo();
128  bool checkShuffle();
129  bool checkSlots();
130  bool checkAXOK();
131 
132  static void compoundRegisterMap(unsigned &);
133 
134  bool isPredicateRegister(unsigned R) const {
135  return (Hexagon::P0 == R || Hexagon::P1 == R || Hexagon::P2 == R ||
136  Hexagon::P3 == R);
137  }
138 
139  bool isLoopRegister(unsigned R) const {
140  return (Hexagon::SA0 == R || Hexagon::LC0 == R || Hexagon::SA1 == R ||
141  Hexagon::LC1 == R);
142  }
143 
144  bool hasValidNewValueDef(const NewSense &Use, const NewSenseList &Defs) const;
145 
146 public:
147  explicit HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII,
148  MCSubtargetInfo const &STI, MCInst &mcb,
149  const MCRegisterInfo &ri, bool ReportErrors = true);
150 
151  bool check(bool FullCheck = true);
152  void reportErrorRegisters(unsigned Register);
153  void reportErrorNewValue(unsigned Register);
154  void reportError(SMLoc Loc, Twine const &Msg);
155  void reportError(Twine const &Msg);
156  void reportWarning(Twine const &Msg);
157 };
158 
159 } // end namespace llvm
160 
161 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
void reportErrorNewValue(unsigned Register)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
A Use represents the edge between a Value definition and its users.
Definition: Use.h:56
void reportError(SMLoc Loc, Twine const &Msg)
void reportWarning(Twine const &Msg)
Context object for machine code objects.
Definition: MCContext.h:59
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &mcb, const MCRegisterInfo &ri, bool ReportErrors=true)
Promote Memory to Register
Definition: Mem2Reg.cpp:110
void reportErrorRegisters(unsigned Register)
MCSubtargetInfo - Generic base class for all target subtargets.
bool check(bool FullCheck=true)
Check for a valid bundle.
Represents a location in source code.
Definition: SMLoc.h:24