LLVM  7.0.0svn
HexagonMCChecker.h
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1 //===- HexagonMCChecker.h - Instruction bundle checking ---------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This implements the checking of insns inside a bundle according to the
11 // packet constraint rules of the Hexagon ISA.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
16 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
17 
20 #include "llvm/ADT/DenseMap.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/Support/SMLoc.h"
23 #include <set>
24 #include <utility>
25 
26 namespace llvm {
27 
28 class MCContext;
29 class MCInst;
30 class MCInstrInfo;
31 class MCRegisterInfo;
32 class MCSubtargetInfo;
33 
34 /// Check for a valid bundle.
36  MCContext &Context;
37  MCInst &MCB;
38  const MCRegisterInfo &RI;
39  MCInstrInfo const &MCII;
40  MCSubtargetInfo const &STI;
41  bool ReportErrors;
42 
43  /// Set of definitions: register #, if predicated, if predicated true.
44  using PredSense = std::pair<unsigned, bool>;
45  static const PredSense Unconditional;
46  using PredSet = std::multiset<PredSense>;
47  using PredSetIterator = std::multiset<PredSense>::iterator;
48 
49  using DefsIterator = DenseMap<unsigned, PredSet>::iterator;
51 
52  /// Set of weak definitions whose clashes should be enforced selectively.
53  using SoftDefsIterator = std::set<unsigned>::iterator;
54  std::set<unsigned> SoftDefs;
55 
56  /// Set of temporary definitions not committed to the register file.
57  using TmpDefsIterator = std::set<unsigned>::iterator;
58  std::set<unsigned> TmpDefs;
59 
60  /// Set of new predicates used.
61  using NewPredsIterator = std::set<unsigned>::iterator;
62  std::set<unsigned> NewPreds;
63 
64  /// Set of predicates defined late.
65  using LatePredsIterator = std::multiset<unsigned>::iterator;
66  std::multiset<unsigned> LatePreds;
67 
68  /// Set of uses.
69  using UsesIterator = std::set<unsigned>::iterator;
70  std::set<unsigned> Uses;
71 
72  /// Pre-defined set of read-only registers.
73  using ReadOnlyIterator = std::set<unsigned>::iterator;
74  std::set<unsigned> ReadOnly;
75 
76  void init();
77  void init(MCInst const &);
78  void initReg(MCInst const &, unsigned, unsigned &PredReg, bool &isTrue);
79 
80  bool registerUsed(unsigned Register);
81  std::tuple<MCInst const *, unsigned, HexagonMCInstrInfo::PredicateInfo>
82  registerProducer(unsigned Register,
84 
85  // Checks performed.
86  bool checkBranches();
87  bool checkPredicates();
88  bool checkNewValues();
89  bool checkRegisters();
90  bool checkRegistersReadOnly();
91  void checkRegisterCurDefs();
92  bool checkSolo();
93  bool checkShuffle();
94  bool checkSlots();
95  bool checkAXOK();
96  bool checkHWLoop();
97  bool checkCOFMax1();
98 
99  static void compoundRegisterMap(unsigned &);
100 
101  bool isPredicateRegister(unsigned R) const {
102  return (Hexagon::P0 == R || Hexagon::P1 == R || Hexagon::P2 == R ||
103  Hexagon::P3 == R);
104  }
105 
106  bool isLoopRegister(unsigned R) const {
107  return (Hexagon::SA0 == R || Hexagon::LC0 == R || Hexagon::SA1 == R ||
108  Hexagon::LC1 == R);
109  }
110 
111 public:
112  explicit HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII,
113  MCSubtargetInfo const &STI, MCInst &mcb,
114  const MCRegisterInfo &ri, bool ReportErrors = true);
115  explicit HexagonMCChecker(HexagonMCChecker const &Check,
116  MCSubtargetInfo const &STI, bool CopyReportErrors);
117 
118  bool check(bool FullCheck = true);
119  void reportErrorRegisters(unsigned Register);
120  void reportErrorNewValue(unsigned Register);
121  void reportError(SMLoc Loc, Twine const &Msg);
122  void reportNote(SMLoc Loc, Twine const &Msg);
123  void reportError(Twine const &Msg);
124  void reportWarning(Twine const &Msg);
125  void reportBranchErrors();
126 };
127 
128 } // end namespace llvm
129 
130 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
static bool Check(DecodeStatus &Out, DecodeStatus In)
void reportErrorNewValue(unsigned Register)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
void reportError(SMLoc Loc, Twine const &Msg)
void reportWarning(Twine const &Msg)
Context object for machine code objects.
Definition: MCContext.h:63
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:161
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
void reportNote(SMLoc Loc, Twine const &Msg)
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst &mcb, const MCRegisterInfo &ri, bool ReportErrors=true)
Promote Memory to Register
Definition: Mem2Reg.cpp:110
void reportErrorRegisters(unsigned Register)
Generic base class for all target subtargets.
bool check(bool FullCheck=true)
Check for a valid bundle.
Represents a location in source code.
Definition: SMLoc.h:24