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1 //===- HexagonMCInstrInfo.cpp - Utility functions on Hexagon MCInsts ------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Utility functions for Hexagon specific MCInst queries
11 //
12 //===----------------------------------------------------------------------===//
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/StringRef.h"
20 #include "llvm/MC/MCInst.h"
22 #include <cstddef>
23 #include <cstdint>
25 namespace llvm {
27 class HexagonMCChecker;
28 class MCContext;
29 class MCExpr;
30 class MCInstrDesc;
31 class MCInstrInfo;
32 class MCSubtargetInfo;
35 public:
38  DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
39  : packetIndexI(i), packetIndexJ(j), iClass(iClass) {}
40 };
42 namespace Hexagon {
45  MCInstrInfo const &MCII;
46  MCInst::const_iterator BundleCurrent;
47  MCInst::const_iterator BundleEnd;
48  MCInst::const_iterator DuplexCurrent;
49  MCInst::const_iterator DuplexEnd;
51 public:
52  PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
53  PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
55  PacketIterator &operator++();
56  MCInst const &operator*() const;
57  bool operator==(PacketIterator const &Other) const;
58  bool operator!=(PacketIterator const &Other) const {
59  return !(*this == Other);
60  }
61 };
63 } // end namespace Hexagon
65 namespace HexagonMCInstrInfo {
67 size_t const innerLoopOffset = 0;
68 int64_t const innerLoopMask = 1 << innerLoopOffset;
70 size_t const outerLoopOffset = 1;
71 int64_t const outerLoopMask = 1 << outerLoopOffset;
73 // do not reorder memory load/stores by default load/stores are re-ordered
74 // and by default loads can be re-ordered
75 size_t const memReorderDisabledOffset = 2;
78 // allow re-ordering of memory stores by default stores cannot be re-ordered
82 size_t const bundleInstructionsOffset = 1;
84 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context);
85 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
86  MCInst const &MCI);
88 // Returns a iterator range of instructions in this bundle
90 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
93 // Returns the number of instructions in the bundle
94 size_t bundleSize(MCInst const &MCI);
96 // Put the packet in to canonical form, compound, duplex, pad, and shuffle
97 bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
98  MCContext &Context, MCInst &MCB,
99  HexagonMCChecker *Checker);
101 // Create a duplex instruction given the two subinsts
102 MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0,
103  MCInst const &inst1);
104 MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst,
105  MCOperand const &MO);
107 // Convert this instruction in to a duplex subinst
108 MCInst deriveSubInst(MCInst const &Inst);
110 // Clamp off upper 26 bits of extendable operand for emission
111 void clampExtended(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI);
115 // Return the extender for instruction at Index or nullptr if none
116 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index);
117 void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
118  MCInst const &MCI);
120 // Return memory access size in bytes
121 unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI);
123 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
125 // Return which duplex group this instruction belongs to
126 unsigned getDuplexCandidateGroup(MCInst const &MI);
128 // Return a list of all possible instruction duplex combinations
130 getDuplexPossibilties(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
131  MCInst const &MCB);
132 unsigned getDuplexRegisterNumbering(unsigned Reg);
134 MCExpr const &getExpr(MCExpr const &Expr);
136 // Return the index of the extendable operand
137 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI);
139 // Return a reference to the extendable operand
140 MCOperand const &getExtendableOperand(MCInstrInfo const &MCII,
141  MCInst const &MCI);
143 // Return the implicit alignment of the extendable operand
144 unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI);
146 // Return the number of logical bits of the extendable operand
147 unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI);
149 // Return the max value that a constant extendable operand can have
150 // without being extended.
151 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI);
153 // Return the min value that a constant extendable operand can have
154 // without being extended.
155 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI);
157 // Return instruction name
158 StringRef getName(MCInstrInfo const &MCII, MCInst const &MCI);
160 // Return the operand index for the new value.
161 unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI);
163 // Return the operand that consumes or produces a new value.
164 MCOperand const &getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI);
165 unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI);
166 MCOperand const &getNewValueOperand2(MCInstrInfo const &MCII,
167  MCInst const &MCI);
169 // Return the Hexagon ISA class for the insn.
170 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI);
172 /// Return the slots used by the insn.
173 unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
174  MCInst const &MCI);
175 unsigned getOtherReservedSlots(MCInstrInfo const &MCII,
176  MCSubtargetInfo const &STI, MCInst const &MCI);
177 bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
179 // Does the packet have an extender for the instruction at Index
180 bool hasExtenderForIndex(MCInst const &MCB, size_t Index);
182 bool hasImmExt(MCInst const &MCI);
184 // Return whether the instruction is a legal new-value producer.
185 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
186 bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI);
187 unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb);
189 int64_t minConstant(MCInst const &MCI, size_t Index);
190 template <unsigned N, unsigned S>
191 bool inRange(MCInst const &MCI, size_t Index) {
192  return isShiftedUInt<N, S>(minConstant(MCI, Index));
193 }
194 template <unsigned N, unsigned S>
195 bool inSRange(MCInst const &MCI, size_t Index) {
196  return isShiftedInt<N, S>(minConstant(MCI, Index));
197 }
198 template <unsigned N> bool inRange(MCInst const &MCI, size_t Index) {
199  return isUInt<N>(minConstant(MCI, Index));
200 }
202 // Return the instruction at Index
203 MCInst const &instruction(MCInst const &MCB, size_t Index);
204 bool isAccumulator(MCInstrInfo const &MCII, MCInst const &MCI);
206 // Returns whether this MCInst is a wellformed bundle
207 bool isBundle(MCInst const &MCI);
209 // Return whether the insn is an actual insn.
210 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI);
211 bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI);
212 bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI);
214 // Return whether the instruction needs to be constant extended.
215 bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI);
216 bool isCVINew(MCInstrInfo const &MCII, MCInst const &MCI);
218 // Is this double register suitable for use in a duplex subinst
219 bool isDblRegForSubInst(unsigned Reg);
221 // Is this a duplex instruction
222 bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
224 // Can these instructions be duplexed
225 bool isDuplexPair(MCInst const &MIa, MCInst const &MIb);
227 // Can these duplex classes be combine in to a duplex instruction
228 bool isDuplexPairMatch(unsigned Ga, unsigned Gb);
230 // Return true if the insn may be extended based on the operand value.
231 bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI);
233 // Return whether the instruction must be always extended.
234 bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI);
236 /// Return whether it is a floating-point insn.
237 bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI);
239 // Returns whether this instruction is an immediate extender
240 bool isImmext(MCInst const &MCI);
242 // Returns whether this bundle is an endloop0
243 bool isInnerLoop(MCInst const &MCI);
245 // Is this an integer register
246 bool isIntReg(unsigned Reg);
248 // Is this register suitable for use in a duplex subinst
249 bool isIntRegForSubInst(unsigned Reg);
250 bool isMemReorderDisabled(MCInst const &MCI);
251 bool isMemStoreReorderEnabled(MCInst const &MCI);
253 // Return whether the insn is a new-value consumer.
254 bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
255 bool isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short);
257 // Can these two instructions be duplexed
258 bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa,
259  bool ExtendedA, MCInst const &MIb, bool ExtendedB,
260  bool bisReversable, MCSubtargetInfo const &STI);
262 // Returns whether this bundle is an endloop1
263 bool isOuterLoop(MCInst const &MCI);
265 // Return whether this instruction is predicated
266 bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI);
267 bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI);
268 bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI);
270 // Return whether the predicate sense is true
271 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI);
273 // Is this a predicate register
274 bool isPredReg(unsigned Reg);
276 // Return whether the insn is a prefix.
277 bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI);
279 // Return whether the insn is solo, i.e., cannot be in a packet.
280 bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI);
282 /// Return whether the insn can be packaged only with A and X-type insns.
283 bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI);
285 /// Return whether the insn can be packaged only with an A-type insn in slot #1.
286 bool isSoloAin1(MCInstrInfo const &MCII, MCInst const &MCI);
287 bool isSubInstruction(MCInst const &MCI);
288 bool isVector(MCInstrInfo const &MCII, MCInst const &MCI);
289 bool mustExtend(MCExpr const &Expr);
290 bool mustNotExtend(MCExpr const &Expr);
292 // Pad the bundle with nops to satisfy endloop requirements
293 void padEndloop(MCInst &MCI, MCContext &Context);
294 bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI);
296 // Replace the instructions inside MCB, represented by Candidate
297 void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate);
299 bool s27_2_reloc(MCExpr const &Expr);
300 // Marks a bundle as endloop0
301 void setInnerLoop(MCInst &MCI);
302 void setMemReorderDisabled(MCInst &MCI);
304 void setMustExtend(MCExpr const &Expr, bool Val = true);
305 void setMustNotExtend(MCExpr const &Expr, bool Val = true);
306 void setS27_2_reloc(MCExpr const &Expr, bool Val = true);
308 // Marks a bundle as endloop1
309 void setOuterLoop(MCInst &MCI);
311 // Would duplexing this instruction create a requirement to extend
312 bool subInstWouldBeExtended(MCInst const &potentialDuplex);
313 unsigned SubregisterBit(unsigned Consumer, unsigned Producer,
314  unsigned Producer2);
316 // Attempt to find and replace compound pairs
317 void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
318  MCContext &Context, MCInst &MCI);
320 } // end namespace HexagonMCInstrInfo
322 } // end namespace llvm
bool isSoloAin1(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn can be packaged only with an A-type insn in slot #1.
void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate)
bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI)
bool subInstWouldBeExtended(MCInst const &potentialDuplex)
LLVMContext & Context
bool inSRange(MCInst const &MCI, size_t Index)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
unsigned getOtherReservedSlots(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
Return the slots this instruction consumes in addition to the slot(s) it can execute out of...
bool isDuplexPair(MCInst const &MIa, MCInst const &MIb)
Symmetrical. See if these two instructions are fit for duplex pair.
This provides a very simple, boring adaptor for a begin and end iterator into a range type...
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
MCOperand const & getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI)
bool isBundle(MCInst const &MCI)
bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn is solo, i.e., cannot be in a packet.
bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn is newly predicated.
bool isSubInstruction(MCInst const &MCI)
MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst, MCOperand const &MO)
bool isOuterLoop(MCInst const &MCI)
bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn expects newly produced value.
bool isMemStoreReorderEnabled(MCInst const &MCI)
bool operator!=(PacketIterator const &Other) const
bool isImmext(MCInst const &MCI)
void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCI)
tryCompound - Given a bundle check for compound insns when one is found update the contents fo the bu...
bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI)
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
All possible values of the reg field in the ModR/M byte.
static StringRef getName(Value *V)
MCOperand const & getExtendableOperand(MCInstrInfo const &MCII, MCInst const &MCI)
DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
MCInst const * extenderForIndex(MCInst const &MCB, size_t Index)
bool s27_2_reloc(MCExpr const &Expr)
Definition: ELFYAML.cpp:736
APInt operator*(APInt a, uint64_t RHS)
Definition: APInt.h:2070
void padEndloop(MCInst &MCI, MCContext &Context)
void setMemReorderDisabled(MCInst &MCI)
Context object for machine code objects.
Definition: MCContext.h:59
size_t const memReorderDisabledOffset
MCInst const & instruction(MCInst const &MCB, size_t Index)
int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return the maximum value of an extendable operand.
bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Checker)
unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI)
Return the new value or the newly produced value.
bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn produces a second value.
void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)
void setMustExtend(MCExpr const &Expr, bool Val=true)
bool isAccumulator(MCInstrInfo const &MCII, MCInst const &MCI)
Return where the instruction is an accumulator.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
void setMemStoreReorderEnabled(MCInst &MCI)
bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI)
int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return the minimum value of an extendable operand.
bool mustExtend(MCExpr const &Expr)
unsigned getDuplexCandidateGroup(MCInst const &MI)
static bool inRange(const MCExpr *Expr, int64_t MinValue, int64_t MaxValue)
MCOperand const & getNewValueOperand2(MCInstrInfo const &MCII, MCInst const &MCI)
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
int64_t const memReorderDisabledMask
bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
MCInstrDesc const & getDesc(MCInstrInfo const &MCII, MCInst const &MCI)
static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI)
iterator_range< MCInst::const_iterator > bundleInstructions(MCInst const &MCI)
static wasm::ValType getType(const TargetRegisterClass *RC)
unsigned SubregisterBit(unsigned Consumer, unsigned Producer, unsigned Producer2)
void clampExtended(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI)
bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI)
bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)
int64_t const memStoreReorderEnabledMask
static bool isIntRegForSubInst(unsigned Reg)
size_t const bundleInstructionsOffset
bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI)
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
bool isVector(MCInstrInfo const &MCII, MCInst const &MCI)
bool isCVINew(MCInstrInfo const &MCII, MCInst const &MCI)
static bool isPrefix(const IndicesVector &Prefix, const IndicesVector &Longer)
Returns true if Prefix is a prefix of longer.
int64_t minConstant(MCInst const &MCI, size_t Index)
SmallVectorImpl< MCOperand >::const_iterator const_iterator
Definition: MCInst.h:187
A range adaptor for a pair of iterators.
static bool isDuplexPairMatch(unsigned Ga, unsigned Gb)
bool isMemReorderDisabled(MCInst const &MCI)
bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI)
bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI)
MCInst deriveSubInst(MCInst const &Inst)
bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn can be packaged only with A and X-type insns.
MCExpr const & getExpr(MCExpr const &Expr)
bool hasExtenderForIndex(MCInst const &MCB, size_t Index)
MCSubtargetInfo - Generic base class for all target subtargets.
void setMustNotExtend(MCExpr const &Expr, bool Val=true)
size_t bundleSize(MCInst const &MCI)
size_t const memStoreReorderEnabledOffset
bool hasImmExt(MCInst const &MCI)
bool isInnerLoop(MCInst const &MCI)
bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether it is a floating-point insn.
bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI)
LLVM Value Representation.
Definition: Value.h:73
SmallVector< DuplexCandidate, 8 > getDuplexPossibilties(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCB)
Check for a valid bundle.
void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)
unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
Return the slots used by the insn.
bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned getDuplexRegisterNumbering(unsigned Reg)
IRTranslator LLVM IR MI
bool isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short)
Return whether the operand is extendable.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
MCInst * deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0, MCInst const &inst1)
bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn produces a value.
bool operator==(uint64_t V1, const APInt &V2)
Definition: APInt.h:1946
unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI)
void setS27_2_reloc(MCExpr const &Expr, bool Val=true)
unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI)
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
bool mustNotExtend(MCExpr const &Expr)
unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb)
bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI)
void addConstant(MCInst &MI, uint64_t Value, MCContext &Context)
bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa, bool ExtendedA, MCInst const &MIb, bool ExtendedB, bool bisReversable, MCSubtargetInfo const &STI)
non-Symmetrical. See if these two instructions are fit for duplex pair.
unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI)