LLVM  8.0.0svn
HexagonMCInstrInfo.h
Go to the documentation of this file.
1 //===- HexagonMCInstrInfo.cpp - Utility functions on Hexagon MCInsts ------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // Utility functions for Hexagon specific MCInst queries
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
16 
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/StringRef.h"
20 #include "llvm/MC/MCInst.h"
22 #include <cstddef>
23 #include <cstdint>
24 
25 namespace llvm {
26 
27 class HexagonMCChecker;
28 class MCContext;
29 class MCExpr;
30 class MCInstrDesc;
31 class MCInstrInfo;
32 class MCSubtargetInfo;
33 
35 public:
37 
38  DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
39  : packetIndexI(i), packetIndexJ(j), iClass(iClass) {}
40 };
41 
42 namespace Hexagon {
43 
45  MCInstrInfo const &MCII;
46  MCInst::const_iterator BundleCurrent;
47  MCInst::const_iterator BundleEnd;
48  MCInst::const_iterator DuplexCurrent;
49  MCInst::const_iterator DuplexEnd;
50 
51 public:
52  PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst);
53  PacketIterator(MCInstrInfo const &MCII, MCInst const &Inst, std::nullptr_t);
54 
55  PacketIterator &operator++();
56  MCInst const &operator*() const;
57  bool operator==(PacketIterator const &Other) const;
58  bool operator!=(PacketIterator const &Other) const {
59  return !(*this == Other);
60  }
61 };
62 
63 } // end namespace Hexagon
64 
65 namespace HexagonMCInstrInfo {
66 
67 size_t const innerLoopOffset = 0;
68 int64_t const innerLoopMask = 1 << innerLoopOffset;
69 
70 size_t const outerLoopOffset = 1;
71 int64_t const outerLoopMask = 1 << outerLoopOffset;
72 
73 // do not reorder memory load/stores by default load/stores are re-ordered
74 // and by default loads can be re-ordered
75 size_t const memReorderDisabledOffset = 2;
77 
78 size_t const bundleInstructionsOffset = 1;
79 
80 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context);
81 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
82  MCInst const &MCI);
83 
84 // Returns a iterator range of instructions in this bundle
86 bundleInstructions(MCInstrInfo const &MCII, MCInst const &MCI);
88 
89 // Returns the number of instructions in the bundle
90 size_t bundleSize(MCInst const &MCI);
91 
92 // Put the packet in to canonical form, compound, duplex, pad, and shuffle
93 bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
94  MCContext &Context, MCInst &MCB,
95  HexagonMCChecker *Checker);
96 
97 // Create a duplex instruction given the two subinsts
98 MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0,
99  MCInst const &inst1);
100 MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst,
101  MCOperand const &MO);
102 
103 // Convert this instruction in to a duplex subinst
104 MCInst deriveSubInst(MCInst const &Inst);
105 
106 // Return the extender for instruction at Index or nullptr if none
107 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index);
108 void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
109  MCInst const &MCI);
110 
111 // Return memory access size in bytes
112 unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI);
113 
114 // Return memory access size
115 unsigned getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI);
116 
117 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
118 
119 // Return which duplex group this instruction belongs to
120 unsigned getDuplexCandidateGroup(MCInst const &MI);
121 
122 // Return a list of all possible instruction duplex combinations
124 getDuplexPossibilties(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
125  MCInst const &MCB);
126 unsigned getDuplexRegisterNumbering(unsigned Reg);
127 
128 MCExpr const &getExpr(MCExpr const &Expr);
129 
130 // Return the index of the extendable operand
131 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI);
132 
133 // Return a reference to the extendable operand
134 MCOperand const &getExtendableOperand(MCInstrInfo const &MCII,
135  MCInst const &MCI);
136 
137 // Return the implicit alignment of the extendable operand
138 unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI);
139 
140 // Return the number of logical bits of the extendable operand
141 unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI);
142 
143 // Check if the extendable operand is signed.
144 bool isExtentSigned(MCInstrInfo const &MCII, MCInst const &MCI);
145 
146 // Return the max value that a constant extendable operand can have
147 // without being extended.
148 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI);
149 
150 // Return the min value that a constant extendable operand can have
151 // without being extended.
152 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI);
153 
154 // Return instruction name
155 StringRef getName(MCInstrInfo const &MCII, MCInst const &MCI);
156 
157 // Return the operand index for the new value.
158 unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI);
159 
160 // Return the operand that consumes or produces a new value.
161 MCOperand const &getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI);
162 unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI);
163 MCOperand const &getNewValueOperand2(MCInstrInfo const &MCII,
164  MCInst const &MCI);
165 
166 // Return the Hexagon ISA class for the insn.
167 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI);
168 
169 /// Return the slots used by the insn.
170 unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
171  MCInst const &MCI);
172 unsigned getOtherReservedSlots(MCInstrInfo const &MCII,
173  MCSubtargetInfo const &STI, MCInst const &MCI);
174 bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
175 
176 // Does the packet have an extender for the instruction at Index
177 bool hasExtenderForIndex(MCInst const &MCB, size_t Index);
178 
179 bool hasImmExt(MCInst const &MCI);
180 
181 // Return whether the instruction is a legal new-value producer.
182 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
183 bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI);
184 bool hasTmpDst(MCInstrInfo const &MCII, MCInst const &MCI);
185 unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb);
186 
187 int64_t minConstant(MCInst const &MCI, size_t Index);
188 template <unsigned N, unsigned S>
189 bool inRange(MCInst const &MCI, size_t Index) {
190  return isShiftedUInt<N, S>(minConstant(MCI, Index));
191 }
192 template <unsigned N, unsigned S>
193 bool inSRange(MCInst const &MCI, size_t Index) {
194  return isShiftedInt<N, S>(minConstant(MCI, Index));
195 }
196 template <unsigned N> bool inRange(MCInst const &MCI, size_t Index) {
197  return isUInt<N>(minConstant(MCI, Index));
198 }
199 
200 // Return the instruction at Index
201 MCInst const &instruction(MCInst const &MCB, size_t Index);
202 bool isAccumulator(MCInstrInfo const &MCII, MCInst const &MCI);
203 
204 // Returns whether this MCInst is a wellformed bundle
205 bool isBundle(MCInst const &MCI);
206 
207 // Return whether the insn is an actual insn.
208 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI);
209 bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI);
210 bool isCofRelax1(MCInstrInfo const &MCII, MCInst const &MCI);
211 bool isCofRelax2(MCInstrInfo const &MCII, MCInst const &MCI);
212 bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI);
213 
214 // Return whether the instruction needs to be constant extended.
215 bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI);
216 bool isCVINew(MCInstrInfo const &MCII, MCInst const &MCI);
217 
218 // Is this double register suitable for use in a duplex subinst
219 bool isDblRegForSubInst(unsigned Reg);
220 
221 // Is this a duplex instruction
222 bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
223 
224 // Can these instructions be duplexed
225 bool isDuplexPair(MCInst const &MIa, MCInst const &MIb);
226 
227 // Can these duplex classes be combine in to a duplex instruction
228 bool isDuplexPairMatch(unsigned Ga, unsigned Gb);
229 
230 // Return true if the insn may be extended based on the operand value.
231 bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI);
232 
233 // Return whether the instruction must be always extended.
234 bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI);
235 
236 /// Return whether it is a floating-point insn.
237 bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI);
238 
239 bool isHVX(MCInstrInfo const &MCII, MCInst const &MCI);
240 
241 // Returns whether this instruction is an immediate extender
242 bool isImmext(MCInst const &MCI);
243 
244 // Returns whether this bundle is an endloop0
245 bool isInnerLoop(MCInst const &MCI);
246 
247 // Is this an integer register
248 bool isIntReg(unsigned Reg);
249 
250 // Is this register suitable for use in a duplex subinst
251 bool isIntRegForSubInst(unsigned Reg);
252 bool isMemReorderDisabled(MCInst const &MCI);
253 
254 // Return whether the insn is a new-value consumer.
255 bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
256 bool isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short);
257 
258 // Can these two instructions be duplexed
259 bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa,
260  bool ExtendedA, MCInst const &MIb, bool ExtendedB,
261  bool bisReversable, MCSubtargetInfo const &STI);
262 
263 // Returns whether this bundle is an endloop1
264 bool isOuterLoop(MCInst const &MCI);
265 
266 // Return whether this instruction is predicated
267 bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI);
268 bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI);
269 bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI);
270 
271 // Return whether the predicate sense is true
272 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI);
273 
274 // Is this a predicate register
275 bool isPredReg(unsigned Reg);
276 
277 // Return whether the insn is a prefix.
278 bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI);
279 
280 // Return whether the insn is solo, i.e., cannot be in a packet.
281 bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI);
282 
283 /// Return whether the insn can be packaged only with A and X-type insns.
284 bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI);
285 
286 /// Return whether the insn can be packaged only with an A-type insn in slot #1.
287 bool isRestrictSlot1AOK(MCInstrInfo const &MCII, MCInst const &MCI);
288 bool isRestrictNoSlot1Store(MCInstrInfo const &MCII, MCInst const &MCI);
289 bool isSubInstruction(MCInst const &MCI);
290 bool isVector(MCInstrInfo const &MCII, MCInst const &MCI);
291 bool mustExtend(MCExpr const &Expr);
292 bool mustNotExtend(MCExpr const &Expr);
293 
294 // Pad the bundle with nops to satisfy endloop requirements
295 void padEndloop(MCInst &MCI, MCContext &Context);
297 public:
298  PredicateInfo() : Register(0), Operand(0), PredicatedTrue(false) {}
299  PredicateInfo(unsigned Register, unsigned Operand, bool PredicatedTrue)
300  : Register(Register), Operand(Operand), PredicatedTrue(PredicatedTrue) {}
301  bool isPredicated() const;
302  unsigned Register;
303  unsigned Operand;
305 };
306 PredicateInfo predicateInfo(MCInstrInfo const &MCII, MCInst const &MCI);
307 bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI);
308 
309 // Replace the instructions inside MCB, represented by Candidate
310 void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate);
311 
312 bool s27_2_reloc(MCExpr const &Expr);
313 // Marks a bundle as endloop0
314 void setInnerLoop(MCInst &MCI);
315 void setMemReorderDisabled(MCInst &MCI);
316 void setMustExtend(MCExpr const &Expr, bool Val = true);
317 void setMustNotExtend(MCExpr const &Expr, bool Val = true);
318 void setS27_2_reloc(MCExpr const &Expr, bool Val = true);
319 
320 // Marks a bundle as endloop1
321 void setOuterLoop(MCInst &MCI);
322 
323 // Would duplexing this instruction create a requirement to extend
324 bool subInstWouldBeExtended(MCInst const &potentialDuplex);
325 unsigned SubregisterBit(unsigned Consumer, unsigned Producer,
326  unsigned Producer2);
327 
328 // Attempt to find and replace compound pairs
329 void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
330  MCContext &Context, MCInst &MCI);
331 
332 } // end namespace HexagonMCInstrInfo
333 
334 } // end namespace llvm
335 
336 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
void replaceDuplex(MCContext &Context, MCInst &MCI, DuplexCandidate Candidate)
bool isHVX(MCInstrInfo const &MCII, MCInst const &MCI)
bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned getAddrMode(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI)
bool subInstWouldBeExtended(MCInst const &potentialDuplex)
bool hasTmpDst(MCInstrInfo const &MCII, MCInst const &MCI)
return true if instruction has hasTmpDst attribute.
LLVMContext & Context
bool inSRange(MCInst const &MCI, size_t Index)
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
unsigned getOtherReservedSlots(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
Return the slots this instruction consumes in addition to the slot(s) it can execute out of...
bool isDuplexPair(MCInst const &MIa, MCInst const &MIb)
Symmetrical. See if these two instructions are fit for duplex pair.
This provides a very simple, boring adaptor for a begin and end iterator into a range type...
Describe properties that are true of each instruction in the target description file.
Definition: MCInstrDesc.h:163
unsigned Reg
MCOperand const & getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI)
bool isBundle(MCInst const &MCI)
bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn is solo, i.e., cannot be in a packet.
bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn is newly predicated.
bool isSubInstruction(MCInst const &MCI)
MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst, MCOperand const &MO)
bool isOuterLoop(MCInst const &MCI)
bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn expects newly produced value.
bool isCofRelax1(MCInstrInfo const &MCII, MCInst const &MCI)
bool operator!=(PacketIterator const &Other) const
bool isImmext(MCInst const &MCI)
void tryCompound(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCI)
tryCompound - Given a bundle check for compound insns when one is found update the contents fo the bu...
bool isCofMax1(MCInstrInfo const &MCII, MCInst const &MCI)
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
static StringRef getName(Value *V)
MCOperand const & getExtendableOperand(MCInstrInfo const &MCII, MCInst const &MCI)
bool isCofRelax2(MCInstrInfo const &MCII, MCInst const &MCI)
DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
bool isRestrictNoSlot1Store(MCInstrInfo const &MCII, MCInst const &MCI)
MCInst const * extenderForIndex(MCInst const &MCB, size_t Index)
bool s27_2_reloc(MCExpr const &Expr)
ELFYAML::ELF_STO Other
Definition: ELFYAML.cpp:775
APInt operator*(APInt a, uint64_t RHS)
Definition: APInt.h:2085
void padEndloop(MCInst &MCI, MCContext &Context)
void setMemReorderDisabled(MCInst &MCI)
Context object for machine code objects.
Definition: MCContext.h:63
size_t const memReorderDisabledOffset
MCInst const & instruction(MCInst const &MCB, size_t Index)
int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return the maximum value of an extendable operand.
bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCContext &Context, MCInst &MCB, HexagonMCChecker *Checker)
PredicateInfo predicateInfo(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI)
Return the new value or the newly produced value.
bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn produces a second value.
void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)
void setMustExtend(MCExpr const &Expr, bool Val=true)
bool isAccumulator(MCInstrInfo const &MCII, MCInst const &MCI)
Return where the instruction is an accumulator.
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:161
bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI)
int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return the minimum value of an extendable operand.
bool mustExtend(MCExpr const &Expr)
unsigned getDuplexCandidateGroup(MCInst const &MI)
bool isExtentSigned(MCInstrInfo const &MCII, MCInst const &MCI)
static bool inRange(const MCExpr *Expr, int64_t MinValue, int64_t MaxValue)
MCOperand const & getNewValueOperand2(MCInstrInfo const &MCII, MCInst const &MCI)
Interface to description of machine instruction set.
Definition: MCInstrInfo.h:24
int64_t const memReorderDisabledMask
bool hasDuplex(MCInstrInfo const &MCII, MCInst const &MCI)
MCInstrDesc const & getDesc(MCInstrInfo const &MCII, MCInst const &MCI)
static bool isDblRegForSubInst(unsigned Reg, const HexagonRegisterInfo &HRI)
PredicateInfo(unsigned Register, unsigned Operand, bool PredicatedTrue)
iterator_range< MCInst::const_iterator > bundleInstructions(MCInst const &MCI)
static wasm::ValType getType(const TargetRegisterClass *RC)
unsigned SubregisterBit(unsigned Consumer, unsigned Producer, unsigned Producer2)
bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI)
bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI)
static bool isIntRegForSubInst(unsigned Reg)
size_t const bundleInstructionsOffset
bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI)
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:847
bool isVector(MCInstrInfo const &MCII, MCInst const &MCI)
Promote Memory to Register
Definition: Mem2Reg.cpp:110
bool isCVINew(MCInstrInfo const &MCII, MCInst const &MCI)
static bool isPrefix(const IndicesVector &Prefix, const IndicesVector &Longer)
Returns true if Prefix is a prefix of longer.
int64_t minConstant(MCInst const &MCI, size_t Index)
SmallVectorImpl< MCOperand >::const_iterator const_iterator
Definition: MCInst.h:189
A range adaptor for a pair of iterators.
static bool isDuplexPairMatch(unsigned Ga, unsigned Gb)
bool isMemReorderDisabled(MCInst const &MCI)
bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI)
bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI)
MCInst deriveSubInst(MCInst const &Inst)
bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn can be packaged only with A and X-type insns.
MCExpr const & getExpr(MCExpr const &Expr)
bool hasExtenderForIndex(MCInst const &MCB, size_t Index)
Generic base class for all target subtargets.
void setMustNotExtend(MCExpr const &Expr, bool Val=true)
size_t bundleSize(MCInst const &MCI)
bool hasImmExt(MCInst const &MCI)
bool isInnerLoop(MCInst const &MCI)
bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether it is a floating-point insn.
bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI)
LLVM Value Representation.
Definition: Value.h:73
SmallVector< DuplexCandidate, 8 > getDuplexPossibilties(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCB)
Check for a valid bundle.
void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB, MCInst const &MCI)
unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst const &MCI)
Return the slots used by the insn.
bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI)
unsigned getDuplexRegisterNumbering(unsigned Reg)
IRTranslator LLVM IR MI
bool isOpExtendable(MCInstrInfo const &MCII, MCInst const &MCI, unsigned short)
Return whether the operand is extendable.
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
MCInst * deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0, MCInst const &inst1)
bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn produces a value.
bool operator==(uint64_t V1, const APInt &V2)
Definition: APInt.h:1961
unsigned getMemAccessSize(MCInstrInfo const &MCII, MCInst const &MCI)
void setS27_2_reloc(MCExpr const &Expr, bool Val=true)
unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI)
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
bool mustNotExtend(MCExpr const &Expr)
unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb)
bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI)
bool isRestrictSlot1AOK(MCInstrInfo const &MCII, MCInst const &MCI)
Return whether the insn can be packaged only with an A-type insn in slot #1.
void addConstant(MCInst &MI, uint64_t Value, MCContext &Context)
bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa, bool ExtendedA, MCInst const &MIb, bool ExtendedB, bool bisReversable, MCSubtargetInfo const &STI)
non-Symmetrical. See if these two instructions are fit for duplex pair.
unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI)