LLVM  6.0.0svn
IfConversion.cpp
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1 //===- IfConversion.cpp - Machine code if conversion pass -----------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the machine instruction level if-conversion pass, which
11 // tries to convert conditional branches into predicated instructions.
12 //
13 //===----------------------------------------------------------------------===//
14 
15 #include "BranchFolding.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/ADT/ScopeExit.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/SmallVector.h"
20 #include "llvm/ADT/SparseSet.h"
21 #include "llvm/ADT/Statistic.h"
39 #include "llvm/IR/DebugLoc.h"
40 #include "llvm/MC/MCRegisterInfo.h"
41 #include "llvm/Pass.h"
44 #include "llvm/Support/Debug.h"
47 #include <algorithm>
48 #include <cassert>
49 #include <functional>
50 #include <iterator>
51 #include <memory>
52 #include <utility>
53 #include <vector>
54 
55 using namespace llvm;
56 
57 #define DEBUG_TYPE "if-converter"
58 
59 // Hidden options for help debugging.
60 static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
61 static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
62 static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
63 static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
64  cl::init(false), cl::Hidden);
65 static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
66  cl::init(false), cl::Hidden);
67 static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
68  cl::init(false), cl::Hidden);
69 static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
70  cl::init(false), cl::Hidden);
71 static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
72  cl::init(false), cl::Hidden);
73 static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
74  cl::init(false), cl::Hidden);
75 static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
76  cl::init(false), cl::Hidden);
77 static cl::opt<bool> DisableForkedDiamond("disable-ifcvt-forked-diamond",
78  cl::init(false), cl::Hidden);
79 static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
80  cl::init(true), cl::Hidden);
81 
82 STATISTIC(NumSimple, "Number of simple if-conversions performed");
83 STATISTIC(NumSimpleFalse, "Number of simple (F) if-conversions performed");
84 STATISTIC(NumTriangle, "Number of triangle if-conversions performed");
85 STATISTIC(NumTriangleRev, "Number of triangle (R) if-conversions performed");
86 STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
87 STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
88 STATISTIC(NumDiamonds, "Number of diamond if-conversions performed");
89 STATISTIC(NumForkedDiamonds, "Number of forked-diamond if-conversions performed");
90 STATISTIC(NumIfConvBBs, "Number of if-converted blocks");
91 STATISTIC(NumDupBBs, "Number of duplicated blocks");
92 STATISTIC(NumUnpred, "Number of true blocks of diamonds unpredicated");
93 
94 namespace {
95 
96  class IfConverter : public MachineFunctionPass {
97  enum IfcvtKind {
98  ICNotClassfied, // BB data valid, but not classified.
99  ICSimpleFalse, // Same as ICSimple, but on the false path.
100  ICSimple, // BB is entry of an one split, no rejoin sub-CFG.
101  ICTriangleFRev, // Same as ICTriangleFalse, but false path rev condition.
102  ICTriangleRev, // Same as ICTriangle, but true path rev condition.
103  ICTriangleFalse, // Same as ICTriangle, but on the false path.
104  ICTriangle, // BB is entry of a triangle sub-CFG.
105  ICDiamond, // BB is entry of a diamond sub-CFG.
106  ICForkedDiamond // BB is entry of an almost diamond sub-CFG, with a
107  // common tail that can be shared.
108  };
109 
110  /// One per MachineBasicBlock, this is used to cache the result
111  /// if-conversion feasibility analysis. This includes results from
112  /// TargetInstrInfo::analyzeBranch() (i.e. TBB, FBB, and Cond), and its
113  /// classification, and common tail block of its successors (if it's a
114  /// diamond shape), its size, whether it's predicable, and whether any
115  /// instruction can clobber the 'would-be' predicate.
116  ///
117  /// IsDone - True if BB is not to be considered for ifcvt.
118  /// IsBeingAnalyzed - True if BB is currently being analyzed.
119  /// IsAnalyzed - True if BB has been analyzed (info is still valid).
120  /// IsEnqueued - True if BB has been enqueued to be ifcvt'ed.
121  /// IsBrAnalyzable - True if analyzeBranch() returns false.
122  /// HasFallThrough - True if BB may fallthrough to the following BB.
123  /// IsUnpredicable - True if BB is known to be unpredicable.
124  /// ClobbersPred - True if BB could modify predicates (e.g. has
125  /// cmp, call, etc.)
126  /// NonPredSize - Number of non-predicated instructions.
127  /// ExtraCost - Extra cost for multi-cycle instructions.
128  /// ExtraCost2 - Some instructions are slower when predicated
129  /// BB - Corresponding MachineBasicBlock.
130  /// TrueBB / FalseBB- See analyzeBranch().
131  /// BrCond - Conditions for end of block conditional branches.
132  /// Predicate - Predicate used in the BB.
133  struct BBInfo {
134  bool IsDone : 1;
135  bool IsBeingAnalyzed : 1;
136  bool IsAnalyzed : 1;
137  bool IsEnqueued : 1;
138  bool IsBrAnalyzable : 1;
139  bool IsBrReversible : 1;
140  bool HasFallThrough : 1;
141  bool IsUnpredicable : 1;
142  bool CannotBeCopied : 1;
143  bool ClobbersPred : 1;
144  unsigned NonPredSize = 0;
145  unsigned ExtraCost = 0;
146  unsigned ExtraCost2 = 0;
147  MachineBasicBlock *BB = nullptr;
148  MachineBasicBlock *TrueBB = nullptr;
149  MachineBasicBlock *FalseBB = nullptr;
152 
153  BBInfo() : IsDone(false), IsBeingAnalyzed(false),
154  IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
155  IsBrReversible(false), HasFallThrough(false),
156  IsUnpredicable(false), CannotBeCopied(false),
157  ClobbersPred(false) {}
158  };
159 
160  /// Record information about pending if-conversions to attempt:
161  /// BBI - Corresponding BBInfo.
162  /// Kind - Type of block. See IfcvtKind.
163  /// NeedSubsumption - True if the to-be-predicated BB has already been
164  /// predicated.
165  /// NumDups - Number of instructions that would be duplicated due
166  /// to this if-conversion. (For diamonds, the number of
167  /// identical instructions at the beginnings of both
168  /// paths).
169  /// NumDups2 - For diamonds, the number of identical instructions
170  /// at the ends of both paths.
171  struct IfcvtToken {
172  BBInfo &BBI;
173  IfcvtKind Kind;
174  unsigned NumDups;
175  unsigned NumDups2;
176  bool NeedSubsumption : 1;
177  bool TClobbersPred : 1;
178  bool FClobbersPred : 1;
179 
180  IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0,
181  bool tc = false, bool fc = false)
182  : BBI(b), Kind(k), NumDups(d), NumDups2(d2), NeedSubsumption(s),
183  TClobbersPred(tc), FClobbersPred(fc) {}
184  };
185 
186  /// Results of if-conversion feasibility analysis indexed by basic block
187  /// number.
188  std::vector<BBInfo> BBAnalysis;
189  TargetSchedModel SchedModel;
190 
191  const TargetLoweringBase *TLI;
192  const TargetInstrInfo *TII;
193  const TargetRegisterInfo *TRI;
194  const MachineBranchProbabilityInfo *MBPI;
196 
197  LivePhysRegs Redefs;
198 
199  bool PreRegAlloc;
200  bool MadeChange;
201  int FnNum = -1;
202  std::function<bool(const MachineFunction &)> PredicateFtor;
203 
204  public:
205  static char ID;
206 
207  IfConverter(std::function<bool(const MachineFunction &)> Ftor = nullptr)
208  : MachineFunctionPass(ID), PredicateFtor(std::move(Ftor)) {
210  }
211 
212  void getAnalysisUsage(AnalysisUsage &AU) const override {
216  }
217 
218  bool runOnMachineFunction(MachineFunction &MF) override;
219 
220  MachineFunctionProperties getRequiredProperties() const override {
223  }
224 
225  private:
226  bool reverseBranchCondition(BBInfo &BBI) const;
227  bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
228  BranchProbability Prediction) const;
229  bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
230  bool FalseBranch, unsigned &Dups,
231  BranchProbability Prediction) const;
232  bool CountDuplicatedInstructions(
235  unsigned &Dups1, unsigned &Dups2,
237  bool SkipUnconditionalBranches) const;
238  bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
239  unsigned &Dups1, unsigned &Dups2,
240  BBInfo &TrueBBICalc, BBInfo &FalseBBICalc) const;
241  bool ValidForkedDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
242  unsigned &Dups1, unsigned &Dups2,
243  BBInfo &TrueBBICalc, BBInfo &FalseBBICalc) const;
244  void AnalyzeBranches(BBInfo &BBI);
245  void ScanInstructions(BBInfo &BBI,
248  bool BranchUnpredicable = false) const;
249  bool RescanInstructions(
252  BBInfo &TrueBBI, BBInfo &FalseBBI) const;
253  void AnalyzeBlock(MachineBasicBlock &MBB,
254  std::vector<std::unique_ptr<IfcvtToken>> &Tokens);
255  bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
256  bool isTriangle = false, bool RevBranch = false,
257  bool hasCommonTail = false);
258  void AnalyzeBlocks(MachineFunction &MF,
259  std::vector<std::unique_ptr<IfcvtToken>> &Tokens);
260  void InvalidatePreds(MachineBasicBlock &MBB);
261  bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
262  bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
263  bool IfConvertDiamondCommon(BBInfo &BBI, BBInfo &TrueBBI, BBInfo &FalseBBI,
264  unsigned NumDups1, unsigned NumDups2,
265  bool TClobbersPred, bool FClobbersPred,
266  bool RemoveBranch, bool MergeAddEdges);
267  bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
268  unsigned NumDups1, unsigned NumDups2,
269  bool TClobbers, bool FClobbers);
270  bool IfConvertForkedDiamond(BBInfo &BBI, IfcvtKind Kind,
271  unsigned NumDups1, unsigned NumDups2,
272  bool TClobbers, bool FClobbers);
273  void PredicateBlock(BBInfo &BBI,
276  SmallSet<unsigned, 4> *LaterRedefs = nullptr);
277  void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
279  bool IgnoreBr = false);
280  void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
281 
282  bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
283  unsigned Cycle, unsigned Extra,
284  BranchProbability Prediction) const {
285  return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
286  Prediction);
287  }
288 
289  bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
290  unsigned TCycle, unsigned TExtra,
291  MachineBasicBlock &FBB,
292  unsigned FCycle, unsigned FExtra,
293  BranchProbability Prediction) const {
294  return TCycle > 0 && FCycle > 0 &&
295  TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
296  Prediction);
297  }
298 
299  /// Returns true if Block ends without a terminator.
300  bool blockAlwaysFallThrough(BBInfo &BBI) const {
301  return BBI.IsBrAnalyzable && BBI.TrueBB == nullptr;
302  }
303 
304  /// Used to sort if-conversion candidates.
305  static bool IfcvtTokenCmp(const std::unique_ptr<IfcvtToken> &C1,
306  const std::unique_ptr<IfcvtToken> &C2) {
307  int Incr1 = (C1->Kind == ICDiamond)
308  ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
309  int Incr2 = (C2->Kind == ICDiamond)
310  ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
311  if (Incr1 > Incr2)
312  return true;
313  else if (Incr1 == Incr2) {
314  // Favors subsumption.
315  if (!C1->NeedSubsumption && C2->NeedSubsumption)
316  return true;
317  else if (C1->NeedSubsumption == C2->NeedSubsumption) {
318  // Favors diamond over triangle, etc.
319  if ((unsigned)C1->Kind < (unsigned)C2->Kind)
320  return true;
321  else if (C1->Kind == C2->Kind)
322  return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
323  }
324  }
325  return false;
326  }
327  };
328 
329 } // end anonymous namespace
330 
331 char IfConverter::ID = 0;
332 
334 
335 INITIALIZE_PASS_BEGIN(IfConverter, DEBUG_TYPE, "If Converter", false, false)
337 INITIALIZE_PASS_END(IfConverter, DEBUG_TYPE, "If Converter", false, false)
338 
339 bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
340  if (skipFunction(*MF.getFunction()) || (PredicateFtor && !PredicateFtor(MF)))
341  return false;
342 
343  const TargetSubtargetInfo &ST = MF.getSubtarget();
344  TLI = ST.getTargetLowering();
345  TII = ST.getInstrInfo();
346  TRI = ST.getRegisterInfo();
347  BranchFolder::MBFIWrapper MBFI(getAnalysis<MachineBlockFrequencyInfo>());
348  MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
349  MRI = &MF.getRegInfo();
350  SchedModel.init(ST.getSchedModel(), &ST, TII);
351 
352  if (!TII) return false;
353 
354  PreRegAlloc = MRI->isSSA();
355 
356  bool BFChange = false;
357  if (!PreRegAlloc) {
358  // Tail merge tend to expose more if-conversion opportunities.
359  BranchFolder BF(true, false, MBFI, *MBPI);
360  BFChange = BF.OptimizeFunction(MF, TII, ST.getRegisterInfo(),
361  getAnalysisIfAvailable<MachineModuleInfo>());
362  }
363 
364  DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum << ") \'"
365  << MF.getName() << "\'");
366 
367  if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
368  DEBUG(dbgs() << " skipped\n");
369  return false;
370  }
371  DEBUG(dbgs() << "\n");
372 
373  MF.RenumberBlocks();
374  BBAnalysis.resize(MF.getNumBlockIDs());
375 
376  std::vector<std::unique_ptr<IfcvtToken>> Tokens;
377  MadeChange = false;
378  unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
379  NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
380  while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
381  // Do an initial analysis for each basic block and find all the potential
382  // candidates to perform if-conversion.
383  bool Change = false;
384  AnalyzeBlocks(MF, Tokens);
385  while (!Tokens.empty()) {
386  std::unique_ptr<IfcvtToken> Token = std::move(Tokens.back());
387  Tokens.pop_back();
388  BBInfo &BBI = Token->BBI;
389  IfcvtKind Kind = Token->Kind;
390  unsigned NumDups = Token->NumDups;
391  unsigned NumDups2 = Token->NumDups2;
392 
393  // If the block has been evicted out of the queue or it has already been
394  // marked dead (due to it being predicated), then skip it.
395  if (BBI.IsDone)
396  BBI.IsEnqueued = false;
397  if (!BBI.IsEnqueued)
398  continue;
399 
400  BBI.IsEnqueued = false;
401 
402  bool RetVal = false;
403  switch (Kind) {
404  default: llvm_unreachable("Unexpected!");
405  case ICSimple:
406  case ICSimpleFalse: {
407  bool isFalse = Kind == ICSimpleFalse;
408  if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
409  DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
410  " false" : "")
411  << "): BB#" << BBI.BB->getNumber() << " ("
412  << ((Kind == ICSimpleFalse)
413  ? BBI.FalseBB->getNumber()
414  : BBI.TrueBB->getNumber()) << ") ");
415  RetVal = IfConvertSimple(BBI, Kind);
416  DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
417  if (RetVal) {
418  if (isFalse) ++NumSimpleFalse;
419  else ++NumSimple;
420  }
421  break;
422  }
423  case ICTriangle:
424  case ICTriangleRev:
425  case ICTriangleFalse:
426  case ICTriangleFRev: {
427  bool isFalse = Kind == ICTriangleFalse;
428  bool isRev = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
429  if (DisableTriangle && !isFalse && !isRev) break;
430  if (DisableTriangleR && !isFalse && isRev) break;
431  if (DisableTriangleF && isFalse && !isRev) break;
432  if (DisableTriangleFR && isFalse && isRev) break;
433  DEBUG(dbgs() << "Ifcvt (Triangle");
434  if (isFalse)
435  DEBUG(dbgs() << " false");
436  if (isRev)
437  DEBUG(dbgs() << " rev");
438  DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
439  << BBI.TrueBB->getNumber() << ",F:"
440  << BBI.FalseBB->getNumber() << ") ");
441  RetVal = IfConvertTriangle(BBI, Kind);
442  DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
443  if (RetVal) {
444  if (isFalse) {
445  if (isRev) ++NumTriangleFRev;
446  else ++NumTriangleFalse;
447  } else {
448  if (isRev) ++NumTriangleRev;
449  else ++NumTriangle;
450  }
451  }
452  break;
453  }
454  case ICDiamond:
455  if (DisableDiamond) break;
456  DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
457  << BBI.TrueBB->getNumber() << ",F:"
458  << BBI.FalseBB->getNumber() << ") ");
459  RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2,
460  Token->TClobbersPred,
461  Token->FClobbersPred);
462  DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
463  if (RetVal) ++NumDiamonds;
464  break;
465  case ICForkedDiamond:
466  if (DisableForkedDiamond) break;
467  DEBUG(dbgs() << "Ifcvt (Forked Diamond): BB#"
468  << BBI.BB->getNumber() << " (T:"
469  << BBI.TrueBB->getNumber() << ",F:"
470  << BBI.FalseBB->getNumber() << ") ");
471  RetVal = IfConvertForkedDiamond(BBI, Kind, NumDups, NumDups2,
472  Token->TClobbersPred,
473  Token->FClobbersPred);
474  DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
475  if (RetVal) ++NumForkedDiamonds;
476  break;
477  }
478 
479  if (RetVal && MRI->tracksLiveness())
480  recomputeLivenessFlags(*BBI.BB);
481 
482  Change |= RetVal;
483 
484  NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
485  NumTriangleFalse + NumTriangleFRev + NumDiamonds;
486  if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
487  break;
488  }
489 
490  if (!Change)
491  break;
492  MadeChange |= Change;
493  }
494 
495  Tokens.clear();
496  BBAnalysis.clear();
497 
498  if (MadeChange && IfCvtBranchFold) {
499  BranchFolder BF(false, false, MBFI, *MBPI);
500  BF.OptimizeFunction(MF, TII, MF.getSubtarget().getRegisterInfo(),
501  getAnalysisIfAvailable<MachineModuleInfo>());
502  }
503 
504  MadeChange |= BFChange;
505  return MadeChange;
506 }
507 
508 /// BB has a fallthrough. Find its 'false' successor given its 'true' successor.
510  MachineBasicBlock *TrueBB) {
511  for (MachineBasicBlock *SuccBB : BB->successors()) {
512  if (SuccBB != TrueBB)
513  return SuccBB;
514  }
515  return nullptr;
516 }
517 
518 /// Reverse the condition of the end of the block branch. Swap block's 'true'
519 /// and 'false' successors.
520 bool IfConverter::reverseBranchCondition(BBInfo &BBI) const {
521  DebugLoc dl; // FIXME: this is nowhere
522  if (!TII->reverseBranchCondition(BBI.BrCond)) {
523  TII->removeBranch(*BBI.BB);
524  TII->insertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
525  std::swap(BBI.TrueBB, BBI.FalseBB);
526  return true;
527  }
528  return false;
529 }
530 
531 /// Returns the next block in the function blocks ordering. If it is the end,
532 /// returns NULL.
536  if (++I == E)
537  return nullptr;
538  return &*I;
539 }
540 
541 /// Returns true if the 'true' block (along with its predecessor) forms a valid
542 /// simple shape for ifcvt. It also returns the number of instructions that the
543 /// ifcvt would need to duplicate if performed in Dups.
544 bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
545  BranchProbability Prediction) const {
546  Dups = 0;
547  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
548  return false;
549 
550  if (TrueBBI.IsBrAnalyzable)
551  return false;
552 
553  if (TrueBBI.BB->pred_size() > 1) {
554  if (TrueBBI.CannotBeCopied ||
555  !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
556  Prediction))
557  return false;
558  Dups = TrueBBI.NonPredSize;
559  }
560 
561  return true;
562 }
563 
564 /// Returns true if the 'true' and 'false' blocks (along with their common
565 /// predecessor) forms a valid triangle shape for ifcvt. If 'FalseBranch' is
566 /// true, it checks if 'true' block's false branch branches to the 'false' block
567 /// rather than the other way around. It also returns the number of instructions
568 /// that the ifcvt would need to duplicate if performed in 'Dups'.
569 bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
570  bool FalseBranch, unsigned &Dups,
571  BranchProbability Prediction) const {
572  Dups = 0;
573  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
574  return false;
575 
576  if (TrueBBI.BB->pred_size() > 1) {
577  if (TrueBBI.CannotBeCopied)
578  return false;
579 
580  unsigned Size = TrueBBI.NonPredSize;
581  if (TrueBBI.IsBrAnalyzable) {
582  if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
583  // Ends with an unconditional branch. It will be removed.
584  --Size;
585  else {
586  MachineBasicBlock *FExit = FalseBranch
587  ? TrueBBI.TrueBB : TrueBBI.FalseBB;
588  if (FExit)
589  // Require a conditional branch
590  ++Size;
591  }
592  }
593  if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
594  return false;
595  Dups = Size;
596  }
597 
598  MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
599  if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
600  MachineFunction::iterator I = TrueBBI.BB->getIterator();
601  if (++I == TrueBBI.BB->getParent()->end())
602  return false;
603  TExit = &*I;
604  }
605  return TExit && TExit == FalseBBI.BB;
606 }
607 
608 /// Count duplicated instructions and move the iterators to show where they
609 /// are.
610 /// @param TIB True Iterator Begin
611 /// @param FIB False Iterator Begin
612 /// These two iterators initially point to the first instruction of the two
613 /// blocks, and finally point to the first non-shared instruction.
614 /// @param TIE True Iterator End
615 /// @param FIE False Iterator End
616 /// These two iterators initially point to End() for the two blocks() and
617 /// finally point to the first shared instruction in the tail.
618 /// Upon return [TIB, TIE), and [FIB, FIE) mark the un-duplicated portions of
619 /// two blocks.
620 /// @param Dups1 count of duplicated instructions at the beginning of the 2
621 /// blocks.
622 /// @param Dups2 count of duplicated instructions at the end of the 2 blocks.
623 /// @param SkipUnconditionalBranches if true, Don't make sure that
624 /// unconditional branches at the end of the blocks are the same. True is
625 /// passed when the blocks are analyzable to allow for fallthrough to be
626 /// handled.
627 /// @return false if the shared portion prevents if conversion.
628 bool IfConverter::CountDuplicatedInstructions(
633  unsigned &Dups1, unsigned &Dups2,
635  bool SkipUnconditionalBranches) const {
636  while (TIB != TIE && FIB != FIE) {
637  // Skip dbg_value instructions. These do not count.
638  TIB = skipDebugInstructionsForward(TIB, TIE);
639  FIB = skipDebugInstructionsForward(FIB, FIE);
640  if (TIB == TIE || FIB == FIE)
641  break;
642  if (!TIB->isIdenticalTo(*FIB))
643  break;
644  // A pred-clobbering instruction in the shared portion prevents
645  // if-conversion.
646  std::vector<MachineOperand> PredDefs;
647  if (TII->DefinesPredicate(*TIB, PredDefs))
648  return false;
649  // If we get all the way to the branch instructions, don't count them.
650  if (!TIB->isBranch())
651  ++Dups1;
652  ++TIB;
653  ++FIB;
654  }
655 
656  // Check for already containing all of the block.
657  if (TIB == TIE || FIB == FIE)
658  return true;
659  // Now, in preparation for counting duplicate instructions at the ends of the
660  // blocks, switch to reverse_iterators. Note that getReverse() returns an
661  // iterator that points to the same instruction, unlike std::reverse_iterator.
662  // We have to do our own shifting so that we get the same range.
663  MachineBasicBlock::reverse_iterator RTIE = std::next(TIE.getReverse());
664  MachineBasicBlock::reverse_iterator RFIE = std::next(FIE.getReverse());
665  const MachineBasicBlock::reverse_iterator RTIB = std::next(TIB.getReverse());
666  const MachineBasicBlock::reverse_iterator RFIB = std::next(FIB.getReverse());
667 
668  if (!TBB.succ_empty() || !FBB.succ_empty()) {
669  if (SkipUnconditionalBranches) {
670  while (RTIE != RTIB && RTIE->isUnconditionalBranch())
671  ++RTIE;
672  while (RFIE != RFIB && RFIE->isUnconditionalBranch())
673  ++RFIE;
674  }
675  }
676 
677  // Count duplicate instructions at the ends of the blocks.
678  while (RTIE != RTIB && RFIE != RFIB) {
679  // Skip dbg_value instructions. These do not count.
680  // Note that these are reverse iterators going forward.
681  RTIE = skipDebugInstructionsForward(RTIE, RTIB);
682  RFIE = skipDebugInstructionsForward(RFIE, RFIB);
683  if (RTIE == RTIB || RFIE == RFIB)
684  break;
685  if (!RTIE->isIdenticalTo(*RFIE))
686  break;
687  // We have to verify that any branch instructions are the same, and then we
688  // don't count them toward the # of duplicate instructions.
689  if (!RTIE->isBranch())
690  ++Dups2;
691  ++RTIE;
692  ++RFIE;
693  }
694  TIE = std::next(RTIE.getReverse());
695  FIE = std::next(RFIE.getReverse());
696  return true;
697 }
698 
699 /// RescanInstructions - Run ScanInstructions on a pair of blocks.
700 /// @param TIB - True Iterator Begin, points to first non-shared instruction
701 /// @param FIB - False Iterator Begin, points to first non-shared instruction
702 /// @param TIE - True Iterator End, points past last non-shared instruction
703 /// @param FIE - False Iterator End, points past last non-shared instruction
704 /// @param TrueBBI - BBInfo to update for the true block.
705 /// @param FalseBBI - BBInfo to update for the false block.
706 /// @returns - false if either block cannot be predicated or if both blocks end
707 /// with a predicate-clobbering instruction.
708 bool IfConverter::RescanInstructions(
711  BBInfo &TrueBBI, BBInfo &FalseBBI) const {
712  bool BranchUnpredicable = true;
713  TrueBBI.IsUnpredicable = FalseBBI.IsUnpredicable = false;
714  ScanInstructions(TrueBBI, TIB, TIE, BranchUnpredicable);
715  if (TrueBBI.IsUnpredicable)
716  return false;
717  ScanInstructions(FalseBBI, FIB, FIE, BranchUnpredicable);
718  if (FalseBBI.IsUnpredicable)
719  return false;
720  if (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred)
721  return false;
722  return true;
723 }
724 
725 #ifndef NDEBUG
727  MachineBasicBlock *MBB1,
728  MachineBasicBlock *MBB2) {
729  const MachineBasicBlock::reverse_iterator B1 = MBB1->rend();
730  const MachineBasicBlock::reverse_iterator B2 = MBB2->rend();
733  while (E1 != B1 && E2 != B2) {
736  if (E1 == B1 && E2 == B2)
737  break;
738 
739  if (E1 == B1) {
740  assert(!E2->isBranch() && "Branch mis-match, one block is empty.");
741  break;
742  }
743  if (E2 == B2) {
744  assert(!E1->isBranch() && "Branch mis-match, one block is empty.");
745  break;
746  }
747 
748  if (E1->isBranch() || E2->isBranch())
749  assert(E1->isIdenticalTo(*E2) &&
750  "Branch mis-match, branch instructions don't match.");
751  else
752  break;
753  ++E1;
754  ++E2;
755  }
756 }
757 #endif
758 
759 /// ValidForkedDiamond - Returns true if the 'true' and 'false' blocks (along
760 /// with their common predecessor) form a diamond if a common tail block is
761 /// extracted.
762 /// While not strictly a diamond, this pattern would form a diamond if
763 /// tail-merging had merged the shared tails.
764 /// EBB
765 /// _/ \_
766 /// | |
767 /// TBB FBB
768 /// / \ / \
769 /// FalseBB TrueBB FalseBB
770 /// Currently only handles analyzable branches.
771 /// Specifically excludes actual diamonds to avoid overlap.
772 bool IfConverter::ValidForkedDiamond(
773  BBInfo &TrueBBI, BBInfo &FalseBBI,
774  unsigned &Dups1, unsigned &Dups2,
775  BBInfo &TrueBBICalc, BBInfo &FalseBBICalc) const {
776  Dups1 = Dups2 = 0;
777  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
778  FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
779  return false;
780 
781  if (!TrueBBI.IsBrAnalyzable || !FalseBBI.IsBrAnalyzable)
782  return false;
783  // Don't IfConvert blocks that can't be folded into their predecessor.
784  if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
785  return false;
786 
787  // This function is specifically looking for conditional tails, as
788  // unconditional tails are already handled by the standard diamond case.
789  if (TrueBBI.BrCond.size() == 0 ||
790  FalseBBI.BrCond.size() == 0)
791  return false;
792 
793  MachineBasicBlock *TT = TrueBBI.TrueBB;
794  MachineBasicBlock *TF = TrueBBI.FalseBB;
795  MachineBasicBlock *FT = FalseBBI.TrueBB;
796  MachineBasicBlock *FF = FalseBBI.FalseBB;
797 
798  if (!TT)
799  TT = getNextBlock(*TrueBBI.BB);
800  if (!TF)
801  TF = getNextBlock(*TrueBBI.BB);
802  if (!FT)
803  FT = getNextBlock(*FalseBBI.BB);
804  if (!FF)
805  FF = getNextBlock(*FalseBBI.BB);
806 
807  if (!TT || !TF)
808  return false;
809 
810  // Check successors. If they don't match, bail.
811  if (!((TT == FT && TF == FF) || (TF == FT && TT == FF)))
812  return false;
813 
814  bool FalseReversed = false;
815  if (TF == FT && TT == FF) {
816  // If the branches are opposing, but we can't reverse, don't do it.
817  if (!FalseBBI.IsBrReversible)
818  return false;
819  FalseReversed = true;
820  reverseBranchCondition(FalseBBI);
821  }
822  auto UnReverseOnExit = make_scope_exit([&]() {
823  if (FalseReversed)
824  reverseBranchCondition(FalseBBI);
825  });
826 
827  // Count duplicate instructions at the beginning of the true and false blocks.
828  MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
829  MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
830  MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
831  MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
832  if(!CountDuplicatedInstructions(TIB, FIB, TIE, FIE, Dups1, Dups2,
833  *TrueBBI.BB, *FalseBBI.BB,
834  /* SkipUnconditionalBranches */ true))
835  return false;
836 
837  TrueBBICalc.BB = TrueBBI.BB;
838  FalseBBICalc.BB = FalseBBI.BB;
839  if (!RescanInstructions(TIB, FIB, TIE, FIE, TrueBBICalc, FalseBBICalc))
840  return false;
841 
842  // The size is used to decide whether to if-convert, and the shared portions
843  // are subtracted off. Because of the subtraction, we just use the size that
844  // was calculated by the original ScanInstructions, as it is correct.
845  TrueBBICalc.NonPredSize = TrueBBI.NonPredSize;
846  FalseBBICalc.NonPredSize = FalseBBI.NonPredSize;
847  return true;
848 }
849 
850 /// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
851 /// with their common predecessor) forms a valid diamond shape for ifcvt.
852 bool IfConverter::ValidDiamond(
853  BBInfo &TrueBBI, BBInfo &FalseBBI,
854  unsigned &Dups1, unsigned &Dups2,
855  BBInfo &TrueBBICalc, BBInfo &FalseBBICalc) const {
856  Dups1 = Dups2 = 0;
857  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
858  FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
859  return false;
860 
861  MachineBasicBlock *TT = TrueBBI.TrueBB;
862  MachineBasicBlock *FT = FalseBBI.TrueBB;
863 
864  if (!TT && blockAlwaysFallThrough(TrueBBI))
865  TT = getNextBlock(*TrueBBI.BB);
866  if (!FT && blockAlwaysFallThrough(FalseBBI))
867  FT = getNextBlock(*FalseBBI.BB);
868  if (TT != FT)
869  return false;
870  if (!TT && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
871  return false;
872  if (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
873  return false;
874 
875  // FIXME: Allow true block to have an early exit?
876  if (TrueBBI.FalseBB || FalseBBI.FalseBB)
877  return false;
878 
879  // Count duplicate instructions at the beginning and end of the true and
880  // false blocks.
881  // Skip unconditional branches only if we are considering an analyzable
882  // diamond. Otherwise the branches must be the same.
883  bool SkipUnconditionalBranches =
884  TrueBBI.IsBrAnalyzable && FalseBBI.IsBrAnalyzable;
885  MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
886  MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
887  MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
888  MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
889  if(!CountDuplicatedInstructions(TIB, FIB, TIE, FIE, Dups1, Dups2,
890  *TrueBBI.BB, *FalseBBI.BB,
891  SkipUnconditionalBranches))
892  return false;
893 
894  TrueBBICalc.BB = TrueBBI.BB;
895  FalseBBICalc.BB = FalseBBI.BB;
896  if (!RescanInstructions(TIB, FIB, TIE, FIE, TrueBBICalc, FalseBBICalc))
897  return false;
898  // The size is used to decide whether to if-convert, and the shared portions
899  // are subtracted off. Because of the subtraction, we just use the size that
900  // was calculated by the original ScanInstructions, as it is correct.
901  TrueBBICalc.NonPredSize = TrueBBI.NonPredSize;
902  FalseBBICalc.NonPredSize = FalseBBI.NonPredSize;
903  return true;
904 }
905 
906 /// AnalyzeBranches - Look at the branches at the end of a block to determine if
907 /// the block is predicable.
908 void IfConverter::AnalyzeBranches(BBInfo &BBI) {
909  if (BBI.IsDone)
910  return;
911 
912  BBI.TrueBB = BBI.FalseBB = nullptr;
913  BBI.BrCond.clear();
914  BBI.IsBrAnalyzable =
915  !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
916  SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
917  BBI.IsBrReversible = (RevCond.size() == 0) ||
918  !TII->reverseBranchCondition(RevCond);
919  BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == nullptr;
920 
921  if (BBI.BrCond.size()) {
922  // No false branch. This BB must end with a conditional branch and a
923  // fallthrough.
924  if (!BBI.FalseBB)
925  BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
926  if (!BBI.FalseBB) {
927  // Malformed bcc? True and false blocks are the same?
928  BBI.IsUnpredicable = true;
929  }
930  }
931 }
932 
933 /// ScanInstructions - Scan all the instructions in the block to determine if
934 /// the block is predicable. In most cases, that means all the instructions
935 /// in the block are isPredicable(). Also checks if the block contains any
936 /// instruction which can clobber a predicate (e.g. condition code register).
937 /// If so, the block is not predicable unless it's the last instruction.
938 void IfConverter::ScanInstructions(BBInfo &BBI,
941  bool BranchUnpredicable) const {
942  if (BBI.IsDone || BBI.IsUnpredicable)
943  return;
944 
945  bool AlreadyPredicated = !BBI.Predicate.empty();
946 
947  BBI.NonPredSize = 0;
948  BBI.ExtraCost = 0;
949  BBI.ExtraCost2 = 0;
950  BBI.ClobbersPred = false;
951  for (MachineInstr &MI : make_range(Begin, End)) {
952  if (MI.isDebugValue())
953  continue;
954 
955  // It's unsafe to duplicate convergent instructions in this context, so set
956  // BBI.CannotBeCopied to true if MI is convergent. To see why, consider the
957  // following CFG, which is subject to our "simple" transformation.
958  //
959  // BB0 // if (c1) goto BB1; else goto BB2;
960  // / \
961  // BB1 |
962  // | BB2 // if (c2) goto TBB; else goto FBB;
963  // | / |
964  // | / |
965  // TBB |
966  // | |
967  // | FBB
968  // |
969  // exit
970  //
971  // Suppose we want to move TBB's contents up into BB1 and BB2 (in BB1 they'd
972  // be unconditional, and in BB2, they'd be predicated upon c2), and suppose
973  // TBB contains a convergent instruction. This is safe iff doing so does
974  // not add a control-flow dependency to the convergent instruction -- i.e.,
975  // it's safe iff the set of control flows that leads us to the convergent
976  // instruction does not get smaller after the transformation.
977  //
978  // Originally we executed TBB if c1 || c2. After the transformation, there
979  // are two copies of TBB's instructions. We get to the first if c1, and we
980  // get to the second if !c1 && c2.
981  //
982  // There are clearly fewer ways to satisfy the condition "c1" than
983  // "c1 || c2". Since we've shrunk the set of control flows which lead to
984  // our convergent instruction, the transformation is unsafe.
985  if (MI.isNotDuplicable() || MI.isConvergent())
986  BBI.CannotBeCopied = true;
987 
988  bool isPredicated = TII->isPredicated(MI);
989  bool isCondBr = BBI.IsBrAnalyzable && MI.isConditionalBranch();
990 
991  if (BranchUnpredicable && MI.isBranch()) {
992  BBI.IsUnpredicable = true;
993  return;
994  }
995 
996  // A conditional branch is not predicable, but it may be eliminated.
997  if (isCondBr)
998  continue;
999 
1000  if (!isPredicated) {
1001  BBI.NonPredSize++;
1002  unsigned ExtraPredCost = TII->getPredicationCost(MI);
1003  unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false);
1004  if (NumCycles > 1)
1005  BBI.ExtraCost += NumCycles-1;
1006  BBI.ExtraCost2 += ExtraPredCost;
1007  } else if (!AlreadyPredicated) {
1008  // FIXME: This instruction is already predicated before the
1009  // if-conversion pass. It's probably something like a conditional move.
1010  // Mark this block unpredicable for now.
1011  BBI.IsUnpredicable = true;
1012  return;
1013  }
1014 
1015  if (BBI.ClobbersPred && !isPredicated) {
1016  // Predicate modification instruction should end the block (except for
1017  // already predicated instructions and end of block branches).
1018  // Predicate may have been modified, the subsequent (currently)
1019  // unpredicated instructions cannot be correctly predicated.
1020  BBI.IsUnpredicable = true;
1021  return;
1022  }
1023 
1024  // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
1025  // still potentially predicable.
1026  std::vector<MachineOperand> PredDefs;
1027  if (TII->DefinesPredicate(MI, PredDefs))
1028  BBI.ClobbersPred = true;
1029 
1030  if (!TII->isPredicable(MI)) {
1031  BBI.IsUnpredicable = true;
1032  return;
1033  }
1034  }
1035 }
1036 
1037 /// Determine if the block is a suitable candidate to be predicated by the
1038 /// specified predicate.
1039 /// @param BBI BBInfo for the block to check
1040 /// @param Pred Predicate array for the branch that leads to BBI
1041 /// @param isTriangle true if the Analysis is for a triangle
1042 /// @param RevBranch true if Reverse(Pred) leads to BBI (e.g. BBI is the false
1043 /// case
1044 /// @param hasCommonTail true if BBI shares a tail with a sibling block that
1045 /// contains any instruction that would make the block unpredicable.
1046 bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
1048  bool isTriangle, bool RevBranch,
1049  bool hasCommonTail) {
1050  // If the block is dead or unpredicable, then it cannot be predicated.
1051  // Two blocks may share a common unpredicable tail, but this doesn't prevent
1052  // them from being if-converted. The non-shared portion is assumed to have
1053  // been checked
1054  if (BBI.IsDone || (BBI.IsUnpredicable && !hasCommonTail))
1055  return false;
1056 
1057  // If it is already predicated but we couldn't analyze its terminator, the
1058  // latter might fallthrough, but we can't determine where to.
1059  // Conservatively avoid if-converting again.
1060  if (BBI.Predicate.size() && !BBI.IsBrAnalyzable)
1061  return false;
1062 
1063  // If it is already predicated, check if the new predicate subsumes
1064  // its predicate.
1065  if (BBI.Predicate.size() && !TII->SubsumesPredicate(Pred, BBI.Predicate))
1066  return false;
1067 
1068  if (!hasCommonTail && BBI.BrCond.size()) {
1069  if (!isTriangle)
1070  return false;
1071 
1072  // Test predicate subsumption.
1073  SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
1074  SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1075  if (RevBranch) {
1076  if (TII->reverseBranchCondition(Cond))
1077  return false;
1078  }
1079  if (TII->reverseBranchCondition(RevPred) ||
1080  !TII->SubsumesPredicate(Cond, RevPred))
1081  return false;
1082  }
1083 
1084  return true;
1085 }
1086 
1087 /// Analyze the structure of the sub-CFG starting from the specified block.
1088 /// Record its successors and whether it looks like an if-conversion candidate.
1089 void IfConverter::AnalyzeBlock(
1090  MachineBasicBlock &MBB, std::vector<std::unique_ptr<IfcvtToken>> &Tokens) {
1091  struct BBState {
1092  BBState(MachineBasicBlock &MBB) : MBB(&MBB), SuccsAnalyzed(false) {}
1093  MachineBasicBlock *MBB;
1094 
1095  /// This flag is true if MBB's successors have been analyzed.
1096  bool SuccsAnalyzed;
1097  };
1098 
1099  // Push MBB to the stack.
1100  SmallVector<BBState, 16> BBStack(1, MBB);
1101 
1102  while (!BBStack.empty()) {
1103  BBState &State = BBStack.back();
1104  MachineBasicBlock *BB = State.MBB;
1105  BBInfo &BBI = BBAnalysis[BB->getNumber()];
1106 
1107  if (!State.SuccsAnalyzed) {
1108  if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed) {
1109  BBStack.pop_back();
1110  continue;
1111  }
1112 
1113  BBI.BB = BB;
1114  BBI.IsBeingAnalyzed = true;
1115 
1116  AnalyzeBranches(BBI);
1117  MachineBasicBlock::iterator Begin = BBI.BB->begin();
1118  MachineBasicBlock::iterator End = BBI.BB->end();
1119  ScanInstructions(BBI, Begin, End);
1120 
1121  // Unanalyzable or ends with fallthrough or unconditional branch, or if is
1122  // not considered for ifcvt anymore.
1123  if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
1124  BBI.IsBeingAnalyzed = false;
1125  BBI.IsAnalyzed = true;
1126  BBStack.pop_back();
1127  continue;
1128  }
1129 
1130  // Do not ifcvt if either path is a back edge to the entry block.
1131  if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
1132  BBI.IsBeingAnalyzed = false;
1133  BBI.IsAnalyzed = true;
1134  BBStack.pop_back();
1135  continue;
1136  }
1137 
1138  // Do not ifcvt if true and false fallthrough blocks are the same.
1139  if (!BBI.FalseBB) {
1140  BBI.IsBeingAnalyzed = false;
1141  BBI.IsAnalyzed = true;
1142  BBStack.pop_back();
1143  continue;
1144  }
1145 
1146  // Push the False and True blocks to the stack.
1147  State.SuccsAnalyzed = true;
1148  BBStack.push_back(*BBI.FalseBB);
1149  BBStack.push_back(*BBI.TrueBB);
1150  continue;
1151  }
1152 
1153  BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1154  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1155 
1156  if (TrueBBI.IsDone && FalseBBI.IsDone) {
1157  BBI.IsBeingAnalyzed = false;
1158  BBI.IsAnalyzed = true;
1159  BBStack.pop_back();
1160  continue;
1161  }
1162 
1164  RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1165  bool CanRevCond = !TII->reverseBranchCondition(RevCond);
1166 
1167  unsigned Dups = 0;
1168  unsigned Dups2 = 0;
1169  bool TNeedSub = !TrueBBI.Predicate.empty();
1170  bool FNeedSub = !FalseBBI.Predicate.empty();
1171  bool Enqueued = false;
1172 
1173  BranchProbability Prediction = MBPI->getEdgeProbability(BB, TrueBBI.BB);
1174 
1175  if (CanRevCond) {
1176  BBInfo TrueBBICalc, FalseBBICalc;
1177  auto feasibleDiamond = [&]() {
1178  bool MeetsSize = MeetIfcvtSizeLimit(
1179  *TrueBBI.BB, (TrueBBICalc.NonPredSize - (Dups + Dups2) +
1180  TrueBBICalc.ExtraCost), TrueBBICalc.ExtraCost2,
1181  *FalseBBI.BB, (FalseBBICalc.NonPredSize - (Dups + Dups2) +
1182  FalseBBICalc.ExtraCost), FalseBBICalc.ExtraCost2,
1183  Prediction);
1184  bool TrueFeasible = FeasibilityAnalysis(TrueBBI, BBI.BrCond,
1185  /* IsTriangle */ false, /* RevCond */ false,
1186  /* hasCommonTail */ true);
1187  bool FalseFeasible = FeasibilityAnalysis(FalseBBI, RevCond,
1188  /* IsTriangle */ false, /* RevCond */ false,
1189  /* hasCommonTail */ true);
1190  return MeetsSize && TrueFeasible && FalseFeasible;
1191  };
1192 
1193  if (ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2,
1194  TrueBBICalc, FalseBBICalc)) {
1195  if (feasibleDiamond()) {
1196  // Diamond:
1197  // EBB
1198  // / \_
1199  // | |
1200  // TBB FBB
1201  // \ /
1202  // TailBB
1203  // Note TailBB can be empty.
1204  Tokens.push_back(llvm::make_unique<IfcvtToken>(
1205  BBI, ICDiamond, TNeedSub | FNeedSub, Dups, Dups2,
1206  (bool) TrueBBICalc.ClobbersPred, (bool) FalseBBICalc.ClobbersPred));
1207  Enqueued = true;
1208  }
1209  } else if (ValidForkedDiamond(TrueBBI, FalseBBI, Dups, Dups2,
1210  TrueBBICalc, FalseBBICalc)) {
1211  if (feasibleDiamond()) {
1212  // ForkedDiamond:
1213  // if TBB and FBB have a common tail that includes their conditional
1214  // branch instructions, then we can If Convert this pattern.
1215  // EBB
1216  // _/ \_
1217  // | |
1218  // TBB FBB
1219  // / \ / \
1220  // FalseBB TrueBB FalseBB
1221  //
1222  Tokens.push_back(llvm::make_unique<IfcvtToken>(
1223  BBI, ICForkedDiamond, TNeedSub | FNeedSub, Dups, Dups2,
1224  (bool) TrueBBICalc.ClobbersPred, (bool) FalseBBICalc.ClobbersPred));
1225  Enqueued = true;
1226  }
1227  }
1228  }
1229 
1230  if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
1231  MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
1232  TrueBBI.ExtraCost2, Prediction) &&
1233  FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
1234  // Triangle:
1235  // EBB
1236  // | \_
1237  // | |
1238  // | TBB
1239  // | /
1240  // FBB
1241  Tokens.push_back(
1242  llvm::make_unique<IfcvtToken>(BBI, ICTriangle, TNeedSub, Dups));
1243  Enqueued = true;
1244  }
1245 
1246  if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
1247  MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
1248  TrueBBI.ExtraCost2, Prediction) &&
1249  FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
1250  Tokens.push_back(
1251  llvm::make_unique<IfcvtToken>(BBI, ICTriangleRev, TNeedSub, Dups));
1252  Enqueued = true;
1253  }
1254 
1255  if (ValidSimple(TrueBBI, Dups, Prediction) &&
1256  MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
1257  TrueBBI.ExtraCost2, Prediction) &&
1258  FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
1259  // Simple (split, no rejoin):
1260  // EBB
1261  // | \_
1262  // | |
1263  // | TBB---> exit
1264  // |
1265  // FBB
1266  Tokens.push_back(
1267  llvm::make_unique<IfcvtToken>(BBI, ICSimple, TNeedSub, Dups));
1268  Enqueued = true;
1269  }
1270 
1271  if (CanRevCond) {
1272  // Try the other path...
1273  if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
1274  Prediction.getCompl()) &&
1275  MeetIfcvtSizeLimit(*FalseBBI.BB,
1276  FalseBBI.NonPredSize + FalseBBI.ExtraCost,
1277  FalseBBI.ExtraCost2, Prediction.getCompl()) &&
1278  FeasibilityAnalysis(FalseBBI, RevCond, true)) {
1279  Tokens.push_back(llvm::make_unique<IfcvtToken>(BBI, ICTriangleFalse,
1280  FNeedSub, Dups));
1281  Enqueued = true;
1282  }
1283 
1284  if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
1285  Prediction.getCompl()) &&
1286  MeetIfcvtSizeLimit(*FalseBBI.BB,
1287  FalseBBI.NonPredSize + FalseBBI.ExtraCost,
1288  FalseBBI.ExtraCost2, Prediction.getCompl()) &&
1289  FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
1290  Tokens.push_back(
1291  llvm::make_unique<IfcvtToken>(BBI, ICTriangleFRev, FNeedSub, Dups));
1292  Enqueued = true;
1293  }
1294 
1295  if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
1296  MeetIfcvtSizeLimit(*FalseBBI.BB,
1297  FalseBBI.NonPredSize + FalseBBI.ExtraCost,
1298  FalseBBI.ExtraCost2, Prediction.getCompl()) &&
1299  FeasibilityAnalysis(FalseBBI, RevCond)) {
1300  Tokens.push_back(
1301  llvm::make_unique<IfcvtToken>(BBI, ICSimpleFalse, FNeedSub, Dups));
1302  Enqueued = true;
1303  }
1304  }
1305 
1306  BBI.IsEnqueued = Enqueued;
1307  BBI.IsBeingAnalyzed = false;
1308  BBI.IsAnalyzed = true;
1309  BBStack.pop_back();
1310  }
1311 }
1312 
1313 /// Analyze all blocks and find entries for all if-conversion candidates.
1314 void IfConverter::AnalyzeBlocks(
1315  MachineFunction &MF, std::vector<std::unique_ptr<IfcvtToken>> &Tokens) {
1316  for (MachineBasicBlock &MBB : MF)
1317  AnalyzeBlock(MBB, Tokens);
1318 
1319  // Sort to favor more complex ifcvt scheme.
1320  std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
1321 }
1322 
1323 /// Returns true either if ToMBB is the next block after MBB or that all the
1324 /// intervening blocks are empty (given MBB can fall through to its next block).
1327  MachineFunction::iterator I = std::next(PI);
1330  while (I != TI) {
1331  // Check isSuccessor to avoid case where the next block is empty, but
1332  // it's not a successor.
1333  if (I == E || !I->empty() || !PI->isSuccessor(&*I))
1334  return false;
1335  PI = I++;
1336  }
1337  // Finally see if the last I is indeed a successor to PI.
1338  return PI->isSuccessor(&*I);
1339 }
1340 
1341 /// Invalidate predecessor BB info so it would be re-analyzed to determine if it
1342 /// can be if-converted. If predecessor is already enqueued, dequeue it!
1343 void IfConverter::InvalidatePreds(MachineBasicBlock &MBB) {
1344  for (const MachineBasicBlock *Predecessor : MBB.predecessors()) {
1345  BBInfo &PBBI = BBAnalysis[Predecessor->getNumber()];
1346  if (PBBI.IsDone || PBBI.BB == &MBB)
1347  continue;
1348  PBBI.IsAnalyzed = false;
1349  PBBI.IsEnqueued = false;
1350  }
1351 }
1352 
1353 /// Inserts an unconditional branch from \p MBB to \p ToMBB.
1355  const TargetInstrInfo *TII) {
1356  DebugLoc dl; // FIXME: this is nowhere
1358  TII->insertBranch(MBB, &ToMBB, nullptr, NoCond, dl);
1359 }
1360 
1361 /// Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all
1362 /// values defined in MI which are also live/used by MI.
1364  const TargetRegisterInfo *TRI = MI.getMF()->getSubtarget().getRegisterInfo();
1365 
1366  // Before stepping forward past MI, remember which regs were live
1367  // before MI. This is needed to set the Undef flag only when reg is
1368  // dead.
1369  SparseSet<unsigned> LiveBeforeMI;
1370  LiveBeforeMI.setUniverse(TRI->getNumRegs());
1371  for (unsigned Reg : Redefs)
1372  LiveBeforeMI.insert(Reg);
1373 
1375  Redefs.stepForward(MI, Clobbers);
1376 
1377  // Now add the implicit uses for each of the clobbered values.
1378  for (auto Clobber : Clobbers) {
1379  // FIXME: Const cast here is nasty, but better than making StepForward
1380  // take a mutable instruction instead of const.
1381  unsigned Reg = Clobber.first;
1382  MachineOperand &Op = const_cast<MachineOperand&>(*Clobber.second);
1383  MachineInstr *OpMI = Op.getParent();
1384  MachineInstrBuilder MIB(*OpMI->getMF(), OpMI);
1385  if (Op.isRegMask()) {
1386  // First handle regmasks. They clobber any entries in the mask which
1387  // means that we need a def for those registers.
1388  if (LiveBeforeMI.count(Reg))
1389  MIB.addReg(Reg, RegState::Implicit);
1390 
1391  // We also need to add an implicit def of this register for the later
1392  // use to read from.
1393  // For the register allocator to have allocated a register clobbered
1394  // by the call which is used later, it must be the case that
1395  // the call doesn't return.
1397  continue;
1398  }
1399  if (LiveBeforeMI.count(Reg))
1400  MIB.addReg(Reg, RegState::Implicit);
1401  else {
1402  bool HasLiveSubReg = false;
1403  for (MCSubRegIterator S(Reg, TRI); S.isValid(); ++S) {
1404  if (!LiveBeforeMI.count(*S))
1405  continue;
1406  HasLiveSubReg = true;
1407  break;
1408  }
1409  if (HasLiveSubReg)
1410  MIB.addReg(Reg, RegState::Implicit);
1411  }
1412  }
1413 }
1414 
1415 /// If convert a simple (split, no rejoin) sub-CFG.
1416 bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1417  BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1418  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1419  BBInfo *CvtBBI = &TrueBBI;
1420  BBInfo *NextBBI = &FalseBBI;
1421 
1422  SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1423  if (Kind == ICSimpleFalse)
1424  std::swap(CvtBBI, NextBBI);
1425 
1426  MachineBasicBlock &CvtMBB = *CvtBBI->BB;
1427  MachineBasicBlock &NextMBB = *NextBBI->BB;
1428  if (CvtBBI->IsDone ||
1429  (CvtBBI->CannotBeCopied && CvtMBB.pred_size() > 1)) {
1430  // Something has changed. It's no longer safe to predicate this block.
1431  BBI.IsAnalyzed = false;
1432  CvtBBI->IsAnalyzed = false;
1433  return false;
1434  }
1435 
1436  if (CvtMBB.hasAddressTaken())
1437  // Conservatively abort if-conversion if BB's address is taken.
1438  return false;
1439 
1440  if (Kind == ICSimpleFalse)
1441  if (TII->reverseBranchCondition(Cond))
1442  llvm_unreachable("Unable to reverse branch condition!");
1443 
1444  Redefs.init(*TRI);
1445 
1446  if (MRI->tracksLiveness()) {
1447  // Initialize liveins to the first BB. These are potentiall redefined by
1448  // predicated instructions.
1449  Redefs.addLiveIns(CvtMBB);
1450  Redefs.addLiveIns(NextMBB);
1451  }
1452 
1453  // Remove the branches from the entry so we can add the contents of the true
1454  // block to it.
1455  BBI.NonPredSize -= TII->removeBranch(*BBI.BB);
1456 
1457  if (CvtMBB.pred_size() > 1) {
1458  // Copy instructions in the true block, predicate them, and add them to
1459  // the entry block.
1460  CopyAndPredicateBlock(BBI, *CvtBBI, Cond);
1461 
1462  // Keep the CFG updated.
1463  BBI.BB->removeSuccessor(&CvtMBB, true);
1464  } else {
1465  // Predicate the instructions in the true block.
1466  PredicateBlock(*CvtBBI, CvtMBB.end(), Cond);
1467 
1468  // Merge converted block into entry block. The BB to Cvt edge is removed
1469  // by MergeBlocks.
1470  MergeBlocks(BBI, *CvtBBI);
1471  }
1472 
1473  bool IterIfcvt = true;
1474  if (!canFallThroughTo(*BBI.BB, NextMBB)) {
1475  InsertUncondBranch(*BBI.BB, NextMBB, TII);
1476  BBI.HasFallThrough = false;
1477  // Now ifcvt'd block will look like this:
1478  // BB:
1479  // ...
1480  // t, f = cmp
1481  // if t op
1482  // b BBf
1483  //
1484  // We cannot further ifcvt this block because the unconditional branch
1485  // will have to be predicated on the new condition, that will not be
1486  // available if cmp executes.
1487  IterIfcvt = false;
1488  }
1489 
1490  // Update block info. BB can be iteratively if-converted.
1491  if (!IterIfcvt)
1492  BBI.IsDone = true;
1493  InvalidatePreds(*BBI.BB);
1494  CvtBBI->IsDone = true;
1495 
1496  // FIXME: Must maintain LiveIns.
1497  return true;
1498 }
1499 
1500 /// If convert a triangle sub-CFG.
1501 bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1502  BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1503  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1504  BBInfo *CvtBBI = &TrueBBI;
1505  BBInfo *NextBBI = &FalseBBI;
1506  DebugLoc dl; // FIXME: this is nowhere
1507 
1508  SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1509  if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1510  std::swap(CvtBBI, NextBBI);
1511 
1512  MachineBasicBlock &CvtMBB = *CvtBBI->BB;
1513  MachineBasicBlock &NextMBB = *NextBBI->BB;
1514  if (CvtBBI->IsDone ||
1515  (CvtBBI->CannotBeCopied && CvtMBB.pred_size() > 1)) {
1516  // Something has changed. It's no longer safe to predicate this block.
1517  BBI.IsAnalyzed = false;
1518  CvtBBI->IsAnalyzed = false;
1519  return false;
1520  }
1521 
1522  if (CvtMBB.hasAddressTaken())
1523  // Conservatively abort if-conversion if BB's address is taken.
1524  return false;
1525 
1526  if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1527  if (TII->reverseBranchCondition(Cond))
1528  llvm_unreachable("Unable to reverse branch condition!");
1529 
1530  if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1531  if (reverseBranchCondition(*CvtBBI)) {
1532  // BB has been changed, modify its predecessors (except for this
1533  // one) so they don't get ifcvt'ed based on bad intel.
1534  for (MachineBasicBlock *PBB : CvtMBB.predecessors()) {
1535  if (PBB == BBI.BB)
1536  continue;
1537  BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1538  if (PBBI.IsEnqueued) {
1539  PBBI.IsAnalyzed = false;
1540  PBBI.IsEnqueued = false;
1541  }
1542  }
1543  }
1544  }
1545 
1546  // Initialize liveins to the first BB. These are potentially redefined by
1547  // predicated instructions.
1548  Redefs.init(*TRI);
1549  if (MRI->tracksLiveness()) {
1550  Redefs.addLiveIns(CvtMBB);
1551  Redefs.addLiveIns(NextMBB);
1552  }
1553 
1554  bool HasEarlyExit = CvtBBI->FalseBB != nullptr;
1555  BranchProbability CvtNext, CvtFalse, BBNext, BBCvt;
1556 
1557  if (HasEarlyExit) {
1558  // Get probabilities before modifying CvtMBB and BBI.BB.
1559  CvtNext = MBPI->getEdgeProbability(&CvtMBB, &NextMBB);
1560  CvtFalse = MBPI->getEdgeProbability(&CvtMBB, CvtBBI->FalseBB);
1561  BBNext = MBPI->getEdgeProbability(BBI.BB, &NextMBB);
1562  BBCvt = MBPI->getEdgeProbability(BBI.BB, &CvtMBB);
1563  }
1564 
1565  // Remove the branches from the entry so we can add the contents of the true
1566  // block to it.
1567  BBI.NonPredSize -= TII->removeBranch(*BBI.BB);
1568 
1569  if (CvtMBB.pred_size() > 1) {
1570  // Copy instructions in the true block, predicate them, and add them to
1571  // the entry block.
1572  CopyAndPredicateBlock(BBI, *CvtBBI, Cond, true);
1573  } else {
1574  // Predicate the 'true' block after removing its branch.
1575  CvtBBI->NonPredSize -= TII->removeBranch(CvtMBB);
1576  PredicateBlock(*CvtBBI, CvtMBB.end(), Cond);
1577 
1578  // Now merge the entry of the triangle with the true block.
1579  MergeBlocks(BBI, *CvtBBI, false);
1580  }
1581 
1582  // Keep the CFG updated.
1583  BBI.BB->removeSuccessor(&CvtMBB, true);
1584 
1585  // If 'true' block has a 'false' successor, add an exit branch to it.
1586  if (HasEarlyExit) {
1587  SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1588  CvtBBI->BrCond.end());
1589  if (TII->reverseBranchCondition(RevCond))
1590  llvm_unreachable("Unable to reverse branch condition!");
1591 
1592  // Update the edge probability for both CvtBBI->FalseBB and NextBBI.
1593  // NewNext = New_Prob(BBI.BB, NextMBB) =
1594  // Prob(BBI.BB, NextMBB) +
1595  // Prob(BBI.BB, CvtMBB) * Prob(CvtMBB, NextMBB)
1596  // NewFalse = New_Prob(BBI.BB, CvtBBI->FalseBB) =
1597  // Prob(BBI.BB, CvtMBB) * Prob(CvtMBB, CvtBBI->FalseBB)
1598  auto NewTrueBB = getNextBlock(*BBI.BB);
1599  auto NewNext = BBNext + BBCvt * CvtNext;
1600  auto NewTrueBBIter = find(BBI.BB->successors(), NewTrueBB);
1601  if (NewTrueBBIter != BBI.BB->succ_end())
1602  BBI.BB->setSuccProbability(NewTrueBBIter, NewNext);
1603 
1604  auto NewFalse = BBCvt * CvtFalse;
1605  TII->insertBranch(*BBI.BB, CvtBBI->FalseBB, nullptr, RevCond, dl);
1606  BBI.BB->addSuccessor(CvtBBI->FalseBB, NewFalse);
1607  }
1608 
1609  // Merge in the 'false' block if the 'false' block has no other
1610  // predecessors. Otherwise, add an unconditional branch to 'false'.
1611  bool FalseBBDead = false;
1612  bool IterIfcvt = true;
1613  bool isFallThrough = canFallThroughTo(*BBI.BB, NextMBB);
1614  if (!isFallThrough) {
1615  // Only merge them if the true block does not fallthrough to the false
1616  // block. By not merging them, we make it possible to iteratively
1617  // ifcvt the blocks.
1618  if (!HasEarlyExit &&
1619  NextMBB.pred_size() == 1 && !NextBBI->HasFallThrough &&
1620  !NextMBB.hasAddressTaken()) {
1621  MergeBlocks(BBI, *NextBBI);
1622  FalseBBDead = true;
1623  } else {
1624  InsertUncondBranch(*BBI.BB, NextMBB, TII);
1625  BBI.HasFallThrough = false;
1626  }
1627  // Mixed predicated and unpredicated code. This cannot be iteratively
1628  // predicated.
1629  IterIfcvt = false;
1630  }
1631 
1632  // Update block info. BB can be iteratively if-converted.
1633  if (!IterIfcvt)
1634  BBI.IsDone = true;
1635  InvalidatePreds(*BBI.BB);
1636  CvtBBI->IsDone = true;
1637  if (FalseBBDead)
1638  NextBBI->IsDone = true;
1639 
1640  // FIXME: Must maintain LiveIns.
1641  return true;
1642 }
1643 
1644 /// Common code shared between diamond conversions.
1645 /// \p BBI, \p TrueBBI, and \p FalseBBI form the diamond shape.
1646 /// \p NumDups1 - number of shared instructions at the beginning of \p TrueBBI
1647 /// and FalseBBI
1648 /// \p NumDups2 - number of shared instructions at the end of \p TrueBBI
1649 /// and \p FalseBBI
1650 /// \p RemoveBranch - Remove the common branch of the two blocks before
1651 /// predicating. Only false for unanalyzable fallthrough
1652 /// cases. The caller will replace the branch if necessary.
1653 /// \p MergeAddEdges - Add successor edges when merging blocks. Only false for
1654 /// unanalyzable fallthrough
1655 bool IfConverter::IfConvertDiamondCommon(
1656  BBInfo &BBI, BBInfo &TrueBBI, BBInfo &FalseBBI,
1657  unsigned NumDups1, unsigned NumDups2,
1658  bool TClobbersPred, bool FClobbersPred,
1659  bool RemoveBranch, bool MergeAddEdges) {
1660 
1661  if (TrueBBI.IsDone || FalseBBI.IsDone ||
1662  TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1) {
1663  // Something has changed. It's no longer safe to predicate these blocks.
1664  BBI.IsAnalyzed = false;
1665  TrueBBI.IsAnalyzed = false;
1666  FalseBBI.IsAnalyzed = false;
1667  return false;
1668  }
1669 
1670  if (TrueBBI.BB->hasAddressTaken() || FalseBBI.BB->hasAddressTaken())
1671  // Conservatively abort if-conversion if either BB has its address taken.
1672  return false;
1673 
1674  // Put the predicated instructions from the 'true' block before the
1675  // instructions from the 'false' block, unless the true block would clobber
1676  // the predicate, in which case, do the opposite.
1677  BBInfo *BBI1 = &TrueBBI;
1678  BBInfo *BBI2 = &FalseBBI;
1679  SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1680  if (TII->reverseBranchCondition(RevCond))
1681  llvm_unreachable("Unable to reverse branch condition!");
1682  SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1683  SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1684 
1685  // Figure out the more profitable ordering.
1686  bool DoSwap = false;
1687  if (TClobbersPred && !FClobbersPred)
1688  DoSwap = true;
1689  else if (!TClobbersPred && !FClobbersPred) {
1690  if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1691  DoSwap = true;
1692  } else if (TClobbersPred && FClobbersPred)
1693  llvm_unreachable("Predicate info cannot be clobbered by both sides.");
1694  if (DoSwap) {
1695  std::swap(BBI1, BBI2);
1696  std::swap(Cond1, Cond2);
1697  }
1698 
1699  // Remove the conditional branch from entry to the blocks.
1700  BBI.NonPredSize -= TII->removeBranch(*BBI.BB);
1701 
1702  MachineBasicBlock &MBB1 = *BBI1->BB;
1703  MachineBasicBlock &MBB2 = *BBI2->BB;
1704 
1705  // Initialize the Redefs:
1706  // - BB2 live-in regs need implicit uses before being redefined by BB1
1707  // instructions.
1708  // - BB1 live-out regs need implicit uses before being redefined by BB2
1709  // instructions. We start with BB1 live-ins so we have the live-out regs
1710  // after tracking the BB1 instructions.
1711  Redefs.init(*TRI);
1712  if (MRI->tracksLiveness()) {
1713  Redefs.addLiveIns(MBB1);
1714  Redefs.addLiveIns(MBB2);
1715  }
1716 
1717  // Remove the duplicated instructions at the beginnings of both paths.
1718  // Skip dbg_value instructions
1721  BBI1->NonPredSize -= NumDups1;
1722  BBI2->NonPredSize -= NumDups1;
1723 
1724  // Skip past the dups on each side separately since there may be
1725  // differing dbg_value entries.
1726  for (unsigned i = 0; i < NumDups1; ++DI1) {
1727  if (!DI1->isDebugValue())
1728  ++i;
1729  }
1730  while (NumDups1 != 0) {
1731  ++DI2;
1732  if (!DI2->isDebugValue())
1733  --NumDups1;
1734  }
1735 
1736  if (MRI->tracksLiveness()) {
1737  for (const MachineInstr &MI : make_range(MBB1.begin(), DI1)) {
1739  Redefs.stepForward(MI, Dummy);
1740  }
1741  }
1742  BBI.BB->splice(BBI.BB->end(), &MBB1, MBB1.begin(), DI1);
1743  MBB2.erase(MBB2.begin(), DI2);
1744 
1745  // The branches have been checked to match, so it is safe to remove the branch
1746  // in BB1 and rely on the copy in BB2
1747 #ifndef NDEBUG
1748  // Unanalyzable branches must match exactly. Check that now.
1749  if (!BBI1->IsBrAnalyzable)
1750  verifySameBranchInstructions(&MBB1, &MBB2);
1751 #endif
1752  BBI1->NonPredSize -= TII->removeBranch(*BBI1->BB);
1753  // Remove duplicated instructions.
1754  DI1 = MBB1.end();
1755  for (unsigned i = 0; i != NumDups2; ) {
1756  // NumDups2 only counted non-dbg_value instructions, so this won't
1757  // run off the head of the list.
1758  assert(DI1 != MBB1.begin());
1759  --DI1;
1760  // skip dbg_value instructions
1761  if (!DI1->isDebugValue())
1762  ++i;
1763  }
1764  MBB1.erase(DI1, MBB1.end());
1765 
1766  DI2 = BBI2->BB->end();
1767  // The branches have been checked to match. Skip over the branch in the false
1768  // block so that we don't try to predicate it.
1769  if (RemoveBranch)
1770  BBI2->NonPredSize -= TII->removeBranch(*BBI2->BB);
1771  else {
1772  do {
1773  assert(DI2 != MBB2.begin());
1774  DI2--;
1775  } while (DI2->isBranch() || DI2->isDebugValue());
1776  DI2++;
1777  }
1778  while (NumDups2 != 0) {
1779  // NumDups2 only counted non-dbg_value instructions, so this won't
1780  // run off the head of the list.
1781  assert(DI2 != MBB2.begin());
1782  --DI2;
1783  // skip dbg_value instructions
1784  if (!DI2->isDebugValue())
1785  --NumDups2;
1786  }
1787 
1788  // Remember which registers would later be defined by the false block.
1789  // This allows us not to predicate instructions in the true block that would
1790  // later be re-defined. That is, rather than
1791  // subeq r0, r1, #1
1792  // addne r0, r1, #1
1793  // generate:
1794  // sub r0, r1, #1
1795  // addne r0, r1, #1
1796  SmallSet<unsigned, 4> RedefsByFalse;
1797  SmallSet<unsigned, 4> ExtUses;
1798  if (TII->isProfitableToUnpredicate(MBB1, MBB2)) {
1799  for (const MachineInstr &FI : make_range(MBB2.begin(), DI2)) {
1800  if (FI.isDebugValue())
1801  continue;
1803  for (const MachineOperand &MO : FI.operands()) {
1804  if (!MO.isReg())
1805  continue;
1806  unsigned Reg = MO.getReg();
1807  if (!Reg)
1808  continue;
1809  if (MO.isDef()) {
1810  Defs.push_back(Reg);
1811  } else if (!RedefsByFalse.count(Reg)) {
1812  // These are defined before ctrl flow reach the 'false' instructions.
1813  // They cannot be modified by the 'true' instructions.
1814  for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1815  SubRegs.isValid(); ++SubRegs)
1816  ExtUses.insert(*SubRegs);
1817  }
1818  }
1819 
1820  for (unsigned Reg : Defs) {
1821  if (!ExtUses.count(Reg)) {
1822  for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
1823  SubRegs.isValid(); ++SubRegs)
1824  RedefsByFalse.insert(*SubRegs);
1825  }
1826  }
1827  }
1828  }
1829 
1830  // Predicate the 'true' block.
1831  PredicateBlock(*BBI1, MBB1.end(), *Cond1, &RedefsByFalse);
1832 
1833  // After predicating BBI1, if there is a predicated terminator in BBI1 and
1834  // a non-predicated in BBI2, then we don't want to predicate the one from
1835  // BBI2. The reason is that if we merged these blocks, we would end up with
1836  // two predicated terminators in the same block.
1837  if (!MBB2.empty() && (DI2 == MBB2.end())) {
1840  if (BBI1T != MBB1.end() && TII->isPredicated(*BBI1T) &&
1841  BBI2T != MBB2.end() && !TII->isPredicated(*BBI2T))
1842  --DI2;
1843  }
1844 
1845  // Predicate the 'false' block.
1846  PredicateBlock(*BBI2, DI2, *Cond2);
1847 
1848  // Merge the true block into the entry of the diamond.
1849  MergeBlocks(BBI, *BBI1, MergeAddEdges);
1850  MergeBlocks(BBI, *BBI2, MergeAddEdges);
1851  return true;
1852 }
1853 
1854 /// If convert an almost-diamond sub-CFG where the true
1855 /// and false blocks share a common tail.
1856 bool IfConverter::IfConvertForkedDiamond(
1857  BBInfo &BBI, IfcvtKind Kind,
1858  unsigned NumDups1, unsigned NumDups2,
1859  bool TClobbersPred, bool FClobbersPred) {
1860  BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1861  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1862 
1863  // Save the debug location for later.
1864  DebugLoc dl;
1865  MachineBasicBlock::iterator TIE = TrueBBI.BB->getFirstTerminator();
1866  if (TIE != TrueBBI.BB->end())
1867  dl = TIE->getDebugLoc();
1868  // Removing branches from both blocks is safe, because we have already
1869  // determined that both blocks have the same branch instructions. The branch
1870  // will be added back at the end, unpredicated.
1871  if (!IfConvertDiamondCommon(
1872  BBI, TrueBBI, FalseBBI,
1873  NumDups1, NumDups2,
1874  TClobbersPred, FClobbersPred,
1875  /* RemoveBranch */ true, /* MergeAddEdges */ true))
1876  return false;
1877 
1878  // Add back the branch.
1879  // Debug location saved above when removing the branch from BBI2
1880  TII->insertBranch(*BBI.BB, TrueBBI.TrueBB, TrueBBI.FalseBB,
1881  TrueBBI.BrCond, dl);
1882 
1883  // Update block info.
1884  BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1885  InvalidatePreds(*BBI.BB);
1886 
1887  // FIXME: Must maintain LiveIns.
1888  return true;
1889 }
1890 
1891 /// If convert a diamond sub-CFG.
1892 bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1893  unsigned NumDups1, unsigned NumDups2,
1894  bool TClobbersPred, bool FClobbersPred) {
1895  BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1896  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1897  MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1898 
1899  // True block must fall through or end with an unanalyzable terminator.
1900  if (!TailBB) {
1901  if (blockAlwaysFallThrough(TrueBBI))
1902  TailBB = FalseBBI.TrueBB;
1903  assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1904  }
1905 
1906  if (!IfConvertDiamondCommon(
1907  BBI, TrueBBI, FalseBBI,
1908  NumDups1, NumDups2,
1909  TClobbersPred, FClobbersPred,
1910  /* RemoveBranch */ TrueBBI.IsBrAnalyzable,
1911  /* MergeAddEdges */ TailBB == nullptr))
1912  return false;
1913 
1914  // If the if-converted block falls through or unconditionally branches into
1915  // the tail block, and the tail block does not have other predecessors, then
1916  // fold the tail block in as well. Otherwise, unless it falls through to the
1917  // tail, add a unconditional branch to it.
1918  if (TailBB) {
1919  // We need to remove the edges to the true and false blocks manually since
1920  // we didn't let IfConvertDiamondCommon update the CFG.
1921  BBI.BB->removeSuccessor(TrueBBI.BB);
1922  BBI.BB->removeSuccessor(FalseBBI.BB, true);
1923 
1924  BBInfo &TailBBI = BBAnalysis[TailBB->getNumber()];
1925  bool CanMergeTail = !TailBBI.HasFallThrough &&
1926  !TailBBI.BB->hasAddressTaken();
1927  // The if-converted block can still have a predicated terminator
1928  // (e.g. a predicated return). If that is the case, we cannot merge
1929  // it with the tail block.
1930  MachineBasicBlock::const_iterator TI = BBI.BB->getFirstTerminator();
1931  if (TI != BBI.BB->end() && TII->isPredicated(*TI))
1932  CanMergeTail = false;
1933  // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1934  // check if there are any other predecessors besides those.
1935  unsigned NumPreds = TailBB->pred_size();
1936  if (NumPreds > 1)
1937  CanMergeTail = false;
1938  else if (NumPreds == 1 && CanMergeTail) {
1940  if (*PI != TrueBBI.BB && *PI != FalseBBI.BB)
1941  CanMergeTail = false;
1942  }
1943  if (CanMergeTail) {
1944  MergeBlocks(BBI, TailBBI);
1945  TailBBI.IsDone = true;
1946  } else {
1947  BBI.BB->addSuccessor(TailBB, BranchProbability::getOne());
1948  InsertUncondBranch(*BBI.BB, *TailBB, TII);
1949  BBI.HasFallThrough = false;
1950  }
1951  }
1952 
1953  // Update block info.
1954  BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1955  InvalidatePreds(*BBI.BB);
1956 
1957  // FIXME: Must maintain LiveIns.
1958  return true;
1959 }
1960 
1961 static bool MaySpeculate(const MachineInstr &MI,
1962  SmallSet<unsigned, 4> &LaterRedefs) {
1963  bool SawStore = true;
1964  if (!MI.isSafeToMove(nullptr, SawStore))
1965  return false;
1966 
1967  for (const MachineOperand &MO : MI.operands()) {
1968  if (!MO.isReg())
1969  continue;
1970  unsigned Reg = MO.getReg();
1971  if (!Reg)
1972  continue;
1973  if (MO.isDef() && !LaterRedefs.count(Reg))
1974  return false;
1975  }
1976 
1977  return true;
1978 }
1979 
1980 /// Predicate instructions from the start of the block to the specified end with
1981 /// the specified condition.
1982 void IfConverter::PredicateBlock(BBInfo &BBI,
1985  SmallSet<unsigned, 4> *LaterRedefs) {
1986  bool AnyUnpred = false;
1987  bool MaySpec = LaterRedefs != nullptr;
1988  for (MachineInstr &I : make_range(BBI.BB->begin(), E)) {
1989  if (I.isDebugValue() || TII->isPredicated(I))
1990  continue;
1991  // It may be possible not to predicate an instruction if it's the 'true'
1992  // side of a diamond and the 'false' side may re-define the instruction's
1993  // defs.
1994  if (MaySpec && MaySpeculate(I, *LaterRedefs)) {
1995  AnyUnpred = true;
1996  continue;
1997  }
1998  // If any instruction is predicated, then every instruction after it must
1999  // be predicated.
2000  MaySpec = false;
2001  if (!TII->PredicateInstruction(I, Cond)) {
2002 #ifndef NDEBUG
2003  dbgs() << "Unable to predicate " << I << "!\n";
2004 #endif
2005  llvm_unreachable(nullptr);
2006  }
2007 
2008  // If the predicated instruction now redefines a register as the result of
2009  // if-conversion, add an implicit kill.
2010  UpdatePredRedefs(I, Redefs);
2011  }
2012 
2013  BBI.Predicate.append(Cond.begin(), Cond.end());
2014 
2015  BBI.IsAnalyzed = false;
2016  BBI.NonPredSize = 0;
2017 
2018  ++NumIfConvBBs;
2019  if (AnyUnpred)
2020  ++NumUnpred;
2021 }
2022 
2023 /// Copy and predicate instructions from source BB to the destination block.
2024 /// Skip end of block branches if IgnoreBr is true.
2025 void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
2027  bool IgnoreBr) {
2028  MachineFunction &MF = *ToBBI.BB->getParent();
2029 
2030  MachineBasicBlock &FromMBB = *FromBBI.BB;
2031  for (MachineInstr &I : FromMBB) {
2032  // Do not copy the end of the block branches.
2033  if (IgnoreBr && I.isBranch())
2034  break;
2035 
2037  ToBBI.BB->insert(ToBBI.BB->end(), MI);
2038  ToBBI.NonPredSize++;
2039  unsigned ExtraPredCost = TII->getPredicationCost(I);
2040  unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
2041  if (NumCycles > 1)
2042  ToBBI.ExtraCost += NumCycles-1;
2043  ToBBI.ExtraCost2 += ExtraPredCost;
2044 
2045  if (!TII->isPredicated(I) && !MI->isDebugValue()) {
2046  if (!TII->PredicateInstruction(*MI, Cond)) {
2047 #ifndef NDEBUG
2048  dbgs() << "Unable to predicate " << I << "!\n";
2049 #endif
2050  llvm_unreachable(nullptr);
2051  }
2052  }
2053 
2054  // If the predicated instruction now redefines a register as the result of
2055  // if-conversion, add an implicit kill.
2056  UpdatePredRedefs(*MI, Redefs);
2057  }
2058 
2059  if (!IgnoreBr) {
2060  std::vector<MachineBasicBlock *> Succs(FromMBB.succ_begin(),
2061  FromMBB.succ_end());
2062  MachineBasicBlock *NBB = getNextBlock(FromMBB);
2063  MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
2064 
2065  for (MachineBasicBlock *Succ : Succs) {
2066  // Fallthrough edge can't be transferred.
2067  if (Succ == FallThrough)
2068  continue;
2069  ToBBI.BB->addSuccessor(Succ);
2070  }
2071  }
2072 
2073  ToBBI.Predicate.append(FromBBI.Predicate.begin(), FromBBI.Predicate.end());
2074  ToBBI.Predicate.append(Cond.begin(), Cond.end());
2075 
2076  ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
2077  ToBBI.IsAnalyzed = false;
2078 
2079  ++NumDupBBs;
2080 }
2081 
2082 /// Move all instructions from FromBB to the end of ToBB. This will leave
2083 /// FromBB as an empty block, so remove all of its successor edges except for
2084 /// the fall-through edge. If AddEdges is true, i.e., when FromBBI's branch is
2085 /// being moved, add those successor edges to ToBBI and remove the old edge
2086 /// from ToBBI to FromBBI.
2087 void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
2088  MachineBasicBlock &FromMBB = *FromBBI.BB;
2089  assert(!FromMBB.hasAddressTaken() &&
2090  "Removing a BB whose address is taken!");
2091 
2092  // In case FromMBB contains terminators (e.g. return instruction),
2093  // first move the non-terminator instructions, then the terminators.
2095  MachineBasicBlock::iterator ToTI = ToBBI.BB->getFirstTerminator();
2096  ToBBI.BB->splice(ToTI, &FromMBB, FromMBB.begin(), FromTI);
2097 
2098  // If FromBB has non-predicated terminator we should copy it at the end.
2099  if (FromTI != FromMBB.end() && !TII->isPredicated(*FromTI))
2100  ToTI = ToBBI.BB->end();
2101  ToBBI.BB->splice(ToTI, &FromMBB, FromTI, FromMBB.end());
2102 
2103  // Force normalizing the successors' probabilities of ToBBI.BB to convert all
2104  // unknown probabilities into known ones.
2105  // FIXME: This usage is too tricky and in the future we would like to
2106  // eliminate all unknown probabilities in MBB.
2107  if (ToBBI.IsBrAnalyzable)
2108  ToBBI.BB->normalizeSuccProbs();
2109 
2110  SmallVector<MachineBasicBlock *, 4> FromSuccs(FromMBB.succ_begin(),
2111  FromMBB.succ_end());
2112  MachineBasicBlock *NBB = getNextBlock(FromMBB);
2113  MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : nullptr;
2114  // The edge probability from ToBBI.BB to FromMBB, which is only needed when
2115  // AddEdges is true and FromMBB is a successor of ToBBI.BB.
2116  auto To2FromProb = BranchProbability::getZero();
2117  if (AddEdges && ToBBI.BB->isSuccessor(&FromMBB)) {
2118  // Remove the old edge but remember the edge probability so we can calculate
2119  // the correct weights on the new edges being added further down.
2120  To2FromProb = MBPI->getEdgeProbability(ToBBI.BB, &FromMBB);
2121  ToBBI.BB->removeSuccessor(&FromMBB);
2122  }
2123 
2124  for (MachineBasicBlock *Succ : FromSuccs) {
2125  // Fallthrough edge can't be transferred.
2126  if (Succ == FallThrough)
2127  continue;
2128 
2129  auto NewProb = BranchProbability::getZero();
2130  if (AddEdges) {
2131  // Calculate the edge probability for the edge from ToBBI.BB to Succ,
2132  // which is a portion of the edge probability from FromMBB to Succ. The
2133  // portion ratio is the edge probability from ToBBI.BB to FromMBB (if
2134  // FromBBI is a successor of ToBBI.BB. See comment below for excepion).
2135  NewProb = MBPI->getEdgeProbability(&FromMBB, Succ);
2136 
2137  // To2FromProb is 0 when FromMBB is not a successor of ToBBI.BB. This
2138  // only happens when if-converting a diamond CFG and FromMBB is the
2139  // tail BB. In this case FromMBB post-dominates ToBBI.BB and hence we
2140  // could just use the probabilities on FromMBB's out-edges when adding
2141  // new successors.
2142  if (!To2FromProb.isZero())
2143  NewProb *= To2FromProb;
2144  }
2145 
2146  FromMBB.removeSuccessor(Succ);
2147 
2148  if (AddEdges) {
2149  // If the edge from ToBBI.BB to Succ already exists, update the
2150  // probability of this edge by adding NewProb to it. An example is shown
2151  // below, in which A is ToBBI.BB and B is FromMBB. In this case we
2152  // don't have to set C as A's successor as it already is. We only need to
2153  // update the edge probability on A->C. Note that B will not be
2154  // immediately removed from A's successors. It is possible that B->D is
2155  // not removed either if D is a fallthrough of B. Later the edge A->D
2156  // (generated here) and B->D will be combined into one edge. To maintain
2157  // correct edge probability of this combined edge, we need to set the edge
2158  // probability of A->B to zero, which is already done above. The edge
2159  // probability on A->D is calculated by scaling the original probability
2160  // on A->B by the probability of B->D.
2161  //
2162  // Before ifcvt: After ifcvt (assume B->D is kept):
2163  //
2164  // A A
2165  // /| /|\
2166  // / B / B|
2167  // | /| | ||
2168  // |/ | | |/
2169  // C D C D
2170  //
2171  if (ToBBI.BB->isSuccessor(Succ))
2172  ToBBI.BB->setSuccProbability(
2173  find(ToBBI.BB->successors(), Succ),
2174  MBPI->getEdgeProbability(ToBBI.BB, Succ) + NewProb);
2175  else
2176  ToBBI.BB->addSuccessor(Succ, NewProb);
2177  }
2178  }
2179 
2180  // Move the now empty FromMBB out of the way to the end of the function so
2181  // it doesn't interfere with fallthrough checks done by canFallThroughTo().
2182  MachineBasicBlock *Last = &*FromMBB.getParent()->rbegin();
2183  if (Last != &FromMBB)
2184  FromMBB.moveAfter(Last);
2185 
2186  // Normalize the probabilities of ToBBI.BB's successors with all adjustment
2187  // we've done above.
2188  if (ToBBI.IsBrAnalyzable && FromBBI.IsBrAnalyzable)
2189  ToBBI.BB->normalizeSuccProbs();
2190 
2191  ToBBI.Predicate.append(FromBBI.Predicate.begin(), FromBBI.Predicate.end());
2192  FromBBI.Predicate.clear();
2193 
2194  ToBBI.NonPredSize += FromBBI.NonPredSize;
2195  ToBBI.ExtraCost += FromBBI.ExtraCost;
2196  ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
2197  FromBBI.NonPredSize = 0;
2198  FromBBI.ExtraCost = 0;
2199  FromBBI.ExtraCost2 = 0;
2200 
2201  ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
2202  ToBBI.HasFallThrough = FromBBI.HasFallThrough;
2203  ToBBI.IsAnalyzed = false;
2204  FromBBI.IsAnalyzed = false;
2205 }
2206 
2207 FunctionPass *
2209  return new IfConverter(std::move(Ftor));
2210 }
bool isRegMask() const
isRegMask - Tests if this is a MO_RegisterMask operand.
MachineInstr * getParent()
getParent - Return the instruction that this operand belongs to.
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
BranchProbability getCompl() const
void stepForward(const MachineInstr &MI, SmallVectorImpl< std::pair< unsigned, const MachineOperand *>> &Clobbers)
Simulates liveness when stepping forward over an instruction(bundle).
const MachineFunction * getMF() const
Return the function that contains the basic block that this instruction belongs to.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
static void UpdatePredRedefs(MachineInstr &MI, LivePhysRegs &Redefs)
Behaves like LiveRegUnits::StepForward() but also adds implicit uses to all values defined in MI whic...
virtual bool DefinesPredicate(MachineInstr &MI, std::vector< MachineOperand > &Pred) const
If the specified instruction defines any predicate or condition code register(s) used for predication...
std::pair< iterator, bool > insert(const ValueT &Val)
insert - Attempts to insert a new element.
Definition: SparseSet.h:249
static cl::opt< bool > DisableDiamond("disable-ifcvt-diamond", cl::init(false), cl::Hidden)
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
static cl::opt< bool > DisableForkedDiamond("disable-ifcvt-forked-diamond", cl::init(false), cl::Hidden)
static cl::opt< bool > DisableTriangleFR("disable-ifcvt-triangle-false-rev", cl::init(false), cl::Hidden)
iterator getFirstNonDebugInstr()
Returns an iterator to the first non-debug instruction in the basic block, or end().
This provides a very simple, boring adaptor for a begin and end iterator into a range type...
iterator getFirstTerminator()
Returns an iterator to the first terminator instruction of this basic block.
void init(const MCSchedModel &sm, const TargetSubtargetInfo *sti, const TargetInstrInfo *tii)
Initialize the machine model for instruction scheduling.
virtual const TargetLowering * getTargetLowering() const
virtual unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const
Insert branch code into the end of the specified MachineBasicBlock.
MachineBlockFrequencyInfo pass uses BlockFrequencyInfoImpl implementation to estimate machine basic b...
LLVM_NODISCARD detail::scope_exit< typename std::decay< Callable >::type > make_scope_exit(Callable &&F)
Definition: ScopeExit.h:47
FunctionPass * createIfConverter(std::function< bool(const MachineFunction &)> Ftor)
STATISTIC(NumFunctions, "Total number of functions")
void moveAfter(MachineBasicBlock *NewBefore)
A debug info location.
Definition: DebugLoc.h:34
static cl::opt< bool > DisableSimple("disable-ifcvt-simple", cl::init(false), cl::Hidden)
static BranchProbability getOne()
iterator_range< mop_iterator > operands()
Definition: MachineInstr.h:332
virtual unsigned removeBranch(MachineBasicBlock &MBB, int *BytesRemoved=nullptr) const
Remove the branching code at the end of the specific MBB.
iterator_range< succ_iterator > successors()
AnalysisUsage & addRequired()
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:51
Definition: BitVector.h:920
bool OptimizeFunction(MachineFunction &MF, const TargetInstrInfo *tii, const TargetRegisterInfo *tri, MachineModuleInfo *mmi, MachineLoopInfo *mli=nullptr, bool AfterPlacement=false)
Perhaps branch folding, tail merging and other CFG optimizations on the given function.
instr_iterator erase(instr_iterator I)
Remove an instruction from the instruction list and delete it.
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
Provide an instruction scheduling machine model to CodeGen passes.
const HexagonInstrInfo * TII
size_type count(const KeyT &Key) const
count - Returns 1 if this set contains an element identified by Key, 0 otherwise. ...
Definition: SparseSet.h:235
This class consists of common code factored out of the SmallVector class to reduce code duplication b...
Definition: APFloat.h:42
Reg
All possible values of the reg field in the ModR/M byte.
void initializeIfConverterPass(PassRegistry &)
#define DEBUG_TYPE
reverse_iterator getReverse() const
Get a reverse iterator to the same node.
virtual bool isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const
Return true if it&#39;s profitable to predicate instructions with accumulated instruction latency of "Num...
int getNumber() const
MachineBasicBlocks are uniquely numbered at the function level, unless they&#39;re not in a MachineFuncti...
virtual const TargetInstrInfo * getInstrInfo() const
static MachineBasicBlock * getNextBlock(MachineBasicBlock &MBB)
Returns the next block in the function blocks ordering.
reverse_iterator rend()
reverse_iterator rbegin()
TargetInstrInfo - Interface to description of machine instruction set.
static cl::opt< bool > DisableTriangleR("disable-ifcvt-triangle-rev", cl::init(false), cl::Hidden)
Early If Converter
unsigned getNumRegs() const
Return the number of registers this target has (useful for sizing arrays holding per register informa...
initializer< Ty > init(const Ty &Val)
Definition: CommandLine.h:406
static MachineBasicBlock * findFalseBlock(MachineBasicBlock *BB, MachineBasicBlock *TrueBB)
BB has a fallthrough. Find its &#39;false&#39; successor given its &#39;true&#39; successor.
* if(!EatIfPresent(lltok::kw_thread_local)) return false
ParseOptionalThreadLocal := /*empty.
unsigned const MachineRegisterInfo * MRI
virtual unsigned getPredicationCost(const MachineInstr &MI) const
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator begin()
Definition: SmallVector.h:116
void addLiveIns(const MachineBasicBlock &MBB)
Adds all live-in registers of basic block MBB.
SmallSet - This maintains a set of unique values, optimizing for the case when the set is small (less...
Definition: SmallSet.h:36
static cl::opt< bool > DisableTriangleF("disable-ifcvt-triangle-false", cl::init(false), cl::Hidden)
void init(const TargetRegisterInfo &TRI)
(re-)initializes and clears the set.
Definition: LivePhysRegs.h:66
Represent the analysis usage information of a pass.
static bool canFallThroughTo(MachineBasicBlock &MBB, MachineBasicBlock &ToMBB)
Returns true either if ToMBB is the next block after MBB or that all the intervening blocks are empty...
static const unsigned End
FunctionPass class - This class is used to implement most global optimizations.
Definition: Pass.h:285
self_iterator getIterator()
Definition: ilist_node.h:82
std::pair< NoneType, bool > insert(const T &V)
insert - Insert an element into the set if it isn&#39;t already there.
Definition: SmallSet.h:81
void setUniverse(unsigned U)
setUniverse - Set the universe size which determines the largest key the set can hold.
Definition: SparseSet.h:155
iterator_range< pred_iterator > predecessors()
std::vector< MachineBasicBlock * >::iterator pred_iterator
virtual bool PredicateInstruction(MachineInstr &MI, ArrayRef< MachineOperand > Pred) const
Convert the instruction into a predicated instruction.
bool hasAddressTaken() const
Test whether this block is potentially the target of an indirect branch.
virtual bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify=false) const
Analyze the branching code at the end of MBB, returning true if it cannot be understood (e...
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
MCSubRegIterator enumerates all sub-registers of Reg.
This file implements the LivePhysRegs utility for tracking liveness of physical registers.
auto find(R &&Range, const T &Val) -> decltype(adl_begin(Range))
Provide wrappers to std::find which take ranges instead of having to pass begin/end explicitly...
Definition: STLExtras.h:834
virtual bool isPredicated(const MachineInstr &MI) const
Returns true if the instruction is already predicated.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This base class for TargetLowering contains the SelectionDAG-independent parts that can be used from ...
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
Iterator for intrusive lists based on ilist_node.
MachineInstr * CloneMachineInstr(const MachineInstr *Orig)
Create a new MachineInstr which is a copy of Orig, identical in all ways except the instruction has n...
bool isDebugValue() const
Definition: MachineInstr.h:816
MachineOperand class - Representation of each machine instruction operand.
This is a &#39;vector&#39; (really, a variable-sized array), optimized for the case when the array is small...
Definition: SmallVector.h:864
static cl::opt< bool > DisableTriangle("disable-ifcvt-triangle", cl::init(false), cl::Hidden)
Predicate
Predicate - These are "(BI << 5) | BO" for various predicates.
Definition: PPCPredicates.h:27
#define INITIALIZE_PASS_BEGIN(passName, arg, name, cfg, analysis)
Definition: PassSupport.h:48
virtual bool isProfitableToDupForIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, BranchProbability Probability) const
Return true if it&#39;s profitable for if-converter to duplicate instructions of specified accumulated in...
static bool MaySpeculate(const MachineInstr &MI, SmallSet< unsigned, 4 > &LaterRedefs)
static cl::opt< int > IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden)
unsigned pred_size() const
raw_ostream & dbgs()
dbgs() - This returns a reference to a raw_ostream for debugging messages.
Definition: Debug.cpp:132
void swap(llvm::BitVector &LHS, llvm::BitVector &RHS)
Implement std::swap in terms of BitVector swap.
Definition: BitVector.h:923
virtual bool isPredicable(const MachineInstr &MI) const
Return true if the specified instruction can be predicated.
bool isValid() const
isValid - returns true if this iterator is not yet at the end.
bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI)
IterT skipDebugInstructionsForward(IterT It, IterT End)
Increment It until it points to a non-debug instruction or to End and return the resulting iterator...
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
MachineFunctionProperties & set(Property P)
TargetSubtargetInfo - Generic base class for all target subtargets.
BranchProbability getEdgeProbability(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const
Representation of each machine instruction.
Definition: MachineInstr.h:59
const MachineFunction * getParent() const
Return the MachineFunction containing this basic block.
LLVM_ATTRIBUTE_ALWAYS_INLINE iterator end()
Definition: SmallVector.h:120
virtual bool SubsumesPredicate(ArrayRef< MachineOperand > Pred1, ArrayRef< MachineOperand > Pred2) const
Returns true if the first specified predicate subsumes the second, e.g.
static cl::opt< int > IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden)
A set of physical registers with utility functions to track liveness when walking backward/forward th...
Definition: LivePhysRegs.h:49
LLVM_NODISCARD bool empty() const
Definition: SmallVector.h:61
static cl::opt< bool > IfCvtBranchFold("ifcvt-branch-fold", cl::init(true), cl::Hidden)
char & IfConverterID
IfConverter - This pass performs machine code if conversion.
#define I(x, y, z)
Definition: MD5.cpp:58
static cl::opt< bool > DisableSimpleF("disable-ifcvt-simple-false", cl::init(false), cl::Hidden)
bool tracksLiveness() const
tracksLiveness - Returns true when tracking register liveness accurately.
const MachineInstrBuilder & addReg(unsigned RegNo, unsigned flags=0, unsigned SubReg=0) const
Add a new virtual register operand.
void removeSuccessor(MachineBasicBlock *Succ, bool NormalizeSuccProbs=false)
Remove successor from the successors list of this MachineBasicBlock.
const unsigned Kind
virtual bool reverseBranchCondition(SmallVectorImpl< MachineOperand > &Cond) const
Reverses the branch condition of the specified condition list, returning false on success and true if...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
static void InsertUncondBranch(MachineBasicBlock &MBB, MachineBasicBlock &ToMBB, const TargetInstrInfo *TII)
Inserts an unconditional branch from MBB to ToMBB.
constexpr char Size[]
Key for Kernel::Arg::Metadata::mSize.
#define DEBUG(X)
Definition: Debug.h:118
This class keeps track of branch frequencies of newly created blocks and tail-merged blocks...
print Print MemDeps of function
IRTranslator LLVM IR MI
static BranchProbability getZero()
void recomputeLivenessFlags(MachineBasicBlock &MBB)
Recomputes dead and kill flags in MBB.
reverse_iterator rbegin()
virtual bool isProfitableToUnpredicate(MachineBasicBlock &TMBB, MachineBasicBlock &FMBB) const
Return true if it&#39;s profitable to unpredicate one side of a &#39;diamond&#39;, i.e.
bool isSafeToMove(AliasAnalysis *AA, bool &SawStore) const
Return true if it is safe to move this instruction.
const MCSchedModel & getSchedModel() const
Get the machine model for this subtarget&#39;s CPU.
Properties which a MachineFunction may have at a given point in time.
This file describes how to lower LLVM code to machine code.
static void verifySameBranchInstructions(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2)
static cl::opt< int > IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden)
size_type count(const T &V) const
count - Return 1 if the element is in the set, 0 otherwise.
Definition: SmallSet.h:65