LLVM  6.0.0svn
LanaiRegisterInfo.h
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1 //===- LanaiRegisterInfo.h - Lanai Register Information Impl ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains the Lanai implementation of the TargetRegisterInfo class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
15 #define LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
16 
18 
19 #define GET_REGINFO_HEADER
20 #include "LanaiGenRegisterInfo.inc"
21 
22 namespace llvm {
23 
26 
28  CallingConv::ID) const override;
29 
30  // Code Generation virtual methods.
31  const uint16_t *
32  getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
33 
34  BitVector getReservedRegs(const MachineFunction &MF) const override;
35 
36  bool requiresRegisterScavenging(const MachineFunction &MF) const override;
37 
38  bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
39 
41  unsigned FIOperandNum,
42  RegScavenger *RS = nullptr) const override;
43 
44  // Debug information queries.
45  unsigned getRARegister() const;
46  unsigned getFrameRegister(const MachineFunction &MF) const override;
47  unsigned getBaseRegister() const;
48  bool hasBasePointer(const MachineFunction &MF) const;
49 
50  int getDwarfRegNum(unsigned RegNum, bool IsEH) const;
51 };
52 
53 } // end namespace llvm
54 
55 #endif // LLVM_LIB_TARGET_LANAI_LANAIREGISTERINFO_H
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
const uint32_t * getCallPreservedMask(const MachineFunction &MF, CallingConv::ID) const override
const uint16_t * getCalleeSavedRegs(const MachineFunction *MF=nullptr) const override
bool hasBasePointer(const MachineFunction &MF) const
unsigned getFrameRegister(const MachineFunction &MF) const override
int getDwarfRegNum(unsigned RegNum, bool IsEH) const
void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=nullptr) const override
unsigned getBaseRegister() const
BitVector getReservedRegs(const MachineFunction &MF) const override
unsigned getRARegister() const
bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override
bool requiresRegisterScavenging(const MachineFunction &MF) const override