LLVM  6.0.0svn
LiveStackAnalysis.cpp
Go to the documentation of this file.
1 //===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the live stack slot analysis pass. It is analogous to
11 // live interval analysis except it's analyzing liveness of stack slots rather
12 // than registers.
13 //
14 //===----------------------------------------------------------------------===//
15 
18 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Support/Debug.h"
23 using namespace llvm;
24 
25 #define DEBUG_TYPE "livestacks"
26 
27 char LiveStacks::ID = 0;
29  "Live Stack Slot Analysis", false, false)
32  "Live Stack Slot Analysis", false, false)
33 
34 char &llvm::LiveStacksID = LiveStacks::ID;
35 
36 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const {
37  AU.setPreservesAll();
38  AU.addPreserved<SlotIndexes>();
39  AU.addRequiredTransitive<SlotIndexes>();
41 }
42 
44  // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd.
45  VNInfoAllocator.Reset();
46  S2IMap.clear();
47  S2RCMap.clear();
48 }
49 
51  TRI = MF.getSubtarget().getRegisterInfo();
52  // FIXME: No analysis is being done right now. We are relying on the
53  // register allocators to provide the information.
54  return false;
55 }
56 
59  assert(Slot >= 0 && "Spill slot indice must be >= 0");
60  SS2IntervalMap::iterator I = S2IMap.find(Slot);
61  if (I == S2IMap.end()) {
62  I = S2IMap.emplace(std::piecewise_construct, std::forward_as_tuple(Slot),
63  std::forward_as_tuple(
65  .first;
66  S2RCMap.insert(std::make_pair(Slot, RC));
67  } else {
68  // Use the largest common subclass register class.
69  const TargetRegisterClass *OldRC = S2RCMap[Slot];
70  S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC);
71  }
72  return I->second;
73 }
74 
75 /// print - Implement the dump method.
76 void LiveStacks::print(raw_ostream &OS, const Module*) const {
77 
78  OS << "********** INTERVALS **********\n";
79  for (const_iterator I = begin(), E = end(); I != E; ++I) {
80  I->second.print(OS);
81  int Slot = I->first;
82  const TargetRegisterClass *RC = getIntervalRegClass(Slot);
83  if (RC)
84  OS << " [" << TRI->getRegClassName(RC) << "]\n";
85  else
86  OS << " [Unknown]\n";
87  }
88 }
const TargetRegisterClass * getCommonSubClass(const TargetRegisterClass *A, const TargetRegisterClass *B, const MVT::SimpleValueType SVT=MVT::SimpleValueType::Any) const
Find the largest common subclass of A and B.
#define DEBUG_TYPE
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
SS2IntervalMap::const_iterator const_iterator
virtual const TargetRegisterInfo * getRegisterInfo() const
getRegisterInfo - If register information is available, return it.
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:638
F(f)
INITIALIZE_PASS_BEGIN(LiveStacks, DEBUG_TYPE, "Live Stack Slot Analysis", false, false) INITIALIZE_PASS_END(LiveStacks
const char * getRegClassName(const TargetRegisterClass *Class) const
Returns the name of the register class.
#define INITIALIZE_PASS_DEPENDENCY(depName)
Definition: PassSupport.h:51
void Reset()
Deallocate all but the current slab and reset the current pointer to the beginning of it...
Definition: Allocator.h:192
LiveInterval & getOrCreateInterval(int Slot, const TargetRegisterClass *RC)
SlotIndexes pass.
Definition: SlotIndexes.h:331
const_iterator begin() const
Live Stack Slot Analysis
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - Subclasses that override getAnalysisUsage must call this.
char & LiveStacksID
LiveStacks pass. An analysis keeping track of the liveness of stack slots.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
Represent the analysis usage information of a pass.
INITIALIZE_PASS_END(RegBankSelect, DEBUG_TYPE, "Assign register bank of generic virtual registers", false, false) RegBankSelect
bool runOnMachineFunction(MachineFunction &) override
runOnMachineFunction - pass entry point
#define I(x, y, z)
Definition: MD5.cpp:58
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
const TargetRegisterClass * getIntervalRegClass(int Slot) const
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
const_iterator end() const
void print(raw_ostream &O, const Module *=nullptr) const override
print - Implement the dump method.
static unsigned index2StackSlot(int FI)
Convert a non-negative frame index to a stack slot register value.