LLVM  6.0.0svn
LiveStackAnalysis.h
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1 //===- LiveStackAnalysis.h - Live Stack Slot Analysis -----------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the live stack slot analysis pass. It is analogous to
11 // live interval analysis except it's analyzing liveness of stack slots rather
12 // than registers.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H
17 #define LLVM_CODEGEN_LIVESTACKANALYSIS_H
18 
21 #include "llvm/Pass.h"
22 #include <cassert>
23 #include <map>
24 #include <unordered_map>
25 
26 namespace llvm {
27 
28 class TargetRegisterClass;
29 class TargetRegisterInfo;
30 
32  const TargetRegisterInfo *TRI;
33 
34  /// Special pool allocator for VNInfo's (LiveInterval val#).
35  ///
36  VNInfo::Allocator VNInfoAllocator;
37 
38  /// S2IMap - Stack slot indices to live interval mapping.
39  using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
40  SS2IntervalMap S2IMap;
41 
42  /// S2RCMap - Stack slot indices to register class mapping.
43  std::map<int, const TargetRegisterClass *> S2RCMap;
44 
45 public:
46  static char ID; // Pass identification, replacement for typeid
47 
50  }
51 
52  using iterator = SS2IntervalMap::iterator;
53  using const_iterator = SS2IntervalMap::const_iterator;
54 
55  const_iterator begin() const { return S2IMap.begin(); }
56  const_iterator end() const { return S2IMap.end(); }
57  iterator begin() { return S2IMap.begin(); }
58  iterator end() { return S2IMap.end(); }
59 
60  unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
61 
63 
65  assert(Slot >= 0 && "Spill slot indice must be >= 0");
66  SS2IntervalMap::iterator I = S2IMap.find(Slot);
67  assert(I != S2IMap.end() && "Interval does not exist for stack slot");
68  return I->second;
69  }
70 
71  const LiveInterval &getInterval(int Slot) const {
72  assert(Slot >= 0 && "Spill slot indice must be >= 0");
73  SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
74  assert(I != S2IMap.end() && "Interval does not exist for stack slot");
75  return I->second;
76  }
77 
78  bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
79 
80  const TargetRegisterClass *getIntervalRegClass(int Slot) const {
81  assert(Slot >= 0 && "Spill slot indice must be >= 0");
82  std::map<int, const TargetRegisterClass *>::const_iterator I =
83  S2RCMap.find(Slot);
84  assert(I != S2RCMap.end() &&
85  "Register class info does not exist for stack slot");
86  return I->second;
87  }
88 
89  VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
90 
91  void getAnalysisUsage(AnalysisUsage &AU) const override;
92  void releaseMemory() override;
93 
94  /// runOnMachineFunction - pass entry point
95  bool runOnMachineFunction(MachineFunction &) override;
96 
97  /// print - Implement the dump method.
98  void print(raw_ostream &O, const Module * = nullptr) const override;
99 };
100 
101 } // end namespace llvm
102 
103 #endif // LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
static PassRegistry * getPassRegistry()
getPassRegistry - Access the global registry object, which is automatically initialized at applicatio...
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
SS2IntervalMap::const_iterator const_iterator
LiveInterval - This class represents the liveness of a register, or stack slot.
Definition: LiveInterval.h:638
LiveInterval & getInterval(int Slot)
VNInfo::Allocator & getVNInfoAllocator()
MachineFunctionPass - This class adapts the FunctionPass interface to allow convenient creation of pa...
const LiveInterval & getInterval(int Slot) const
LiveInterval & getOrCreateInterval(int Slot, const TargetRegisterClass *RC)
void getAnalysisUsage(AnalysisUsage &AU) const override
getAnalysisUsage - This function should be overriden by passes that need analysis information to do t...
const_iterator begin() const
Allocate memory in an ever growing pool, as if by bump-pointer.
Definition: Allocator.h:138
void initializeLiveStacksPass(PassRegistry &)
Represent the analysis usage information of a pass.
TargetRegisterInfo base class - We assume that the target defines a static array of TargetRegisterDes...
SS2IntervalMap::iterator iterator
bool runOnMachineFunction(MachineFunction &) override
runOnMachineFunction - pass entry point
unsigned getNumIntervals() const
#define I(x, y, z)
Definition: MD5.cpp:58
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
bool hasInterval(int Slot) const
const TargetRegisterClass * getIntervalRegClass(int Slot) const
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:44
void releaseMemory() override
releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memo...
const_iterator end() const
void print(raw_ostream &O, const Module *=nullptr) const override
print - Implement the dump method.