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LoopVectorize.cpp
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1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This is the LLVM loop vectorizer. This pass modifies 'vectorizable' loops
11 // and generates target-independent LLVM-IR.
12 // The vectorizer uses the TargetTransformInfo analysis to estimate the costs
13 // of instructions in order to estimate the profitability of vectorization.
14 //
15 // The loop vectorizer combines consecutive loop iterations into a single
16 // 'wide' iteration. After this transformation the index is incremented
17 // by the SIMD vector width, and not by one.
18 //
19 // This pass has three parts:
20 // 1. The main loop pass that drives the different parts.
21 // 2. LoopVectorizationLegality - A unit that checks for the legality
22 // of the vectorization.
23 // 3. InnerLoopVectorizer - A unit that performs the actual
24 // widening of instructions.
25 // 4. LoopVectorizationCostModel - A unit that checks for the profitability
26 // of vectorization. It decides on the optimal vector width, which
27 // can be one, if vectorization is not profitable.
28 //
29 // There is a development effort going on to migrate loop vectorizer to the
30 // VPlan infrastructure and to introduce outer loop vectorization support (see
31 // docs/Proposal/VectorizationPlan.rst and
32 // http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this
33 // purpose, we temporarily introduced the VPlan-native vectorization path: an
34 // alternative vectorization path that is natively implemented on top of the
35 // VPlan infrastructure. See EnableVPlanNativePath for enabling.
36 //
37 //===----------------------------------------------------------------------===//
38 //
39 // The reduction-variable vectorization is based on the paper:
40 // D. Nuzman and R. Henderson. Multi-platform Auto-vectorization.
41 //
42 // Variable uniformity checks are inspired by:
43 // Karrenberg, R. and Hack, S. Whole Function Vectorization.
44 //
45 // The interleaved access vectorization is based on the paper:
46 // Dorit Nuzman, Ira Rosen and Ayal Zaks. Auto-Vectorization of Interleaved
47 // Data for SIMD
48 //
49 // Other ideas/concepts are from:
50 // A. Zaks and D. Nuzman. Autovectorization in GCC-two years later.
51 //
52 // S. Maleki, Y. Gao, M. Garzaran, T. Wong and D. Padua. An Evaluation of
53 // Vectorizing Compilers.
54 //
55 //===----------------------------------------------------------------------===//
56 
59 #include "VPlanHCFGBuilder.h"
60 #include "llvm/ADT/APInt.h"
61 #include "llvm/ADT/ArrayRef.h"
62 #include "llvm/ADT/DenseMap.h"
63 #include "llvm/ADT/DenseMapInfo.h"
64 #include "llvm/ADT/Hashing.h"
65 #include "llvm/ADT/MapVector.h"
66 #include "llvm/ADT/None.h"
67 #include "llvm/ADT/Optional.h"
68 #include "llvm/ADT/STLExtras.h"
69 #include "llvm/ADT/SetVector.h"
70 #include "llvm/ADT/SmallPtrSet.h"
71 #include "llvm/ADT/SmallSet.h"
72 #include "llvm/ADT/SmallVector.h"
73 #include "llvm/ADT/Statistic.h"
74 #include "llvm/ADT/StringRef.h"
75 #include "llvm/ADT/Twine.h"
80 #include "llvm/Analysis/CFG.h"
86 #include "llvm/Analysis/LoopInfo.h"
95 #include "llvm/IR/Attributes.h"
96 #include "llvm/IR/BasicBlock.h"
97 #include "llvm/IR/CFG.h"
98 #include "llvm/IR/Constant.h"
99 #include "llvm/IR/Constants.h"
100 #include "llvm/IR/DataLayout.h"
102 #include "llvm/IR/DebugLoc.h"
103 #include "llvm/IR/DerivedTypes.h"
104 #include "llvm/IR/DiagnosticInfo.h"
105 #include "llvm/IR/Dominators.h"
106 #include "llvm/IR/Function.h"
107 #include "llvm/IR/IRBuilder.h"
108 #include "llvm/IR/InstrTypes.h"
109 #include "llvm/IR/Instruction.h"
110 #include "llvm/IR/Instructions.h"
111 #include "llvm/IR/IntrinsicInst.h"
112 #include "llvm/IR/Intrinsics.h"
113 #include "llvm/IR/LLVMContext.h"
114 #include "llvm/IR/Metadata.h"
115 #include "llvm/IR/Module.h"
116 #include "llvm/IR/Operator.h"
117 #include "llvm/IR/Type.h"
118 #include "llvm/IR/Use.h"
119 #include "llvm/IR/User.h"
120 #include "llvm/IR/Value.h"
121 #include "llvm/IR/ValueHandle.h"
122 #include "llvm/IR/Verifier.h"
123 #include "llvm/Pass.h"
124 #include "llvm/Support/Casting.h"
126 #include "llvm/Support/Compiler.h"
127 #include "llvm/Support/Debug.h"
129 #include "llvm/Support/MathExtras.h"
136 #include <algorithm>
137 #include <cassert>
138 #include <cstdint>
139 #include <cstdlib>
140 #include <functional>
141 #include <iterator>
142 #include <limits>
143 #include <memory>
144 #include <string>
145 #include <tuple>
146 #include <utility>
147 #include <vector>
148 
149 using namespace llvm;
150 
151 #define LV_NAME "loop-vectorize"
152 #define DEBUG_TYPE LV_NAME
153 
154 STATISTIC(LoopsVectorized, "Number of loops vectorized");
155 STATISTIC(LoopsAnalyzed, "Number of loops analyzed for vectorization");
156 
157 /// Loops with a known constant trip count below this number are vectorized only
158 /// if no scalar iteration overheads are incurred.
160  "vectorizer-min-trip-count", cl::init(16), cl::Hidden,
161  cl::desc("Loops with a constant trip count that is smaller than this "
162  "value are vectorized only if no scalar iteration overheads "
163  "are incurred."));
164 
166  "vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden,
167  cl::desc("Maximize bandwidth when selecting vectorization factor which "
168  "will be determined by the smallest type in loop."));
169 
171  "enable-interleaved-mem-accesses", cl::init(false), cl::Hidden,
172  cl::desc("Enable vectorization on interleaved memory accesses in a loop"));
173 
174 /// Maximum factor for an interleaved memory access.
176  "max-interleave-group-factor", cl::Hidden,
177  cl::desc("Maximum factor for an interleaved access group (default = 8)"),
178  cl::init(8));
179 
180 /// We don't interleave loops with a known constant trip count below this
181 /// number.
182 static const unsigned TinyTripCountInterleaveThreshold = 128;
183 
185  "force-target-num-scalar-regs", cl::init(0), cl::Hidden,
186  cl::desc("A flag that overrides the target's number of scalar registers."));
187 
189  "force-target-num-vector-regs", cl::init(0), cl::Hidden,
190  cl::desc("A flag that overrides the target's number of vector registers."));
191 
193  "force-target-max-scalar-interleave", cl::init(0), cl::Hidden,
194  cl::desc("A flag that overrides the target's max interleave factor for "
195  "scalar loops."));
196 
198  "force-target-max-vector-interleave", cl::init(0), cl::Hidden,
199  cl::desc("A flag that overrides the target's max interleave factor for "
200  "vectorized loops."));
201 
203  "force-target-instruction-cost", cl::init(0), cl::Hidden,
204  cl::desc("A flag that overrides the target's expected cost for "
205  "an instruction to a single constant value. Mostly "
206  "useful for getting consistent testing."));
207 
209  "small-loop-cost", cl::init(20), cl::Hidden,
210  cl::desc(
211  "The cost of a loop that is considered 'small' by the interleaver."));
212 
214  "loop-vectorize-with-block-frequency", cl::init(true), cl::Hidden,
215  cl::desc("Enable the use of the block frequency analysis to access PGO "
216  "heuristics minimizing code growth in cold regions and being more "
217  "aggressive in hot regions."));
218 
219 // Runtime interleave loops for load/store throughput.
221  "enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden,
222  cl::desc(
223  "Enable runtime interleaving until load/store ports are saturated"));
224 
225 /// The number of stores in a loop that are allowed to need predication.
227  "vectorize-num-stores-pred", cl::init(1), cl::Hidden,
228  cl::desc("Max number of stores to be predicated behind an if."));
229 
231  "enable-ind-var-reg-heur", cl::init(true), cl::Hidden,
232  cl::desc("Count the induction variable only once when interleaving"));
233 
235  "enable-cond-stores-vec", cl::init(true), cl::Hidden,
236  cl::desc("Enable if predication of stores during vectorization."));
237 
239  "max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden,
240  cl::desc("The maximum interleave count to use when interleaving a scalar "
241  "reduction in a nested loop."));
242 
244  "enable-vplan-native-path", cl::init(false), cl::Hidden,
245  cl::desc("Enable VPlan-native vectorization path with "
246  "support for outer loop vectorization."));
247 
248 // This flag enables the stress testing of the VPlan H-CFG construction in the
249 // VPlan-native vectorization path. It must be used in conjuction with
250 // -enable-vplan-native-path. -vplan-verify-hcfg can also be used to enable the
251 // verification of the H-CFGs built.
253  "vplan-build-stress-test", cl::init(false), cl::Hidden,
254  cl::desc(
255  "Build VPlan for every supported loop nest in the function and bail "
256  "out right after the build (stress test the VPlan H-CFG construction "
257  "in the VPlan-native vectorization path)."));
258 
259 /// A helper function for converting Scalar types to vector types.
260 /// If the incoming type is void, we return void. If the VF is 1, we return
261 /// the scalar type.
262 static Type *ToVectorTy(Type *Scalar, unsigned VF) {
263  if (Scalar->isVoidTy() || VF == 1)
264  return Scalar;
265  return VectorType::get(Scalar, VF);
266 }
267 
268 // FIXME: The following helper functions have multiple implementations
269 // in the project. They can be effectively organized in a common Load/Store
270 // utilities unit.
271 
272 /// A helper function that returns the type of loaded or stored value.
274  assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
275  "Expected Load or Store instruction");
276  if (auto *LI = dyn_cast<LoadInst>(I))
277  return LI->getType();
278  return cast<StoreInst>(I)->getValueOperand()->getType();
279 }
280 
281 /// A helper function that returns the alignment of load or store instruction.
282 static unsigned getMemInstAlignment(Value *I) {
283  assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
284  "Expected Load or Store instruction");
285  if (auto *LI = dyn_cast<LoadInst>(I))
286  return LI->getAlignment();
287  return cast<StoreInst>(I)->getAlignment();
288 }
289 
290 /// A helper function that returns the address space of the pointer operand of
291 /// load or store instruction.
292 static unsigned getMemInstAddressSpace(Value *I) {
293  assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
294  "Expected Load or Store instruction");
295  if (auto *LI = dyn_cast<LoadInst>(I))
296  return LI->getPointerAddressSpace();
297  return cast<StoreInst>(I)->getPointerAddressSpace();
298 }
299 
300 /// A helper function that returns true if the given type is irregular. The
301 /// type is irregular if its allocated size doesn't equal the store size of an
302 /// element of the corresponding vector type at the given vectorization factor.
303 static bool hasIrregularType(Type *Ty, const DataLayout &DL, unsigned VF) {
304  // Determine if an array of VF elements of type Ty is "bitcast compatible"
305  // with a <VF x Ty> vector.
306  if (VF > 1) {
307  auto *VectorTy = VectorType::get(Ty, VF);
308  return VF * DL.getTypeAllocSize(Ty) != DL.getTypeStoreSize(VectorTy);
309  }
310 
311  // If the vectorization factor is one, we just check if an array of type Ty
312  // requires padding between elements.
313  return DL.getTypeAllocSizeInBits(Ty) != DL.getTypeSizeInBits(Ty);
314 }
315 
316 /// A helper function that returns the reciprocal of the block probability of
317 /// predicated blocks. If we return X, we are assuming the predicated block
318 /// will execute once for every X iterations of the loop header.
319 ///
320 /// TODO: We should use actual block probability here, if available. Currently,
321 /// we always assume predicated blocks have a 50% chance of executing.
322 static unsigned getReciprocalPredBlockProb() { return 2; }
323 
324 /// A helper function that adds a 'fast' flag to floating-point operations.
326  if (isa<FPMathOperator>(V)) {
327  FastMathFlags Flags;
328  Flags.setFast();
329  cast<Instruction>(V)->setFastMathFlags(Flags);
330  }
331  return V;
332 }
333 
334 /// A helper function that returns an integer or floating-point constant with
335 /// value C.
336 static Constant *getSignedIntOrFpConstant(Type *Ty, int64_t C) {
337  return Ty->isIntegerTy() ? ConstantInt::getSigned(Ty, C)
338  : ConstantFP::get(Ty, C);
339 }
340 
341 namespace llvm {
342 
343 /// InnerLoopVectorizer vectorizes loops which contain only one basic
344 /// block to a specified vectorization factor (VF).
345 /// This class performs the widening of scalars into vectors, or multiple
346 /// scalars. This class also implements the following features:
347 /// * It inserts an epilogue loop for handling loops that don't have iteration
348 /// counts that are known to be a multiple of the vectorization factor.
349 /// * It handles the code generation for reduction variables.
350 /// * Scalarization (implementation using scalars) of un-vectorizable
351 /// instructions.
352 /// InnerLoopVectorizer does not perform any vectorization-legality
353 /// checks, and relies on the caller to check for the different legality
354 /// aspects. The InnerLoopVectorizer relies on the
355 /// LoopVectorizationLegality class to provide information about the induction
356 /// and reduction variables that were found to a given vectorization factor.
358 public:
361  const TargetLibraryInfo *TLI,
363  OptimizationRemarkEmitter *ORE, unsigned VecWidth,
364  unsigned UnrollFactor, LoopVectorizationLegality *LVL,
366  : OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI),
367  AC(AC), ORE(ORE), VF(VecWidth), UF(UnrollFactor),
368  Builder(PSE.getSE()->getContext()),
369  VectorLoopValueMap(UnrollFactor, VecWidth), Legal(LVL), Cost(CM) {}
370  virtual ~InnerLoopVectorizer() = default;
371 
372  /// Create a new empty loop. Unlink the old loop and connect the new one.
373  /// Return the pre-header block of the new loop.
375 
376  /// Widen a single instruction within the innermost loop.
378 
379  /// Fix the vectorized code, taking care of header phi's, live-outs, and more.
380  void fixVectorizedLoop();
381 
382  // Return true if any runtime check is added.
384 
385  /// A type for vectorized values in the new loop. Each value from the
386  /// original loop, when vectorized, is represented by UF vector values in the
387  /// new unrolled loop, where UF is the unroll factor.
389 
390  /// Vectorize a single PHINode in a block. This method handles the induction
391  /// variable canonicalization. It supports both VF = 1 for unrolled loops and
392  /// arbitrary length vectors.
393  void widenPHIInstruction(Instruction *PN, unsigned UF, unsigned VF);
394 
395  /// A helper function to scalarize a single Instruction in the innermost loop.
396  /// Generates a sequence of scalar instances for each lane between \p MinLane
397  /// and \p MaxLane, times each part between \p MinPart and \p MaxPart,
398  /// inclusive..
399  void scalarizeInstruction(Instruction *Instr, const VPIteration &Instance,
400  bool IfPredicateInstr);
401 
402  /// Widen an integer or floating-point induction variable \p IV. If \p Trunc
403  /// is provided, the integer induction variable will first be truncated to
404  /// the corresponding type.
405  void widenIntOrFpInduction(PHINode *IV, TruncInst *Trunc = nullptr);
406 
407  /// getOrCreateVectorValue and getOrCreateScalarValue coordinate to generate a
408  /// vector or scalar value on-demand if one is not yet available. When
409  /// vectorizing a loop, we visit the definition of an instruction before its
410  /// uses. When visiting the definition, we either vectorize or scalarize the
411  /// instruction, creating an entry for it in the corresponding map. (In some
412  /// cases, such as induction variables, we will create both vector and scalar
413  /// entries.) Then, as we encounter uses of the definition, we derive values
414  /// for each scalar or vector use unless such a value is already available.
415  /// For example, if we scalarize a definition and one of its uses is vector,
416  /// we build the required vector on-demand with an insertelement sequence
417  /// when visiting the use. Otherwise, if the use is scalar, we can use the
418  /// existing scalar definition.
419  ///
420  /// Return a value in the new loop corresponding to \p V from the original
421  /// loop at unroll index \p Part. If the value has already been vectorized,
422  /// the corresponding vector entry in VectorLoopValueMap is returned. If,
423  /// however, the value has a scalar entry in VectorLoopValueMap, we construct
424  /// a new vector value on-demand by inserting the scalar values into a vector
425  /// with an insertelement sequence. If the value has been neither vectorized
426  /// nor scalarized, it must be loop invariant, so we simply broadcast the
427  /// value into a vector.
428  Value *getOrCreateVectorValue(Value *V, unsigned Part);
429 
430  /// Return a value in the new loop corresponding to \p V from the original
431  /// loop at unroll and vector indices \p Instance. If the value has been
432  /// vectorized but not scalarized, the necessary extractelement instruction
433  /// will be generated.
434  Value *getOrCreateScalarValue(Value *V, const VPIteration &Instance);
435 
436  /// Construct the vector value of a scalarized value \p V one lane at a time.
437  void packScalarIntoVectorValue(Value *V, const VPIteration &Instance);
438 
439  /// Try to vectorize the interleaved access group that \p Instr belongs to.
441 
442  /// Vectorize Load and Store instructions, optionally masking the vector
443  /// operations if \p BlockInMask is non-null.
445  VectorParts *BlockInMask = nullptr);
446 
447  /// Set the debug location in the builder using the debug location in
448  /// the instruction.
449  void setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr);
450 
451 protected:
453 
454  /// A small list of PHINodes.
456 
457  /// A type for scalarized values in the new loop. Each value from the
458  /// original loop, when scalarized, is represented by UF x VF scalar values
459  /// in the new unrolled loop, where UF is the unroll factor and VF is the
460  /// vectorization factor.
462 
463  /// Set up the values of the IVs correctly when exiting the vector loop.
464  void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II,
465  Value *CountRoundDown, Value *EndValue,
466  BasicBlock *MiddleBlock);
467 
468  /// Create a new induction variable inside L.
470  Value *Step, Instruction *DL);
471 
472  /// Handle all cross-iteration phis in the header.
473  void fixCrossIterationPHIs();
474 
475  /// Fix a first-order recurrence. This is the second phase of vectorizing
476  /// this phi node.
477  void fixFirstOrderRecurrence(PHINode *Phi);
478 
479  /// Fix a reduction cross-iteration phi. This is the second phase of
480  /// vectorizing this phi node.
481  void fixReduction(PHINode *Phi);
482 
483  /// The Loop exit block may have single value PHI nodes with some
484  /// incoming value. While vectorizing we only handled real values
485  /// that were defined inside the loop and we should have one value for
486  /// each predecessor of its parent basic block. See PR14725.
487  void fixLCSSAPHIs();
488 
489  /// Iteratively sink the scalarized operands of a predicated instruction into
490  /// the block that was created for it.
491  void sinkScalarOperands(Instruction *PredInst);
492 
493  /// Shrinks vector element sizes to the smallest bitwidth they can be legally
494  /// represented as.
496 
497  /// Insert the new loop to the loop hierarchy and pass manager
498  /// and update the analysis passes.
499  void updateAnalysis();
500 
501  /// Create a broadcast instruction. This method generates a broadcast
502  /// instruction (shuffle) for loop invariant values and for the induction
503  /// value. If this is the induction variable then we extend it to N, N+1, ...
504  /// this is needed because each iteration in the loop corresponds to a SIMD
505  /// element.
506  virtual Value *getBroadcastInstrs(Value *V);
507 
508  /// This function adds (StartIdx, StartIdx + Step, StartIdx + 2*Step, ...)
509  /// to each vector element of Val. The sequence starts at StartIndex.
510  /// \p Opcode is relevant for FP induction variable.
511  virtual Value *getStepVector(Value *Val, int StartIdx, Value *Step,
512  Instruction::BinaryOps Opcode =
513  Instruction::BinaryOpsEnd);
514 
515  /// Compute scalar induction steps. \p ScalarIV is the scalar induction
516  /// variable on which to base the steps, \p Step is the size of the step, and
517  /// \p EntryVal is the value from the original loop that maps to the steps.
518  /// Note that \p EntryVal doesn't have to be an induction variable - it
519  /// can also be a truncate instruction.
520  void buildScalarSteps(Value *ScalarIV, Value *Step, Instruction *EntryVal,
521  const InductionDescriptor &ID);
522 
523  /// Create a vector induction phi node based on an existing scalar one. \p
524  /// EntryVal is the value from the original loop that maps to the vector phi
525  /// node, and \p Step is the loop-invariant step. If \p EntryVal is a
526  /// truncate instruction, instead of widening the original IV, we widen a
527  /// version of the IV truncated to \p EntryVal's type.
529  Value *Step, Instruction *EntryVal);
530 
531  /// Returns true if an instruction \p I should be scalarized instead of
532  /// vectorized for the chosen vectorization factor.
534 
535  /// Returns true if we should generate a scalar version of \p IV.
536  bool needsScalarInduction(Instruction *IV) const;
537 
538  /// If there is a cast involved in the induction variable \p ID, which should
539  /// be ignored in the vectorized loop body, this function records the
540  /// VectorLoopValue of the respective Phi also as the VectorLoopValue of the
541  /// cast. We had already proved that the casted Phi is equal to the uncasted
542  /// Phi in the vectorized loop (under a runtime guard), and therefore
543  /// there is no need to vectorize the cast - the same value can be used in the
544  /// vector loop for both the Phi and the cast.
545  /// If \p VectorLoopValue is a scalarized value, \p Lane is also specified,
546  /// Otherwise, \p VectorLoopValue is a widened/vectorized value.
547  ///
548  /// \p EntryVal is the value from the original loop that maps to the vector
549  /// phi node and is used to distinguish what is the IV currently being
550  /// processed - original one (if \p EntryVal is a phi corresponding to the
551  /// original IV) or the "newly-created" one based on the proof mentioned above
552  /// (see also buildScalarSteps() and createVectorIntOrFPInductionPHI()). In the
553  /// latter case \p EntryVal is a TruncInst and we must not record anything for
554  /// that IV, but it's error-prone to expect callers of this routine to care
555  /// about that, hence this explicit parameter.
557  const Instruction *EntryVal,
558  Value *VectorLoopValue,
559  unsigned Part,
560  unsigned Lane = UINT_MAX);
561 
562  /// Generate a shuffle sequence that will reverse the vector Vec.
563  virtual Value *reverseVector(Value *Vec);
564 
565  /// Returns (and creates if needed) the original loop trip count.
566  Value *getOrCreateTripCount(Loop *NewLoop);
567 
568  /// Returns (and creates if needed) the trip count of the widened loop.
570 
571  /// Returns a bitcasted value to the requested vector type.
572  /// Also handles bitcasts of vector<float> <-> vector<pointer> types.
574  const DataLayout &DL);
575 
576  /// Emit a bypass check to see if the vector trip count is zero, including if
577  /// it overflows.
579 
580  /// Emit a bypass check to see if all of the SCEV assumptions we've
581  /// had to make are correct.
582  void emitSCEVChecks(Loop *L, BasicBlock *Bypass);
583 
584  /// Emit bypass checks to check any memory assumptions we may have made.
585  void emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass);
586 
587  /// Add additional metadata to \p To that was not present on \p Orig.
588  ///
589  /// Currently this is used to add the noalias annotations based on the
590  /// inserted memchecks. Use this for instructions that are *cloned* into the
591  /// vector loop.
592  void addNewMetadata(Instruction *To, const Instruction *Orig);
593 
594  /// Add metadata from one instruction to another.
595  ///
596  /// This includes both the original MDs from \p From and additional ones (\see
597  /// addNewMetadata). Use this for *newly created* instructions in the vector
598  /// loop.
599  void addMetadata(Instruction *To, Instruction *From);
600 
601  /// Similar to the previous function but it adds the metadata to a
602  /// vector of instructions.
603  void addMetadata(ArrayRef<Value *> To, Instruction *From);
604 
605  /// The original loop.
607 
608  /// A wrapper around ScalarEvolution used to add runtime SCEV checks. Applies
609  /// dynamic knowledge to simplify SCEV expressions and converts them to a
610  /// more usable form.
612 
613  /// Loop Info.
615 
616  /// Dominator Tree.
618 
619  /// Alias Analysis.
621 
622  /// Target Library Info.
624 
625  /// Target Transform Info.
627 
628  /// Assumption Cache.
630 
631  /// Interface to emit optimization remarks.
633 
634  /// LoopVersioning. It's only set up (non-null) if memchecks were
635  /// used.
636  ///
637  /// This is currently only used to add no-alias metadata based on the
638  /// memchecks. The actually versioning is performed manually.
639  std::unique_ptr<LoopVersioning> LVer;
640 
641  /// The vectorization SIMD factor to use. Each vector will have this many
642  /// vector elements.
643  unsigned VF;
644 
645  /// The vectorization unroll factor to use. Each scalar is vectorized to this
646  /// many different vector instructions.
647  unsigned UF;
648 
649  /// The builder that we use
651 
652  // --- Vectorization state ---
653 
654  /// The vector-loop preheader.
656 
657  /// The scalar-loop preheader.
659 
660  /// Middle Block between the vector and the scalar.
662 
663  /// The ExitBlock of the scalar loop.
665 
666  /// The vector loop body.
668 
669  /// The scalar loop body.
671 
672  /// A list of all bypass blocks. The first block is the entry of the loop.
674 
675  /// The new Induction variable which was added to the new block.
676  PHINode *Induction = nullptr;
677 
678  /// The induction variable of the old basic block.
679  PHINode *OldInduction = nullptr;
680 
681  /// Maps values from the original loop to their corresponding values in the
682  /// vectorized loop. A key value can map to either vector values, scalar
683  /// values or both kinds of values, depending on whether the key was
684  /// vectorized and scalarized.
686 
687  /// Store instructions that were predicated.
689 
690  /// Trip count of the original loop.
691  Value *TripCount = nullptr;
692 
693  /// Trip count of the widened loop (TripCount - TripCount % (VF*UF))
694  Value *VectorTripCount = nullptr;
695 
696  /// The legality analysis.
698 
699  /// The profitablity analysis.
701 
702  // Record whether runtime checks are added.
703  bool AddedSafetyChecks = false;
704 
705  // Holds the end values for each induction variable. We save the end values
706  // so we can later fix-up the external users of the induction variables.
708 };
709 
711 public:
714  const TargetLibraryInfo *TLI,
716  OptimizationRemarkEmitter *ORE, unsigned UnrollFactor,
719  : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 1,
720  UnrollFactor, LVL, CM) {}
721 
722 private:
723  Value *getBroadcastInstrs(Value *V) override;
724  Value *getStepVector(Value *Val, int StartIdx, Value *Step,
725  Instruction::BinaryOps Opcode =
726  Instruction::BinaryOpsEnd) override;
727  Value *reverseVector(Value *Vec) override;
728 };
729 
730 } // end namespace llvm
731 
732 /// Look for a meaningful debug location on the instruction or it's
733 /// operands.
735  if (!I)
736  return I;
737 
738  DebugLoc Empty;
739  if (I->getDebugLoc() != Empty)
740  return I;
741 
742  for (User::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) {
743  if (Instruction *OpInst = dyn_cast<Instruction>(*OI))
744  if (OpInst->getDebugLoc() != Empty)
745  return OpInst;
746  }
747 
748  return I;
749 }
750 
752  if (const Instruction *Inst = dyn_cast_or_null<Instruction>(Ptr)) {
753  const DILocation *DIL = Inst->getDebugLoc();
754  if (DIL && Inst->getFunction()->isDebugInfoForProfiling() &&
755  !isa<DbgInfoIntrinsic>(Inst))
757  else
759  } else
761 }
762 
763 #ifndef NDEBUG
764 /// \return string containing a file name and a line # for the given loop.
765 static std::string getDebugLocString(const Loop *L) {
766  std::string Result;
767  if (L) {
768  raw_string_ostream OS(Result);
769  if (const DebugLoc LoopDbgLoc = L->getStartLoc())
770  LoopDbgLoc.print(OS);
771  else
772  // Just print the module name.
773  OS << L->getHeader()->getParent()->getParent()->getModuleIdentifier();
774  OS.flush();
775  }
776  return Result;
777 }
778 #endif
779 
781  const Instruction *Orig) {
782  // If the loop was versioned with memchecks, add the corresponding no-alias
783  // metadata.
784  if (LVer && (isa<LoadInst>(Orig) || isa<StoreInst>(Orig)))
785  LVer->annotateInstWithNoAlias(To, Orig);
786 }
787 
789  Instruction *From) {
790  propagateMetadata(To, From);
791  addNewMetadata(To, From);
792 }
793 
795  Instruction *From) {
796  for (Value *V : To) {
797  if (Instruction *I = dyn_cast<Instruction>(V))
798  addMetadata(I, From);
799  }
800 }
801 
802 namespace llvm {
803 
804 /// The group of interleaved loads/stores sharing the same stride and
805 /// close to each other.
806 ///
807 /// Each member in this group has an index starting from 0, and the largest
808 /// index should be less than interleaved factor, which is equal to the absolute
809 /// value of the access's stride.
810 ///
811 /// E.g. An interleaved load group of factor 4:
812 /// for (unsigned i = 0; i < 1024; i+=4) {
813 /// a = A[i]; // Member of index 0
814 /// b = A[i+1]; // Member of index 1
815 /// d = A[i+3]; // Member of index 3
816 /// ...
817 /// }
818 ///
819 /// An interleaved store group of factor 4:
820 /// for (unsigned i = 0; i < 1024; i+=4) {
821 /// ...
822 /// A[i] = a; // Member of index 0
823 /// A[i+1] = b; // Member of index 1
824 /// A[i+2] = c; // Member of index 2
825 /// A[i+3] = d; // Member of index 3
826 /// }
827 ///
828 /// Note: the interleaved load group could have gaps (missing members), but
829 /// the interleaved store group doesn't allow gaps.
831 public:
832  InterleaveGroup(Instruction *Instr, int Stride, unsigned Align)
833  : Align(Align), InsertPos(Instr) {
834  assert(Align && "The alignment should be non-zero");
835 
836  Factor = std::abs(Stride);
837  assert(Factor > 1 && "Invalid interleave factor");
838 
839  Reverse = Stride < 0;
840  Members[0] = Instr;
841  }
842 
843  bool isReverse() const { return Reverse; }
844  unsigned getFactor() const { return Factor; }
845  unsigned getAlignment() const { return Align; }
846  unsigned getNumMembers() const { return Members.size(); }
847 
848  /// Try to insert a new member \p Instr with index \p Index and
849  /// alignment \p NewAlign. The index is related to the leader and it could be
850  /// negative if it is the new leader.
851  ///
852  /// \returns false if the instruction doesn't belong to the group.
853  bool insertMember(Instruction *Instr, int Index, unsigned NewAlign) {
854  assert(NewAlign && "The new member's alignment should be non-zero");
855 
856  int Key = Index + SmallestKey;
857 
858  // Skip if there is already a member with the same index.
859  if (Members.count(Key))
860  return false;
861 
862  if (Key > LargestKey) {
863  // The largest index is always less than the interleave factor.
864  if (Index >= static_cast<int>(Factor))
865  return false;
866 
867  LargestKey = Key;
868  } else if (Key < SmallestKey) {
869  // The largest index is always less than the interleave factor.
870  if (LargestKey - Key >= static_cast<int>(Factor))
871  return false;
872 
873  SmallestKey = Key;
874  }
875 
876  // It's always safe to select the minimum alignment.
877  Align = std::min(Align, NewAlign);
878  Members[Key] = Instr;
879  return true;
880  }
881 
882  /// Get the member with the given index \p Index
883  ///
884  /// \returns nullptr if contains no such member.
885  Instruction *getMember(unsigned Index) const {
886  int Key = SmallestKey + Index;
887  if (!Members.count(Key))
888  return nullptr;
889 
890  return Members.find(Key)->second;
891  }
892 
893  /// Get the index for the given member. Unlike the key in the member
894  /// map, the index starts from 0.
895  unsigned getIndex(Instruction *Instr) const {
896  for (auto I : Members)
897  if (I.second == Instr)
898  return I.first - SmallestKey;
899 
900  llvm_unreachable("InterleaveGroup contains no such member");
901  }
902 
903  Instruction *getInsertPos() const { return InsertPos; }
904  void setInsertPos(Instruction *Inst) { InsertPos = Inst; }
905 
906  /// Add metadata (e.g. alias info) from the instructions in this group to \p
907  /// NewInst.
908  ///
909  /// FIXME: this function currently does not add noalias metadata a'la
910  /// addNewMedata. To do that we need to compute the intersection of the
911  /// noalias info from all members.
912  void addMetadata(Instruction *NewInst) const {
914  std::transform(Members.begin(), Members.end(), std::back_inserter(VL),
915  [](std::pair<int, Instruction *> p) { return p.second; });
916  propagateMetadata(NewInst, VL);
917  }
918 
919 private:
920  unsigned Factor; // Interleave Factor.
921  bool Reverse;
922  unsigned Align;
924  int SmallestKey = 0;
925  int LargestKey = 0;
926 
927  // To avoid breaking dependences, vectorized instructions of an interleave
928  // group should be inserted at either the first load or the last store in
929  // program order.
930  //
931  // E.g. %even = load i32 // Insert Position
932  // %add = add i32 %even // Use of %even
933  // %odd = load i32
934  //
935  // store i32 %even
936  // %odd = add i32 // Def of %odd
937  // store i32 %odd // Insert Position
938  Instruction *InsertPos;
939 };
940 } // end namespace llvm
941 
942 namespace {
943 
944 /// Drive the analysis of interleaved memory accesses in the loop.
945 ///
946 /// Use this class to analyze interleaved accesses only when we can vectorize
947 /// a loop. Otherwise it's meaningless to do analysis as the vectorization
948 /// on interleaved accesses is unsafe.
949 ///
950 /// The analysis collects interleave groups and records the relationships
951 /// between the member and the group in a map.
952 class InterleavedAccessInfo {
953 public:
954  InterleavedAccessInfo(PredicatedScalarEvolution &PSE, Loop *L,
956  const LoopAccessInfo *LAI)
957  : PSE(PSE), TheLoop(L), DT(DT), LI(LI), LAI(LAI) {}
958 
959  ~InterleavedAccessInfo() {
961  // Avoid releasing a pointer twice.
962  for (auto &I : InterleaveGroupMap)
963  DelSet.insert(I.second);
964  for (auto *Ptr : DelSet)
965  delete Ptr;
966  }
967 
968  /// Analyze the interleaved accesses and collect them in interleave
969  /// groups. Substitute symbolic strides using \p Strides.
970  void analyzeInterleaving();
971 
972  /// Check if \p Instr belongs to any interleave group.
973  bool isInterleaved(Instruction *Instr) const {
974  return InterleaveGroupMap.count(Instr);
975  }
976 
977  /// Get the interleave group that \p Instr belongs to.
978  ///
979  /// \returns nullptr if doesn't have such group.
980  InterleaveGroup *getInterleaveGroup(Instruction *Instr) const {
981  if (InterleaveGroupMap.count(Instr))
982  return InterleaveGroupMap.find(Instr)->second;
983  return nullptr;
984  }
985 
986  /// Returns true if an interleaved group that may access memory
987  /// out-of-bounds requires a scalar epilogue iteration for correctness.
988  bool requiresScalarEpilogue() const { return RequiresScalarEpilogue; }
989 
990 private:
991  /// A wrapper around ScalarEvolution, used to add runtime SCEV checks.
992  /// Simplifies SCEV expressions in the context of existing SCEV assumptions.
993  /// The interleaved access analysis can also add new predicates (for example
994  /// by versioning strides of pointers).
996 
997  Loop *TheLoop;
998  DominatorTree *DT;
999  LoopInfo *LI;
1000  const LoopAccessInfo *LAI;
1001 
1002  /// True if the loop may contain non-reversed interleaved groups with
1003  /// out-of-bounds accesses. We ensure we don't speculatively access memory
1004  /// out-of-bounds by executing at least one scalar epilogue iteration.
1005  bool RequiresScalarEpilogue = false;
1006 
1007  /// Holds the relationships between the members and the interleave group.
1008  DenseMap<Instruction *, InterleaveGroup *> InterleaveGroupMap;
1009 
1010  /// Holds dependences among the memory accesses in the loop. It maps a source
1011  /// access to a set of dependent sink accesses.
1013 
1014  /// The descriptor for a strided memory access.
1015  struct StrideDescriptor {
1016  StrideDescriptor() = default;
1017  StrideDescriptor(int64_t Stride, const SCEV *Scev, uint64_t Size,
1018  unsigned Align)
1019  : Stride(Stride), Scev(Scev), Size(Size), Align(Align) {}
1020 
1021  // The access's stride. It is negative for a reverse access.
1022  int64_t Stride = 0;
1023 
1024  // The scalar expression of this access.
1025  const SCEV *Scev = nullptr;
1026 
1027  // The size of the memory object.
1028  uint64_t Size = 0;
1029 
1030  // The alignment of this access.
1031  unsigned Align = 0;
1032  };
1033 
1034  /// A type for holding instructions and their stride descriptors.
1035  using StrideEntry = std::pair<Instruction *, StrideDescriptor>;
1036 
1037  /// Create a new interleave group with the given instruction \p Instr,
1038  /// stride \p Stride and alignment \p Align.
1039  ///
1040  /// \returns the newly created interleave group.
1041  InterleaveGroup *createInterleaveGroup(Instruction *Instr, int Stride,
1042  unsigned Align) {
1043  assert(!InterleaveGroupMap.count(Instr) &&
1044  "Already in an interleaved access group");
1045  InterleaveGroupMap[Instr] = new InterleaveGroup(Instr, Stride, Align);
1046  return InterleaveGroupMap[Instr];
1047  }
1048 
1049  /// Release the group and remove all the relationships.
1050  void releaseGroup(InterleaveGroup *Group) {
1051  for (unsigned i = 0; i < Group->getFactor(); i++)
1052  if (Instruction *Member = Group->getMember(i))
1053  InterleaveGroupMap.erase(Member);
1054 
1055  delete Group;
1056  }
1057 
1058  /// Collect all the accesses with a constant stride in program order.
1059  void collectConstStrideAccesses(
1061  const ValueToValueMap &Strides);
1062 
1063  /// Returns true if \p Stride is allowed in an interleaved group.
1064  static bool isStrided(int Stride) {
1065  unsigned Factor = std::abs(Stride);
1066  return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
1067  }
1068 
1069  /// Returns true if \p BB is a predicated block.
1070  bool isPredicated(BasicBlock *BB) const {
1071  return LoopAccessInfo::blockNeedsPredication(BB, TheLoop, DT);
1072  }
1073 
1074  /// Returns true if LoopAccessInfo can be used for dependence queries.
1075  bool areDependencesValid() const {
1076  return LAI && LAI->getDepChecker().getDependences();
1077  }
1078 
1079  /// Returns true if memory accesses \p A and \p B can be reordered, if
1080  /// necessary, when constructing interleaved groups.
1081  ///
1082  /// \p A must precede \p B in program order. We return false if reordering is
1083  /// not necessary or is prevented because \p A and \p B may be dependent.
1084  bool canReorderMemAccessesForInterleavedGroups(StrideEntry *A,
1085  StrideEntry *B) const {
1086  // Code motion for interleaved accesses can potentially hoist strided loads
1087  // and sink strided stores. The code below checks the legality of the
1088  // following two conditions:
1089  //
1090  // 1. Potentially moving a strided load (B) before any store (A) that
1091  // precedes B, or
1092  //
1093  // 2. Potentially moving a strided store (A) after any load or store (B)
1094  // that A precedes.
1095  //
1096  // It's legal to reorder A and B if we know there isn't a dependence from A
1097  // to B. Note that this determination is conservative since some
1098  // dependences could potentially be reordered safely.
1099 
1100  // A is potentially the source of a dependence.
1101  auto *Src = A->first;
1102  auto SrcDes = A->second;
1103 
1104  // B is potentially the sink of a dependence.
1105  auto *Sink = B->first;
1106  auto SinkDes = B->second;
1107 
1108  // Code motion for interleaved accesses can't violate WAR dependences.
1109  // Thus, reordering is legal if the source isn't a write.
1110  if (!Src->mayWriteToMemory())
1111  return true;
1112 
1113  // At least one of the accesses must be strided.
1114  if (!isStrided(SrcDes.Stride) && !isStrided(SinkDes.Stride))
1115  return true;
1116 
1117  // If dependence information is not available from LoopAccessInfo,
1118  // conservatively assume the instructions can't be reordered.
1119  if (!areDependencesValid())
1120  return false;
1121 
1122  // If we know there is a dependence from source to sink, assume the
1123  // instructions can't be reordered. Otherwise, reordering is legal.
1124  return !Dependences.count(Src) || !Dependences.lookup(Src).count(Sink);
1125  }
1126 
1127  /// Collect the dependences from LoopAccessInfo.
1128  ///
1129  /// We process the dependences once during the interleaved access analysis to
1130  /// enable constant-time dependence queries.
1131  void collectDependences() {
1132  if (!areDependencesValid())
1133  return;
1134  auto *Deps = LAI->getDepChecker().getDependences();
1135  for (auto Dep : *Deps)
1136  Dependences[Dep.getSource(*LAI)].insert(Dep.getDestination(*LAI));
1137  }
1138 };
1139 
1140 } // end anonymous namespace
1141 
1143  const LoopVectorizeHints &LH,
1145  LH.emitRemarkWithHints();
1146 
1148  if (LH.getWidth() != 1)
1150  DEBUG_TYPE, "FailedRequestedVectorization",
1151  L->getStartLoc(), L->getHeader())
1152  << "loop not vectorized: "
1153  << "failed explicitly specified loop vectorization");
1154  else if (LH.getInterleave() != 1)
1156  DEBUG_TYPE, "FailedRequestedInterleaving", L->getStartLoc(),
1157  L->getHeader())
1158  << "loop not interleaved: "
1159  << "failed explicitly specified loop interleaving");
1160  }
1161 }
1162 
1163 namespace llvm {
1164 
1165 /// LoopVectorizationCostModel - estimates the expected speedups due to
1166 /// vectorization.
1167 /// In many cases vectorization is not profitable. This can happen because of
1168 /// a number of reasons. In this class we mainly attempt to predict the
1169 /// expected speedup/slowdowns due to the supported instruction set. We use the
1170 /// TargetTransformInfo to query the different backends for the cost of
1171 /// different operations.
1173 public:
1176  const TargetTransformInfo &TTI,
1177  const TargetLibraryInfo *TLI, DemandedBits *DB,
1180  const LoopVectorizeHints *Hints,
1181  InterleavedAccessInfo &IAI)
1182  : TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), TTI(TTI), TLI(TLI), DB(DB),
1183  AC(AC), ORE(ORE), TheFunction(F), Hints(Hints), InterleaveInfo(IAI) {}
1184 
1185  /// \return An upper bound for the vectorization factor, or None if
1186  /// vectorization should be avoided up front.
1187  Optional<unsigned> computeMaxVF(bool OptForSize);
1188 
1189  /// \return The most profitable vectorization factor and the cost of that VF.
1190  /// This method checks every power of two up to MaxVF. If UserVF is not ZERO
1191  /// then this vectorization factor will be selected if vectorization is
1192  /// possible.
1193  VectorizationFactor selectVectorizationFactor(unsigned MaxVF);
1194 
1195  /// Setup cost-based decisions for user vectorization factor.
1196  void selectUserVectorizationFactor(unsigned UserVF) {
1197  collectUniformsAndScalars(UserVF);
1198  collectInstsToScalarize(UserVF);
1199  }
1200 
1201  /// \return The size (in bits) of the smallest and widest types in the code
1202  /// that needs to be vectorized. We ignore values that remain scalar such as
1203  /// 64 bit loop indices.
1204  std::pair<unsigned, unsigned> getSmallestAndWidestTypes();
1205 
1206  /// \return The desired interleave count.
1207  /// If interleave count has been specified by metadata it will be returned.
1208  /// Otherwise, the interleave count is computed and returned. VF and LoopCost
1209  /// are the selected vectorization factor and the cost of the selected VF.
1210  unsigned selectInterleaveCount(bool OptForSize, unsigned VF,
1211  unsigned LoopCost);
1212 
1213  /// Memory access instruction may be vectorized in more than one way.
1214  /// Form of instruction after vectorization depends on cost.
1215  /// This function takes cost-based decisions for Load/Store instructions
1216  /// and collects them in a map. This decisions map is used for building
1217  /// the lists of loop-uniform and loop-scalar instructions.
1218  /// The calculated cost is saved with widening decision in order to
1219  /// avoid redundant calculations.
1220  void setCostBasedWideningDecision(unsigned VF);
1221 
1222  /// A struct that represents some properties of the register usage
1223  /// of a loop.
1224  struct RegisterUsage {
1225  /// Holds the number of loop invariant values that are used in the loop.
1227 
1228  /// Holds the maximum number of concurrent live intervals in the loop.
1229  unsigned MaxLocalUsers;
1230  };
1231 
1232  /// \return Returns information about the register usages of the loop for the
1233  /// given vectorization factors.
1234  SmallVector<RegisterUsage, 8> calculateRegisterUsage(ArrayRef<unsigned> VFs);
1235 
1236  /// Collect values we want to ignore in the cost model.
1237  void collectValuesToIgnore();
1238 
1239  /// \returns The smallest bitwidth each instruction can be represented with.
1240  /// The vector equivalents of these instructions should be truncated to this
1241  /// type.
1243  return MinBWs;
1244  }
1245 
1246  /// \returns True if it is more profitable to scalarize instruction \p I for
1247  /// vectorization factor \p VF.
1248  bool isProfitableToScalarize(Instruction *I, unsigned VF) const {
1249  assert(VF > 1 && "Profitable to scalarize relevant only for VF > 1.");
1250  auto Scalars = InstsToScalarize.find(VF);
1251  assert(Scalars != InstsToScalarize.end() &&
1252  "VF not yet analyzed for scalarization profitability");
1253  return Scalars->second.count(I);
1254  }
1255 
1256  /// Returns true if \p I is known to be uniform after vectorization.
1257  bool isUniformAfterVectorization(Instruction *I, unsigned VF) const {
1258  if (VF == 1)
1259  return true;
1260  assert(Uniforms.count(VF) && "VF not yet analyzed for uniformity");
1261  auto UniformsPerVF = Uniforms.find(VF);
1262  return UniformsPerVF->second.count(I);
1263  }
1264 
1265  /// Returns true if \p I is known to be scalar after vectorization.
1266  bool isScalarAfterVectorization(Instruction *I, unsigned VF) const {
1267  if (VF == 1)
1268  return true;
1269  assert(Scalars.count(VF) && "Scalar values are not calculated for VF");
1270  auto ScalarsPerVF = Scalars.find(VF);
1271  return ScalarsPerVF->second.count(I);
1272  }
1273 
1274  /// \returns True if instruction \p I can be truncated to a smaller bitwidth
1275  /// for vectorization factor \p VF.
1276  bool canTruncateToMinimalBitwidth(Instruction *I, unsigned VF) const {
1277  return VF > 1 && MinBWs.count(I) && !isProfitableToScalarize(I, VF) &&
1278  !isScalarAfterVectorization(I, VF);
1279  }
1280 
1281  /// Decision that was taken during cost calculation for memory instruction.
1284  CM_Widen, // For consecutive accesses with stride +1.
1285  CM_Widen_Reverse, // For consecutive accesses with stride -1.
1288  CM_Scalarize
1289  };
1290 
1291  /// Save vectorization decision \p W and \p Cost taken by the cost model for
1292  /// instruction \p I and vector width \p VF.
1294  unsigned Cost) {
1295  assert(VF >= 2 && "Expected VF >=2");
1296  WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
1297  }
1298 
1299  /// Save vectorization decision \p W and \p Cost taken by the cost model for
1300  /// interleaving group \p Grp and vector width \p VF.
1301  void setWideningDecision(const InterleaveGroup *Grp, unsigned VF,
1302  InstWidening W, unsigned Cost) {
1303  assert(VF >= 2 && "Expected VF >=2");
1304  /// Broadcast this decicion to all instructions inside the group.
1305  /// But the cost will be assigned to one instruction only.
1306  for (unsigned i = 0; i < Grp->getFactor(); ++i) {
1307  if (auto *I = Grp->getMember(i)) {
1308  if (Grp->getInsertPos() == I)
1309  WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
1310  else
1311  WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, 0);
1312  }
1313  }
1314  }
1315 
1316  /// Return the cost model decision for the given instruction \p I and vector
1317  /// width \p VF. Return CM_Unknown if this instruction did not pass
1318  /// through the cost modeling.
1320  assert(VF >= 2 && "Expected VF >=2");
1321  std::pair<Instruction *, unsigned> InstOnVF = std::make_pair(I, VF);
1322  auto Itr = WideningDecisions.find(InstOnVF);
1323  if (Itr == WideningDecisions.end())
1324  return CM_Unknown;
1325  return Itr->second.first;
1326  }
1327 
1328  /// Return the vectorization cost for the given instruction \p I and vector
1329  /// width \p VF.
1330  unsigned getWideningCost(Instruction *I, unsigned VF) {
1331  assert(VF >= 2 && "Expected VF >=2");
1332  std::pair<Instruction *, unsigned> InstOnVF = std::make_pair(I, VF);
1333  assert(WideningDecisions.count(InstOnVF) && "The cost is not calculated");
1334  return WideningDecisions[InstOnVF].second;
1335  }
1336 
1337  /// Return True if instruction \p I is an optimizable truncate whose operand
1338  /// is an induction variable. Such a truncate will be removed by adding a new
1339  /// induction variable with the destination type.
1340  bool isOptimizableIVTruncate(Instruction *I, unsigned VF) {
1341  // If the instruction is not a truncate, return false.
1342  auto *Trunc = dyn_cast<TruncInst>(I);
1343  if (!Trunc)
1344  return false;
1345 
1346  // Get the source and destination types of the truncate.
1347  Type *SrcTy = ToVectorTy(cast<CastInst>(I)->getSrcTy(), VF);
1348  Type *DestTy = ToVectorTy(cast<CastInst>(I)->getDestTy(), VF);
1349 
1350  // If the truncate is free for the given types, return false. Replacing a
1351  // free truncate with an induction variable would add an induction variable
1352  // update instruction to each iteration of the loop. We exclude from this
1353  // check the primary induction variable since it will need an update
1354  // instruction regardless.
1355  Value *Op = Trunc->getOperand(0);
1356  if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy))
1357  return false;
1358 
1359  // If the truncated value is not an induction variable, return false.
1360  return Legal->isInductionPhi(Op);
1361  }
1362 
1363  /// Collects the instructions to scalarize for each predicated instruction in
1364  /// the loop.
1365  void collectInstsToScalarize(unsigned VF);
1366 
1367  /// Collect Uniform and Scalar values for the given \p VF.
1368  /// The sets depend on CM decision for Load/Store instructions
1369  /// that may be vectorized as interleave, gather-scatter or scalarized.
1370  void collectUniformsAndScalars(unsigned VF) {
1371  // Do the analysis once.
1372  if (VF == 1 || Uniforms.count(VF))
1373  return;
1374  setCostBasedWideningDecision(VF);
1375  collectLoopUniforms(VF);
1376  collectLoopScalars(VF);
1377  }
1378 
1379  /// Returns true if the target machine supports masked store operation
1380  /// for the given \p DataType and kind of access to \p Ptr.
1382  return Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedStore(DataType);
1383  }
1384 
1385  /// Returns true if the target machine supports masked load operation
1386  /// for the given \p DataType and kind of access to \p Ptr.
1388  return Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedLoad(DataType);
1389  }
1390 
1391  /// Returns true if the target machine supports masked scatter operation
1392  /// for the given \p DataType.
1394  return TTI.isLegalMaskedScatter(DataType);
1395  }
1396 
1397  /// Returns true if the target machine supports masked gather operation
1398  /// for the given \p DataType.
1400  return TTI.isLegalMaskedGather(DataType);
1401  }
1402 
1403  /// Returns true if the target machine can represent \p V as a masked gather
1404  /// or scatter operation.
1406  bool LI = isa<LoadInst>(V);
1407  bool SI = isa<StoreInst>(V);
1408  if (!LI && !SI)
1409  return false;
1410  auto *Ty = getMemInstValueType(V);
1411  return (LI && isLegalMaskedGather(Ty)) || (SI && isLegalMaskedScatter(Ty));
1412  }
1413 
1414  /// Returns true if \p I is an instruction that will be scalarized with
1415  /// predication. Such instructions include conditional stores and
1416  /// instructions that may divide by zero.
1417  bool isScalarWithPredication(Instruction *I);
1418 
1419  /// Returns true if \p I is a memory instruction with consecutive memory
1420  /// access that can be widened.
1421  bool memoryInstructionCanBeWidened(Instruction *I, unsigned VF = 1);
1422 
1423  /// Check if \p Instr belongs to any interleaved access group.
1425  return InterleaveInfo.isInterleaved(Instr);
1426  }
1427 
1428  /// Get the interleaved access group that \p Instr belongs to.
1430  return InterleaveInfo.getInterleaveGroup(Instr);
1431  }
1432 
1433  /// Returns true if an interleaved group requires a scalar iteration
1434  /// to handle accesses with gaps.
1435  bool requiresScalarEpilogue() const {
1436  return InterleaveInfo.requiresScalarEpilogue();
1437  }
1438 
1439 private:
1440  unsigned NumPredStores = 0;
1441 
1442  /// \return An upper bound for the vectorization factor, larger than zero.
1443  /// One is returned if vectorization should best be avoided due to cost.
1444  unsigned computeFeasibleMaxVF(bool OptForSize, unsigned ConstTripCount);
1445 
1446  /// The vectorization cost is a combination of the cost itself and a boolean
1447  /// indicating whether any of the contributing operations will actually
1448  /// operate on
1449  /// vector values after type legalization in the backend. If this latter value
1450  /// is
1451  /// false, then all operations will be scalarized (i.e. no vectorization has
1452  /// actually taken place).
1453  using VectorizationCostTy = std::pair<unsigned, bool>;
1454 
1455  /// Returns the expected execution cost. The unit of the cost does
1456  /// not matter because we use the 'cost' units to compare different
1457  /// vector widths. The cost that is returned is *not* normalized by
1458  /// the factor width.
1459  VectorizationCostTy expectedCost(unsigned VF);
1460 
1461  /// Returns the execution time cost of an instruction for a given vector
1462  /// width. Vector width of one means scalar.
1463  VectorizationCostTy getInstructionCost(Instruction *I, unsigned VF);
1464 
1465  /// The cost-computation logic from getInstructionCost which provides
1466  /// the vector type as an output parameter.
1467  unsigned getInstructionCost(Instruction *I, unsigned VF, Type *&VectorTy);
1468 
1469  /// Calculate vectorization cost of memory instruction \p I.
1470  unsigned getMemoryInstructionCost(Instruction *I, unsigned VF);
1471 
1472  /// The cost computation for scalarized memory instruction.
1473  unsigned getMemInstScalarizationCost(Instruction *I, unsigned VF);
1474 
1475  /// The cost computation for interleaving group of memory instructions.
1476  unsigned getInterleaveGroupCost(Instruction *I, unsigned VF);
1477 
1478  /// The cost computation for Gather/Scatter instruction.
1479  unsigned getGatherScatterCost(Instruction *I, unsigned VF);
1480 
1481  /// The cost computation for widening instruction \p I with consecutive
1482  /// memory access.
1483  unsigned getConsecutiveMemOpCost(Instruction *I, unsigned VF);
1484 
1485  /// The cost calculation for Load instruction \p I with uniform pointer -
1486  /// scalar load + broadcast.
1487  unsigned getUniformMemOpCost(Instruction *I, unsigned VF);
1488 
1489  /// Returns whether the instruction is a load or store and will be a emitted
1490  /// as a vector operation.
1491  bool isConsecutiveLoadOrStore(Instruction *I);
1492 
1493  /// Returns true if an artificially high cost for emulated masked memrefs
1494  /// should be used.
1495  bool useEmulatedMaskMemRefHack(Instruction *I);
1496 
1497  /// Create an analysis remark that explains why vectorization failed
1498  ///
1499  /// \p RemarkName is the identifier for the remark. \return the remark object
1500  /// that can be streamed to.
1501  OptimizationRemarkAnalysis createMissedAnalysis(StringRef RemarkName) {
1502  return createLVMissedAnalysis(Hints->vectorizeAnalysisPassName(),
1503  RemarkName, TheLoop);
1504  }
1505 
1506  /// Map of scalar integer values to the smallest bitwidth they can be legally
1507  /// represented as. The vector equivalents of these values should be truncated
1508  /// to this type.
1510 
1511  /// A type representing the costs for instructions if they were to be
1512  /// scalarized rather than vectorized. The entries are Instruction-Cost
1513  /// pairs.
1515 
1516  /// A set containing all BasicBlocks that are known to present after
1517  /// vectorization as a predicated block.
1518  SmallPtrSet<BasicBlock *, 4> PredicatedBBsAfterVectorization;
1519 
1520  /// A map holding scalar costs for different vectorization factors. The
1521  /// presence of a cost for an instruction in the mapping indicates that the
1522  /// instruction will be scalarized when vectorizing with the associated
1523  /// vectorization factor. The entries are VF-ScalarCostTy pairs.
1524  DenseMap<unsigned, ScalarCostsTy> InstsToScalarize;
1525 
1526  /// Holds the instructions known to be uniform after vectorization.
1527  /// The data is collected per VF.
1529 
1530  /// Holds the instructions known to be scalar after vectorization.
1531  /// The data is collected per VF.
1533 
1534  /// Holds the instructions (address computations) that are forced to be
1535  /// scalarized.
1537 
1538  /// Returns the expected difference in cost from scalarizing the expression
1539  /// feeding a predicated instruction \p PredInst. The instructions to
1540  /// scalarize and their scalar costs are collected in \p ScalarCosts. A
1541  /// non-negative return value implies the expression will be scalarized.
1542  /// Currently, only single-use chains are considered for scalarization.
1543  int computePredInstDiscount(Instruction *PredInst, ScalarCostsTy &ScalarCosts,
1544  unsigned VF);
1545 
1546  /// Collect the instructions that are uniform after vectorization. An
1547  /// instruction is uniform if we represent it with a single scalar value in
1548  /// the vectorized loop corresponding to each vector iteration. Examples of
1549  /// uniform instructions include pointer operands of consecutive or
1550  /// interleaved memory accesses. Note that although uniformity implies an
1551  /// instruction will be scalar, the reverse is not true. In general, a
1552  /// scalarized instruction will be represented by VF scalar values in the
1553  /// vectorized loop, each corresponding to an iteration of the original
1554  /// scalar loop.
1555  void collectLoopUniforms(unsigned VF);
1556 
1557  /// Collect the instructions that are scalar after vectorization. An
1558  /// instruction is scalar if it is known to be uniform or will be scalarized
1559  /// during vectorization. Non-uniform scalarized instructions will be
1560  /// represented by VF values in the vectorized loop, each corresponding to an
1561  /// iteration of the original scalar loop.
1562  void collectLoopScalars(unsigned VF);
1563 
1564  /// Keeps cost model vectorization decision and cost for instructions.
1565  /// Right now it is used for memory instructions only.
1567  std::pair<InstWidening, unsigned>>;
1568 
1569  DecisionList WideningDecisions;
1570 
1571 public:
1572  /// The loop that we evaluate.
1574 
1575  /// Predicated scalar evolution analysis.
1577 
1578  /// Loop Info analysis.
1580 
1581  /// Vectorization legality.
1583 
1584  /// Vector target information.
1586 
1587  /// Target Library Info.
1589 
1590  /// Demanded bits analysis.
1592 
1593  /// Assumption cache.
1595 
1596  /// Interface to emit optimization remarks.
1598 
1600 
1601  /// Loop Vectorize Hint.
1603 
1604  /// The interleave access information contains groups of interleaved accesses
1605  /// with the same stride and close to each other.
1606  InterleavedAccessInfo &InterleaveInfo;
1607 
1608  /// Values to ignore in the cost model.
1610 
1611  /// Values to ignore in the cost model when VF > 1.
1613 };
1614 
1615 } // end namespace llvm
1616 
1617 // Return true if \p OuterLp is an outer loop annotated with hints for explicit
1618 // vectorization. The loop needs to be annotated with #pragma omp simd
1619 // simdlen(#) or #pragma clang vectorize(enable) vectorize_width(#). If the
1620 // vector length information is not provided, vectorization is not considered
1621 // explicit. Interleave hints are not allowed either. These limitations will be
1622 // relaxed in the future.
1623 // Please, note that we are currently forced to abuse the pragma 'clang
1624 // vectorize' semantics. This pragma provides *auto-vectorization hints*
1625 // (i.e., LV must check that vectorization is legal) whereas pragma 'omp simd'
1626 // provides *explicit vectorization hints* (LV can bypass legal checks and
1627 // assume that vectorization is legal). However, both hints are implemented
1628 // using the same metadata (llvm.loop.vectorize, processed by
1629 // LoopVectorizeHints). This will be fixed in the future when the native IR
1630 // representation for pragma 'omp simd' is introduced.
1631 static bool isExplicitVecOuterLoop(Loop *OuterLp,
1633  assert(!OuterLp->empty() && "This is not an outer loop");
1634  LoopVectorizeHints Hints(OuterLp, true /*DisableInterleaving*/, *ORE);
1635 
1636  // Only outer loops with an explicit vectorization hint are supported.
1637  // Unannotated outer loops are ignored.
1638  if (Hints.getForce() == LoopVectorizeHints::FK_Undefined)
1639  return false;
1640 
1641  Function *Fn = OuterLp->getHeader()->getParent();
1642  if (!Hints.allowVectorization(Fn, OuterLp, false /*AlwaysVectorize*/)) {
1643  LLVM_DEBUG(dbgs() << "LV: Loop hints prevent outer loop vectorization.\n");
1644  return false;
1645  }
1646 
1647  if (!Hints.getWidth()) {
1648  LLVM_DEBUG(dbgs() << "LV: Not vectorizing: No user vector width.\n");
1649  emitMissedWarning(Fn, OuterLp, Hints, ORE);
1650  return false;
1651  }
1652 
1653  if (Hints.getInterleave() > 1) {
1654  // TODO: Interleave support is future work.
1655  LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Interleave is not supported for "
1656  "outer loops.\n");
1657  emitMissedWarning(Fn, OuterLp, Hints, ORE);
1658  return false;
1659  }
1660 
1661  return true;
1662 }
1663 
1667  // Collect inner loops and outer loops without irreducible control flow. For
1668  // now, only collect outer loops that have explicit vectorization hints. If we
1669  // are stress testing the VPlan H-CFG construction, we collect the outermost
1670  // loop of every loop nest.
1671  if (L.empty() || VPlanBuildStressTest ||
1673  LoopBlocksRPO RPOT(&L);
1674  RPOT.perform(LI);
1675  if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {
1676  V.push_back(&L);
1677  // TODO: Collect inner loops inside marked outer loops in case
1678  // vectorization fails for the outer loop. Do not invoke
1679  // 'containsIrreducibleCFG' again for inner loops when the outer loop is
1680  // already known to be reducible. We can use an inherited attribute for
1681  // that.
1682  return;
1683  }
1684  }
1685  for (Loop *InnerL : L)
1686  collectSupportedLoops(*InnerL, LI, ORE, V);
1687 }
1688 
1689 namespace {
1690 
1691 /// The LoopVectorize Pass.
1692 struct LoopVectorize : public FunctionPass {
1693  /// Pass identification, replacement for typeid
1694  static char ID;
1695 
1696  LoopVectorizePass Impl;
1697 
1698  explicit LoopVectorize(bool NoUnrolling = false, bool AlwaysVectorize = true)
1699  : FunctionPass(ID) {
1700  Impl.DisableUnrolling = NoUnrolling;
1701  Impl.AlwaysVectorize = AlwaysVectorize;
1703  }
1704 
1705  bool runOnFunction(Function &F) override {
1706  if (skipFunction(F))
1707  return false;
1708 
1709  auto *SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
1710  auto *LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
1711  auto *TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
1712  auto *DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
1713  auto *BFI = &getAnalysis<BlockFrequencyInfoWrapperPass>().getBFI();
1714  auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
1715  auto *TLI = TLIP ? &TLIP->getTLI() : nullptr;
1716  auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
1717  auto *AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
1718  auto *LAA = &getAnalysis<LoopAccessLegacyAnalysis>();
1719  auto *DB = &getAnalysis<DemandedBitsWrapperPass>().getDemandedBits();
1720  auto *ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE();
1721 
1722  std::function<const LoopAccessInfo &(Loop &)> GetLAA =
1723  [&](Loop &L) -> const LoopAccessInfo & { return LAA->getInfo(&L); };
1724 
1725  return Impl.runImpl(F, *SE, *LI, *TTI, *DT, *BFI, TLI, *DB, *AA, *AC,
1726  GetLAA, *ORE);
1727  }
1728 
1729  void getAnalysisUsage(AnalysisUsage &AU) const override {
1744  }
1745 };
1746 
1747 } // end anonymous namespace
1748 
1749 //===----------------------------------------------------------------------===//
1750 // Implementation of LoopVectorizationLegality, InnerLoopVectorizer and
1751 // LoopVectorizationCostModel and LoopVectorizationPlanner.
1752 //===----------------------------------------------------------------------===//
1753 
1755  // We need to place the broadcast of invariant variables outside the loop,
1756  // but only if it's proven safe to do so. Else, broadcast will be inside
1757  // vector loop body.
1758  Instruction *Instr = dyn_cast<Instruction>(V);
1759  bool SafeToHoist = OrigLoop->isLoopInvariant(V) &&
1760  (!Instr ||
1762  // Place the code for broadcasting invariant variables in the new preheader.
1764  if (SafeToHoist)
1766 
1767  // Broadcast the scalar into all locations in the vector.
1768  Value *Shuf = Builder.CreateVectorSplat(VF, V, "broadcast");
1769 
1770  return Shuf;
1771 }
1772 
1774  const InductionDescriptor &II, Value *Step, Instruction *EntryVal) {
1775  assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) &&
1776  "Expected either an induction phi-node or a truncate of it!");
1777  Value *Start = II.getStartValue();
1778 
1779  // Construct the initial value of the vector IV in the vector loop preheader
1780  auto CurrIP = Builder.saveIP();
1782  if (isa<TruncInst>(EntryVal)) {
1783  assert(Start->getType()->isIntegerTy() &&
1784  "Truncation requires an integer type");
1785  auto *TruncType = cast<IntegerType>(EntryVal->getType());
1786  Step = Builder.CreateTrunc(Step, TruncType);
1787  Start = Builder.CreateCast(Instruction::Trunc, Start, TruncType);
1788  }
1789  Value *SplatStart = Builder.CreateVectorSplat(VF, Start);
1790  Value *SteppedStart =
1791  getStepVector(SplatStart, 0, Step, II.getInductionOpcode());
1792 
1793  // We create vector phi nodes for both integer and floating-point induction
1794  // variables. Here, we determine the kind of arithmetic we will perform.
1795  Instruction::BinaryOps AddOp;
1796  Instruction::BinaryOps MulOp;
1797  if (Step->getType()->isIntegerTy()) {
1798  AddOp = Instruction::Add;
1799  MulOp = Instruction::Mul;
1800  } else {
1801  AddOp = II.getInductionOpcode();
1802  MulOp = Instruction::FMul;
1803  }
1804 
1805  // Multiply the vectorization factor by the step using integer or
1806  // floating-point arithmetic as appropriate.
1807  Value *ConstVF = getSignedIntOrFpConstant(Step->getType(), VF);
1808  Value *Mul = addFastMathFlag(Builder.CreateBinOp(MulOp, Step, ConstVF));
1809 
1810  // Create a vector splat to use in the induction update.
1811  //
1812  // FIXME: If the step is non-constant, we create the vector splat with
1813  // IRBuilder. IRBuilder can constant-fold the multiply, but it doesn't
1814  // handle a constant vector splat.
1815  Value *SplatVF = isa<Constant>(Mul)
1816  ? ConstantVector::getSplat(VF, cast<Constant>(Mul))
1817  : Builder.CreateVectorSplat(VF, Mul);
1818  Builder.restoreIP(CurrIP);
1819 
1820  // We may need to add the step a number of times, depending on the unroll
1821  // factor. The last of those goes into the PHI.
1822  PHINode *VecInd = PHINode::Create(SteppedStart->getType(), 2, "vec.ind",
1824  Instruction *LastInduction = VecInd;
1825  for (unsigned Part = 0; Part < UF; ++Part) {
1826  VectorLoopValueMap.setVectorValue(EntryVal, Part, LastInduction);
1827 
1828  if (isa<TruncInst>(EntryVal))
1829  addMetadata(LastInduction, EntryVal);
1830  recordVectorLoopValueForInductionCast(II, EntryVal, LastInduction, Part);
1831 
1832  LastInduction = cast<Instruction>(addFastMathFlag(
1833  Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")));
1834  }
1835 
1836  // Move the last step to the end of the latch block. This ensures consistent
1837  // placement of all induction updates.
1838  auto *LoopVectorLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch();
1839  auto *Br = cast<BranchInst>(LoopVectorLatch->getTerminator());
1840  auto *ICmp = cast<Instruction>(Br->getCondition());
1841  LastInduction->moveBefore(ICmp);
1842  LastInduction->setName("vec.ind.next");
1843 
1844  VecInd->addIncoming(SteppedStart, LoopVectorPreHeader);
1845  VecInd->addIncoming(LastInduction, LoopVectorLatch);
1846 }
1847 
1849  return Cost->isScalarAfterVectorization(I, VF) ||
1851 }
1852 
1855  return true;
1856  auto isScalarInst = [&](User *U) -> bool {
1857  auto *I = cast<Instruction>(U);
1859  };
1860  return llvm::any_of(IV->users(), isScalarInst);
1861 }
1862 
1864  const InductionDescriptor &ID, const Instruction *EntryVal,
1865  Value *VectorLoopVal, unsigned Part, unsigned Lane) {
1866  assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) &&
1867  "Expected either an induction phi-node or a truncate of it!");
1868 
1869  // This induction variable is not the phi from the original loop but the
1870  // newly-created IV based on the proof that casted Phi is equal to the
1871  // uncasted Phi in the vectorized loop (under a runtime guard possibly). It
1872  // re-uses the same InductionDescriptor that original IV uses but we don't
1873  // have to do any recording in this case - that is done when original IV is
1874  // processed.
1875  if (isa<TruncInst>(EntryVal))
1876  return;
1877 
1878  const SmallVectorImpl<Instruction *> &Casts = ID.getCastInsts();
1879  if (Casts.empty())
1880  return;
1881  // Only the first Cast instruction in the Casts vector is of interest.
1882  // The rest of the Casts (if exist) have no uses outside the
1883  // induction update chain itself.
1884  Instruction *CastInst = *Casts.begin();
1885  if (Lane < UINT_MAX)
1886  VectorLoopValueMap.setScalarValue(CastInst, {Part, Lane}, VectorLoopVal);
1887  else
1888  VectorLoopValueMap.setVectorValue(CastInst, Part, VectorLoopVal);
1889 }
1890 
1892  assert((IV->getType()->isIntegerTy() || IV != OldInduction) &&
1893  "Primary induction variable must have an integer type");
1894 
1895  auto II = Legal->getInductionVars()->find(IV);
1896  assert(II != Legal->getInductionVars()->end() && "IV is not an induction");
1897 
1898  auto ID = II->second;
1899  assert(IV->getType() == ID.getStartValue()->getType() && "Types must match");
1900 
1901  // The scalar value to broadcast. This will be derived from the canonical
1902  // induction variable.
1903  Value *ScalarIV = nullptr;
1904 
1905  // The value from the original loop to which we are mapping the new induction
1906  // variable.
1907  Instruction *EntryVal = Trunc ? cast<Instruction>(Trunc) : IV;
1908 
1909  // True if we have vectorized the induction variable.
1910  auto VectorizedIV = false;
1911 
1912  // Determine if we want a scalar version of the induction variable. This is
1913  // true if the induction variable itself is not widened, or if it has at
1914  // least one user in the loop that is not widened.
1915  auto NeedsScalarIV = VF > 1 && needsScalarInduction(EntryVal);
1916 
1917  // Generate code for the induction step. Note that induction steps are
1918  // required to be loop-invariant
1919  assert(PSE.getSE()->isLoopInvariant(ID.getStep(), OrigLoop) &&
1920  "Induction step should be loop invariant");
1921  auto &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
1922  Value *Step = nullptr;
1923  if (PSE.getSE()->isSCEVable(IV->getType())) {
1924  SCEVExpander Exp(*PSE.getSE(), DL, "induction");
1925  Step = Exp.expandCodeFor(ID.getStep(), ID.getStep()->getType(),
1927  } else {
1928  Step = cast<SCEVUnknown>(ID.getStep())->getValue();
1929  }
1930 
1931  // Try to create a new independent vector induction variable. If we can't
1932  // create the phi node, we will splat the scalar induction variable in each
1933  // loop iteration.
1934  if (VF > 1 && !shouldScalarizeInstruction(EntryVal)) {
1935  createVectorIntOrFpInductionPHI(ID, Step, EntryVal);
1936  VectorizedIV = true;
1937  }
1938 
1939  // If we haven't yet vectorized the induction variable, or if we will create
1940  // a scalar one, we need to define the scalar induction variable and step
1941  // values. If we were given a truncation type, truncate the canonical
1942  // induction variable and step. Otherwise, derive these values from the
1943  // induction descriptor.
1944  if (!VectorizedIV || NeedsScalarIV) {
1945  ScalarIV = Induction;
1946  if (IV != OldInduction) {
1947  ScalarIV = IV->getType()->isIntegerTy()
1949  : Builder.CreateCast(Instruction::SIToFP, Induction,
1950  IV->getType());
1951  ScalarIV = ID.transform(Builder, ScalarIV, PSE.getSE(), DL);
1952  ScalarIV->setName("offset.idx");
1953  }
1954  if (Trunc) {
1955  auto *TruncType = cast<IntegerType>(Trunc->getType());
1956  assert(Step->getType()->isIntegerTy() &&
1957  "Truncation requires an integer step");
1958  ScalarIV = Builder.CreateTrunc(ScalarIV, TruncType);
1959  Step = Builder.CreateTrunc(Step, TruncType);
1960  }
1961  }
1962 
1963  // If we haven't yet vectorized the induction variable, splat the scalar
1964  // induction variable, and build the necessary step vectors.
1965  // TODO: Don't do it unless the vectorized IV is really required.
1966  if (!VectorizedIV) {
1967  Value *Broadcasted = getBroadcastInstrs(ScalarIV);
1968  for (unsigned Part = 0; Part < UF; ++Part) {
1969  Value *EntryPart =
1970  getStepVector(Broadcasted, VF * Part, Step, ID.getInductionOpcode());
1971  VectorLoopValueMap.setVectorValue(EntryVal, Part, EntryPart);
1972  if (Trunc)
1973  addMetadata(EntryPart, Trunc);
1974  recordVectorLoopValueForInductionCast(ID, EntryVal, EntryPart, Part);
1975  }
1976  }
1977 
1978  // If an induction variable is only used for counting loop iterations or
1979  // calculating addresses, it doesn't need to be widened. Create scalar steps
1980  // that can be used by instructions we will later scalarize. Note that the
1981  // addition of the scalar steps will not increase the number of instructions
1982  // in the loop in the common case prior to InstCombine. We will be trading
1983  // one vector extract for each scalar step.
1984  if (NeedsScalarIV)
1985  buildScalarSteps(ScalarIV, Step, EntryVal, ID);
1986 }
1987 
1989  Instruction::BinaryOps BinOp) {
1990  // Create and check the types.
1991  assert(Val->getType()->isVectorTy() && "Must be a vector");
1992  int VLen = Val->getType()->getVectorNumElements();
1993 
1994  Type *STy = Val->getType()->getScalarType();
1995  assert((STy->isIntegerTy() || STy->isFloatingPointTy()) &&
1996  "Induction Step must be an integer or FP");
1997  assert(Step->getType() == STy && "Step has wrong type");
1998 
2000 
2001  if (STy->isIntegerTy()) {
2002  // Create a vector of consecutive numbers from zero to VF.
2003  for (int i = 0; i < VLen; ++i)
2004  Indices.push_back(ConstantInt::get(STy, StartIdx + i));
2005 
2006  // Add the consecutive indices to the vector value.
2007  Constant *Cv = ConstantVector::get(Indices);
2008  assert(Cv->getType() == Val->getType() && "Invalid consecutive vec");
2009  Step = Builder.CreateVectorSplat(VLen, Step);
2010  assert(Step->getType() == Val->getType() && "Invalid step vec");
2011  // FIXME: The newly created binary instructions should contain nsw/nuw flags,
2012  // which can be found from the original scalar operations.
2013  Step = Builder.CreateMul(Cv, Step);
2014  return Builder.CreateAdd(Val, Step, "induction");
2015  }
2016 
2017  // Floating point induction.
2018  assert((BinOp == Instruction::FAdd || BinOp == Instruction::FSub) &&
2019  "Binary Opcode should be specified for FP induction");
2020  // Create a vector of consecutive numbers from zero to VF.
2021  for (int i = 0; i < VLen; ++i)
2022  Indices.push_back(ConstantFP::get(STy, (double)(StartIdx + i)));
2023 
2024  // Add the consecutive indices to the vector value.
2025  Constant *Cv = ConstantVector::get(Indices);
2026 
2027  Step = Builder.CreateVectorSplat(VLen, Step);
2028 
2029  // Floating point operations had to be 'fast' to enable the induction.
2030  FastMathFlags Flags;
2031  Flags.setFast();
2032 
2033  Value *MulOp = Builder.CreateFMul(Cv, Step);
2034  if (isa<Instruction>(MulOp))
2035  // Have to check, MulOp may be a constant
2036  cast<Instruction>(MulOp)->setFastMathFlags(Flags);
2037 
2038  Value *BOp = Builder.CreateBinOp(BinOp, Val, MulOp, "induction");
2039  if (isa<Instruction>(BOp))
2040  cast<Instruction>(BOp)->setFastMathFlags(Flags);
2041  return BOp;
2042 }
2043 
2045  Instruction *EntryVal,
2046  const InductionDescriptor &ID) {
2047  // We shouldn't have to build scalar steps if we aren't vectorizing.
2048  assert(VF > 1 && "VF should be greater than one");
2049 
2050  // Get the value type and ensure it and the step have the same integer type.
2051  Type *ScalarIVTy = ScalarIV->getType()->getScalarType();
2052  assert(ScalarIVTy == Step->getType() &&
2053  "Val and Step should have the same type");
2054 
2055  // We build scalar steps for both integer and floating-point induction
2056  // variables. Here, we determine the kind of arithmetic we will perform.
2057  Instruction::BinaryOps AddOp;
2058  Instruction::BinaryOps MulOp;
2059  if (ScalarIVTy->isIntegerTy()) {
2060  AddOp = Instruction::Add;
2061  MulOp = Instruction::Mul;
2062  } else {
2063  AddOp = ID.getInductionOpcode();
2064  MulOp = Instruction::FMul;
2065  }
2066 
2067  // Determine the number of scalars we need to generate for each unroll
2068  // iteration. If EntryVal is uniform, we only need to generate the first
2069  // lane. Otherwise, we generate all VF values.
2070  unsigned Lanes =
2071  Cost->isUniformAfterVectorization(cast<Instruction>(EntryVal), VF) ? 1
2072  : VF;
2073  // Compute the scalar steps and save the results in VectorLoopValueMap.
2074  for (unsigned Part = 0; Part < UF; ++Part) {
2075  for (unsigned Lane = 0; Lane < Lanes; ++Lane) {
2076  auto *StartIdx = getSignedIntOrFpConstant(ScalarIVTy, VF * Part + Lane);
2077  auto *Mul = addFastMathFlag(Builder.CreateBinOp(MulOp, StartIdx, Step));
2078  auto *Add = addFastMathFlag(Builder.CreateBinOp(AddOp, ScalarIV, Mul));
2079  VectorLoopValueMap.setScalarValue(EntryVal, {Part, Lane}, Add);
2080  recordVectorLoopValueForInductionCast(ID, EntryVal, Add, Part, Lane);
2081  }
2082  }
2083 }
2084 
2086  assert(V != Induction && "The new induction variable should not be used.");
2087  assert(!V->getType()->isVectorTy() && "Can't widen a vector");
2088  assert(!V->getType()->isVoidTy() && "Type does not produce a value");
2089 
2090  // If we have a stride that is replaced by one, do it here.
2091  if (Legal->hasStride(V))
2092  V = ConstantInt::get(V->getType(), 1);
2093 
2094  // If we have a vector mapped to this value, return it.
2095  if (VectorLoopValueMap.hasVectorValue(V, Part))
2096  return VectorLoopValueMap.getVectorValue(V, Part);
2097 
2098  // If the value has not been vectorized, check if it has been scalarized
2099  // instead. If it has been scalarized, and we actually need the value in
2100  // vector form, we will construct the vector values on demand.
2102  Value *ScalarValue = VectorLoopValueMap.getScalarValue(V, {Part, 0});
2103 
2104  // If we've scalarized a value, that value should be an instruction.
2105  auto *I = cast<Instruction>(V);
2106 
2107  // If we aren't vectorizing, we can just copy the scalar map values over to
2108  // the vector map.
2109  if (VF == 1) {
2110  VectorLoopValueMap.setVectorValue(V, Part, ScalarValue);
2111  return ScalarValue;
2112  }
2113 
2114  // Get the last scalar instruction we generated for V and Part. If the value
2115  // is known to be uniform after vectorization, this corresponds to lane zero
2116  // of the Part unroll iteration. Otherwise, the last instruction is the one
2117  // we created for the last vector lane of the Part unroll iteration.
2118  unsigned LastLane = Cost->isUniformAfterVectorization(I, VF) ? 0 : VF - 1;
2119  auto *LastInst = cast<Instruction>(
2120  VectorLoopValueMap.getScalarValue(V, {Part, LastLane}));
2121 
2122  // Set the insert point after the last scalarized instruction. This ensures
2123  // the insertelement sequence will directly follow the scalar definitions.
2124  auto OldIP = Builder.saveIP();
2125  auto NewIP = std::next(BasicBlock::iterator(LastInst));
2126  Builder.SetInsertPoint(&*NewIP);
2127 
2128  // However, if we are vectorizing, we need to construct the vector values.
2129  // If the value is known to be uniform after vectorization, we can just
2130  // broadcast the scalar value corresponding to lane zero for each unroll
2131  // iteration. Otherwise, we construct the vector values using insertelement
2132  // instructions. Since the resulting vectors are stored in
2133  // VectorLoopValueMap, we will only generate the insertelements once.
2134  Value *VectorValue = nullptr;
2136  VectorValue = getBroadcastInstrs(ScalarValue);
2137  VectorLoopValueMap.setVectorValue(V, Part, VectorValue);
2138  } else {
2139  // Initialize packing with insertelements to start from undef.
2141  VectorLoopValueMap.setVectorValue(V, Part, Undef);
2142  for (unsigned Lane = 0; Lane < VF; ++Lane)
2143  packScalarIntoVectorValue(V, {Part, Lane});
2144  VectorValue = VectorLoopValueMap.getVectorValue(V, Part);
2145  }
2146  Builder.restoreIP(OldIP);
2147  return VectorValue;
2148  }
2149 
2150  // If this scalar is unknown, assume that it is a constant or that it is
2151  // loop invariant. Broadcast V and save the value for future uses.
2152  Value *B = getBroadcastInstrs(V);
2153  VectorLoopValueMap.setVectorValue(V, Part, B);
2154  return B;
2155 }
2156 
2157 Value *
2159  const VPIteration &Instance) {
2160  // If the value is not an instruction contained in the loop, it should
2161  // already be scalar.
2162  if (OrigLoop->isLoopInvariant(V))
2163  return V;
2164 
2165  assert(Instance.Lane > 0
2166  ? !Cost->isUniformAfterVectorization(cast<Instruction>(V), VF)
2167  : true && "Uniform values only have lane zero");
2168 
2169  // If the value from the original loop has not been vectorized, it is
2170  // represented by UF x VF scalar values in the new loop. Return the requested
2171  // scalar value.
2172  if (VectorLoopValueMap.hasScalarValue(V, Instance))
2173  return VectorLoopValueMap.getScalarValue(V, Instance);
2174 
2175  // If the value has not been scalarized, get its entry in VectorLoopValueMap
2176  // for the given unroll part. If this entry is not a vector type (i.e., the
2177  // vectorization factor is one), there is no need to generate an
2178  // extractelement instruction.
2179  auto *U = getOrCreateVectorValue(V, Instance.Part);
2180  if (!U->getType()->isVectorTy()) {
2181  assert(VF == 1 && "Value not scalarized has non-vector type");
2182  return U;
2183  }
2184 
2185  // Otherwise, the value from the original loop has been vectorized and is
2186  // represented by UF vector values. Extract and return the requested scalar
2187  // value from the appropriate vector lane.
2188  return Builder.CreateExtractElement(U, Builder.getInt32(Instance.Lane));
2189 }
2190 
2192  Value *V, const VPIteration &Instance) {
2193  assert(V != Induction && "The new induction variable should not be used.");
2194  assert(!V->getType()->isVectorTy() && "Can't pack a vector");
2195  assert(!V->getType()->isVoidTy() && "Type does not produce a value");
2196 
2197  Value *ScalarInst = VectorLoopValueMap.getScalarValue(V, Instance);
2198  Value *VectorValue = VectorLoopValueMap.getVectorValue(V, Instance.Part);
2199  VectorValue = Builder.CreateInsertElement(VectorValue, ScalarInst,
2200  Builder.getInt32(Instance.Lane));
2201  VectorLoopValueMap.resetVectorValue(V, Instance.Part, VectorValue);
2202 }
2203 
2205  assert(Vec->getType()->isVectorTy() && "Invalid type");
2206  SmallVector<Constant *, 8> ShuffleMask;
2207  for (unsigned i = 0; i < VF; ++i)
2208  ShuffleMask.push_back(Builder.getInt32(VF - i - 1));
2209 
2210  return Builder.CreateShuffleVector(Vec, UndefValue::get(Vec->getType()),
2211  ConstantVector::get(ShuffleMask),
2212  "reverse");
2213 }
2214 
2215 // Try to vectorize the interleave group that \p Instr belongs to.
2216 //
2217 // E.g. Translate following interleaved load group (factor = 3):
2218 // for (i = 0; i < N; i+=3) {
2219 // R = Pic[i]; // Member of index 0
2220 // G = Pic[i+1]; // Member of index 1
2221 // B = Pic[i+2]; // Member of index 2
2222 // ... // do something to R, G, B
2223 // }
2224 // To:
2225 // %wide.vec = load <12 x i32> ; Read 4 tuples of R,G,B
2226 // %R.vec = shuffle %wide.vec, undef, <0, 3, 6, 9> ; R elements
2227 // %G.vec = shuffle %wide.vec, undef, <1, 4, 7, 10> ; G elements
2228 // %B.vec = shuffle %wide.vec, undef, <2, 5, 8, 11> ; B elements
2229 //
2230 // Or translate following interleaved store group (factor = 3):
2231 // for (i = 0; i < N; i+=3) {
2232 // ... do something to R, G, B
2233 // Pic[i] = R; // Member of index 0
2234 // Pic[i+1] = G; // Member of index 1
2235 // Pic[i+2] = B; // Member of index 2
2236 // }
2237 // To:
2238 // %R_G.vec = shuffle %R.vec, %G.vec, <0, 1, 2, ..., 7>
2239 // %B_U.vec = shuffle %B.vec, undef, <0, 1, 2, 3, u, u, u, u>
2240 // %interleaved.vec = shuffle %R_G.vec, %B_U.vec,
2241 // <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> ; Interleave R,G,B elements
2242 // store <12 x i32> %interleaved.vec ; Write 4 tuples of R,G,B
2244  const InterleaveGroup *Group = Cost->getInterleavedAccessGroup(Instr);
2245  assert(Group && "Fail to get an interleaved access group.");
2246 
2247  // Skip if current instruction is not the insert position.
2248  if (Instr != Group->getInsertPos())
2249  return;
2250 
2251  const DataLayout &DL = Instr->getModule()->getDataLayout();
2252  Value *Ptr = getLoadStorePointerOperand(Instr);
2253 
2254  // Prepare for the vector type of the interleaved load/store.
2255  Type *ScalarTy = getMemInstValueType(Instr);
2256  unsigned InterleaveFactor = Group->getFactor();
2257  Type *VecTy = VectorType::get(ScalarTy, InterleaveFactor * VF);
2258  Type *PtrTy = VecTy->getPointerTo(getMemInstAddressSpace(Instr));
2259 
2260  // Prepare for the new pointers.
2262  SmallVector<Value *, 2> NewPtrs;
2263  unsigned Index = Group->getIndex(Instr);
2264 
2265  // If the group is reverse, adjust the index to refer to the last vector lane
2266  // instead of the first. We adjust the index from the first vector lane,
2267  // rather than directly getting the pointer for lane VF - 1, because the
2268  // pointer operand of the interleaved access is supposed to be uniform. For
2269  // uniform instructions, we're only required to generate a value for the
2270  // first vector lane in each unroll iteration.
2271  if (Group->isReverse())
2272  Index += (VF - 1) * Group->getFactor();
2273 
2274  bool InBounds = false;
2275  if (auto *gep = dyn_cast<GetElementPtrInst>(Ptr->stripPointerCasts()))
2276  InBounds = gep->isInBounds();
2277 
2278  for (unsigned Part = 0; Part < UF; Part++) {
2279  Value *NewPtr = getOrCreateScalarValue(Ptr, {Part, 0});
2280 
2281  // Notice current instruction could be any index. Need to adjust the address
2282  // to the member of index 0.
2283  //
2284  // E.g. a = A[i+1]; // Member of index 1 (Current instruction)
2285  // b = A[i]; // Member of index 0
2286  // Current pointer is pointed to A[i+1], adjust it to A[i].
2287  //
2288  // E.g. A[i+1] = a; // Member of index 1
2289  // A[i] = b; // Member of index 0
2290  // A[i+2] = c; // Member of index 2 (Current instruction)
2291  // Current pointer is pointed to A[i+2], adjust it to A[i].
2292  NewPtr = Builder.CreateGEP(NewPtr, Builder.getInt32(-Index));
2293  if (InBounds)
2294  cast<GetElementPtrInst>(NewPtr)->setIsInBounds(true);
2295 
2296  // Cast to the vector pointer type.
2297  NewPtrs.push_back(Builder.CreateBitCast(NewPtr, PtrTy));
2298  }
2299 
2300  setDebugLocFromInst(Builder, Instr);
2301  Value *UndefVec = UndefValue::get(VecTy);
2302 
2303  // Vectorize the interleaved load group.
2304  if (isa<LoadInst>(Instr)) {
2305  // For each unroll part, create a wide load for the group.
2306  SmallVector<Value *, 2> NewLoads;
2307  for (unsigned Part = 0; Part < UF; Part++) {
2308  auto *NewLoad = Builder.CreateAlignedLoad(
2309  NewPtrs[Part], Group->getAlignment(), "wide.vec");
2310  Group->addMetadata(NewLoad);
2311  NewLoads.push_back(NewLoad);
2312  }
2313 
2314  // For each member in the group, shuffle out the appropriate data from the
2315  // wide loads.
2316  for (unsigned I = 0; I < InterleaveFactor; ++I) {
2317  Instruction *Member = Group->getMember(I);
2318 
2319  // Skip the gaps in the group.
2320  if (!Member)
2321  continue;
2322 
2323  Constant *StrideMask = createStrideMask(Builder, I, InterleaveFactor, VF);
2324  for (unsigned Part = 0; Part < UF; Part++) {
2325  Value *StridedVec = Builder.CreateShuffleVector(
2326  NewLoads[Part], UndefVec, StrideMask, "strided.vec");
2327 
2328  // If this member has different type, cast the result type.
2329  if (Member->getType() != ScalarTy) {
2330  VectorType *OtherVTy = VectorType::get(Member->getType(), VF);
2331  StridedVec = createBitOrPointerCast(StridedVec, OtherVTy, DL);
2332  }
2333 
2334  if (Group->isReverse())
2335  StridedVec = reverseVector(StridedVec);
2336 
2337  VectorLoopValueMap.setVectorValue(Member, Part, StridedVec);
2338  }
2339  }
2340  return;
2341  }
2342 
2343  // The sub vector type for current instruction.
2344  VectorType *SubVT = VectorType::get(ScalarTy, VF);
2345 
2346  // Vectorize the interleaved store group.
2347  for (unsigned Part = 0; Part < UF; Part++) {
2348  // Collect the stored vector from each member.
2349  SmallVector<Value *, 4> StoredVecs;
2350  for (unsigned i = 0; i < InterleaveFactor; i++) {
2351  // Interleaved store group doesn't allow a gap, so each index has a member
2352  Instruction *Member = Group->getMember(i);
2353  assert(Member && "Fail to get a member from an interleaved store group");
2354 
2355  Value *StoredVec = getOrCreateVectorValue(
2356  cast<StoreInst>(Member)->getValueOperand(), Part);
2357  if (Group->isReverse())
2358  StoredVec = reverseVector(StoredVec);
2359 
2360  // If this member has different type, cast it to a unified type.
2361 
2362  if (StoredVec->getType() != SubVT)
2363  StoredVec = createBitOrPointerCast(StoredVec, SubVT, DL);
2364 
2365  StoredVecs.push_back(StoredVec);
2366  }
2367 
2368  // Concatenate all vectors into a wide vector.
2369  Value *WideVec = concatenateVectors(Builder, StoredVecs);
2370 
2371  // Interleave the elements in the wide vector.
2372  Constant *IMask = createInterleaveMask(Builder, VF, InterleaveFactor);
2373  Value *IVec = Builder.CreateShuffleVector(WideVec, UndefVec, IMask,
2374  "interleaved.vec");
2375 
2376  Instruction *NewStoreInstr =
2377  Builder.CreateAlignedStore(IVec, NewPtrs[Part], Group->getAlignment());
2378 
2379  Group->addMetadata(NewStoreInstr);
2380  }
2381 }
2382 
2384  VectorParts *BlockInMask) {
2385  // Attempt to issue a wide load.
2386  LoadInst *LI = dyn_cast<LoadInst>(Instr);
2387  StoreInst *SI = dyn_cast<StoreInst>(Instr);
2388 
2389  assert((LI || SI) && "Invalid Load/Store instruction");
2390 
2392  Cost->getWideningDecision(Instr, VF);
2394  "CM decision should be taken at this point");
2396  return vectorizeInterleaveGroup(Instr);
2397 
2398  Type *ScalarDataTy = getMemInstValueType(Instr);
2399  Type *DataTy = VectorType::get(ScalarDataTy, VF);
2400  Value *Ptr = getLoadStorePointerOperand(Instr);
2401  unsigned Alignment = getMemInstAlignment(Instr);
2402  // An alignment of 0 means target abi alignment. We need to use the scalar's
2403  // target abi alignment in such a case.
2404  const DataLayout &DL = Instr->getModule()->getDataLayout();
2405  if (!Alignment)
2406  Alignment = DL.getABITypeAlignment(ScalarDataTy);
2407  unsigned AddressSpace = getMemInstAddressSpace(Instr);
2408 
2409  // Determine if the pointer operand of the access is either consecutive or
2410  // reverse consecutive.
2411  bool Reverse = (Decision == LoopVectorizationCostModel::CM_Widen_Reverse);
2412  bool ConsecutiveStride =
2413  Reverse || (Decision == LoopVectorizationCostModel::CM_Widen);
2414  bool CreateGatherScatter =
2416 
2417  // Either Ptr feeds a vector load/store, or a vector GEP should feed a vector
2418  // gather/scatter. Otherwise Decision should have been to Scalarize.
2419  assert((ConsecutiveStride || CreateGatherScatter) &&
2420  "The instruction should be scalarized");
2421 
2422  // Handle consecutive loads/stores.
2423  if (ConsecutiveStride)
2424  Ptr = getOrCreateScalarValue(Ptr, {0, 0});
2425 
2426  VectorParts Mask;
2427  bool isMaskRequired = BlockInMask;
2428  if (isMaskRequired)
2429  Mask = *BlockInMask;
2430 
2431  bool InBounds = false;
2432  if (auto *gep = dyn_cast<GetElementPtrInst>(
2433  getLoadStorePointerOperand(Instr)->stripPointerCasts()))
2434  InBounds = gep->isInBounds();
2435 
2436  const auto CreateVecPtr = [&](unsigned Part, Value *Ptr) -> Value * {
2437  // Calculate the pointer for the specific unroll-part.
2438  GetElementPtrInst *PartPtr = nullptr;
2439 
2440  if (Reverse) {
2441  // If the address is consecutive but reversed, then the
2442  // wide store needs to start at the last vector element.
2443  PartPtr = cast<GetElementPtrInst>(
2444  Builder.CreateGEP(Ptr, Builder.getInt32(-Part * VF)));
2445  PartPtr->setIsInBounds(InBounds);
2446  PartPtr = cast<GetElementPtrInst>(
2447  Builder.CreateGEP(PartPtr, Builder.getInt32(1 - VF)));
2448  PartPtr->setIsInBounds(InBounds);
2449  if (isMaskRequired) // Reverse of a null all-one mask is a null mask.
2450  Mask[Part] = reverseVector(Mask[Part]);
2451  } else {
2452  PartPtr = cast<GetElementPtrInst>(
2453  Builder.CreateGEP(Ptr, Builder.getInt32(Part * VF)));
2454  PartPtr->setIsInBounds(InBounds);
2455  }
2456 
2457  return Builder.CreateBitCast(PartPtr, DataTy->getPointerTo(AddressSpace));
2458  };
2459 
2460  // Handle Stores:
2461  if (SI) {
2463 
2464  for (unsigned Part = 0; Part < UF; ++Part) {
2465  Instruction *NewSI = nullptr;
2466  Value *StoredVal = getOrCreateVectorValue(SI->getValueOperand(), Part);
2467  if (CreateGatherScatter) {
2468  Value *MaskPart = isMaskRequired ? Mask[Part] : nullptr;
2469  Value *VectorGep = getOrCreateVectorValue(Ptr, Part);
2470  NewSI = Builder.CreateMaskedScatter(StoredVal, VectorGep, Alignment,
2471  MaskPart);
2472  } else {
2473  if (Reverse) {
2474  // If we store to reverse consecutive memory locations, then we need
2475  // to reverse the order of elements in the stored value.
2476  StoredVal = reverseVector(StoredVal);
2477  // We don't want to update the value in the map as it might be used in
2478  // another expression. So don't call resetVectorValue(StoredVal).
2479  }
2480  auto *VecPtr = CreateVecPtr(Part, Ptr);
2481  if (isMaskRequired)
2482  NewSI = Builder.CreateMaskedStore(StoredVal, VecPtr, Alignment,
2483  Mask[Part]);
2484  else
2485  NewSI = Builder.CreateAlignedStore(StoredVal, VecPtr, Alignment);
2486  }
2487  addMetadata(NewSI, SI);
2488  }
2489  return;
2490  }
2491 
2492  // Handle loads.
2493  assert(LI && "Must have a load instruction");
2495  for (unsigned Part = 0; Part < UF; ++Part) {
2496  Value *NewLI;
2497  if (CreateGatherScatter) {
2498  Value *MaskPart = isMaskRequired ? Mask[Part] : nullptr;
2499  Value *VectorGep = getOrCreateVectorValue(Ptr, Part);
2500  NewLI = Builder.CreateMaskedGather(VectorGep, Alignment, MaskPart,
2501  nullptr, "wide.masked.gather");
2502  addMetadata(NewLI, LI);
2503  } else {
2504  auto *VecPtr = CreateVecPtr(Part, Ptr);
2505  if (isMaskRequired)
2506  NewLI = Builder.CreateMaskedLoad(VecPtr, Alignment, Mask[Part],
2507  UndefValue::get(DataTy),
2508  "wide.masked.load");
2509  else
2510  NewLI = Builder.CreateAlignedLoad(VecPtr, Alignment, "wide.load");
2511 
2512  // Add metadata to the load, but setVectorValue to the reverse shuffle.
2513  addMetadata(NewLI, LI);
2514  if (Reverse)
2515  NewLI = reverseVector(NewLI);
2516  }
2517  VectorLoopValueMap.setVectorValue(Instr, Part, NewLI);
2518  }
2519 }
2520 
2522  const VPIteration &Instance,
2523  bool IfPredicateInstr) {
2524  assert(!Instr->getType()->isAggregateType() && "Can't handle vectors");
2525 
2526  setDebugLocFromInst(Builder, Instr);
2527 
2528  // Does this instruction return a value ?
2529  bool IsVoidRetTy = Instr->getType()->isVoidTy();
2530 
2531  Instruction *Cloned = Instr->clone();
2532  if (!IsVoidRetTy)
2533  Cloned->setName(Instr->getName() + ".cloned");
2534 
2535  // Replace the operands of the cloned instructions with their scalar
2536  // equivalents in the new loop.
2537  for (unsigned op = 0, e = Instr->getNumOperands(); op != e; ++op) {
2538  auto *NewOp = getOrCreateScalarValue(Instr->getOperand(op), Instance);
2539  Cloned->setOperand(op, NewOp);
2540  }
2541  addNewMetadata(Cloned, Instr);
2542 
2543  // Place the cloned scalar in the new loop.
2544  Builder.Insert(Cloned);
2545 
2546  // Add the cloned scalar to the scalar map entry.
2547  VectorLoopValueMap.setScalarValue(Instr, Instance, Cloned);
2548 
2549  // If we just cloned a new assumption, add it the assumption cache.
2550  if (auto *II = dyn_cast<IntrinsicInst>(Cloned))
2551  if (II->getIntrinsicID() == Intrinsic::assume)
2552  AC->registerAssumption(II);
2553 
2554  // End if-block.
2555  if (IfPredicateInstr)
2556  PredicatedInstructions.push_back(Cloned);
2557 }
2558 
2560  Value *End, Value *Step,
2561  Instruction *DL) {
2562  BasicBlock *Header = L->getHeader();
2563  BasicBlock *Latch = L->getLoopLatch();
2564  // As we're just creating this loop, it's possible no latch exists
2565  // yet. If so, use the header as this will be a single block loop.
2566  if (!Latch)
2567  Latch = Header;
2568 
2571  setDebugLocFromInst(Builder, OldInst);
2572  auto *Induction = Builder.CreatePHI(Start->getType(), 2, "index");
2573 
2575  setDebugLocFromInst(Builder, OldInst);
2576 
2577  // Create i+1 and fill the PHINode.
2578  Value *Next = Builder.CreateAdd(Induction, Step, "index.next");
2579  Induction->addIncoming(Start, L->getLoopPreheader());
2580  Induction->addIncoming(Next, Latch);
2581  // Create the compare.
2582  Value *ICmp = Builder.CreateICmpEQ(Next, End);
2583  Builder.CreateCondBr(ICmp, L->getExitBlock(), Header);
2584 
2585  // Now we have two terminators. Remove the old one from the block.
2586  Latch->getTerminator()->eraseFromParent();
2587 
2588  return Induction;
2589 }
2590 
2592  if (TripCount)
2593  return TripCount;
2594 
2596  // Find the loop boundaries.
2597  ScalarEvolution *SE = PSE.getSE();
2598  const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount();
2599  assert(BackedgeTakenCount != SE->getCouldNotCompute() &&
2600  "Invalid loop count");
2601 
2602  Type *IdxTy = Legal->getWidestInductionType();
2603 
2604  // The exit count might have the type of i64 while the phi is i32. This can
2605  // happen if we have an induction variable that is sign extended before the
2606  // compare. The only way that we get a backedge taken count is that the
2607  // induction variable was signed and as such will not overflow. In such a case
2608  // truncation is legal.
2609  if (BackedgeTakenCount->getType()->getPrimitiveSizeInBits() >
2610  IdxTy->getPrimitiveSizeInBits())
2611  BackedgeTakenCount = SE->getTruncateOrNoop(BackedgeTakenCount, IdxTy);
2612  BackedgeTakenCount = SE->getNoopOrZeroExtend(BackedgeTakenCount, IdxTy);
2613 
2614  // Get the total trip count from the count by adding 1.
2615  const SCEV *ExitCount = SE->getAddExpr(
2616  BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType()));
2617 
2618  const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
2619 
2620  // Expand the trip count and place the new instructions in the preheader.
2621  // Notice that the pre-header does not change, only the loop body.
2622  SCEVExpander Exp(*SE, DL, "induction");
2623 
2624  // Count holds the overall loop count (N).
2625  TripCount = Exp.expandCodeFor(ExitCount, ExitCount->getType(),
2627 
2628  if (TripCount->getType()->isPointerTy())
2629  TripCount =
2630  CastInst::CreatePointerCast(TripCount, IdxTy, "exitcount.ptrcnt.to.int",
2632 
2633  return TripCount;
2634 }
2635 
2637  if (VectorTripCount)
2638  return VectorTripCount;
2639 
2640  Value *TC = getOrCreateTripCount(L);
2642 
2643  // Now we need to generate the expression for the part of the loop that the
2644  // vectorized body will execute. This is equal to N - (N % Step) if scalar
2645  // iterations are not required for correctness, or N - Step, otherwise. Step
2646  // is equal to the vectorization factor (number of SIMD elements) times the
2647  // unroll factor (number of SIMD instructions).
2648  Constant *Step = ConstantInt::get(TC->getType(), VF * UF);
2649  Value *R = Builder.CreateURem(TC, Step, "n.mod.vf");
2650 
2651  // If there is a non-reversed interleaved group that may speculatively access
2652  // memory out-of-bounds, we need to ensure that there will be at least one
2653  // iteration of the scalar epilogue loop. Thus, if the step evenly divides
2654  // the trip count, we set the remainder to be equal to the step. If the step
2655  // does not evenly divide the trip count, no adjustment is necessary since
2656  // there will already be scalar iterations. Note that the minimum iterations
2657  // check ensures that N >= Step.
2658  if (VF > 1 && Cost->requiresScalarEpilogue()) {
2659  auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0));
2660  R = Builder.CreateSelect(IsZero, Step, R);
2661  }
2662 
2663  VectorTripCount = Builder.CreateSub(TC, R, "n.vec");
2664 
2665  return VectorTripCount;
2666 }
2667 
2669  const DataLayout &DL) {
2670  // Verify that V is a vector type with same number of elements as DstVTy.
2671  unsigned VF = DstVTy->getNumElements();
2672  VectorType *SrcVecTy = cast<VectorType>(V->getType());
2673  assert((VF == SrcVecTy->getNumElements()) && "Vector dimensions do not match");
2674  Type *SrcElemTy = SrcVecTy->getElementType();
2675  Type *DstElemTy = DstVTy->getElementType();
2676  assert((DL.getTypeSizeInBits(SrcElemTy) == DL.getTypeSizeInBits(DstElemTy)) &&
2677  "Vector elements must have same size");
2678 
2679  // Do a direct cast if element types are castable.
2680  if (CastInst::isBitOrNoopPointerCastable(SrcElemTy, DstElemTy, DL)) {
2681  return Builder.CreateBitOrPointerCast(V, DstVTy);
2682  }
2683  // V cannot be directly casted to desired vector type.
2684  // May happen when V is a floating point vector but DstVTy is a vector of
2685  // pointers or vice-versa. Handle this using a two-step bitcast using an
2686  // intermediate Integer type for the bitcast i.e. Ptr <-> Int <-> Float.
2687  assert((DstElemTy->isPointerTy() != SrcElemTy->isPointerTy()) &&
2688  "Only one type should be a pointer type");
2689  assert((DstElemTy->isFloatingPointTy() != SrcElemTy->isFloatingPointTy()) &&
2690  "Only one type should be a floating point type");
2691  Type *IntTy =
2693  VectorType *VecIntTy = VectorType::get(IntTy, VF);
2694  Value *CastVal = Builder.CreateBitOrPointerCast(V, VecIntTy);
2695  return Builder.CreateBitOrPointerCast(CastVal, DstVTy);
2696 }
2697 
2699  BasicBlock *Bypass) {
2700  Value *Count = getOrCreateTripCount(L);
2701  BasicBlock *BB = L->getLoopPreheader();
2703 
2704  // Generate code to check if the loop's trip count is less than VF * UF, or
2705  // equal to it in case a scalar epilogue is required; this implies that the
2706  // vector trip count is zero. This check also covers the case where adding one
2707  // to the backedge-taken count overflowed leading to an incorrect trip count
2708  // of zero. In this case we will also jump to the scalar loop.
2711  Value *CheckMinIters = Builder.CreateICmp(
2712  P, Count, ConstantInt::get(Count->getType(), VF * UF), "min.iters.check");
2713 
2714  BasicBlock *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
2715  // Update dominator tree immediately if the generated block is a
2716  // LoopBypassBlock because SCEV expansions to generate loop bypass
2717  // checks may query it before the current function is finished.
2718  DT->addNewBlock(NewBB, BB);
2719  if (L->getParentLoop())
2720  L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
2722  BranchInst::Create(Bypass, NewBB, CheckMinIters));
2723  LoopBypassBlocks.push_back(BB);
2724 }
2725 
2727  BasicBlock *BB = L->getLoopPreheader();
2728 
2729  // Generate the code to check that the SCEV assumptions that we made.
2730  // We want the new basic block to start at the first instruction in a
2731  // sequence of instructions that form a check.
2732  SCEVExpander Exp(*PSE.getSE(), Bypass->getModule()->getDataLayout(),
2733  "scev.check");
2734  Value *SCEVCheck =
2735  Exp.expandCodeForPredicate(&PSE.getUnionPredicate(), BB->getTerminator());
2736 
2737  if (auto *C = dyn_cast<ConstantInt>(SCEVCheck))
2738  if (C->isZero())
2739  return;
2740 
2741  // Create a new block containing the stride check.
2742  BB->setName("vector.scevcheck");
2743  auto *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
2744  // Update dominator tree immediately if the generated block is a
2745  // LoopBypassBlock because SCEV expansions to generate loop bypass
2746  // checks may query it before the current function is finished.
2747  DT->addNewBlock(NewBB, BB);
2748  if (L->getParentLoop())
2749  L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
2751  BranchInst::Create(Bypass, NewBB, SCEVCheck));
2752  LoopBypassBlocks.push_back(BB);
2753  AddedSafetyChecks = true;
2754 }
2755 
2757  BasicBlock *BB = L->getLoopPreheader();
2758 
2759  // Generate the code that checks in runtime if arrays overlap. We put the
2760  // checks into a separate block to make the more common case of few elements
2761  // faster.
2762  Instruction *FirstCheckInst;
2763  Instruction *MemRuntimeCheck;
2764  std::tie(FirstCheckInst, MemRuntimeCheck) =
2766  if (!MemRuntimeCheck)
2767  return;
2768 
2769  // Create a new block containing the memory check.
2770  BB->setName("vector.memcheck");
2771  auto *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
2772  // Update dominator tree immediately if the generated block is a
2773  // LoopBypassBlock because SCEV expansions to generate loop bypass
2774  // checks may query it before the current function is finished.
2775  DT->addNewBlock(NewBB, BB);
2776  if (L->getParentLoop())
2777  L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
2779  BranchInst::Create(Bypass, NewBB, MemRuntimeCheck));
2780  LoopBypassBlocks.push_back(BB);
2781  AddedSafetyChecks = true;
2782 
2783  // We currently don't use LoopVersioning for the actual loop cloning but we
2784  // still use it to add the noalias metadata.
2785  LVer = llvm::make_unique<LoopVersioning>(*Legal->getLAI(), OrigLoop, LI, DT,
2786  PSE.getSE());
2787  LVer->prepareNoAliasMetadata();
2788 }
2789 
2791  /*
2792  In this function we generate a new loop. The new loop will contain
2793  the vectorized instructions while the old loop will continue to run the
2794  scalar remainder.
2795 
2796  [ ] <-- loop iteration number check.
2797  / |
2798  / v
2799  | [ ] <-- vector loop bypass (may consist of multiple blocks).
2800  | / |
2801  | / v
2802  || [ ] <-- vector pre header.
2803  |/ |
2804  | v
2805  | [ ] \
2806  | [ ]_| <-- vector loop.
2807  | |
2808  | v
2809  | -[ ] <--- middle-block.
2810  | / |
2811  | / v
2812  -|- >[ ] <--- new preheader.
2813  | |
2814  | v
2815  | [ ] \
2816  | [ ]_| <-- old scalar loop to handle remainder.
2817  \ |
2818  \ v
2819  >[ ] <-- exit block.
2820  ...
2821  */
2822 
2823  BasicBlock *OldBasicBlock = OrigLoop->getHeader();
2824  BasicBlock *VectorPH = OrigLoop->getLoopPreheader();
2825  BasicBlock *ExitBlock = OrigLoop->getExitBlock();
2826  assert(VectorPH && "Invalid loop structure");
2827  assert(ExitBlock && "Must have an exit block");
2828 
2829  // Some loops have a single integer induction variable, while other loops
2830  // don't. One example is c++ iterators that often have multiple pointer
2831  // induction variables. In the code below we also support a case where we
2832  // don't have a single induction variable.
2833  //
2834  // We try to obtain an induction variable from the original loop as hard
2835  // as possible. However if we don't find one that:
2836  // - is an integer
2837  // - counts from zero, stepping by one
2838  // - is the size of the widest induction variable type
2839  // then we create a new one.
2841  Type *IdxTy = Legal->getWidestInductionType();
2842 
2843  // Split the single block loop into the two loop structure described above.
2844  BasicBlock *VecBody =
2845  VectorPH->splitBasicBlock(VectorPH->getTerminator(), "vector.body");
2846  BasicBlock *MiddleBlock =
2847  VecBody->splitBasicBlock(VecBody->getTerminator(), "middle.block");
2848  BasicBlock *ScalarPH =
2849  MiddleBlock->splitBasicBlock(MiddleBlock->getTerminator(), "scalar.ph");
2850 
2851  // Create and register the new vector loop.
2852  Loop *Lp = LI->AllocateLoop();
2853  Loop *ParentLoop = OrigLoop->getParentLoop();
2854 
2855  // Insert the new loop into the loop nest and register the new basic blocks
2856  // before calling any utilities such as SCEV that require valid LoopInfo.
2857  if (ParentLoop) {
2858  ParentLoop->addChildLoop(Lp);
2859  ParentLoop->addBasicBlockToLoop(ScalarPH, *LI);
2860  ParentLoop->addBasicBlockToLoop(MiddleBlock, *LI);
2861  } else {
2862  LI->addTopLevelLoop(Lp);
2863  }
2864  Lp->addBasicBlockToLoop(VecBody, *LI);
2865 
2866  // Find the loop boundaries.
2867  Value *Count = getOrCreateTripCount(Lp);
2868 
2869  Value *StartIdx = ConstantInt::get(IdxTy, 0);
2870 
2871  // Now, compare the new count to zero. If it is zero skip the vector loop and
2872  // jump to the scalar loop. This check also covers the case where the
2873  // backedge-taken count is uint##_max: adding one to it will overflow leading
2874  // to an incorrect trip count of zero. In this (rare) case we will also jump
2875  // to the scalar loop.
2876  emitMinimumIterationCountCheck(Lp, ScalarPH);
2877 
2878  // Generate the code to check any assumptions that we've made for SCEV
2879  // expressions.
2880  emitSCEVChecks(Lp, ScalarPH);
2881 
2882  // Generate the code that checks in runtime if arrays overlap. We put the
2883  // checks into a separate block to make the more common case of few elements
2884  // faster.
2885  emitMemRuntimeChecks(Lp, ScalarPH);
2886 
2887  // Generate the induction variable.
2888  // The loop step is equal to the vectorization factor (num of SIMD elements)
2889  // times the unroll factor (num of SIMD instructions).
2890  Value *CountRoundDown = getOrCreateVectorTripCount(Lp);
2891  Constant *Step = ConstantInt::get(IdxTy, VF * UF);
2892  Induction =
2893  createInductionVariable(Lp, StartIdx, CountRoundDown, Step,
2895 
2896  // We are going to resume the execution of the scalar loop.
2897  // Go over all of the induction variables that we found and fix the
2898  // PHIs that are left in the scalar version of the loop.
2899  // The starting values of PHI nodes depend on the counter of the last
2900  // iteration in the vectorized loop.
2901  // If we come from a bypass edge then we need to start from the original
2902  // start value.
2903 
2904  // This variable saves the new starting index for the scalar loop. It is used
2905  // to test if there are any tail iterations left once the vector loop has
2906  // completed.
2908  for (auto &InductionEntry : *List) {
2909  PHINode *OrigPhi = InductionEntry.first;
2910  InductionDescriptor II = InductionEntry.second;
2911 
2912  // Create phi nodes to merge from the backedge-taken check block.
2913  PHINode *BCResumeVal = PHINode::Create(
2914  OrigPhi->getType(), 3, "bc.resume.val", ScalarPH->getTerminator());
2915  Value *&EndValue = IVEndValues[OrigPhi];
2916  if (OrigPhi == OldInduction) {
2917  // We know what the end value is.
2918  EndValue = CountRoundDown;
2919  } else {
2921  Type *StepType = II.getStep()->getType();
2922  Instruction::CastOps CastOp =
2923  CastInst::getCastOpcode(CountRoundDown, true, StepType, true);
2924  Value *CRD = B.CreateCast(CastOp, CountRoundDown, StepType, "cast.crd");
2925  const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
2926  EndValue = II.transform(B, CRD, PSE.getSE(), DL);
2927  EndValue->setName("ind.end");
2928  }
2929 
2930  // The new PHI merges the original incoming value, in case of a bypass,
2931  // or the value at the end of the vectorized loop.
2932  BCResumeVal->addIncoming(EndValue, MiddleBlock);
2933 
2934  // Fix the scalar body counter (PHI node).
2935  unsigned BlockIdx = OrigPhi->getBasicBlockIndex(ScalarPH);
2936 
2937  // The old induction's phi node in the scalar body needs the truncated
2938  // value.
2939  for (BasicBlock *BB : LoopBypassBlocks)
2940  BCResumeVal->addIncoming(II.getStartValue(), BB);
2941  OrigPhi->setIncomingValue(BlockIdx, BCResumeVal);
2942  }
2943 
2944  // Add a check in the middle block to see if we have completed
2945  // all of the iterations in the first vector loop.
2946  // If (N - N%VF) == N, then we *don't* need to run the remainder.
2947  Value *CmpN =
2948  CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ, Count,
2949  CountRoundDown, "cmp.n", MiddleBlock->getTerminator());
2950  ReplaceInstWithInst(MiddleBlock->getTerminator(),
2951  BranchInst::Create(ExitBlock, ScalarPH, CmpN));
2952 
2953  // Get ready to start creating new instructions into the vectorized body.
2955 
2956  // Save the state.
2958  LoopScalarPreHeader = ScalarPH;
2959  LoopMiddleBlock = MiddleBlock;
2960  LoopExitBlock = ExitBlock;
2961  LoopVectorBody = VecBody;
2962  LoopScalarBody = OldBasicBlock;
2963 
2964  // Keep all loop hints from the original loop on the vector loop (we'll
2965  // replace the vectorizer-specific hints below).
2966  if (MDNode *LID = OrigLoop->getLoopID())
2967  Lp->setLoopID(LID);
2968 
2969  LoopVectorizeHints Hints(Lp, true, *ORE);
2970  Hints.setAlreadyVectorized();
2971 
2972  return LoopVectorPreHeader;
2973 }
2974 
2975 // Fix up external users of the induction variable. At this point, we are
2976 // in LCSSA form, with all external PHIs that use the IV having one input value,
2977 // coming from the remainder loop. We need those PHIs to also have a correct
2978 // value for the IV when arriving directly from the middle block.
2980  const InductionDescriptor &II,
2981  Value *CountRoundDown, Value *EndValue,
2982  BasicBlock *MiddleBlock) {
2983  // There are two kinds of external IV usages - those that use the value
2984  // computed in the last iteration (the PHI) and those that use the penultimate
2985  // value (the value that feeds into the phi from the loop latch).
2986  // We allow both, but they, obviously, have different values.
2987 
2988  assert(OrigLoop->getExitBlock() && "Expected a single exit block");
2989 
2990  DenseMap<Value *, Value *> MissingVals;
2991 
2992  // An external user of the last iteration's value should see the value that
2993  // the remainder loop uses to initialize its own IV.
2995  for (User *U : PostInc->users()) {
2996  Instruction *UI = cast<Instruction>(U);
2997  if (!OrigLoop->contains(UI)) {
2998  assert(isa<PHINode>(UI) && "Expected LCSSA form");
2999  MissingVals[UI] = EndValue;
3000  }
3001  }
3002 
3003  // An external user of the penultimate value need to see EndValue - Step.
3004  // The simplest way to get this is to recompute it from the constituent SCEVs,
3005  // that is Start + (Step * (CRD - 1)).
3006  for (User *U : OrigPhi->users()) {
3007  auto *UI = cast<Instruction>(U);
3008  if (!OrigLoop->contains(UI)) {
3009  const DataLayout &DL =
3011  assert(isa<PHINode>(UI) && "Expected LCSSA form");
3012 
3013  IRBuilder<> B(MiddleBlock->getTerminator());
3014  Value *CountMinusOne = B.CreateSub(
3015  CountRoundDown, ConstantInt::get(CountRoundDown->getType(), 1));
3016  Value *CMO =
3017  !II.getStep()->getType()->isIntegerTy()
3018  ? B.CreateCast(Instruction::SIToFP, CountMinusOne,
3019  II.getStep()->getType())
3020  : B.CreateSExtOrTrunc(CountMinusOne, II.getStep()->getType());
3021  CMO->setName("cast.cmo");
3022  Value *Escape = II.transform(B, CMO, PSE.getSE(), DL);
3023  Escape->setName("ind.escape");
3024  MissingVals[UI] = Escape;
3025  }
3026  }
3027 
3028  for (auto &I : MissingVals) {
3029  PHINode *PHI = cast<PHINode>(I.first);
3030  // One corner case we have to handle is two IVs "chasing" each-other,
3031  // that is %IV2 = phi [...], [ %IV1, %latch ]
3032  // In this case, if IV1 has an external use, we need to avoid adding both
3033  // "last value of IV1" and "penultimate value of IV2". So, verify that we
3034  // don't already have an incoming value for the middle block.
3035  if (PHI->getBasicBlockIndex(MiddleBlock) == -1)
3036  PHI->addIncoming(I.second, MiddleBlock);
3037  }
3038 }
3039 
3040 namespace {
3041 
3042 struct CSEDenseMapInfo {
3043  static bool canHandle(const Instruction *I) {
3044  return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
3045  isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I);
3046  }
3047 
3048  static inline Instruction *getEmptyKey() {
3050  }
3051 
3052  static inline Instruction *getTombstoneKey() {
3054  }
3055 
3056  static unsigned getHashValue(const Instruction *I) {
3057  assert(canHandle(I) && "Unknown instruction!");
3059  I->value_op_end()));
3060  }
3061 
3062  static bool isEqual(const Instruction *LHS, const Instruction *RHS) {
3063  if (LHS == getEmptyKey() || RHS == getEmptyKey() ||
3064  LHS == getTombstoneKey() || RHS == getTombstoneKey())
3065  return LHS == RHS;
3066  return LHS->isIdenticalTo(RHS);
3067  }
3068 };
3069 
3070 } // end anonymous namespace
3071 
3072 ///Perform cse of induction variable instructions.
3073 static void cse(BasicBlock *BB) {
3074  // Perform simple cse.
3076  for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) {
3077  Instruction *In = &*I++;
3078 
3079  if (!CSEDenseMapInfo::canHandle(In))
3080  continue;
3081 
3082  // Check if we can replace this instruction with any of the
3083  // visited instructions.
3084  if (Instruction *V = CSEMap.lookup(In)) {
3085  In->replaceAllUsesWith(V);
3086  In->eraseFromParent();
3087  continue;
3088  }
3089 
3090  CSEMap[In] = In;
3091  }
3092 }
3093 
3094 /// Estimate the overhead of scalarizing an instruction. This is a
3095 /// convenience wrapper for the type-based getScalarizationOverhead API.
3096 static unsigned getScalarizationOverhead(Instruction *I, unsigned VF,
3097  const TargetTransformInfo &TTI) {
3098  if (VF == 1)
3099  return 0;
3100 
3101  unsigned Cost = 0;
3102  Type *RetTy = ToVectorTy(I->getType(), VF);
3103  if (!RetTy->isVoidTy() &&
3104  (!isa<LoadInst>(I) ||
3106  Cost += TTI.getScalarizationOverhead(RetTy, true, false);
3107 
3108  if (CallInst *CI = dyn_cast<CallInst>(I)) {
3109  SmallVector<const Value *, 4> Operands(CI->arg_operands());
3110  Cost += TTI.getOperandsScalarizationOverhead(Operands, VF);
3111  }
3112  else if (!isa<StoreInst>(I) ||
3115  Cost += TTI.getOperandsScalarizationOverhead(Operands, VF);
3116  }
3117 
3118  return Cost;
3119 }
3120 
3121 // Estimate cost of a call instruction CI if it were vectorized with factor VF.
3122 // Return the cost of the instruction, including scalarization overhead if it's
3123 // needed. The flag NeedToScalarize shows if the call needs to be scalarized -
3124 // i.e. either vector version isn't available, or is too expensive.
3125 static unsigned getVectorCallCost(CallInst *CI, unsigned VF,
3126  const TargetTransformInfo &TTI,
3127  const TargetLibraryInfo *TLI,
3128  bool &NeedToScalarize) {
3129  Function *F = CI->getCalledFunction();
3130  StringRef FnName = CI->getCalledFunction()->getName();
3131  Type *ScalarRetTy = CI->getType();
3132  SmallVector<Type *, 4> Tys, ScalarTys;
3133  for (auto &ArgOp : CI->arg_operands())
3134  ScalarTys.push_back(ArgOp->getType());
3135 
3136  // Estimate cost of scalarized vector call. The source operands are assumed
3137  // to be vectors, so we need to extract individual elements from there,
3138  // execute VF scalar calls, and then gather the result into the vector return
3139  // value.
3140  unsigned ScalarCallCost = TTI.getCallInstrCost(F, ScalarRetTy, ScalarTys);
3141  if (VF == 1)
3142  return ScalarCallCost;
3143 
3144  // Compute corresponding vector type for return value and arguments.
3145  Type *RetTy = ToVectorTy(ScalarRetTy, VF);
3146  for (Type *ScalarTy : ScalarTys)
3147  Tys.push_back(ToVectorTy(ScalarTy, VF));
3148 
3149  // Compute costs of unpacking argument values for the scalar calls and
3150  // packing the return values to a vector.
3151  unsigned ScalarizationCost = getScalarizationOverhead(CI, VF, TTI);
3152 
3153  unsigned Cost = ScalarCallCost * VF + ScalarizationCost;
3154 
3155  // If we can't emit a vector call for this function, then the currently found
3156  // cost is the cost we need to return.
3157  NeedToScalarize = true;
3158  if (!TLI || !TLI->isFunctionVectorizable(FnName, VF) || CI->isNoBuiltin())
3159  return Cost;
3160 
3161  // If the corresponding vector cost is cheaper, return its cost.
3162  unsigned VectorCallCost = TTI.getCallInstrCost(nullptr, RetTy, Tys);
3163  if (VectorCallCost < Cost) {
3164  NeedToScalarize = false;
3165  return VectorCallCost;
3166  }
3167  return Cost;
3168 }
3169 
3170 // Estimate cost of an intrinsic call instruction CI if it were vectorized with
3171 // factor VF. Return the cost of the instruction, including scalarization
3172 // overhead if it's needed.
3173 static unsigned getVectorIntrinsicCost(CallInst *CI, unsigned VF,
3174  const TargetTransformInfo &TTI,
3175  const TargetLibraryInfo *TLI) {
3177  assert(ID && "Expected intrinsic call!");
3178 
3179  FastMathFlags FMF;
3180  if (auto *FPMO = dyn_cast<FPMathOperator>(CI))
3181  FMF = FPMO->getFastMathFlags();
3182 
3183  SmallVector<Value *, 4> Operands(CI->arg_operands());
3184  return TTI.getIntrinsicInstrCost(ID, CI->getType(), Operands, FMF, VF);
3185 }
3186 
3188  auto *I1 = cast<IntegerType>(T1->getVectorElementType());
3189  auto *I2 = cast<IntegerType>(T2->getVectorElementType());
3190  return I1->getBitWidth() < I2->getBitWidth() ? T1 : T2;
3191 }
3193  auto *I1 = cast<IntegerType>(T1->getVectorElementType());
3194  auto *I2 = cast<IntegerType>(T2->getVectorElementType());
3195  return I1->getBitWidth() > I2->getBitWidth() ? T1 : T2;
3196 }
3197 
3199  // For every instruction `I` in MinBWs, truncate the operands, create a
3200  // truncated version of `I` and reextend its result. InstCombine runs
3201  // later and will remove any ext/trunc pairs.
3202  SmallPtrSet<Value *, 4> Erased;
3203  for (const auto &KV : Cost->getMinimalBitwidths()) {
3204  // If the value wasn't vectorized, we must maintain the original scalar
3205  // type. The absence of the value from VectorLoopValueMap indicates that it
3206  // wasn't vectorized.
3207  if (!VectorLoopValueMap.hasAnyVectorValue(KV.first))
3208  continue;
3209  for (unsigned Part = 0; Part < UF; ++Part) {
3210  Value *I = getOrCreateVectorValue(KV.first, Part);
3211  if (Erased.count(I) || I->use_empty() || !isa<Instruction>(I))
3212  continue;
3213  Type *OriginalTy = I->getType();
3214  Type *ScalarTruncatedTy =
3215  IntegerType::get(OriginalTy->getContext(), KV.second);
3216  Type *TruncatedTy = VectorType::get(ScalarTruncatedTy,
3217  OriginalTy->getVectorNumElements());
3218  if (TruncatedTy == OriginalTy)
3219  continue;
3220 
3221  IRBuilder<> B(cast<Instruction>(I));
3222  auto ShrinkOperand = [&](Value *V) -> Value * {
3223  if (auto *ZI = dyn_cast<ZExtInst>(V))
3224  if (ZI->getSrcTy() == TruncatedTy)
3225  return ZI->getOperand(0);
3226  return B.CreateZExtOrTrunc(V, TruncatedTy);
3227  };
3228 
3229  // The actual instruction modification depends on the instruction type,
3230  // unfortunately.
3231  Value *NewI = nullptr;
3232  if (auto *BO = dyn_cast<BinaryOperator>(I)) {
3233  NewI = B.CreateBinOp(BO->getOpcode(), ShrinkOperand(BO->getOperand(0)),
3234  ShrinkOperand(BO->getOperand(1)));
3235 
3236  // Any wrapping introduced by shrinking this operation shouldn't be
3237  // considered undefined behavior. So, we can't unconditionally copy
3238  // arithmetic wrapping flags to NewI.
3239  cast<BinaryOperator>(NewI)->copyIRFlags(I, /*IncludeWrapFlags=*/false);
3240  } else if (auto *CI = dyn_cast<ICmpInst>(I)) {
3241  NewI =
3242  B.CreateICmp(CI->getPredicate(), ShrinkOperand(CI->getOperand(0)),
3243  ShrinkOperand(CI->getOperand(1)));
3244  } else if (auto *SI = dyn_cast<SelectInst>(I)) {
3245  NewI = B.CreateSelect(SI->getCondition(),
3246  ShrinkOperand(SI->getTrueValue()),
3247  ShrinkOperand(SI->getFalseValue()));
3248  } else if (auto *CI = dyn_cast<CastInst>(I)) {
3249  switch (CI->getOpcode()) {
3250  default:
3251  llvm_unreachable("Unhandled cast!");
3252  case Instruction::Trunc:
3253  NewI = ShrinkOperand(CI->getOperand(0));
3254  break;
3255  case Instruction::SExt:
3256  NewI = B.CreateSExtOrTrunc(
3257  CI->getOperand(0),
3258  smallestIntegerVectorType(OriginalTy, TruncatedTy));
3259  break;
3260  case Instruction::ZExt:
3261  NewI = B.CreateZExtOrTrunc(
3262  CI->getOperand(0),
3263  smallestIntegerVectorType(OriginalTy, TruncatedTy));
3264  break;
3265  }
3266  } else if (auto *SI = dyn_cast<ShuffleVectorInst>(I)) {
3267  auto Elements0 = SI->getOperand(0)->getType()->getVectorNumElements();
3268  auto *O0 = B.CreateZExtOrTrunc(
3269  SI->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements0));
3270  auto Elements1 = SI->getOperand(1)->getType()->getVectorNumElements();
3271  auto *O1 = B.CreateZExtOrTrunc(
3272  SI->getOperand(1), VectorType::get(ScalarTruncatedTy, Elements1));
3273 
3274  NewI = B.CreateShuffleVector(O0, O1, SI->getMask());
3275  } else if (isa<LoadInst>(I)) {
3276  // Don't do anything with the operands, just extend the result.
3277  continue;
3278  } else if (auto *IE = dyn_cast<InsertElementInst>(I)) {
3279  auto Elements = IE->getOperand(0)->getType()->getVectorNumElements();
3280  auto *O0 = B.CreateZExtOrTrunc(
3281  IE->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements));
3282  auto *O1 = B.CreateZExtOrTrunc(IE->getOperand(1), ScalarTruncatedTy);
3283  NewI = B.CreateInsertElement(O0, O1, IE->getOperand(2));
3284  } else if (auto *EE = dyn_cast<ExtractElementInst>(I)) {
3285  auto Elements = EE->getOperand(0)->getType()->getVectorNumElements();
3286  auto *O0 = B.CreateZExtOrTrunc(
3287  EE->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements));
3288  NewI = B.CreateExtractElement(O0, EE->getOperand(2));
3289  } else {
3290  llvm_unreachable("Unhandled instruction type!");
3291  }
3292 
3293  // Lastly, extend the result.
3294  NewI->takeName(cast<Instruction>(I));
3295  Value *Res = B.CreateZExtOrTrunc(NewI, OriginalTy);
3296  I->replaceAllUsesWith(Res);
3297  cast<Instruction>(I)->eraseFromParent();
3298  Erased.insert(I);
3299  VectorLoopValueMap.resetVectorValue(KV.first, Part, Res);
3300  }
3301  }
3302 
3303  // We'll have created a bunch of ZExts that are now parentless. Clean up.
3304  for (const auto &KV : Cost->getMinimalBitwidths()) {
3305  // If the value wasn't vectorized, we must maintain the original scalar
3306  // type. The absence of the value from VectorLoopValueMap indicates that it
3307  // wasn't vectorized.
3308  if (!VectorLoopValueMap.hasAnyVectorValue(KV.first))
3309  continue;
3310  for (unsigned Part = 0; Part < UF; ++Part) {
3311  Value *I = getOrCreateVectorValue(KV.first, Part);
3312  ZExtInst *Inst = dyn_cast<ZExtInst>(I);
3313  if (Inst && Inst->use_empty()) {
3314  Value *NewI = Inst->getOperand(0);
3315  Inst->eraseFromParent();
3316  VectorLoopValueMap.resetVectorValue(KV.first, Part, NewI);
3317  }
3318  }
3319  }
3320 }
3321 
3323  // Insert truncates and extends for any truncated instructions as hints to
3324  // InstCombine.
3325  if (VF > 1)
3327 
3328  // At this point every instruction in the original loop is widened to a
3329  // vector form. Now we need to fix the recurrences in the loop. These PHI
3330  // nodes are currently empty because we did not want to introduce cycles.
3331  // This is the second stage of vectorizing recurrences.
3333 
3334  // Update the dominator tree.
3335  //
3336  // FIXME: After creating the structure of the new loop, the dominator tree is
3337  // no longer up-to-date, and it remains that way until we update it
3338  // here. An out-of-date dominator tree is problematic for SCEV,
3339  // because SCEVExpander uses it to guide code generation. The
3340  // vectorizer use SCEVExpanders in several places. Instead, we should
3341  // keep the dominator tree up-to-date as we go.
3342  updateAnalysis();
3343 
3344  // Fix-up external users of the induction variables.
3345  for (auto &Entry : *Legal->getInductionVars())
3346  fixupIVUsers(Entry.first, Entry.second,
3348  IVEndValues[Entry.first], LoopMiddleBlock);
3349 
3350  fixLCSSAPHIs();
3352  sinkScalarOperands(&*PI);
3353 
3354  // Remove redundant induction instructions.
3356 }
3357 
3359  // In order to support recurrences we need to be able to vectorize Phi nodes.
3360  // Phi nodes have cycles, so we need to vectorize them in two stages. This is
3361  // stage #2: We now need to fix the recurrences by adding incoming edges to
3362  // the currently empty PHI nodes. At this point every instruction in the
3363  // original loop is widened to a vector form so we can use them to construct
3364  // the incoming edges.
3365  for (PHINode &Phi : OrigLoop->getHeader()->phis()) {
3366  // Handle first-order recurrences and reductions that need to be fixed.
3367  if (Legal->isFirstOrderRecurrence(&Phi))
3369  else if (Legal->isReductionVariable(&Phi))
3370  fixReduction(&Phi);
3371  }
3372 }
3373 
3375  // This is the second phase of vectorizing first-order recurrences. An
3376  // overview of the transformation is described below. Suppose we have the
3377  // following loop.
3378  //
3379  // for (int i = 0; i < n; ++i)
3380  // b[i] = a[i] - a[i - 1];
3381  //
3382  // There is a first-order recurrence on "a". For this loop, the shorthand
3383  // scalar IR looks like:
3384  //
3385  // scalar.ph:
3386  // s_init = a[-1]
3387  // br scalar.body
3388  //
3389  // scalar.body:
3390  // i = phi [0, scalar.ph], [i+1, scalar.body]
3391  // s1 = phi [s_init, scalar.ph], [s2, scalar.body]
3392  // s2 = a[i]
3393  // b[i] = s2 - s1
3394  // br cond, scalar.body, ...
3395  //
3396  // In this example, s1 is a recurrence because it's value depends on the
3397  // previous iteration. In the first phase of vectorization, we created a
3398  // temporary value for s1. We now complete the vectorization and produce the
3399  // shorthand vector IR shown below (for VF = 4, UF = 1).
3400  //
3401  // vector.ph:
3402  // v_init = vector(..., ..., ..., a[-1])
3403  // br vector.body
3404  //
3405  // vector.body
3406  // i = phi [0, vector.ph], [i+4, vector.body]
3407  // v1 = phi [v_init, vector.ph], [v2, vector.body]
3408  // v2 = a[i, i+1, i+2, i+3];
3409  // v3 = vector(v1(3), v2(0, 1, 2))
3410  // b[i, i+1, i+2, i+3] = v2 - v3
3411  // br cond, vector.body, middle.block
3412  //
3413  // middle.block:
3414  // x = v2(3)
3415  // br scalar.ph
3416  //
3417  // scalar.ph:
3418  // s_init = phi [x, middle.block], [a[-1], otherwise]
3419  // br scalar.body
3420  //
3421  // After execution completes the vector loop, we extract the next value of
3422  // the recurrence (x) to use as the initial value in the scalar loop.
3423 
3424  // Get the original loop preheader and single loop latch.
3425  auto *Preheader = OrigLoop->getLoopPreheader();
3426  auto *Latch = OrigLoop->getLoopLatch();
3427 
3428  // Get the initial and previous values of the scalar recurrence.
3429  auto *ScalarInit = Phi->getIncomingValueForBlock(Preheader);
3430  auto *Previous = Phi->getIncomingValueForBlock(Latch);
3431 
3432  // Create a vector from the initial value.
3433  auto *VectorInit = ScalarInit;
3434  if (VF > 1) {
3436  VectorInit = Builder.CreateInsertElement(
3437  UndefValue::get(VectorType::get(VectorInit->getType(), VF)), VectorInit,
3438  Builder.getInt32(VF - 1), "vector.recur.init");
3439  }
3440 
3441  // We constructed a temporary phi node in the first phase of vectorization.
3442  // This phi node will eventually be deleted.
3444  cast<Instruction>(VectorLoopValueMap.getVectorValue(Phi, 0)));
3445 
3446  // Create a phi node for the new recurrence. The current value will either be
3447  // the initial value inserted into a vector or loop-varying vector value.
3448  auto *VecPhi = Builder.CreatePHI(VectorInit->getType(), 2, "vector.recur");
3449  VecPhi->addIncoming(VectorInit, LoopVectorPreHeader);
3450 
3451  // Get the vectorized previous value of the last part UF - 1. It appears last
3452  // among all unrolled iterations, due to the order of their construction.
3453  Value *PreviousLastPart = getOrCreateVectorValue(Previous, UF - 1);
3454 
3455  // Set the insertion point after the previous value if it is an instruction.
3456  // Note that the previous value may have been constant-folded so it is not
3457  // guaranteed to be an instruction in the vector loop. Also, if the previous
3458  // value is a phi node, we should insert after all the phi nodes to avoid
3459  // breaking basic block verification.
3460  if (LI->getLoopFor(LoopVectorBody)->isLoopInvariant(PreviousLastPart) ||
3461  isa<PHINode>(PreviousLastPart))
3463  else
3465  &*++BasicBlock::iterator(cast<Instruction>(PreviousLastPart)));
3466 
3467  // We will construct a vector for the recurrence by combining the values for
3468  // the current and previous iterations. This is the required shuffle mask.
3469  SmallVector<Constant *, 8> ShuffleMask(VF);
3470  ShuffleMask[0] = Builder.getInt32(VF - 1);
3471  for (unsigned I = 1; I < VF; ++I)
3472  ShuffleMask[I] = Builder.getInt32(I + VF - 1);
3473 
3474  // The vector from which to take the initial value for the current iteration
3475  // (actual or unrolled). Initially, this is the vector phi node.
3476  Value *Incoming = VecPhi;
3477 
3478  // Shuffle the current and previous vector and update the vector parts.
3479  for (unsigned Part = 0; Part < UF; ++Part) {
3480  Value *PreviousPart = getOrCreateVectorValue(Previous, Part);
3481  Value *PhiPart = VectorLoopValueMap.getVectorValue(Phi, Part);
3482  auto *Shuffle =
3483  VF > 1 ? Builder.CreateShuffleVector(Incoming, PreviousPart,
3484  ConstantVector::get(ShuffleMask))
3485  : Incoming;
3486  PhiPart->replaceAllUsesWith(Shuffle);
3487  cast<Instruction>(PhiPart)->eraseFromParent();
3488  VectorLoopValueMap.resetVectorValue(Phi, Part, Shuffle);
3489  Incoming = PreviousPart;
3490  }
3491 
3492  // Fix the latch value of the new recurrence in the vector loop.
3493  VecPhi->addIncoming(Incoming, LI->getLoopFor(LoopVectorBody)->getLoopLatch());
3494 
3495  // Extract the last vector element in the middle block. This will be the
3496  // initial value for the recurrence when jumping to the scalar loop.
3497  auto *ExtractForScalar = Incoming;
3498  if (VF > 1) {
3500  ExtractForScalar = Builder.CreateExtractElement(
3501  ExtractForScalar, Builder.getInt32(VF - 1), "vector.recur.extract");
3502  }
3503  // Extract the second last element in the middle block if the
3504  // Phi is used outside the loop. We need to extract the phi itself
3505  // and not the last element (the phi update in the current iteration). This
3506  // will be the value when jumping to the exit block from the LoopMiddleBlock,
3507  // when the scalar loop is not run at all.
3508  Value *ExtractForPhiUsedOutsideLoop = nullptr;
3509  if (VF > 1)
3510  ExtractForPhiUsedOutsideLoop = Builder.CreateExtractElement(
3511  Incoming, Builder.getInt32(VF - 2), "vector.recur.extract.for.phi");
3512  // When loop is unrolled without vectorizing, initialize
3513  // ExtractForPhiUsedOutsideLoop with the value just prior to unrolled value of
3514  // `Incoming`. This is analogous to the vectorized case above: extracting the
3515  // second last element when VF > 1.
3516  else if (UF > 1)
3517  ExtractForPhiUsedOutsideLoop = getOrCreateVectorValue(Previous, UF - 2);
3518 
3519  // Fix the initial value of the original recurrence in the scalar loop.
3521  auto *Start = Builder.CreatePHI(Phi->getType(), 2, "scalar.recur.init");
3522  for (auto *BB : predecessors(LoopScalarPreHeader)) {
3523  auto *Incoming = BB == LoopMiddleBlock ? ExtractForScalar : ScalarInit;
3524  Start->addIncoming(Incoming, BB);
3525  }
3526 
3528  Phi->setName("scalar.recur");
3529 
3530  // Finally, fix users of the recurrence outside the loop. The users will need
3531  // either the last value of the scalar recurrence or the last value of the
3532  // vector recurrence we extracted in the middle block. Since the loop is in
3533  // LCSSA form, we just need to find the phi node for the original scalar
3534  // recurrence in the exit block, and then add an edge for the middle block.
3535  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
3536  if (LCSSAPhi.getIncomingValue(0) == Phi) {
3537  LCSSAPhi.addIncoming(ExtractForPhiUsedOutsideLoop, LoopMiddleBlock);
3538  break;
3539  }
3540  }
3541 }
3542 
3544  Constant *Zero = Builder.getInt32(0);
3545 
3546  // Get it's reduction variable descriptor.
3548  "Unable to find the reduction variable");
3549  RecurrenceDescriptor RdxDesc = (*Legal->getReductionVars())[Phi];
3550 
3552  TrackingVH<Value> ReductionStartValue = RdxDesc.getRecurrenceStartValue();
3553  Instruction *LoopExitInst = RdxDesc.getLoopExitInstr();
3555  RdxDesc.getMinMaxRecurrenceKind();
3556  setDebugLocFromInst(Builder, ReductionStartValue);
3557 
3558  // We need to generate a reduction vector from the incoming scalar.
3559  // To do so, we need to generate the 'identity' vector and override
3560  // one of the elements with the incoming scalar reduction. We need
3561  // to do it in the vector-loop preheader.
3563 
3564  // This is the vector-clone of the value that leaves the loop.
3565  Type *VecTy = getOrCreateVectorValue(LoopExitInst, 0)->getType();
3566 
3567  // Find the reduction identity variable. Zero for addition, or, xor,
3568  // one for multiplication, -1 for And.
3569  Value *Identity;
3570  Value *VectorStart;
3573  // MinMax reduction have the start value as their identify.
3574  if (VF == 1) {
3575  VectorStart = Identity = ReductionStartValue;
3576  } else {
3577  VectorStart = Identity =
3578  Builder.CreateVectorSplat(VF, ReductionStartValue, "minmax.ident");
3579  }
3580  } else {
3581  // Handle other reduction kinds:
3583  RK, VecTy->getScalarType());
3584  if (VF == 1) {
3585  Identity = Iden;
3586  // This vector is the Identity vector where the first element is the
3587  // incoming scalar reduction.
3588  VectorStart = ReductionStartValue;
3589  } else {
3590  Identity = ConstantVector::getSplat(VF, Iden);
3591 
3592  // This vector is the Identity vector where the first element is the
3593  // incoming scalar reduction.
3594  VectorStart =
3595  Builder.CreateInsertElement(Identity, ReductionStartValue, Zero);
3596  }
3597  }
3598 
3599  // Fix the vector-loop phi.
3600 
3601  // Reductions do not have to start at zero. They can start with
3602  // any loop invariant values.
3603  BasicBlock *Latch = OrigLoop->getLoopLatch();
3604  Value *LoopVal = Phi->getIncomingValueForBlock(Latch);
3605  for (unsigned Part = 0; Part < UF; ++Part) {
3606  Value *VecRdxPhi = getOrCreateVectorValue(Phi, Part);
3607  Value *Val = getOrCreateVectorValue(LoopVal, Part);
3608  // Make sure to add the reduction stat value only to the
3609  // first unroll part.
3610  Value *StartVal = (Part == 0) ? VectorStart : Identity;
3611  cast<PHINode>(VecRdxPhi)->addIncoming(StartVal, LoopVectorPreHeader);
3612  cast<PHINode>(VecRdxPhi)
3613  ->addIncoming(Val, LI->getLoopFor(LoopVectorBody)->getLoopLatch());
3614  }
3615 
3616  // Before each round, move the insertion point right between
3617  // the PHIs and the values we are going to write.
3618  // This allows us to write both PHINodes and the extractelement
3619  // instructions.
3621 
3622  setDebugLocFromInst(Builder, LoopExitInst);
3623 
3624  // If the vector reduction can be performed in a smaller type, we truncate
3625  // then extend the loop exit value to enable InstCombine to evaluate the
3626  // entire expression in the smaller type.
3627  if (VF > 1 && Phi->getType() != RdxDesc.getRecurrenceType()) {
3628  Type *RdxVecTy = VectorType::get(RdxDesc.getRecurrenceType(), VF);
3631  VectorParts RdxParts(UF);
3632  for (unsigned Part = 0; Part < UF; ++Part) {
3633  RdxParts[Part] = VectorLoopValueMap.getVectorValue(LoopExitInst, Part);
3634  Value *Trunc = Builder.CreateTrunc(RdxParts[Part], RdxVecTy);
3635  Value *Extnd = RdxDesc.isSigned() ? Builder.CreateSExt(Trunc, VecTy)
3636  : Builder.CreateZExt(Trunc, VecTy);
3637  for (Value::user_iterator UI = RdxParts[Part]->user_begin();
3638  UI != RdxParts[Part]->user_end();)
3639  if (*UI != Trunc) {
3640  (*UI++)->replaceUsesOfWith(RdxParts[Part], Extnd);
3641  RdxParts[Part] = Extnd;
3642  } else {
3643  ++UI;
3644  }
3645  }
3647  for (unsigned Part = 0; Part < UF; ++Part) {
3648  RdxParts[Part] = Builder.CreateTrunc(RdxParts[Part], RdxVecTy);
3649  VectorLoopValueMap.resetVectorValue(LoopExitInst, Part, RdxParts[Part]);
3650  }
3651  }
3652 
3653  // Reduce all of the unrolled parts into a single vector.
3654  Value *ReducedPartRdx = VectorLoopValueMap.getVectorValue(LoopExitInst, 0);
3656  setDebugLocFromInst(Builder, ReducedPartRdx);
3657  for (unsigned Part = 1; Part < UF; ++Part) {
3658  Value *RdxPart = VectorLoopValueMap.getVectorValue(LoopExitInst, Part);
3659  if (Op != Instruction::ICmp && Op != Instruction::FCmp)
3660  // Floating point operations had to be 'fast' to enable the reduction.
3661  ReducedPartRdx = addFastMathFlag(
3663  ReducedPartRdx, "bin.rdx"));
3664  else
3665  ReducedPartRdx = RecurrenceDescriptor::createMinMaxOp(
3666  Builder, MinMaxKind, ReducedPartRdx, RdxPart);
3667  }
3668 
3669  if (VF > 1) {
3670  bool NoNaN = Legal->hasFunNoNaNAttr();
3671  ReducedPartRdx =
3672  createTargetReduction(Builder, TTI, RdxDesc, ReducedPartRdx, NoNaN);
3673  // If the reduction can be performed in a smaller type, we need to extend
3674  // the reduction to the wider type before we branch to the original loop.
3675  if (Phi->getType() != RdxDesc.getRecurrenceType())
3676  ReducedPartRdx =
3677  RdxDesc.isSigned()
3678  ? Builder.CreateSExt(ReducedPartRdx, Phi->getType())
3679  : Builder.CreateZExt(ReducedPartRdx, Phi->getType());
3680  }
3681 
3682  // Create a phi node that merges control-flow from the backedge-taken check
3683  // block and the middle block.
3684  PHINode *BCBlockPhi = PHINode::Create(Phi->getType(), 2, "bc.merge.rdx",
3686  for (unsigned I = 0, E = LoopBypassBlocks.size(); I != E; ++I)
3687  BCBlockPhi->addIncoming(ReductionStartValue, LoopBypassBlocks[I]);
3688  BCBlockPhi->addIncoming(ReducedPartRdx, LoopMiddleBlock);
3689 
3690  // Now, we need to fix the users of the reduction variable
3691  // inside and outside of the scalar remainder loop.
3692  // We know that the loop is in LCSSA form. We need to update the
3693  // PHI nodes in the exit blocks.
3694  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
3695  // All PHINodes need to have a single entry edge, or two if
3696  // we already fixed them.
3697  assert(LCSSAPhi.getNumIncomingValues() < 3 && "Invalid LCSSA PHI");
3698 
3699  // We found a reduction value exit-PHI. Update it with the
3700  // incoming bypass edge.
3701  if (LCSSAPhi.getIncomingValue(0) == LoopExitInst)
3702  LCSSAPhi.addIncoming(ReducedPartRdx, LoopMiddleBlock);
3703  } // end of the LCSSA phi scan.
3704 
3705  // Fix the scalar loop reduction variable with the incoming reduction sum
3706  // from the vector body and from the backedge value.
3707  int IncomingEdgeBlockIdx =
3709  assert(IncomingEdgeBlockIdx >= 0 && "Invalid block index");
3710  // Pick the other block.
3711  int SelfEdgeBlockIdx = (IncomingEdgeBlockIdx ? 0 : 1);
3712  Phi->setIncomingValue(SelfEdgeBlockIdx, BCBlockPhi);
3713  Phi->setIncomingValue(IncomingEdgeBlockIdx, LoopExitInst);
3714 }
3715 
3717  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
3718  if (LCSSAPhi.getNumIncomingValues() == 1) {
3719  assert(OrigLoop->isLoopInvariant(LCSSAPhi.getIncomingValue(0)) &&
3720  "Incoming value isn't loop invariant");
3721  LCSSAPhi.addIncoming(LCSSAPhi.getIncomingValue(0), LoopMiddleBlock);
3722  }
3723  }
3724 }
3725 
3727  // The basic block and loop containing the predicated instruction.
3728  auto *PredBB = PredInst->getParent();
3729  auto *VectorLoop = LI->getLoopFor(PredBB);
3730 
3731  // Initialize a worklist with the operands of the predicated instruction.
3732  SetVector<Value *> Worklist(PredInst->op_begin(), PredInst->op_end());
3733 
3734  // Holds instructions that we need to analyze again. An instruction may be
3735  // reanalyzed if we don't yet know if we can sink it or not.
3736  SmallVector<Instruction *, 8> InstsToReanalyze;
3737 
3738  // Returns true if a given use occurs in the predicated block. Phi nodes use
3739  // their operands in their corresponding predecessor blocks.
3740  auto isBlockOfUsePredicated = [&](Use &U) -> bool {
3741  auto *I = cast<Instruction>(U.getUser());
3742  BasicBlock *BB = I->getParent();
3743  if (auto *Phi = dyn_cast<PHINode>(I))
3744  BB = Phi->getIncomingBlock(
3745  PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3746  return BB == PredBB;
3747  };
3748 
3749  // Iteratively sink the scalarized operands of the predicated instruction
3750  // into the block we created for it. When an instruction is sunk, it's
3751  // operands are then added to the worklist. The algorithm ends after one pass
3752  // through the worklist doesn't sink a single instruction.
3753  bool Changed;
3754  do {
3755  // Add the instructions that need to be reanalyzed to the worklist, and
3756  // reset the changed indicator.
3757  Worklist.insert(InstsToReanalyze.begin(), InstsToReanalyze.end());
3758  InstsToReanalyze.clear();
3759  Changed = false;
3760 
3761  while (!Worklist.empty()) {
3762  auto *I = dyn_cast<Instruction>(Worklist.pop_back_val());
3763 
3764  // We can't sink an instruction if it is a phi node, is already in the
3765  // predicated block, is not in the loop, or may have side effects.
3766  if (!I || isa<PHINode>(I) || I->getParent() == PredBB ||
3767  !VectorLoop->contains(I) || I->mayHaveSideEffects())
3768  continue;
3769 
3770  // It's legal to sink the instruction if all its uses occur in the
3771  // predicated block. Otherwise, there's nothing to do yet, and we may
3772  // need to reanalyze the instruction.
3773  if (!llvm::all_of(I->uses(), isBlockOfUsePredicated)) {
3774  InstsToReanalyze.push_back(I);
3775  continue;
3776  }
3777 
3778  // Move the instruction to the beginning of the predicated block, and add
3779  // it's operands to the worklist.
3780  I->moveBefore(&*PredBB->getFirstInsertionPt());
3781  Worklist.insert(I->op_begin(), I->op_end());
3782 
3783  // The sinking may have enabled other instructions to be sunk, so we will
3784  // need to iterate.
3785  Changed = true;
3786  }
3787  } while (Changed);
3788 }
3789 
3791  unsigned VF) {
3792  assert(PN->getParent() == OrigLoop->getHeader() &&
3793  "Non-header phis should have been handled elsewhere");
3794 
3795  PHINode *P = cast<PHINode>(PN);
3796  // In order to support recurrences we need to be able to vectorize Phi nodes.
3797  // Phi nodes have cycles, so we need to vectorize them in two stages. This is
3798  // stage #1: We create a new vector PHI node with no incoming edges. We'll use
3799  // this value when we vectorize all of the instructions that use the PHI.
3801  for (unsigned Part = 0; Part < UF; ++Part) {
3802  // This is phase one of vectorizing PHIs.
3803  Type *VecTy =
3804  (VF == 1) ? PN->getType() : VectorType::get(PN->getType(), VF);
3805  Value *EntryPart = PHINode::Create(
3806  VecTy, 2, "vec.phi", &*LoopVectorBody->getFirstInsertionPt());
3807  VectorLoopValueMap.setVectorValue(P, Part, EntryPart);
3808  }
3809  return;
3810  }
3811 
3813 
3814  // This PHINode must be an induction variable.
3815  // Make sure that we know about it.
3816  assert(Legal->getInductionVars()->count(P) && "Not an induction variable");
3817 
3819  const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
3820 
3821  // FIXME: The newly created binary instructions should contain nsw/nuw flags,
3822  // which can be found from the original scalar operations.
3823  switch (II.getKind()) {
3825  llvm_unreachable("Unknown induction");
3828  llvm_unreachable("Integer/fp induction is handled elsewhere.");
3830  // Handle the pointer induction variable case.
3831  assert(P->getType()->isPointerTy() && "Unexpected type.");
3832  // This is the normalized GEP that starts counting at zero.
3833  Value *PtrInd = Induction;
3834  PtrInd = Builder.CreateSExtOrTrunc(PtrInd, II.getStep()->getType());
3835  // Determine the number of scalars we need to generate for each unroll
3836  // iteration. If the instruction is uniform, we only need to generate the
3837  // first lane. Otherwise, we generate all VF values.
3838  unsigned Lanes = Cost->isUniformAfterVectorization(P, VF) ? 1 : VF;
3839  // These are the scalar results. Notice that we don't generate vector GEPs
3840  // because scalar GEPs result in better code.
3841  for (unsigned Part = 0; Part < UF; ++Part) {
3842  for (unsigned Lane = 0; Lane < Lanes; ++Lane) {
3843  Constant *Idx = ConstantInt::get(PtrInd->getType(), Lane + Part * VF);
3844  Value *GlobalIdx = Builder.CreateAdd(PtrInd, Idx);
3845  Value *SclrGep = II.transform(Builder, GlobalIdx, PSE.getSE(), DL);
3846  SclrGep->setName("next.gep");
3847  VectorLoopValueMap.setScalarValue(P, {Part, Lane}, SclrGep);
3848  }
3849  }
3850  return;
3851  }
3852  }
3853 }
3854 
3855 /// A helper function for checking whether an integer division-related
3856 /// instruction may divide by zero (in which case it must be predicated if
3857 /// executed conditionally in the scalar code).
3858 /// TODO: It may be worthwhile to generalize and check isKnownNonZero().
3859 /// Non-zero divisors that are non compile-time constants will not be
3860 /// converted into multiplication, so we will still end up scalarizing
3861 /// the division, but can do so w/o predication.
3863  assert((I.getOpcode() == Instruction::UDiv ||
3864  I.getOpcode() == Instruction::SDiv ||
3865  I.getOpcode() == Instruction::URem ||
3866  I.getOpcode() == Instruction::SRem) &&
3867  "Unexpected instruction");
3868  Value *Divisor = I.getOperand(1);
3869  auto *CInt = dyn_cast<ConstantInt>(Divisor);
3870  return !CInt || CInt->isZero();
3871 }
3872 
3874  switch (I.getOpcode()) {
3875  case Instruction::Br:
3876  case Instruction::PHI:
3877  llvm_unreachable("This instruction is handled by a different recipe.");
3878  case Instruction::GetElementPtr: {
3879  // Construct a vector GEP by widening the operands of the scalar GEP as
3880  // necessary. We mark the vector GEP 'inbounds' if appropriate. A GEP
3881  // results in a vector of pointers when at least one operand of the GEP
3882  // is vector-typed. Thus, to keep the representation compact, we only use
3883  // vector-typed operands for loop-varying values.
3884  auto *GEP = cast<GetElementPtrInst>(&I);
3885 
3886  if (VF > 1 && OrigLoop->hasLoopInvariantOperands(GEP)) {
3887  // If we are vectorizing, but the GEP has only loop-invariant operands,
3888  // the GEP we build (by only using vector-typed operands for
3889  // loop-varying values) would be a scalar pointer. Thus, to ensure we
3890  // produce a vector of pointers, we need to either arbitrarily pick an
3891  // operand to broadcast, or broadcast a clone of the original GEP.
3892  // Here, we broadcast a clone of the original.
3893  //
3894  // TODO: If at some point we decide to scalarize instructions having
3895  // loop-invariant operands, this special case will no longer be
3896  // required. We would add the scalarization decision to
3897  // collectLoopScalars() and teach getVectorValue() to broadcast
3898  // the lane-zero scalar value.
3899  auto *Clone = Builder.Insert(GEP->clone());
3900  for (unsigned Part = 0; Part < UF; ++Part) {
3901  Value *EntryPart = Builder.CreateVectorSplat(VF, Clone);
3902  VectorLoopValueMap.setVectorValue(&I, Part, EntryPart);
3903  addMetadata(EntryPart, GEP);
3904  }
3905  } else {
3906  // If the GEP has at least one loop-varying operand, we are sure to
3907  // produce a vector of pointers. But if we are only unrolling, we want
3908  // to produce a scalar GEP for each unroll part. Thus, the GEP we
3909  // produce with the code below will be scalar (if VF == 1) or vector
3910  // (otherwise). Note that for the unroll-only case, we still maintain
3911  // values in the vector mapping with initVector, as we do for other
3912  // instructions.
3913  for (unsigned Part = 0; Part < UF; ++Part) {
3914  // The pointer operand of the new GEP. If it's loop-invariant, we
3915  // won't broadcast it.
3916  auto *Ptr =
3917  OrigLoop->isLoopInvariant(GEP->getPointerOperand())
3918  ? GEP->getPointerOperand()
3919  : getOrCreateVectorValue(GEP->getPointerOperand(), Part);
3920 
3921  // Collect all the indices for the new GEP. If any index is
3922  // loop-invariant, we won't broadcast it.
3923  SmallVector<Value *, 4> Indices;
3924  for (auto &U : make_range(GEP->idx_begin(), GEP->idx_end())) {
3925  if (OrigLoop->isLoopInvariant(U.get()))
3926  Indices.push_back(U.get());
3927  else
3928  Indices.push_back(getOrCreateVectorValue(U.get(), Part));
3929  }
3930 
3931  // Create the new GEP. Note that this GEP may be a scalar if VF == 1,
3932  // but it should be a vector, otherwise.
3933  auto *NewGEP = GEP->isInBounds()
3934  ? Builder.CreateInBoundsGEP(Ptr, Indices)
3935  : Builder.CreateGEP(Ptr, Indices);
3936  assert((VF == 1 || NewGEP->getType()->isVectorTy()) &&
3937  "NewGEP is not a pointer vector");
3938  VectorLoopValueMap.setVectorValue(&I, Part, NewGEP);
3939  addMetadata(NewGEP, GEP);
3940  }
3941  }
3942 
3943  break;
3944  }
3945  case Instruction::UDiv:
3946  case Instruction::SDiv:
3947  case Instruction::SRem:
3948  case Instruction::URem:
3949  case Instruction::Add:
3950  case Instruction::FAdd:
3951  case Instruction::Sub:
3952  case Instruction::FSub:
3953  case Instruction::Mul:
3954  case Instruction::FMul:
3955  case Instruction::FDiv:
3956  case Instruction::FRem:
3957  case Instruction::Shl:
3958  case Instruction::LShr:
3959  case Instruction::AShr:
3960  case Instruction::And:
3961  case Instruction::Or:
3962  case Instruction::Xor: {
3963  // Just widen binops.
3964  auto *BinOp = cast<BinaryOperator>(&I);
3965  setDebugLocFromInst(Builder, BinOp);
3966 
3967  for (unsigned Part = 0; Part < UF; ++Part) {
3968  Value *A = getOrCreateVectorValue(BinOp->getOperand(0), Part);
3969  Value *B = getOrCreateVectorValue(BinOp->getOperand(1), Part);
3970  Value *V = Builder.CreateBinOp(BinOp->getOpcode(), A, B);
3971 
3972  if (BinaryOperator *VecOp = dyn_cast<BinaryOperator>(V))
3973  VecOp->copyIRFlags(BinOp);
3974 
3975  // Use this vector value for all users of the original instruction.
3976  VectorLoopValueMap.setVectorValue(&I, Part, V);
3977  addMetadata(V, BinOp);
3978  }
3979 
3980  break;
3981  }
3982  case Instruction::Select: {
3983  // Widen selects.
3984  // If the selector is loop invariant we can create a select
3985  // instruction with a scalar condition. Otherwise, use vector-select.
3986  auto *SE = PSE.getSE();
3987  bool InvariantCond =
3990 
3991  // The condition can be loop invariant but still defined inside the
3992  // loop. This means that we can't just use the original 'cond' value.
3993  // We have to take the 'vectorized' value and pick the first lane.
3994  // Instcombine will make this a no-op.
3995 
3996  auto *ScalarCond = getOrCreateScalarValue(I.getOperand(0), {0, 0});
3997 
3998  for (unsigned Part = 0; Part < UF; ++Part) {
3999  Value *Cond = getOrCreateVectorValue(I.getOperand(0), Part);
4000  Value *Op0 = getOrCreateVectorValue(I.getOperand(1), Part);
4001  Value *Op1 = getOrCreateVectorValue(I.getOperand(2), Part);
4002  Value *Sel =
4003  Builder.CreateSelect(InvariantCond ? ScalarCond : Cond, Op0, Op1);
4004  VectorLoopValueMap.setVectorValue(&I, Part, Sel);
4005  addMetadata(Sel, &I);
4006  }
4007 
4008  break;
4009  }
4010 
4011  case Instruction::ICmp:
4012  case Instruction::FCmp: {
4013  // Widen compares. Generate vector compares.
4014  bool FCmp = (I.getOpcode() == Instruction::FCmp);
4015  auto *Cmp = dyn_cast<CmpInst>(&I);
4017  for (unsigned Part = 0; Part < UF; ++Part) {
4018  Value *A = getOrCreateVectorValue(Cmp->getOperand(0), Part);
4019  Value *B = getOrCreateVectorValue(Cmp->getOperand(1), Part);
4020  Value *C = nullptr;
4021  if (FCmp) {
4022  // Propagate fast math flags.
4024  Builder.setFastMathFlags(Cmp->getFastMathFlags());
4025  C = Builder.CreateFCmp(Cmp->getPredicate(), A, B);
4026  } else {
4027  C = Builder.CreateICmp(Cmp->getPredicate(), A, B);
4028  }
4029  VectorLoopValueMap.setVectorValue(&I, Part, C);
4030  addMetadata(C, &I);
4031  }
4032 
4033  break;
4034  }
4035 
4036  case Instruction::ZExt:
4037  case Instruction::SExt:
4038  case Instruction::FPToUI:
4039  case Instruction::FPToSI:
4040  case Instruction::FPExt:
4041  case Instruction::PtrToInt:
4042  case Instruction::IntToPtr:
4043  case Instruction::SIToFP:
4044  case Instruction::UIToFP:
4045  case Instruction::Trunc:
4046  case Instruction::FPTrunc:
4047  case Instruction::BitCast: {
4048  auto *CI = dyn_cast<CastInst>(&I);
4050 
4051  /// Vectorize casts.
4052  Type *DestTy =
4053  (VF == 1) ? CI->getType() : VectorType::get(CI->getType(), VF);
4054 
4055  for (unsigned Part = 0; Part < UF; ++Part) {
4056  Value *A = getOrCreateVectorValue(CI->getOperand(0), Part);
4057  Value *Cast = Builder.CreateCast(CI->getOpcode(), A, DestTy);
4058  VectorLoopValueMap.setVectorValue(&I, Part, Cast);
4059  addMetadata(Cast, &I);
4060  }
4061  break;
4062  }
4063 
4064  case Instruction::Call: {
4065  // Ignore dbg intrinsics.
4066  if (isa<DbgInfoIntrinsic>(I))
4067  break;
4069 
4070  Module *M = I.getParent()->getParent()->getParent();
4071  auto *CI = cast<CallInst>(&I);
4072 
4073  StringRef FnName = CI->getCalledFunction()->getName();
4074  Function *F = CI->getCalledFunction();
4075  Type *RetTy = ToVectorTy(CI->getType(), VF);
4077  for (Value *ArgOperand : CI->arg_operands())
4078  Tys.push_back(ToVectorTy(ArgOperand->getType(), VF));
4079 
4081 
4082  // The flag shows whether we use Intrinsic or a usual Call for vectorized
4083  // version of the instruction.
4084  // Is it beneficial to perform intrinsic call compared to lib call?
4085  bool NeedToScalarize;
4086  unsigned CallCost = getVectorCallCost(CI, VF, *TTI, TLI, NeedToScalarize);
4087  bool UseVectorIntrinsic =
4088  ID && getVectorIntrinsicCost(CI, VF, *TTI, TLI) <= CallCost;
4089  assert((UseVectorIntrinsic || !NeedToScalarize) &&
4090  "Instruction should be scalarized elsewhere.");
4091 
4092  for (unsigned Part = 0; Part < UF; ++Part) {
4094  for (unsigned i = 0, ie = CI->getNumArgOperands(); i != ie; ++i) {
4095  Value *Arg = CI->getArgOperand(i);
4096  // Some intrinsics have a scalar argument - don't replace it with a
4097  // vector.
4098  if (!UseVectorIntrinsic || !hasVectorInstrinsicScalarOpd(ID, i))
4099  Arg = getOrCreateVectorValue(CI->getArgOperand(i), Part);
4100  Args.push_back(Arg);
4101  }
4102 
4103  Function *VectorF;
4104  if (UseVectorIntrinsic) {
4105  // Use vector version of the intrinsic.
4106  Type *TysForDecl[] = {CI->getType()};
4107  if (VF > 1)
4108  TysForDecl[0] = VectorType::get(CI->getType()->getScalarType(), VF);
4109  VectorF = Intrinsic::getDeclaration(M, ID, TysForDecl);
4110  } else {
4111  // Use vector version of the library call.
4112  StringRef VFnName = TLI->getVectorizedFunction(FnName, VF);
4113  assert(!VFnName.empty() && "Vector function name is empty.");
4114  VectorF = M->getFunction(VFnName);
4115  if (!VectorF) {
4116  // Generate a declaration
4117  FunctionType *FTy = FunctionType::get(RetTy, Tys, false);
4118  VectorF =
4119  Function::Create(FTy, Function::ExternalLinkage, VFnName, M);
4120  VectorF->copyAttributesFrom(F);
4121  }
4122  }
4123  assert(VectorF && "Can't create vector function.");
4124 
4126  CI->getOperandBundlesAsDefs(OpBundles);
4127  CallInst *V = Builder.CreateCall(VectorF, Args, OpBundles);
4128 
4129  if (isa<FPMathOperator>(V))
4130  V->copyFastMathFlags(CI);
4131 
4132  VectorLoopValueMap.setVectorValue(&I, Part, V);
4133  addMetadata(V, &I);
4134  }
4135 
4136  break;
4137  }
4138 
4139  default:
4140  // This instruction is not vectorized by simple widening.
4141  LLVM_DEBUG(dbgs() << "LV: Found an unhandled instruction: " << I);
4142  llvm_unreachable("Unhandled instruction!");
4143  } // end of switch.
4144 }
4145 
4147  // Forget the original basic block.
4149 
4150  // Update the dominator tree information.
4152  "Entry does not dominate exit.");
4153 
4160 }
4161 
4162 void LoopVectorizationCostModel::collectLoopScalars(unsigned VF) {
4163  // We should not collect Scalars more than once per VF. Right now, this
4164  // function is called from collectUniformsAndScalars(), which already does
4165  // this check. Collecting Scalars for VF=1 does not make any sense.
4166  assert(VF >= 2 && !Scalars.count(VF) &&
4167  "This function should not be visited twice for the same VF");
4168 
4170 
4171  // These sets are used to seed the analysis with pointers used by memory
4172  // accesses that will remain scalar.
4174  SmallPtrSet<Instruction *, 8> PossibleNonScalarPtrs;
4175 
4176  // A helper that returns true if the use of Ptr by MemAccess will be scalar.
4177  // The pointer operands of loads and stores will be scalar as long as the
4178  // memory access is not a gather or scatter operation. The value operand of a
4179  // store will remain scalar if the store is scalarized.
4180  auto isScalarUse = [&](Instruction *MemAccess, Value *Ptr) {
4181  InstWidening WideningDecision = getWideningDecision(MemAccess, VF);
4182  assert(WideningDecision != CM_Unknown &&
4183  "Widening decision should be ready at this moment");
4184  if (auto *Store = dyn_cast<StoreInst>(MemAccess))
4185  if (Ptr == Store->getValueOperand())
4186  return WideningDecision == CM_Scalarize;
4187  assert(Ptr == getLoadStorePointerOperand(MemAccess) &&
4188  "Ptr is neither a value or pointer operand");
4189  return WideningDecision != CM_GatherScatter;
4190  };
4191 
4192  // A helper that returns true if the given value is a bitcast or
4193  // getelementptr instruction contained in the loop.
4194  auto isLoopVaryingBitCastOrGEP = [&](Value *V) {
4195  return ((isa<BitCastInst>(V) && V->getType()->isPointerTy()) ||
4196  isa<GetElementPtrInst>(V)) &&
4197  !TheLoop->isLoopInvariant(V);
4198  };
4199 
4200  // A helper that evaluates a memory access's use of a pointer. If the use
4201  // will be a scalar use, and the pointer is only used by memory accesses, we
4202  // place the pointer in ScalarPtrs. Otherwise, the pointer is placed in
4203  // PossibleNonScalarPtrs.
4204  auto evaluatePtrUse = [&](Instruction *MemAccess, Value *Ptr) {
4205  // We only care about bitcast and getelementptr instructions contained in
4206  // the loop.
4207  if (!isLoopVaryingBitCastOrGEP(Ptr))
4208  return;
4209 
4210  // If the pointer has already been identified as scalar (e.g., if it was
4211  // also identified as uniform), there's nothing to do.
4212  auto *I = cast<Instruction>(Ptr);
4213  if (Worklist.count(I))
4214  return;
4215 
4216  // If the use of the pointer will be a scalar use, and all users of the
4217  // pointer are memory accesses, place the pointer in ScalarPtrs. Otherwise,
4218  // place the pointer in PossibleNonScalarPtrs.
4219  if (isScalarUse(MemAccess, Ptr) && llvm::all_of(I->users(), [&](User *U) {
4220  return isa<LoadInst>(U) || isa<StoreInst>(U);
4221  }))
4222  ScalarPtrs.insert(I);
4223  else
4224  PossibleNonScalarPtrs.insert(I);
4225  };
4226 
4227  // We seed the scalars analysis with three classes of instructions: (1)
4228  // instructions marked uniform-after-vectorization, (2) bitcast and
4229  // getelementptr instructions used by memory accesses requiring a scalar use,
4230  // and (3) pointer induction variables and their update instructions (we
4231  // currently only scalarize these).
4232  //
4233  // (1) Add to the worklist all instructions that have been identified as
4234  // uniform-after-vectorization.
4235  Worklist.insert(Uniforms[VF].begin(), Uniforms[VF].end());
4236 
4237  // (2) Add to the worklist all bitcast and getelementptr instructions used by
4238  // memory accesses requiring a scalar use. The pointer operands of loads and
4239  // stores will be scalar as long as the memory accesses is not a gather or
4240  // scatter operation. The value operand of a store will remain scalar if the
4241  // store is scalarized.
4242  for (auto *BB : TheLoop->blocks())
4243  for (auto &I : *BB) {
4244  if (auto *Load = dyn_cast<LoadInst>(&I)) {
4245  evaluatePtrUse(Load, Load->getPointerOperand());
4246  } else if (auto *Store = dyn_cast<StoreInst>(&I)) {
4247  evaluatePtrUse(Store, Store->getPointerOperand());
4248  evaluatePtrUse(Store, Store->getValueOperand());
4249  }
4250  }
4251  for (auto *I : ScalarPtrs)
4252  if (!PossibleNonScalarPtrs.count(I)) {
4253  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *I << "\n");
4254  Worklist.insert(I);
4255  }
4256 
4257  // (3) Add to the worklist all pointer induction variables and their update
4258  // instructions.
4259  //
4260  // TODO: Once we are able to vectorize pointer induction variables we should
4261  // no longer insert them into the worklist here.
4262  auto *Latch = TheLoop->getLoopLatch();
4263  for (auto &Induction : *Legal->getInductionVars()) {
4264  auto *Ind = Induction.first;
4265  auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
4266  if (Induction.second.getKind() != InductionDescriptor::IK_PtrInduction)
4267  continue;
4268  Worklist.insert(Ind);
4269  Worklist.insert(IndUpdate);
4270  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
4271  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate
4272  << "\n");
4273  }
4274 
4275  // Insert the forced scalars.
4276  // FIXME: Currently widenPHIInstruction() often creates a dead vector
4277  // induction variable when the PHI user is scalarized.
4278  if (ForcedScalars.count(VF))
4279  for (auto *I : ForcedScalars.find(VF)->second)
4280  Worklist.insert(I);
4281 
4282  // Expand the worklist by looking through any bitcasts and getelementptr
4283  // instructions we've already identified as scalar. This is similar to the
4284  // expansion step in collectLoopUniforms(); however, here we're only
4285  // expanding to include additional bitcasts and getelementptr instructions.
4286  unsigned Idx = 0;
4287  while (Idx != Worklist.size()) {
4288  Instruction *Dst = Worklist[Idx++];
4289  if (!isLoopVaryingBitCastOrGEP(Dst->getOperand(0)))
4290  continue;
4291  auto *Src = cast<Instruction>(Dst->getOperand(0));
4292  if (llvm::all_of(Src->users(), [&](User *U) -> bool {
4293  auto *J = cast<Instruction>(U);
4294  return !TheLoop->contains(J) || Worklist.count(J) ||
4295  ((isa<LoadInst>(J) || isa<StoreInst>(J)) &&
4296  isScalarUse(J, Src));
4297  })) {
4298  Worklist.insert(Src);
4299  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Src << "\n");
4300  }
4301  }
4302 
4303  // An induction variable will remain scalar if all users of the induction
4304  // variable and induction variable update remain scalar.
4305  for (auto &Induction : *Legal->getInductionVars()) {
4306  auto *Ind = Induction.first;
4307  auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
4308 
4309  // We already considered pointer induction variables, so there's no reason
4310  // to look at their users again.
4311  //
4312  // TODO: Once we are able to vectorize pointer induction variables we
4313  // should no longer skip over them here.
4314  if (Induction.second.getKind() == InductionDescriptor::IK_PtrInduction)
4315  continue;
4316 
4317  // Determine if all users of the induction variable are scalar after
4318  // vectorization.
4319  auto ScalarInd = llvm::all_of(Ind->users(), [&](User *U) -> bool {
4320  auto *I = cast<Instruction>(U);
4321  return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I);
4322  });
4323  if (!ScalarInd)
4324  continue;
4325 
4326  // Determine if all users of the induction variable update instruction are
4327  // scalar after vectorization.
4328  auto ScalarIndUpdate =
4329  llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
4330  auto *I = cast<Instruction>(U);
4331  return I == Ind || !TheLoop->contains(I) || Worklist.count(I);
4332  });
4333  if (!ScalarIndUpdate)
4334  continue;
4335 
4336  // The induction variable and its update instruction will remain scalar.
4337  Worklist.insert(Ind);
4338  Worklist.insert(IndUpdate);
4339  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
4340  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate
4341  << "\n");
4342  }
4343 
4344  Scalars[VF].insert(Worklist.begin(), Worklist.end());
4345 }
4346 
4349  return false;
4350  switch(I->getOpcode()) {
4351  default:
4352  break;
4353  case Instruction::Load:
4354  case Instruction::Store: {
4355  if (!Legal->isMaskRequired(I))
4356  return false;
4357  auto *Ptr = getLoadStorePointerOperand(I);
4358  auto *Ty = getMemInstValueType(I);
4359  return isa<LoadInst>(I) ?
4360  !(isLegalMaskedLoad(Ty, Ptr) || isLegalMaskedGather(Ty))
4361  : !(isLegalMaskedStore(Ty, Ptr) || isLegalMaskedScatter(Ty));
4362  }
4363  case Instruction::UDiv:
4364  case Instruction::SDiv:
4365  case Instruction::SRem:
4366  case Instruction::URem:
4367  return mayDivideByZero(*I);
4368  }
4369  return false;
4370 }
4371 
4373  unsigned VF) {
4374  // Get and ensure we have a valid memory instruction.
4375  LoadInst *LI = dyn_cast<LoadInst>(I);
4377  assert((LI || SI) && "Invalid memory instruction");
4378 
4379  auto *Ptr = getLoadStorePointerOperand(I);
4380 
4381  // In order to be widened, the pointer should be consecutive, first of all.
4382  if (!Legal->isConsecutivePtr(Ptr))
4383  return false;
4384 
4385  // If the instruction is a store located in a predicated block, it will be
4386  // scalarized.
4387  if (isScalarWithPredication(I))
4388  return false;
4389 
4390  // If the instruction's allocated size doesn't equal it's type size, it
4391  // requires padding and will be scalarized.
4392  auto &DL = I->getModule()->getDataLayout();
4393  auto *ScalarTy = LI ? LI->getType() : SI->getValueOperand()->getType();
4394  if (hasIrregularType(ScalarTy, DL, VF))
4395  return false;
4396 
4397  return true;
4398 }
4399 
4400 void LoopVectorizationCostModel::collectLoopUniforms(unsigned VF) {
4401  // We should not collect Uniforms more than once per VF. Right now,
4402  // this function is called from collectUniformsAndScalars(), which
4403  // already does this check. Collecting Uniforms for VF=1 does not make any
4404  // sense.
4405 
4406  assert(VF >= 2 && !Uniforms.count(VF) &&
4407  "This function should not be visited twice for the same VF");
4408 
4409  // Visit the list of Uniforms. If we'll not find any uniform value, we'll
4410  // not analyze again. Uniforms.count(VF) will return 1.
4411  Uniforms[VF].clear();
4412 
4413  // We now know that the loop is vectorizable!
4414  // Collect instructions inside the loop that will remain uniform after
4415  // vectorization.
4416 
4417  // Global values, params and instructions outside of current loop are out of
4418  // scope.
4419  auto isOutOfScope = [&](Value *V) -> bool {
4421  return (!I || !TheLoop->contains(I));
4422  };
4423 
4424  SetVector<Instruction *> Worklist;
4425  BasicBlock *Latch = TheLoop->getLoopLatch();
4426 
4427  // Start with the conditional branch. If the branch condition is an
4428  // instruction contained in the loop that is only used by the branch, it is
4429  // uniform.
4430  auto *Cmp = dyn_cast<Instruction>(Latch->getTerminator()->getOperand(0));
4431  if (Cmp && TheLoop->contains(Cmp) && Cmp->hasOneUse()) {
4432  Worklist.insert(Cmp);
4433  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *Cmp << "\n");
4434  }
4435 
4436  // Holds consecutive and consecutive-like pointers. Consecutive-like pointers
4437  // are pointers that are treated like consecutive pointers during
4438  // vectorization. The pointer operands of interleaved accesses are an
4439  // example.
4440  SmallSetVector<Instruction *, 8> ConsecutiveLikePtrs;
4441 
4442  // Holds pointer operands of instructions that are possibly non-uniform.
4443  SmallPtrSet<Instruction *, 8> PossibleNonUniformPtrs;
4444 
4445  auto isUniformDecision = [&](Instruction *I, unsigned VF) {
4446  InstWidening WideningDecision = getWideningDecision(I, VF);
4447  assert(WideningDecision != CM_Unknown &&
4448  "Widening decision should be ready at this moment");
4449 
4450  return (WideningDecision == CM_Widen ||
4451  WideningDecision == CM_Widen_Reverse ||
4452  WideningDecision == CM_Interleave);
4453  };
4454  // Iterate over the instructions in the loop, and collect all
4455  // consecutive-like pointer operands in ConsecutiveLikePtrs. If it's possible
4456  // that a consecutive-like pointer operand will be scalarized, we collect it
4457  // in PossibleNonUniformPtrs instead. We use two sets here because a single
4458  // getelementptr instruction can be used by both vectorized and scalarized
4459  // memory instructions. For example, if a loop loads and stores from the same
4460  // location, but the store is conditional, the store will be scalarized, and
4461  // the getelementptr won't remain uniform.
4462  for (auto *BB : TheLoop->blocks())
4463  for (auto &I : *BB) {
4464  // If there's no pointer operand, there's nothing to do.
4465  auto *Ptr = dyn_cast_or_null<Instruction>(getLoadStorePointerOperand(&I));
4466  if (!Ptr)
4467  continue;
4468 
4469  // True if all users of Ptr are memory accesses that have Ptr as their
4470  // pointer operand.
4471  auto UsersAreMemAccesses =
4472  llvm::all_of(Ptr->users(), [&](User *U) -> bool {
4473  return getLoadStorePointerOperand(U) == Ptr;
4474  });
4475 
4476  // Ensure the memory instruction will not be scalarized or used by
4477  // gather/scatter, making its pointer operand non-uniform. If the pointer
4478  // operand is used by any instruction other than a memory access, we
4479  // conservatively assume the pointer operand may be non-uniform.
4480  if (!UsersAreMemAccesses || !isUniformDecision(&I, VF))
4481  PossibleNonUniformPtrs.insert(Ptr);
4482 
4483  // If the memory instruction will be vectorized and its pointer operand
4484  // is consecutive-like, or interleaving - the pointer operand should
4485  // remain uniform.
4486  else
4487  ConsecutiveLikePtrs.insert(Ptr);
4488  }
4489 
4490  // Add to the Worklist all consecutive and consecutive-like pointers that
4491  // aren't also identified as possibly non-uniform.
4492  for (auto *V : ConsecutiveLikePtrs)
4493  if (!PossibleNonUniformPtrs.count(V)) {
4494  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *V << "\n");
4495  Worklist.insert(V);
4496  }
4497 
4498  // Expand Worklist in topological order: whenever a new instruction
4499  // is added , its users should be either already inside Worklist, or
4500  // out of scope. It ensures a uniform instruction will only be used
4501  // by uniform instructions or out of scope instructions.
4502  unsigned idx = 0;
4503  while (idx != Worklist.size()) {
4504  Instruction *I = Worklist[idx++];
4505 
4506  for (auto OV : I->operand_values()) {
4507  if (isOutOfScope(OV))
4508  continue;
4509  auto *OI = cast<Instruction>(OV);
4510  if (llvm::all_of(OI->users(), [&](User *U) -> bool {
4511  auto *J = cast<Instruction>(U);
4512  return !TheLoop->contains(J) || Worklist.count(J) ||
4513  (OI == getLoadStorePointerOperand(J) &&
4514  isUniformDecision(J, VF));
4515  })) {
4516  Worklist.insert(OI);
4517  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *OI << "\n");
4518  }
4519  }
4520  }
4521 
4522  // Returns true if Ptr is the pointer operand of a memory access instruction
4523  // I, and I is known to not require scalarization.
4524  auto isVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool {
4525  return getLoadStorePointerOperand(I) == Ptr && isUniformDecision(I, VF);
4526  };
4527 
4528  // For an instruction to be added into Worklist above, all its users inside
4529  // the loop should also be in Worklist. However, this condition cannot be
4530  // true for phi nodes that form a cyclic dependence. We must process phi
4531  // nodes separately. An induction variable will remain uniform if all users
4532  // of the induction variable and induction variable update remain uniform.
4533  // The code below handles both pointer and non-pointer induction variables.
4534  for (auto &Induction : *Legal->getInductionVars()) {
4535  auto *Ind = Induction.first;
4536  auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
4537 
4538  // Determine if all users of the induction variable are uniform after
4539  // vectorization.
4540  auto UniformInd = llvm::all_of(Ind->users(), [&](User *U) -> bool {
4541  auto *I = cast<Instruction>(U);
4542  return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) ||
4543  isVectorizedMemAccessUse(I, Ind);
4544  });
4545  if (!UniformInd)
4546  continue;
4547 
4548  // Determine if all users of the induction variable update instruction are
4549  // uniform after vectorization.
4550  auto UniformIndUpdate =
4551  llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
4552  auto *I = cast<Instruction>(U);
4553  return I == Ind || !TheLoop->contains(I) || Worklist.count(I) ||
4554  isVectorizedMemAccessUse(I, IndUpdate);
4555  });
4556  if (!UniformIndUpdate)
4557  continue;
4558 
4559  // The induction variable and its update instruction will remain uniform.
4560  Worklist.insert(Ind);
4561  Worklist.insert(IndUpdate);
4562  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *Ind << "\n");
4563  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *IndUpdate
4564  << "\n");
4565  }
4566 
4567  Uniforms[VF].insert(Worklist.begin(), Worklist.end());
4568 }
4569 
4570 void InterleavedAccessInfo::collectConstStrideAccesses(
4572  const ValueToValueMap &Strides) {
4573  auto &DL = TheLoop->getHeader()->getModule()->getDataLayout();
4574 
4575  // Since it's desired that the load/store instructions be maintained in
4576  // "program order" for the interleaved access analysis, we have to visit the
4577  // blocks in the loop in reverse postorder (i.e., in a topological order).
4578  // Such an ordering will ensure that any load/store that may be executed
4579  // before a second load/store will precede the second load/store in
4580  // AccessStrideInfo.
4581  LoopBlocksDFS DFS(TheLoop);
4582  DFS.perform(LI);
4583  for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO()))
4584  for (auto &I : *BB) {
4585  auto *LI = dyn_cast<LoadInst>(&I);
4586  auto *SI = dyn_cast<StoreInst>(&I);
4587  if (!LI && !SI)
4588  continue;
4589 
4591  // We don't check wrapping here because we don't know yet if Ptr will be
4592  // part of a full group or a group with gaps. Checking wrapping for all
4593  // pointers (even those that end up in groups with no gaps) will be overly
4594  // conservative. For full groups, wrapping should be ok since if we would
4595  // wrap around the address space we would do a memory access at nullptr
4596  // even without the transformation. The wrapping checks are therefore
4597  // deferred until after we've formed the interleaved groups.
4598  int64_t Stride = getPtrStride(PSE, Ptr, TheLoop, Strides,
4599  /*Assume=*/true, /*ShouldCheckWrap=*/false);
4600 
4601  const SCEV *Scev = replaceSymbolicStrideSCEV(PSE, Strides, Ptr);
4602  PointerType *PtrTy = dyn_cast<PointerType>(Ptr->getType());
4603  uint64_t Size = DL.getTypeAllocSize(PtrTy->getElementType());
4604 
4605  // An alignment of 0 means target ABI alignment.
4606  unsigned Align = getMemInstAlignment(&I);
4607  if (!Align)
4608  Align = DL.getABITypeAlignment(PtrTy->getElementType());
4609 
4610  AccessStrideInfo[&I] = StrideDescriptor(Stride, Scev, Size, Align);
4611  }
4612 }
4613 
4614 // Analyze interleaved accesses and collect them into interleaved load and
4615 // store groups.
4616 //
4617 // When generating code for an interleaved load group, we effectively hoist all
4618 // loads in the group to the location of the first load in program order. When
4619 // generating code for an interleaved store group, we sink all stores to the
4620 // location of the last store. This code motion can change the order of load
4621 // and store instructions and may break dependences.
4622 //
4623 // The code generation strategy mentioned above ensures that we won't violate
4624 // any write-after-read (WAR) dependences.
4625 //
4626 // E.g., for the WAR dependence: a = A[i]; // (1)
4627 // A[i] = b; // (2)
4628 //
4629 // The store group of (2) is always inserted at or below (2), and the load
4630 // group of (1) is always inserted at or above (1). Thus, the instructions will
4631 // never be reordered. All other dependences are checked to ensure the
4632 // correctness of the instruction reordering.
4633 //
4634 // The algorithm visits all memory accesses in the loop in bottom-up program
4635 // order. Program order is established by traversing the blocks in the loop in
4636 // reverse postorder when collecting the accesses.
4637 //
4638 // We visit the memory accesses in bottom-up order because it can simplify the
4639 // construction of store groups in the presence of write-after-write (WAW)
4640 // dependences.
4641 //
4642 // E.g., for the WAW dependence: A[i] = a; // (1)
4643 // A[i] = b; // (2)
4644 // A[i + 1] = c; // (3)
4645 //
4646 // We will first create a store group with (3) and (2). (1) can't be added to
4647 // this group because it and (2) are dependent. However, (1) can be grouped
4648 // with other accesses that may precede it in program order. Note that a
4649 // bottom-up order does not imply that WAW dependences should not be checked.
4650 void InterleavedAccessInfo::analyzeInterleaving() {
4651  LLVM_DEBUG(dbgs() << "LV: Analyzing interleaved accesses...\n");
4652  const ValueToValueMap &Strides = LAI->getSymbolicStrides();
4653 
4654  // Holds all accesses with a constant stride.
4656  collectConstStrideAccesses(AccessStrideInfo, Strides);
4657 
4658  if (AccessStrideInfo.empty())
4659  return;
4660 
4661  // Collect the dependences in the loop.
4662  collectDependences();
4663 
4664  // Holds all interleaved store groups temporarily.
4666  // Holds all interleaved load groups temporarily.
4668 
4669  // Search in bottom-up program order for pairs of accesses (A and B) that can
4670  // form interleaved load or store groups. In the algorithm below, access A
4671  // precedes access B in program order. We initialize a group for B in the
4672  // outer loop of the algorithm, and then in the inner loop, we attempt to
4673  // insert each A into B's group if:
4674  //
4675  // 1. A and B have the same stride,
4676  // 2. A and B have the same memory object size, and
4677  // 3. A belongs in B's group according to its distance from B.
4678  //
4679  // Special care is taken to ensure group formation will not break any
4680  // dependences.
4681  for (auto BI = AccessStrideInfo.rbegin(), E = AccessStrideInfo.rend();
4682  BI != E; ++BI) {
4683  Instruction *B = BI->first;
4684  StrideDescriptor DesB = BI->second;
4685 
4686  // Initialize a group for B if it has an allowable stride. Even if we don't
4687  // create a group for B, we continue with the bottom-up algorithm to ensure
4688  // we don't break any of B's dependences.
4689  InterleaveGroup *Group = nullptr;
4690  if (isStrided(DesB.Stride)) {
4691  Group = getInterleaveGroup(B);
4692  if (!Group) {
4693  LLVM_DEBUG(dbgs() << "LV: Creating an interleave group with:" << *B
4694  << '\n');
4695  Group = createInterleaveGroup(B, DesB.Stride, DesB.Align);
4696  }
4697  if (B->mayWriteToMemory())
4698  StoreGroups.insert(Group);
4699  else
4700  LoadGroups.insert(Group);
4701  }
4702 
4703  for (auto AI = std::next(BI); AI != E; ++AI) {
4704  Instruction *A = AI->first;
4705  StrideDescriptor DesA = AI->second;
4706 
4707  // Our code motion strategy implies that we can't have dependences
4708  // between accesses in an interleaved group and other accesses located
4709  // between the first and last member of the group. Note that this also
4710  // means that a group can't have more than one member at a given offset.
4711  // The accesses in a group can have dependences with other accesses, but
4712  // we must ensure we don't extend the boundaries of the group such that
4713  // we encompass those dependent accesses.
4714  //
4715  // For example, assume we have the sequence of accesses shown below in a
4716  // stride-2 loop:
4717  //
4718  // (1, 2) is a group | A[i] = a; // (1)
4719  // | A[i-1] = b; // (2) |
4720  // A[i-3] = c; // (3)
4721  // A[i] = d; // (4) | (2, 4) is not a group
4722  //
4723  // Because accesses (2) and (3) are dependent, we can group (2) with (1)
4724  // but not with (4). If we did, the dependent access (3) would be within
4725  // the boundaries of the (2, 4) group.
4726  if (!canReorderMemAccessesForInterleavedGroups(&*AI, &*BI)) {
4727  // If a dependence exists and A is already in a group, we know that A
4728  // must be a store since A precedes B and WAR dependences are allowed.
4729  // Thus, A would be sunk below B. We release A's group to prevent this
4730  // illegal code motion. A will then be free to form another group with
4731  // instructions that precede it.
4732  if (isInterleaved(A)) {
4733  InterleaveGroup *StoreGroup = getInterleaveGroup(A);
4734  StoreGroups.remove(StoreGroup);
4735  releaseGroup(StoreGroup);
4736  }
4737 
4738  // If a dependence exists and A is not already in a group (or it was
4739  // and we just released it), B might be hoisted above A (if B is a
4740  // load) or another store might be sunk below A (if B is a store). In
4741  // either case, we can't add additional instructions to B's group. B
4742  // will only form a group with instructions that it precedes.
4743  break;
4744  }
4745 
4746  // At this point, we've checked for illegal code motion. If either A or B
4747  // isn't strided, there's nothing left to do.
4748  if (!isStrided(DesA.Stride) || !isStrided(DesB.Stride))
4749  continue;
4750 
4751  // Ignore A if it's already in a group or isn't the same kind of memory
4752  // operation as B.
4753  // Note that mayReadFromMemory() isn't mutually exclusive to mayWriteToMemory
4754  // in the case of atomic loads. We shouldn't see those here, canVectorizeMemory()
4755  // should have returned false - except for the case we asked for optimization
4756  // remarks.
4757  if (isInterleaved(A) || (A->mayReadFromMemory() != B->mayReadFromMemory())
4758  || (A->mayWriteToMemory() != B->mayWriteToMemory()))
4759  continue;
4760 
4761  // Check rules 1 and 2. Ignore A if its stride or size is different from
4762  // that of B.
4763  if (DesA.Stride != DesB.Stride || DesA.Size != DesB.Size)
4764  continue;
4765 
4766  // Ignore A if the memory object of A and B don't belong to the same
4767  // address space
4769  continue;
4770 
4771  // Calculate the distance from A to B.
4772  const SCEVConstant *DistToB = dyn_cast<SCEVConstant>(
4773  PSE.getSE()->getMinusSCEV(DesA.Scev, DesB.Scev));
4774  if (!DistToB)
4775  continue;
4776  int64_t DistanceToB = DistToB->getAPInt().getSExtValue();
4777 
4778  // Check rule 3. Ignore A if its distance to B is not a multiple of the
4779  // size.
4780  if (DistanceToB % static_cast<int64_t>(DesB.Size))
4781  continue;
4782 
4783  // Ignore A if either A or B is in a predicated block. Although we
4784  // currently prevent group formation for predicated accesses, we may be
4785  // able to relax this limitation in the future once we handle more
4786  // complicated blocks.
4787  if (isPredicated(A->getParent()) || isPredicated(B->getParent()))
4788  continue;
4789 
4790  // The index of A is the index of B plus A's distance to B in multiples
4791  // of the size.
4792  int IndexA =
4793  Group->getIndex(B) + DistanceToB / static_cast<int64_t>(DesB.Size);
4794 
4795  // Try to insert A into B's group.
4796  if (Group->insertMember(A, IndexA, DesA.Align)) {
4797  LLVM_DEBUG(dbgs() << "LV: Inserted:" << *A << '\n'
4798  << " into the interleave group with" << *B
4799  << '\n');
4800  InterleaveGroupMap[A] = Group;
4801 
4802  // Set the first load in program order as the insert position.
4803  if (A->mayReadFromMemory())
4804  Group->setInsertPos(A);
4805  }
4806  } // Iteration over A accesses.
4807  } // Iteration over B accesses.
4808 
4809  // Remove interleaved store groups with gaps.
4810  for (InterleaveGroup *Group : StoreGroups)
4811  if (Group->getNumMembers() != Group->getFactor()) {
4812  LLVM_DEBUG(
4813  dbgs() << "LV: Invalidate candidate interleaved store group due "
4814  "to gaps.\n");
4815  releaseGroup(Group);
4816  }
4817  // Remove interleaved groups with gaps (currently only loads) whose memory
4818  // accesses may wrap around. We have to revisit the getPtrStride analysis,
4819  // this time with ShouldCheckWrap=true, since collectConstStrideAccesses does
4820  // not check wrapping (see documentation there).
4821  // FORNOW we use Assume=false;
4822  // TODO: Change to Assume=true but making sure we don't exceed the threshold
4823  // of runtime SCEV assumptions checks (thereby potentially failing to
4824  // vectorize altogether).
4825  // Additional optional optimizations:
4826  // TODO: If we are peeling the loop and we know that the first pointer doesn't
4827  // wrap then we can deduce that all pointers in the group don't wrap.
4828  // This means that we can forcefully peel the loop in order to only have to
4829  // check the first pointer for no-wrap. When we'll change to use Assume=true
4830  // we'll only need at most one runtime check per interleaved group.
4831  for (InterleaveGroup *Group : LoadGroups) {
4832  // Case 1: A full group. Can Skip the checks; For full groups, if the wide
4833  // load would wrap around the address space we would do a memory access at
4834  // nullptr even without the transformation.
4835  if (Group->getNumMembers() == Group->getFactor())
4836  continue;
4837 
4838  // Case 2: If first and last members of the group don't wrap this implies
4839  // that all the pointers in the group don't wrap.
4840  // So we check only group member 0 (which is always guaranteed to exist),
4841  // and group member Factor - 1; If the latter doesn't exist we rely on
4842  // peeling (if it is a non-reveresed accsess -- see Case 3).
4843  Value *FirstMemberPtr = getLoadStorePointerOperand(Group->getMember(0));
4844  if (!getPtrStride(PSE, FirstMemberPtr, TheLoop, Strides, /*Assume=*/false,
4845  /*ShouldCheckWrap=*/true)) {
4846  LLVM_DEBUG(
4847  dbgs() << "LV: Invalidate candidate interleaved group due to "
4848  "first group member potentially pointer-wrapping.\n");
4849  releaseGroup(Group);
4850  continue;
4851  }
4852  Instruction *LastMember = Group->getMember(Group->getFactor() - 1);
4853  if (LastMember) {
4854  Value *LastMemberPtr = getLoadStorePointerOperand(LastMember);
4855  if (!getPtrStride(PSE, LastMemberPtr, TheLoop, Strides, /*Assume=*/false,
4856  /*ShouldCheckWrap=*/true)) {
4857  LLVM_DEBUG(
4858  dbgs() << "LV: Invalidate candidate interleaved group due to "
4859  "last group member potentially pointer-wrapping.\n");
4860  releaseGroup(Group);
4861  }
4862  } else {
4863  // Case 3: A non-reversed interleaved load group with gaps: We need
4864  // to execute at least one scalar epilogue iteration. This will ensure
4865  // we don't speculatively access memory out-of-bounds. We only need
4866  // to look for a member at index factor - 1, since every group must have
4867  // a member at index zero.
4868  if (Group->isReverse()) {
4869  LLVM_DEBUG(
4870  dbgs() << "LV: Invalidate candidate interleaved group due to "
4871  "a reverse access with gaps.\n");
4872  releaseGroup(Group);
4873  continue;
4874  }
4875  LLVM_DEBUG(
4876  dbgs() << "LV: Interleaved group requires epilogue iteration.\n");
4877  RequiresScalarEpilogue = true;
4878  }
4879  }
4880 }
4881 
4884  // TODO: It may by useful to do since it's still likely to be dynamically
4885  // uniform if the target can skip.
4886  LLVM_DEBUG(
4887  dbgs() << "LV: Not inserting runtime ptr check for divergent target");
4888 
4889  ORE->emit(
4890  createMissedAnalysis("CantVersionLoopWithDivergentTarget")
4891  << "runtime pointer checks needed. Not enabled for divergent target");
4892 
4893  return None;
4894  }
4895 
4896  unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
4897  if (!OptForSize) // Remaining checks deal with scalar loop when OptForSize.
4898  return computeFeasibleMaxVF(OptForSize, TC);
4899 
4901  ORE->emit(createMissedAnalysis("CantVersionLoopWithOptForSize")
4902  << "runtime pointer checks needed. Enable vectorization of this "
4903  "loop with '#pragma clang loop vectorize(enable)' when "
4904  "compiling with -Os/-Oz");
4905  LLVM_DEBUG(
4906  dbgs()
4907  << "LV: Aborting. Runtime ptr check is required with -Os/-Oz.\n");
4908  return None;
4909  }
4910 
4911  // If we optimize the program for size, avoid creating the tail loop.
4912  LLVM_DEBUG(dbgs() << "LV: Found trip count: " << TC << '\n');
4913 
4914  // If we don't know the precise trip count, don't try to vectorize.
4915  if (TC < 2) {
4916  ORE->emit(
4917  createMissedAnalysis("UnknownLoopCountComplexCFG")
4918  << "unable to calculate the loop count due to complex control flow");
4919  LLVM_DEBUG(
4920  dbgs() << "LV: Aborting. A tail loop is required with -Os/-Oz.\n");
4921  return None;
4922  }
4923 
4924  unsigned MaxVF = computeFeasibleMaxVF(OptForSize, TC);
4925 
4926  if (TC % MaxVF != 0) {
4927  // If the trip count that we found modulo the vectorization factor is not
4928  // zero then we require a tail.
4929  // FIXME: look for a smaller MaxVF that does divide TC rather than give up.
4930  // FIXME: return None if loop requiresScalarEpilog(<MaxVF>), or look for a
4931  // smaller MaxVF that does not require a scalar epilog.
4932 
4933  ORE->emit(createMissedAnalysis("NoTailLoopWithOptForSize")
4934  << "cannot optimize for size and vectorize at the "
4935  "same time. Enable vectorization of this loop "
4936  "with '#pragma clang loop vectorize(enable)' "
4937  "when compiling with -Os/-Oz");
4938  LLVM_DEBUG(
4939  dbgs() << "LV: Aborting. A tail loop is required with -Os/-Oz.\n");
4940  return None;
4941  }
4942 
4943  return MaxVF;
4944 }
4945 
4946 unsigned
4947 LoopVectorizationCostModel::computeFeasibleMaxVF(bool OptForSize,
4948  unsigned ConstTripCount) {
4949  MinBWs = computeMinimumValueSizes(TheLoop->getBlocks(), *DB, &TTI);
4950  unsigned SmallestType, WidestType;
4951  std::tie(SmallestType, WidestType) = getSmallestAndWidestTypes();
4952  unsigned WidestRegister = TTI.getRegisterBitWidth(true);
4953 
4954  // Get the maximum safe dependence distance in bits computed by LAA.
4955  // It is computed by MaxVF * sizeOf(type) * 8, where type is taken from
4956  // the memory accesses that is most restrictive (involved in the smallest
4957  // dependence distance).
4958  unsigned MaxSafeRegisterWidth = Legal->getMaxSafeRegisterWidth();
4959 
4960  WidestRegister = std::min(WidestRegister, MaxSafeRegisterWidth);
4961 
4962  unsigned MaxVectorSize = WidestRegister / WidestType;
4963 
4964  LLVM_DEBUG(dbgs() << "LV: The Smallest and Widest types: " << SmallestType
4965  << " / " << WidestType << " bits.\n");
4966  LLVM_DEBUG(dbgs() << "LV: The Widest register safe to use is: "
4967  << WidestRegister << " bits.\n");
4968 
4969  assert(MaxVectorSize <= 256 && "Did not expect to pack so many elements"
4970  " into one vector!");
4971  if (MaxVectorSize == 0) {
4972  LLVM_DEBUG(dbgs() << "LV: The target has no vector registers.\n");
4973  MaxVectorSize = 1;
4974  return MaxVectorSize;
4975  } else if (ConstTripCount && ConstTripCount < MaxVectorSize &&
4976  isPowerOf2_32(ConstTripCount)) {
4977  // We need to clamp the VF to be the ConstTripCount. There is no point in
4978  // choosing a higher viable VF as done in the loop below.
4979  LLVM_DEBUG(dbgs() << "LV: Clamping the MaxVF to the constant trip count: "
4980  << ConstTripCount << "\n");
4981  MaxVectorSize = ConstTripCount;
4982  return MaxVectorSize;
4983  }
4984 
4985  unsigned MaxVF = MaxVectorSize;
4986  if (TTI.shouldMaximizeVectorBandwidth(OptForSize) ||
4987  (MaximizeBandwidth && !OptForSize)) {
4988  // Collect all viable vectorization factors larger than the default MaxVF
4989  // (i.e. MaxVectorSize).
4991  unsigned NewMaxVectorSize = WidestRegister / SmallestType;
4992  for (unsigned VS = MaxVectorSize * 2; VS <= NewMaxVectorSize; VS *= 2)
4993  VFs.push_back(VS);
4994 
4995  // For each VF calculate its register usage.
4996  auto RUs = calculateRegisterUsage(VFs);
4997 
4998  // Select the largest VF which doesn't require more registers than existing
4999  // ones.
5000  unsigned TargetNumRegisters = TTI.getNumberOfRegisters(true);
5001  for (int i = RUs.size() - 1; i >= 0; --i) {
5002  if (RUs[i].MaxLocalUsers <= TargetNumRegisters) {
5003  MaxVF = VFs[i];
5004  break;
5005  }
5006  }
5007  if (unsigned MinVF = TTI.getMinimumVF(SmallestType)) {
5008  if (MaxVF < MinVF) {
5009  LLVM_DEBUG(dbgs() << "LV: Overriding calculated MaxVF(" << MaxVF
5010  << ") with target's minimum: " << MinVF << '\n');
5011  MaxVF = MinVF;
5012  }
5013  }
5014  }
5015  return MaxVF;
5016 }
5017 
5020  float Cost = expectedCost(1).first;
5021  const float ScalarCost = Cost;
5022  unsigned Width = 1;
5023  LLVM_DEBUG(dbgs() << "LV: Scalar loop costs: " << (int)ScalarCost << ".\n");
5024 
5025  bool ForceVectorization = Hints->getForce() == LoopVectorizeHints::FK_Enabled;
5026  // Ignore scalar width, because the user explicitly wants vectorization.
5027  if (ForceVectorization && MaxVF > 1) {
5028  Width = 2;
5029  Cost = expectedCost(Width).first / (float)Width;
5030  }
5031 
5032  for (unsigned i = 2; i <= MaxVF; i *= 2) {
5033  // Notice that the vector loop needs to be exe