LLVM  9.0.0svn
LoopVectorize.cpp
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1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This is the LLVM loop vectorizer. This pass modifies 'vectorizable' loops
10 // and generates target-independent LLVM-IR.
11 // The vectorizer uses the TargetTransformInfo analysis to estimate the costs
12 // of instructions in order to estimate the profitability of vectorization.
13 //
14 // The loop vectorizer combines consecutive loop iterations into a single
15 // 'wide' iteration. After this transformation the index is incremented
16 // by the SIMD vector width, and not by one.
17 //
18 // This pass has three parts:
19 // 1. The main loop pass that drives the different parts.
20 // 2. LoopVectorizationLegality - A unit that checks for the legality
21 // of the vectorization.
22 // 3. InnerLoopVectorizer - A unit that performs the actual
23 // widening of instructions.
24 // 4. LoopVectorizationCostModel - A unit that checks for the profitability
25 // of vectorization. It decides on the optimal vector width, which
26 // can be one, if vectorization is not profitable.
27 //
28 // There is a development effort going on to migrate loop vectorizer to the
29 // VPlan infrastructure and to introduce outer loop vectorization support (see
30 // docs/Proposal/VectorizationPlan.rst and
31 // http://lists.llvm.org/pipermail/llvm-dev/2017-December/119523.html). For this
32 // purpose, we temporarily introduced the VPlan-native vectorization path: an
33 // alternative vectorization path that is natively implemented on top of the
34 // VPlan infrastructure. See EnableVPlanNativePath for enabling.
35 //
36 //===----------------------------------------------------------------------===//
37 //
38 // The reduction-variable vectorization is based on the paper:
39 // D. Nuzman and R. Henderson. Multi-platform Auto-vectorization.
40 //
41 // Variable uniformity checks are inspired by:
42 // Karrenberg, R. and Hack, S. Whole Function Vectorization.
43 //
44 // The interleaved access vectorization is based on the paper:
45 // Dorit Nuzman, Ira Rosen and Ayal Zaks. Auto-Vectorization of Interleaved
46 // Data for SIMD
47 //
48 // Other ideas/concepts are from:
49 // A. Zaks and D. Nuzman. Autovectorization in GCC-two years later.
50 //
51 // S. Maleki, Y. Gao, M. Garzaran, T. Wong and D. Padua. An Evaluation of
52 // Vectorizing Compilers.
53 //
54 //===----------------------------------------------------------------------===//
55 
58 #include "VPRecipeBuilder.h"
59 #include "VPlanHCFGBuilder.h"
60 #include "VPlanHCFGTransforms.h"
61 #include "VPlanPredicator.h"
62 #include "llvm/ADT/APInt.h"
63 #include "llvm/ADT/ArrayRef.h"
64 #include "llvm/ADT/DenseMap.h"
65 #include "llvm/ADT/DenseMapInfo.h"
66 #include "llvm/ADT/Hashing.h"
67 #include "llvm/ADT/MapVector.h"
68 #include "llvm/ADT/None.h"
69 #include "llvm/ADT/Optional.h"
70 #include "llvm/ADT/STLExtras.h"
71 #include "llvm/ADT/SetVector.h"
72 #include "llvm/ADT/SmallPtrSet.h"
73 #include "llvm/ADT/SmallVector.h"
74 #include "llvm/ADT/Statistic.h"
75 #include "llvm/ADT/StringRef.h"
76 #include "llvm/ADT/Twine.h"
81 #include "llvm/Analysis/CFG.h"
87 #include "llvm/Analysis/LoopInfo.h"
97 #include "llvm/IR/Attributes.h"
98 #include "llvm/IR/BasicBlock.h"
99 #include "llvm/IR/CFG.h"
100 #include "llvm/IR/Constant.h"
101 #include "llvm/IR/Constants.h"
102 #include "llvm/IR/DataLayout.h"
104 #include "llvm/IR/DebugLoc.h"
105 #include "llvm/IR/DerivedTypes.h"
106 #include "llvm/IR/DiagnosticInfo.h"
107 #include "llvm/IR/Dominators.h"
108 #include "llvm/IR/Function.h"
109 #include "llvm/IR/IRBuilder.h"
110 #include "llvm/IR/InstrTypes.h"
111 #include "llvm/IR/Instruction.h"
112 #include "llvm/IR/Instructions.h"
113 #include "llvm/IR/IntrinsicInst.h"
114 #include "llvm/IR/Intrinsics.h"
115 #include "llvm/IR/LLVMContext.h"
116 #include "llvm/IR/Metadata.h"
117 #include "llvm/IR/Module.h"
118 #include "llvm/IR/Operator.h"
119 #include "llvm/IR/Type.h"
120 #include "llvm/IR/Use.h"
121 #include "llvm/IR/User.h"
122 #include "llvm/IR/Value.h"
123 #include "llvm/IR/ValueHandle.h"
124 #include "llvm/IR/Verifier.h"
125 #include "llvm/Pass.h"
126 #include "llvm/Support/Casting.h"
128 #include "llvm/Support/Compiler.h"
129 #include "llvm/Support/Debug.h"
131 #include "llvm/Support/MathExtras.h"
138 #include <algorithm>
139 #include <cassert>
140 #include <cstdint>
141 #include <cstdlib>
142 #include <functional>
143 #include <iterator>
144 #include <limits>
145 #include <memory>
146 #include <string>
147 #include <tuple>
148 #include <utility>
149 #include <vector>
150 
151 using namespace llvm;
152 
153 #define LV_NAME "loop-vectorize"
154 #define DEBUG_TYPE LV_NAME
155 
156 /// @{
157 /// Metadata attribute names
158 static const char *const LLVMLoopVectorizeFollowupAll =
159  "llvm.loop.vectorize.followup_all";
160 static const char *const LLVMLoopVectorizeFollowupVectorized =
161  "llvm.loop.vectorize.followup_vectorized";
162 static const char *const LLVMLoopVectorizeFollowupEpilogue =
163  "llvm.loop.vectorize.followup_epilogue";
164 /// @}
165 
166 STATISTIC(LoopsVectorized, "Number of loops vectorized");
167 STATISTIC(LoopsAnalyzed, "Number of loops analyzed for vectorization");
168 
169 /// Loops with a known constant trip count below this number are vectorized only
170 /// if no scalar iteration overheads are incurred.
172  "vectorizer-min-trip-count", cl::init(16), cl::Hidden,
173  cl::desc("Loops with a constant trip count that is smaller than this "
174  "value are vectorized only if no scalar iteration overheads "
175  "are incurred."));
176 
178  "vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden,
179  cl::desc("Maximize bandwidth when selecting vectorization factor which "
180  "will be determined by the smallest type in loop."));
181 
183  "enable-interleaved-mem-accesses", cl::init(false), cl::Hidden,
184  cl::desc("Enable vectorization on interleaved memory accesses in a loop"));
185 
186 /// An interleave-group may need masking if it resides in a block that needs
187 /// predication, or in order to mask away gaps.
189  "enable-masked-interleaved-mem-accesses", cl::init(false), cl::Hidden,
190  cl::desc("Enable vectorization on masked interleaved memory accesses in a loop"));
191 
192 /// We don't interleave loops with a known constant trip count below this
193 /// number.
194 static const unsigned TinyTripCountInterleaveThreshold = 128;
195 
197  "force-target-num-scalar-regs", cl::init(0), cl::Hidden,
198  cl::desc("A flag that overrides the target's number of scalar registers."));
199 
201  "force-target-num-vector-regs", cl::init(0), cl::Hidden,
202  cl::desc("A flag that overrides the target's number of vector registers."));
203 
205  "force-target-max-scalar-interleave", cl::init(0), cl::Hidden,
206  cl::desc("A flag that overrides the target's max interleave factor for "
207  "scalar loops."));
208 
210  "force-target-max-vector-interleave", cl::init(0), cl::Hidden,
211  cl::desc("A flag that overrides the target's max interleave factor for "
212  "vectorized loops."));
213 
215  "force-target-instruction-cost", cl::init(0), cl::Hidden,
216  cl::desc("A flag that overrides the target's expected cost for "
217  "an instruction to a single constant value. Mostly "
218  "useful for getting consistent testing."));
219 
221  "small-loop-cost", cl::init(20), cl::Hidden,
222  cl::desc(
223  "The cost of a loop that is considered 'small' by the interleaver."));
224 
226  "loop-vectorize-with-block-frequency", cl::init(true), cl::Hidden,
227  cl::desc("Enable the use of the block frequency analysis to access PGO "
228  "heuristics minimizing code growth in cold regions and being more "
229  "aggressive in hot regions."));
230 
231 // Runtime interleave loops for load/store throughput.
233  "enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden,
234  cl::desc(
235  "Enable runtime interleaving until load/store ports are saturated"));
236 
237 /// The number of stores in a loop that are allowed to need predication.
239  "vectorize-num-stores-pred", cl::init(1), cl::Hidden,
240  cl::desc("Max number of stores to be predicated behind an if."));
241 
243  "enable-ind-var-reg-heur", cl::init(true), cl::Hidden,
244  cl::desc("Count the induction variable only once when interleaving"));
245 
247  "enable-cond-stores-vec", cl::init(true), cl::Hidden,
248  cl::desc("Enable if predication of stores during vectorization."));
249 
251  "max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden,
252  cl::desc("The maximum interleave count to use when interleaving a scalar "
253  "reduction in a nested loop."));
254 
256  "enable-vplan-native-path", cl::init(false), cl::Hidden,
257  cl::desc("Enable VPlan-native vectorization path with "
258  "support for outer loop vectorization."));
259 
260 // FIXME: Remove this switch once we have divergence analysis. Currently we
261 // assume divergent non-backedge branches when this switch is true.
263  "enable-vplan-predication", cl::init(false), cl::Hidden,
264  cl::desc("Enable VPlan-native vectorization path predicator with "
265  "support for outer loop vectorization."));
266 
267 // This flag enables the stress testing of the VPlan H-CFG construction in the
268 // VPlan-native vectorization path. It must be used in conjuction with
269 // -enable-vplan-native-path. -vplan-verify-hcfg can also be used to enable the
270 // verification of the H-CFGs built.
272  "vplan-build-stress-test", cl::init(false), cl::Hidden,
273  cl::desc(
274  "Build VPlan for every supported loop nest in the function and bail "
275  "out right after the build (stress test the VPlan H-CFG construction "
276  "in the VPlan-native vectorization path)."));
277 
278 /// A helper function for converting Scalar types to vector types.
279 /// If the incoming type is void, we return void. If the VF is 1, we return
280 /// the scalar type.
281 static Type *ToVectorTy(Type *Scalar, unsigned VF) {
282  if (Scalar->isVoidTy() || VF == 1)
283  return Scalar;
284  return VectorType::get(Scalar, VF);
285 }
286 
287 /// A helper function that returns the type of loaded or stored value.
289  assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
290  "Expected Load or Store instruction");
291  if (auto *LI = dyn_cast<LoadInst>(I))
292  return LI->getType();
293  return cast<StoreInst>(I)->getValueOperand()->getType();
294 }
295 
296 /// A helper function that returns true if the given type is irregular. The
297 /// type is irregular if its allocated size doesn't equal the store size of an
298 /// element of the corresponding vector type at the given vectorization factor.
299 static bool hasIrregularType(Type *Ty, const DataLayout &DL, unsigned VF) {
300  // Determine if an array of VF elements of type Ty is "bitcast compatible"
301  // with a <VF x Ty> vector.
302  if (VF > 1) {
303  auto *VectorTy = VectorType::get(Ty, VF);
304  return VF * DL.getTypeAllocSize(Ty) != DL.getTypeStoreSize(VectorTy);
305  }
306 
307  // If the vectorization factor is one, we just check if an array of type Ty
308  // requires padding between elements.
309  return DL.getTypeAllocSizeInBits(Ty) != DL.getTypeSizeInBits(Ty);
310 }
311 
312 /// A helper function that returns the reciprocal of the block probability of
313 /// predicated blocks. If we return X, we are assuming the predicated block
314 /// will execute once for every X iterations of the loop header.
315 ///
316 /// TODO: We should use actual block probability here, if available. Currently,
317 /// we always assume predicated blocks have a 50% chance of executing.
318 static unsigned getReciprocalPredBlockProb() { return 2; }
319 
320 /// A helper function that adds a 'fast' flag to floating-point operations.
322  if (isa<FPMathOperator>(V))
323  cast<Instruction>(V)->setFastMathFlags(FastMathFlags::getFast());
324  return V;
325 }
326 
328  if (isa<FPMathOperator>(V))
329  cast<Instruction>(V)->setFastMathFlags(FMF);
330  return V;
331 }
332 
333 /// A helper function that returns an integer or floating-point constant with
334 /// value C.
335 static Constant *getSignedIntOrFpConstant(Type *Ty, int64_t C) {
336  return Ty->isIntegerTy() ? ConstantInt::getSigned(Ty, C)
337  : ConstantFP::get(Ty, C);
338 }
339 
340 namespace llvm {
341 
342 /// InnerLoopVectorizer vectorizes loops which contain only one basic
343 /// block to a specified vectorization factor (VF).
344 /// This class performs the widening of scalars into vectors, or multiple
345 /// scalars. This class also implements the following features:
346 /// * It inserts an epilogue loop for handling loops that don't have iteration
347 /// counts that are known to be a multiple of the vectorization factor.
348 /// * It handles the code generation for reduction variables.
349 /// * Scalarization (implementation using scalars) of un-vectorizable
350 /// instructions.
351 /// InnerLoopVectorizer does not perform any vectorization-legality
352 /// checks, and relies on the caller to check for the different legality
353 /// aspects. The InnerLoopVectorizer relies on the
354 /// LoopVectorizationLegality class to provide information about the induction
355 /// and reduction variables that were found to a given vectorization factor.
357 public:
360  const TargetLibraryInfo *TLI,
362  OptimizationRemarkEmitter *ORE, unsigned VecWidth,
363  unsigned UnrollFactor, LoopVectorizationLegality *LVL,
365  : OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI),
366  AC(AC), ORE(ORE), VF(VecWidth), UF(UnrollFactor),
367  Builder(PSE.getSE()->getContext()),
368  VectorLoopValueMap(UnrollFactor, VecWidth), Legal(LVL), Cost(CM) {}
369  virtual ~InnerLoopVectorizer() = default;
370 
371  /// Create a new empty loop. Unlink the old loop and connect the new one.
372  /// Return the pre-header block of the new loop.
374 
375  /// Widen a single instruction within the innermost loop.
377 
378  /// Fix the vectorized code, taking care of header phi's, live-outs, and more.
379  void fixVectorizedLoop();
380 
381  // Return true if any runtime check is added.
383 
384  /// A type for vectorized values in the new loop. Each value from the
385  /// original loop, when vectorized, is represented by UF vector values in the
386  /// new unrolled loop, where UF is the unroll factor.
388 
389  /// Vectorize a single PHINode in a block. This method handles the induction
390  /// variable canonicalization. It supports both VF = 1 for unrolled loops and
391  /// arbitrary length vectors.
392  void widenPHIInstruction(Instruction *PN, unsigned UF, unsigned VF);
393 
394  /// A helper function to scalarize a single Instruction in the innermost loop.
395  /// Generates a sequence of scalar instances for each lane between \p MinLane
396  /// and \p MaxLane, times each part between \p MinPart and \p MaxPart,
397  /// inclusive..
398  void scalarizeInstruction(Instruction *Instr, const VPIteration &Instance,
399  bool IfPredicateInstr);
400 
401  /// Widen an integer or floating-point induction variable \p IV. If \p Trunc
402  /// is provided, the integer induction variable will first be truncated to
403  /// the corresponding type.
404  void widenIntOrFpInduction(PHINode *IV, TruncInst *Trunc = nullptr);
405 
406  /// getOrCreateVectorValue and getOrCreateScalarValue coordinate to generate a
407  /// vector or scalar value on-demand if one is not yet available. When
408  /// vectorizing a loop, we visit the definition of an instruction before its
409  /// uses. When visiting the definition, we either vectorize or scalarize the
410  /// instruction, creating an entry for it in the corresponding map. (In some
411  /// cases, such as induction variables, we will create both vector and scalar
412  /// entries.) Then, as we encounter uses of the definition, we derive values
413  /// for each scalar or vector use unless such a value is already available.
414  /// For example, if we scalarize a definition and one of its uses is vector,
415  /// we build the required vector on-demand with an insertelement sequence
416  /// when visiting the use. Otherwise, if the use is scalar, we can use the
417  /// existing scalar definition.
418  ///
419  /// Return a value in the new loop corresponding to \p V from the original
420  /// loop at unroll index \p Part. If the value has already been vectorized,
421  /// the corresponding vector entry in VectorLoopValueMap is returned. If,
422  /// however, the value has a scalar entry in VectorLoopValueMap, we construct
423  /// a new vector value on-demand by inserting the scalar values into a vector
424  /// with an insertelement sequence. If the value has been neither vectorized
425  /// nor scalarized, it must be loop invariant, so we simply broadcast the
426  /// value into a vector.
427  Value *getOrCreateVectorValue(Value *V, unsigned Part);
428 
429  /// Return a value in the new loop corresponding to \p V from the original
430  /// loop at unroll and vector indices \p Instance. If the value has been
431  /// vectorized but not scalarized, the necessary extractelement instruction
432  /// will be generated.
433  Value *getOrCreateScalarValue(Value *V, const VPIteration &Instance);
434 
435  /// Construct the vector value of a scalarized value \p V one lane at a time.
436  void packScalarIntoVectorValue(Value *V, const VPIteration &Instance);
437 
438  /// Try to vectorize the interleaved access group that \p Instr belongs to,
439  /// optionally masking the vector operations if \p BlockInMask is non-null.
441  VectorParts *BlockInMask = nullptr);
442 
443  /// Vectorize Load and Store instructions, optionally masking the vector
444  /// operations if \p BlockInMask is non-null.
446  VectorParts *BlockInMask = nullptr);
447 
448  /// Set the debug location in the builder using the debug location in
449  /// the instruction.
450  void setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr);
451 
452  /// Fix the non-induction PHIs in the OrigPHIsToFix vector.
453  void fixNonInductionPHIs(void);
454 
455 protected:
457 
458  /// A small list of PHINodes.
460 
461  /// A type for scalarized values in the new loop. Each value from the
462  /// original loop, when scalarized, is represented by UF x VF scalar values
463  /// in the new unrolled loop, where UF is the unroll factor and VF is the
464  /// vectorization factor.
466 
467  /// Set up the values of the IVs correctly when exiting the vector loop.
468  void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II,
469  Value *CountRoundDown, Value *EndValue,
470  BasicBlock *MiddleBlock);
471 
472  /// Create a new induction variable inside L.
473  PHINode *createInductionVariable(Loop *L, Value *Start, Value *End,
474  Value *Step, Instruction *DL);
475 
476  /// Handle all cross-iteration phis in the header.
477  void fixCrossIterationPHIs();
478 
479  /// Fix a first-order recurrence. This is the second phase of vectorizing
480  /// this phi node.
481  void fixFirstOrderRecurrence(PHINode *Phi);
482 
483  /// Fix a reduction cross-iteration phi. This is the second phase of
484  /// vectorizing this phi node.
485  void fixReduction(PHINode *Phi);
486 
487  /// The Loop exit block may have single value PHI nodes with some
488  /// incoming value. While vectorizing we only handled real values
489  /// that were defined inside the loop and we should have one value for
490  /// each predecessor of its parent basic block. See PR14725.
491  void fixLCSSAPHIs();
492 
493  /// Iteratively sink the scalarized operands of a predicated instruction into
494  /// the block that was created for it.
495  void sinkScalarOperands(Instruction *PredInst);
496 
497  /// Shrinks vector element sizes to the smallest bitwidth they can be legally
498  /// represented as.
500 
501  /// Insert the new loop to the loop hierarchy and pass manager
502  /// and update the analysis passes.
503  void updateAnalysis();
504 
505  /// Create a broadcast instruction. This method generates a broadcast
506  /// instruction (shuffle) for loop invariant values and for the induction
507  /// value. If this is the induction variable then we extend it to N, N+1, ...
508  /// this is needed because each iteration in the loop corresponds to a SIMD
509  /// element.
510  virtual Value *getBroadcastInstrs(Value *V);
511 
512  /// This function adds (StartIdx, StartIdx + Step, StartIdx + 2*Step, ...)
513  /// to each vector element of Val. The sequence starts at StartIndex.
514  /// \p Opcode is relevant for FP induction variable.
515  virtual Value *getStepVector(Value *Val, int StartIdx, Value *Step,
516  Instruction::BinaryOps Opcode =
517  Instruction::BinaryOpsEnd);
518 
519  /// Compute scalar induction steps. \p ScalarIV is the scalar induction
520  /// variable on which to base the steps, \p Step is the size of the step, and
521  /// \p EntryVal is the value from the original loop that maps to the steps.
522  /// Note that \p EntryVal doesn't have to be an induction variable - it
523  /// can also be a truncate instruction.
524  void buildScalarSteps(Value *ScalarIV, Value *Step, Instruction *EntryVal,
525  const InductionDescriptor &ID);
526 
527  /// Create a vector induction phi node based on an existing scalar one. \p
528  /// EntryVal is the value from the original loop that maps to the vector phi
529  /// node, and \p Step is the loop-invariant step. If \p EntryVal is a
530  /// truncate instruction, instead of widening the original IV, we widen a
531  /// version of the IV truncated to \p EntryVal's type.
533  Value *Step, Instruction *EntryVal);
534 
535  /// Returns true if an instruction \p I should be scalarized instead of
536  /// vectorized for the chosen vectorization factor.
538 
539  /// Returns true if we should generate a scalar version of \p IV.
540  bool needsScalarInduction(Instruction *IV) const;
541 
542  /// If there is a cast involved in the induction variable \p ID, which should
543  /// be ignored in the vectorized loop body, this function records the
544  /// VectorLoopValue of the respective Phi also as the VectorLoopValue of the
545  /// cast. We had already proved that the casted Phi is equal to the uncasted
546  /// Phi in the vectorized loop (under a runtime guard), and therefore
547  /// there is no need to vectorize the cast - the same value can be used in the
548  /// vector loop for both the Phi and the cast.
549  /// If \p VectorLoopValue is a scalarized value, \p Lane is also specified,
550  /// Otherwise, \p VectorLoopValue is a widened/vectorized value.
551  ///
552  /// \p EntryVal is the value from the original loop that maps to the vector
553  /// phi node and is used to distinguish what is the IV currently being
554  /// processed - original one (if \p EntryVal is a phi corresponding to the
555  /// original IV) or the "newly-created" one based on the proof mentioned above
556  /// (see also buildScalarSteps() and createVectorIntOrFPInductionPHI()). In the
557  /// latter case \p EntryVal is a TruncInst and we must not record anything for
558  /// that IV, but it's error-prone to expect callers of this routine to care
559  /// about that, hence this explicit parameter.
561  const Instruction *EntryVal,
562  Value *VectorLoopValue,
563  unsigned Part,
564  unsigned Lane = UINT_MAX);
565 
566  /// Generate a shuffle sequence that will reverse the vector Vec.
567  virtual Value *reverseVector(Value *Vec);
568 
569  /// Returns (and creates if needed) the original loop trip count.
570  Value *getOrCreateTripCount(Loop *NewLoop);
571 
572  /// Returns (and creates if needed) the trip count of the widened loop.
574 
575  /// Returns a bitcasted value to the requested vector type.
576  /// Also handles bitcasts of vector<float> <-> vector<pointer> types.
578  const DataLayout &DL);
579 
580  /// Emit a bypass check to see if the vector trip count is zero, including if
581  /// it overflows.
583 
584  /// Emit a bypass check to see if all of the SCEV assumptions we've
585  /// had to make are correct.
586  void emitSCEVChecks(Loop *L, BasicBlock *Bypass);
587 
588  /// Emit bypass checks to check any memory assumptions we may have made.
589  void emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass);
590 
591  /// Compute the transformed value of Index at offset StartValue using step
592  /// StepValue.
593  /// For integer induction, returns StartValue + Index * StepValue.
594  /// For pointer induction, returns StartValue[Index * StepValue].
595  /// FIXME: The newly created binary instructions should contain nsw/nuw
596  /// flags, which can be found from the original scalar operations.
598  const DataLayout &DL,
599  const InductionDescriptor &ID) const;
600 
601  /// Add additional metadata to \p To that was not present on \p Orig.
602  ///
603  /// Currently this is used to add the noalias annotations based on the
604  /// inserted memchecks. Use this for instructions that are *cloned* into the
605  /// vector loop.
606  void addNewMetadata(Instruction *To, const Instruction *Orig);
607 
608  /// Add metadata from one instruction to another.
609  ///
610  /// This includes both the original MDs from \p From and additional ones (\see
611  /// addNewMetadata). Use this for *newly created* instructions in the vector
612  /// loop.
614 
615  /// Similar to the previous function but it adds the metadata to a
616  /// vector of instructions.
618 
619  /// The original loop.
621 
622  /// A wrapper around ScalarEvolution used to add runtime SCEV checks. Applies
623  /// dynamic knowledge to simplify SCEV expressions and converts them to a
624  /// more usable form.
626 
627  /// Loop Info.
629 
630  /// Dominator Tree.
632 
633  /// Alias Analysis.
635 
636  /// Target Library Info.
638 
639  /// Target Transform Info.
641 
642  /// Assumption Cache.
644 
645  /// Interface to emit optimization remarks.
647 
648  /// LoopVersioning. It's only set up (non-null) if memchecks were
649  /// used.
650  ///
651  /// This is currently only used to add no-alias metadata based on the
652  /// memchecks. The actually versioning is performed manually.
653  std::unique_ptr<LoopVersioning> LVer;
654 
655  /// The vectorization SIMD factor to use. Each vector will have this many
656  /// vector elements.
657  unsigned VF;
658 
659  /// The vectorization unroll factor to use. Each scalar is vectorized to this
660  /// many different vector instructions.
661  unsigned UF;
662 
663  /// The builder that we use
665 
666  // --- Vectorization state ---
667 
668  /// The vector-loop preheader.
670 
671  /// The scalar-loop preheader.
673 
674  /// Middle Block between the vector and the scalar.
676 
677  /// The ExitBlock of the scalar loop.
679 
680  /// The vector loop body.
682 
683  /// The scalar loop body.
685 
686  /// A list of all bypass blocks. The first block is the entry of the loop.
688 
689  /// The new Induction variable which was added to the new block.
690  PHINode *Induction = nullptr;
691 
692  /// The induction variable of the old basic block.
693  PHINode *OldInduction = nullptr;
694 
695  /// Maps values from the original loop to their corresponding values in the
696  /// vectorized loop. A key value can map to either vector values, scalar
697  /// values or both kinds of values, depending on whether the key was
698  /// vectorized and scalarized.
700 
701  /// Store instructions that were predicated.
703 
704  /// Trip count of the original loop.
705  Value *TripCount = nullptr;
706 
707  /// Trip count of the widened loop (TripCount - TripCount % (VF*UF))
708  Value *VectorTripCount = nullptr;
709 
710  /// The legality analysis.
712 
713  /// The profitablity analysis.
715 
716  // Record whether runtime checks are added.
717  bool AddedSafetyChecks = false;
718 
719  // Holds the end values for each induction variable. We save the end values
720  // so we can later fix-up the external users of the induction variables.
722 
723  // Vector of original scalar PHIs whose corresponding widened PHIs need to be
724  // fixed up at the end of vector code generation.
726 };
727 
729 public:
732  const TargetLibraryInfo *TLI,
734  OptimizationRemarkEmitter *ORE, unsigned UnrollFactor,
737  : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 1,
738  UnrollFactor, LVL, CM) {}
739 
740 private:
741  Value *getBroadcastInstrs(Value *V) override;
742  Value *getStepVector(Value *Val, int StartIdx, Value *Step,
743  Instruction::BinaryOps Opcode =
744  Instruction::BinaryOpsEnd) override;
745  Value *reverseVector(Value *Vec) override;
746 };
747 
748 } // end namespace llvm
749 
750 /// Look for a meaningful debug location on the instruction or it's
751 /// operands.
753  if (!I)
754  return I;
755 
756  DebugLoc Empty;
757  if (I->getDebugLoc() != Empty)
758  return I;
759 
760  for (User::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) {
761  if (Instruction *OpInst = dyn_cast<Instruction>(*OI))
762  if (OpInst->getDebugLoc() != Empty)
763  return OpInst;
764  }
765 
766  return I;
767 }
768 
770  if (const Instruction *Inst = dyn_cast_or_null<Instruction>(Ptr)) {
771  const DILocation *DIL = Inst->getDebugLoc();
772  if (DIL && Inst->getFunction()->isDebugInfoForProfiling() &&
773  !isa<DbgInfoIntrinsic>(Inst)) {
774  auto NewDIL = DIL->cloneByMultiplyingDuplicationFactor(UF * VF);
775  if (NewDIL)
776  B.SetCurrentDebugLocation(NewDIL.getValue());
777  else
778  LLVM_DEBUG(dbgs()
779  << "Failed to create new discriminator: "
780  << DIL->getFilename() << " Line: " << DIL->getLine());
781  }
782  else
784  } else
786 }
787 
788 #ifndef NDEBUG
789 /// \return string containing a file name and a line # for the given loop.
790 static std::string getDebugLocString(const Loop *L) {
791  std::string Result;
792  if (L) {
793  raw_string_ostream OS(Result);
794  if (const DebugLoc LoopDbgLoc = L->getStartLoc())
795  LoopDbgLoc.print(OS);
796  else
797  // Just print the module name.
798  OS << L->getHeader()->getParent()->getParent()->getModuleIdentifier();
799  OS.flush();
800  }
801  return Result;
802 }
803 #endif
804 
806  const Instruction *Orig) {
807  // If the loop was versioned with memchecks, add the corresponding no-alias
808  // metadata.
809  if (LVer && (isa<LoadInst>(Orig) || isa<StoreInst>(Orig)))
810  LVer->annotateInstWithNoAlias(To, Orig);
811 }
812 
814  Instruction *From) {
815  propagateMetadata(To, From);
816  addNewMetadata(To, From);
817 }
818 
820  Instruction *From) {
821  for (Value *V : To) {
822  if (Instruction *I = dyn_cast<Instruction>(V))
823  addMetadata(I, From);
824  }
825 }
826 
827 namespace llvm {
828 
829 /// LoopVectorizationCostModel - estimates the expected speedups due to
830 /// vectorization.
831 /// In many cases vectorization is not profitable. This can happen because of
832 /// a number of reasons. In this class we mainly attempt to predict the
833 /// expected speedup/slowdowns due to the supported instruction set. We use the
834 /// TargetTransformInfo to query the different backends for the cost of
835 /// different operations.
837 public:
840  const TargetTransformInfo &TTI,
841  const TargetLibraryInfo *TLI, DemandedBits *DB,
844  const LoopVectorizeHints *Hints,
846  : TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), TTI(TTI), TLI(TLI), DB(DB),
847  AC(AC), ORE(ORE), TheFunction(F), Hints(Hints), InterleaveInfo(IAI) {}
848 
849  /// \return An upper bound for the vectorization factor, or None if
850  /// vectorization and interleaving should be avoided up front.
851  Optional<unsigned> computeMaxVF(bool OptForSize);
852 
853  /// \return The most profitable vectorization factor and the cost of that VF.
854  /// This method checks every power of two up to MaxVF. If UserVF is not ZERO
855  /// then this vectorization factor will be selected if vectorization is
856  /// possible.
857  VectorizationFactor selectVectorizationFactor(unsigned MaxVF);
858 
859  /// Setup cost-based decisions for user vectorization factor.
860  void selectUserVectorizationFactor(unsigned UserVF) {
861  collectUniformsAndScalars(UserVF);
862  collectInstsToScalarize(UserVF);
863  }
864 
865  /// \return The size (in bits) of the smallest and widest types in the code
866  /// that needs to be vectorized. We ignore values that remain scalar such as
867  /// 64 bit loop indices.
868  std::pair<unsigned, unsigned> getSmallestAndWidestTypes();
869 
870  /// \return The desired interleave count.
871  /// If interleave count has been specified by metadata it will be returned.
872  /// Otherwise, the interleave count is computed and returned. VF and LoopCost
873  /// are the selected vectorization factor and the cost of the selected VF.
874  unsigned selectInterleaveCount(bool OptForSize, unsigned VF,
875  unsigned LoopCost);
876 
877  /// Memory access instruction may be vectorized in more than one way.
878  /// Form of instruction after vectorization depends on cost.
879  /// This function takes cost-based decisions for Load/Store instructions
880  /// and collects them in a map. This decisions map is used for building
881  /// the lists of loop-uniform and loop-scalar instructions.
882  /// The calculated cost is saved with widening decision in order to
883  /// avoid redundant calculations.
884  void setCostBasedWideningDecision(unsigned VF);
885 
886  /// A struct that represents some properties of the register usage
887  /// of a loop.
888  struct RegisterUsage {
889  /// Holds the number of loop invariant values that are used in the loop.
891 
892  /// Holds the maximum number of concurrent live intervals in the loop.
893  unsigned MaxLocalUsers;
894  };
895 
896  /// \return Returns information about the register usages of the loop for the
897  /// given vectorization factors.
898  SmallVector<RegisterUsage, 8> calculateRegisterUsage(ArrayRef<unsigned> VFs);
899 
900  /// Collect values we want to ignore in the cost model.
901  void collectValuesToIgnore();
902 
903  /// \returns The smallest bitwidth each instruction can be represented with.
904  /// The vector equivalents of these instructions should be truncated to this
905  /// type.
907  return MinBWs;
908  }
909 
910  /// \returns True if it is more profitable to scalarize instruction \p I for
911  /// vectorization factor \p VF.
912  bool isProfitableToScalarize(Instruction *I, unsigned VF) const {
913  assert(VF > 1 && "Profitable to scalarize relevant only for VF > 1.");
914 
915  // Cost model is not run in the VPlan-native path - return conservative
916  // result until this changes.
918  return false;
919 
920  auto Scalars = InstsToScalarize.find(VF);
921  assert(Scalars != InstsToScalarize.end() &&
922  "VF not yet analyzed for scalarization profitability");
923  return Scalars->second.find(I) != Scalars->second.end();
924  }
925 
926  /// Returns true if \p I is known to be uniform after vectorization.
927  bool isUniformAfterVectorization(Instruction *I, unsigned VF) const {
928  if (VF == 1)
929  return true;
930 
931  // Cost model is not run in the VPlan-native path - return conservative
932  // result until this changes.
934  return false;
935 
936  auto UniformsPerVF = Uniforms.find(VF);
937  assert(UniformsPerVF != Uniforms.end() &&
938  "VF not yet analyzed for uniformity");
939  return UniformsPerVF->second.find(I) != UniformsPerVF->second.end();
940  }
941 
942  /// Returns true if \p I is known to be scalar after vectorization.
943  bool isScalarAfterVectorization(Instruction *I, unsigned VF) const {
944  if (VF == 1)
945  return true;
946 
947  // Cost model is not run in the VPlan-native path - return conservative
948  // result until this changes.
950  return false;
951 
952  auto ScalarsPerVF = Scalars.find(VF);
953  assert(ScalarsPerVF != Scalars.end() &&
954  "Scalar values are not calculated for VF");
955  return ScalarsPerVF->second.find(I) != ScalarsPerVF->second.end();
956  }
957 
958  /// \returns True if instruction \p I can be truncated to a smaller bitwidth
959  /// for vectorization factor \p VF.
960  bool canTruncateToMinimalBitwidth(Instruction *I, unsigned VF) const {
961  return VF > 1 && MinBWs.find(I) != MinBWs.end() &&
962  !isProfitableToScalarize(I, VF) &&
963  !isScalarAfterVectorization(I, VF);
964  }
965 
966  /// Decision that was taken during cost calculation for memory instruction.
969  CM_Widen, // For consecutive accesses with stride +1.
970  CM_Widen_Reverse, // For consecutive accesses with stride -1.
973  CM_Scalarize
974  };
975 
976  /// Save vectorization decision \p W and \p Cost taken by the cost model for
977  /// instruction \p I and vector width \p VF.
979  unsigned Cost) {
980  assert(VF >= 2 && "Expected VF >=2");
981  WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
982  }
983 
984  /// Save vectorization decision \p W and \p Cost taken by the cost model for
985  /// interleaving group \p Grp and vector width \p VF.
986  void setWideningDecision(const InterleaveGroup<Instruction> *Grp, unsigned VF,
987  InstWidening W, unsigned Cost) {
988  assert(VF >= 2 && "Expected VF >=2");
989  /// Broadcast this decicion to all instructions inside the group.
990  /// But the cost will be assigned to one instruction only.
991  for (unsigned i = 0; i < Grp->getFactor(); ++i) {
992  if (auto *I = Grp->getMember(i)) {
993  if (Grp->getInsertPos() == I)
994  WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
995  else
996  WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, 0);
997  }
998  }
999  }
1000 
1001  /// Return the cost model decision for the given instruction \p I and vector
1002  /// width \p VF. Return CM_Unknown if this instruction did not pass
1003  /// through the cost modeling.
1005  assert(VF >= 2 && "Expected VF >=2");
1006 
1007  // Cost model is not run in the VPlan-native path - return conservative
1008  // result until this changes.
1010  return CM_GatherScatter;
1011 
1012  std::pair<Instruction *, unsigned> InstOnVF = std::make_pair(I, VF);
1013  auto Itr = WideningDecisions.find(InstOnVF);
1014  if (Itr == WideningDecisions.end())
1015  return CM_Unknown;
1016  return Itr->second.first;
1017  }
1018 
1019  /// Return the vectorization cost for the given instruction \p I and vector
1020  /// width \p VF.
1021  unsigned getWideningCost(Instruction *I, unsigned VF) {
1022  assert(VF >= 2 && "Expected VF >=2");
1023  std::pair<Instruction *, unsigned> InstOnVF = std::make_pair(I, VF);
1024  assert(WideningDecisions.find(InstOnVF) != WideningDecisions.end() &&
1025  "The cost is not calculated");
1026  return WideningDecisions[InstOnVF].second;
1027  }
1028 
1029  /// Return True if instruction \p I is an optimizable truncate whose operand
1030  /// is an induction variable. Such a truncate will be removed by adding a new
1031  /// induction variable with the destination type.
1032  bool isOptimizableIVTruncate(Instruction *I, unsigned VF) {
1033  // If the instruction is not a truncate, return false.
1034  auto *Trunc = dyn_cast<TruncInst>(I);
1035  if (!Trunc)
1036  return false;
1037 
1038  // Get the source and destination types of the truncate.
1039  Type *SrcTy = ToVectorTy(cast<CastInst>(I)->getSrcTy(), VF);
1040  Type *DestTy = ToVectorTy(cast<CastInst>(I)->getDestTy(), VF);
1041 
1042  // If the truncate is free for the given types, return false. Replacing a
1043  // free truncate with an induction variable would add an induction variable
1044  // update instruction to each iteration of the loop. We exclude from this
1045  // check the primary induction variable since it will need an update
1046  // instruction regardless.
1047  Value *Op = Trunc->getOperand(0);
1048  if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy))
1049  return false;
1050 
1051  // If the truncated value is not an induction variable, return false.
1052  return Legal->isInductionPhi(Op);
1053  }
1054 
1055  /// Collects the instructions to scalarize for each predicated instruction in
1056  /// the loop.
1057  void collectInstsToScalarize(unsigned VF);
1058 
1059  /// Collect Uniform and Scalar values for the given \p VF.
1060  /// The sets depend on CM decision for Load/Store instructions
1061  /// that may be vectorized as interleave, gather-scatter or scalarized.
1062  void collectUniformsAndScalars(unsigned VF) {
1063  // Do the analysis once.
1064  if (VF == 1 || Uniforms.find(VF) != Uniforms.end())
1065  return;
1066  setCostBasedWideningDecision(VF);
1067  collectLoopUniforms(VF);
1068  collectLoopScalars(VF);
1069  }
1070 
1071  /// Returns true if the target machine supports masked store operation
1072  /// for the given \p DataType and kind of access to \p Ptr.
1074  return Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedStore(DataType);
1075  }
1076 
1077  /// Returns true if the target machine supports masked load operation
1078  /// for the given \p DataType and kind of access to \p Ptr.
1080  return Legal->isConsecutivePtr(Ptr) && TTI.isLegalMaskedLoad(DataType);
1081  }
1082 
1083  /// Returns true if the target machine supports masked scatter operation
1084  /// for the given \p DataType.
1086  return TTI.isLegalMaskedScatter(DataType);
1087  }
1088 
1089  /// Returns true if the target machine supports masked gather operation
1090  /// for the given \p DataType.
1092  return TTI.isLegalMaskedGather(DataType);
1093  }
1094 
1095  /// Returns true if the target machine can represent \p V as a masked gather
1096  /// or scatter operation.
1098  bool LI = isa<LoadInst>(V);
1099  bool SI = isa<StoreInst>(V);
1100  if (!LI && !SI)
1101  return false;
1102  auto *Ty = getMemInstValueType(V);
1103  return (LI && isLegalMaskedGather(Ty)) || (SI && isLegalMaskedScatter(Ty));
1104  }
1105 
1106  /// Returns true if \p I is an instruction that will be scalarized with
1107  /// predication. Such instructions include conditional stores and
1108  /// instructions that may divide by zero.
1109  /// If a non-zero VF has been calculated, we check if I will be scalarized
1110  /// predication for that VF.
1111  bool isScalarWithPredication(Instruction *I, unsigned VF = 1);
1112 
1113  // Returns true if \p I is an instruction that will be predicated either
1114  // through scalar predication or masked load/store or masked gather/scatter.
1115  // Superset of instructions that return true for isScalarWithPredication.
1117  if (!blockNeedsPredication(I->getParent()))
1118  return false;
1119  // Loads and stores that need some form of masked operation are predicated
1120  // instructions.
1121  if (isa<LoadInst>(I) || isa<StoreInst>(I))
1122  return Legal->isMaskRequired(I);
1123  return isScalarWithPredication(I);
1124  }
1125 
1126  /// Returns true if \p I is a memory instruction with consecutive memory
1127  /// access that can be widened.
1128  bool memoryInstructionCanBeWidened(Instruction *I, unsigned VF = 1);
1129 
1130  /// Returns true if \p I is a memory instruction in an interleaved-group
1131  /// of memory accesses that can be vectorized with wide vector loads/stores
1132  /// and shuffles.
1133  bool interleavedAccessCanBeWidened(Instruction *I, unsigned VF = 1);
1134 
1135  /// Check if \p Instr belongs to any interleaved access group.
1137  return InterleaveInfo.isInterleaved(Instr);
1138  }
1139 
1140  /// Get the interleaved access group that \p Instr belongs to.
1143  return InterleaveInfo.getInterleaveGroup(Instr);
1144  }
1145 
1146  /// Returns true if an interleaved group requires a scalar iteration
1147  /// to handle accesses with gaps, and there is nothing preventing us from
1148  /// creating a scalar epilogue.
1149  bool requiresScalarEpilogue() const {
1150  return IsScalarEpilogueAllowed && InterleaveInfo.requiresScalarEpilogue();
1151  }
1152 
1153  /// Returns true if a scalar epilogue is not allowed due to optsize.
1154  bool isScalarEpilogueAllowed() const { return IsScalarEpilogueAllowed; }
1155 
1156  /// Returns true if all loop blocks should be masked to fold tail loop.
1157  bool foldTailByMasking() const { return FoldTailByMasking; }
1158 
1160  return foldTailByMasking() || Legal->blockNeedsPredication(BB);
1161  }
1162 
1163 private:
1164  unsigned NumPredStores = 0;
1165 
1166  /// \return An upper bound for the vectorization factor, larger than zero.
1167  /// One is returned if vectorization should best be avoided due to cost.
1168  unsigned computeFeasibleMaxVF(bool OptForSize, unsigned ConstTripCount);
1169 
1170  /// The vectorization cost is a combination of the cost itself and a boolean
1171  /// indicating whether any of the contributing operations will actually
1172  /// operate on
1173  /// vector values after type legalization in the backend. If this latter value
1174  /// is
1175  /// false, then all operations will be scalarized (i.e. no vectorization has
1176  /// actually taken place).
1177  using VectorizationCostTy = std::pair<unsigned, bool>;
1178 
1179  /// Returns the expected execution cost. The unit of the cost does
1180  /// not matter because we use the 'cost' units to compare different
1181  /// vector widths. The cost that is returned is *not* normalized by
1182  /// the factor width.
1183  VectorizationCostTy expectedCost(unsigned VF);
1184 
1185  /// Returns the execution time cost of an instruction for a given vector
1186  /// width. Vector width of one means scalar.
1187  VectorizationCostTy getInstructionCost(Instruction *I, unsigned VF);
1188 
1189  /// The cost-computation logic from getInstructionCost which provides
1190  /// the vector type as an output parameter.
1191  unsigned getInstructionCost(Instruction *I, unsigned VF, Type *&VectorTy);
1192 
1193  /// Calculate vectorization cost of memory instruction \p I.
1194  unsigned getMemoryInstructionCost(Instruction *I, unsigned VF);
1195 
1196  /// The cost computation for scalarized memory instruction.
1197  unsigned getMemInstScalarizationCost(Instruction *I, unsigned VF);
1198 
1199  /// The cost computation for interleaving group of memory instructions.
1200  unsigned getInterleaveGroupCost(Instruction *I, unsigned VF);
1201 
1202  /// The cost computation for Gather/Scatter instruction.
1203  unsigned getGatherScatterCost(Instruction *I, unsigned VF);
1204 
1205  /// The cost computation for widening instruction \p I with consecutive
1206  /// memory access.
1207  unsigned getConsecutiveMemOpCost(Instruction *I, unsigned VF);
1208 
1209  /// The cost calculation for Load/Store instruction \p I with uniform pointer -
1210  /// Load: scalar load + broadcast.
1211  /// Store: scalar store + (loop invariant value stored? 0 : extract of last
1212  /// element)
1213  unsigned getUniformMemOpCost(Instruction *I, unsigned VF);
1214 
1215  /// Returns whether the instruction is a load or store and will be a emitted
1216  /// as a vector operation.
1217  bool isConsecutiveLoadOrStore(Instruction *I);
1218 
1219  /// Returns true if an artificially high cost for emulated masked memrefs
1220  /// should be used.
1221  bool useEmulatedMaskMemRefHack(Instruction *I);
1222 
1223  /// Create an analysis remark that explains why vectorization failed
1224  ///
1225  /// \p RemarkName is the identifier for the remark. \return the remark object
1226  /// that can be streamed to.
1227  OptimizationRemarkAnalysis createMissedAnalysis(StringRef RemarkName) {
1228  return createLVMissedAnalysis(Hints->vectorizeAnalysisPassName(),
1229  RemarkName, TheLoop);
1230  }
1231 
1232  /// Map of scalar integer values to the smallest bitwidth they can be legally
1233  /// represented as. The vector equivalents of these values should be truncated
1234  /// to this type.
1236 
1237  /// A type representing the costs for instructions if they were to be
1238  /// scalarized rather than vectorized. The entries are Instruction-Cost
1239  /// pairs.
1241 
1242  /// A set containing all BasicBlocks that are known to present after
1243  /// vectorization as a predicated block.
1244  SmallPtrSet<BasicBlock *, 4> PredicatedBBsAfterVectorization;
1245 
1246  /// Records whether it is allowed to have the original scalar loop execute at
1247  /// least once. This may be needed as a fallback loop in case runtime
1248  /// aliasing/dependence checks fail, or to handle the tail/remainder
1249  /// iterations when the trip count is unknown or doesn't divide by the VF,
1250  /// or as a peel-loop to handle gaps in interleave-groups.
1251  /// Under optsize and when the trip count is very small we don't allow any
1252  /// iterations to execute in the scalar loop.
1253  bool IsScalarEpilogueAllowed = true;
1254 
1255  /// All blocks of loop are to be masked to fold tail of scalar iterations.
1256  bool FoldTailByMasking = false;
1257 
1258  /// A map holding scalar costs for different vectorization factors. The
1259  /// presence of a cost for an instruction in the mapping indicates that the
1260  /// instruction will be scalarized when vectorizing with the associated
1261  /// vectorization factor. The entries are VF-ScalarCostTy pairs.
1262  DenseMap<unsigned, ScalarCostsTy> InstsToScalarize;
1263 
1264  /// Holds the instructions known to be uniform after vectorization.
1265  /// The data is collected per VF.
1267 
1268  /// Holds the instructions known to be scalar after vectorization.
1269  /// The data is collected per VF.
1271 
1272  /// Holds the instructions (address computations) that are forced to be
1273  /// scalarized.
1275 
1276  /// Returns the expected difference in cost from scalarizing the expression
1277  /// feeding a predicated instruction \p PredInst. The instructions to
1278  /// scalarize and their scalar costs are collected in \p ScalarCosts. A
1279  /// non-negative return value implies the expression will be scalarized.
1280  /// Currently, only single-use chains are considered for scalarization.
1281  int computePredInstDiscount(Instruction *PredInst, ScalarCostsTy &ScalarCosts,
1282  unsigned VF);
1283 
1284  /// Collect the instructions that are uniform after vectorization. An
1285  /// instruction is uniform if we represent it with a single scalar value in
1286  /// the vectorized loop corresponding to each vector iteration. Examples of
1287  /// uniform instructions include pointer operands of consecutive or
1288  /// interleaved memory accesses. Note that although uniformity implies an
1289  /// instruction will be scalar, the reverse is not true. In general, a
1290  /// scalarized instruction will be represented by VF scalar values in the
1291  /// vectorized loop, each corresponding to an iteration of the original
1292  /// scalar loop.
1293  void collectLoopUniforms(unsigned VF);
1294 
1295  /// Collect the instructions that are scalar after vectorization. An
1296  /// instruction is scalar if it is known to be uniform or will be scalarized
1297  /// during vectorization. Non-uniform scalarized instructions will be
1298  /// represented by VF values in the vectorized loop, each corresponding to an
1299  /// iteration of the original scalar loop.
1300  void collectLoopScalars(unsigned VF);
1301 
1302  /// Keeps cost model vectorization decision and cost for instructions.
1303  /// Right now it is used for memory instructions only.
1305  std::pair<InstWidening, unsigned>>;
1306 
1307  DecisionList WideningDecisions;
1308 
1309 public:
1310  /// The loop that we evaluate.
1312 
1313  /// Predicated scalar evolution analysis.
1315 
1316  /// Loop Info analysis.
1318 
1319  /// Vectorization legality.
1321 
1322  /// Vector target information.
1324 
1325  /// Target Library Info.
1327 
1328  /// Demanded bits analysis.
1330 
1331  /// Assumption cache.
1333 
1334  /// Interface to emit optimization remarks.
1336 
1338 
1339  /// Loop Vectorize Hint.
1341 
1342  /// The interleave access information contains groups of interleaved accesses
1343  /// with the same stride and close to each other.
1345 
1346  /// Values to ignore in the cost model.
1348 
1349  /// Values to ignore in the cost model when VF > 1.
1351 };
1352 
1353 } // end namespace llvm
1354 
1355 // Return true if \p OuterLp is an outer loop annotated with hints for explicit
1356 // vectorization. The loop needs to be annotated with #pragma omp simd
1357 // simdlen(#) or #pragma clang vectorize(enable) vectorize_width(#). If the
1358 // vector length information is not provided, vectorization is not considered
1359 // explicit. Interleave hints are not allowed either. These limitations will be
1360 // relaxed in the future.
1361 // Please, note that we are currently forced to abuse the pragma 'clang
1362 // vectorize' semantics. This pragma provides *auto-vectorization hints*
1363 // (i.e., LV must check that vectorization is legal) whereas pragma 'omp simd'
1364 // provides *explicit vectorization hints* (LV can bypass legal checks and
1365 // assume that vectorization is legal). However, both hints are implemented
1366 // using the same metadata (llvm.loop.vectorize, processed by
1367 // LoopVectorizeHints). This will be fixed in the future when the native IR
1368 // representation for pragma 'omp simd' is introduced.
1369 static bool isExplicitVecOuterLoop(Loop *OuterLp,
1371  assert(!OuterLp->empty() && "This is not an outer loop");
1372  LoopVectorizeHints Hints(OuterLp, true /*DisableInterleaving*/, *ORE);
1373 
1374  // Only outer loops with an explicit vectorization hint are supported.
1375  // Unannotated outer loops are ignored.
1376  if (Hints.getForce() == LoopVectorizeHints::FK_Undefined)
1377  return false;
1378 
1379  Function *Fn = OuterLp->getHeader()->getParent();
1380  if (!Hints.allowVectorization(Fn, OuterLp,
1381  true /*VectorizeOnlyWhenForced*/)) {
1382  LLVM_DEBUG(dbgs() << "LV: Loop hints prevent outer loop vectorization.\n");
1383  return false;
1384  }
1385 
1386  if (!Hints.getWidth()) {
1387  LLVM_DEBUG(dbgs() << "LV: Not vectorizing: No user vector width.\n");
1388  Hints.emitRemarkWithHints();
1389  return false;
1390  }
1391 
1392  if (Hints.getInterleave() > 1) {
1393  // TODO: Interleave support is future work.
1394  LLVM_DEBUG(dbgs() << "LV: Not vectorizing: Interleave is not supported for "
1395  "outer loops.\n");
1396  Hints.emitRemarkWithHints();
1397  return false;
1398  }
1399 
1400  return true;
1401 }
1402 
1406  // Collect inner loops and outer loops without irreducible control flow. For
1407  // now, only collect outer loops that have explicit vectorization hints. If we
1408  // are stress testing the VPlan H-CFG construction, we collect the outermost
1409  // loop of every loop nest.
1410  if (L.empty() || VPlanBuildStressTest ||
1412  LoopBlocksRPO RPOT(&L);
1413  RPOT.perform(LI);
1414  if (!containsIrreducibleCFG<const BasicBlock *>(RPOT, *LI)) {
1415  V.push_back(&L);
1416  // TODO: Collect inner loops inside marked outer loops in case
1417  // vectorization fails for the outer loop. Do not invoke
1418  // 'containsIrreducibleCFG' again for inner loops when the outer loop is
1419  // already known to be reducible. We can use an inherited attribute for
1420  // that.
1421  return;
1422  }
1423  }
1424  for (Loop *InnerL : L)
1425  collectSupportedLoops(*InnerL, LI, ORE, V);
1426 }
1427 
1428 namespace {
1429 
1430 /// The LoopVectorize Pass.
1431 struct LoopVectorize : public FunctionPass {
1432  /// Pass identification, replacement for typeid
1433  static char ID;
1434 
1435  LoopVectorizePass Impl;
1436 
1437  explicit LoopVectorize(bool InterleaveOnlyWhenForced = false,
1438  bool VectorizeOnlyWhenForced = false)
1439  : FunctionPass(ID) {
1440  Impl.InterleaveOnlyWhenForced = InterleaveOnlyWhenForced;
1441  Impl.VectorizeOnlyWhenForced = VectorizeOnlyWhenForced;
1443  }
1444 
1445  bool runOnFunction(Function &F) override {
1446  if (skipFunction(F))
1447  return false;
1448 
1449  auto *SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
1450  auto *LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
1451  auto *TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
1452  auto *DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
1453  auto *BFI = &getAnalysis<BlockFrequencyInfoWrapperPass>().getBFI();
1454  auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
1455  auto *TLI = TLIP ? &TLIP->getTLI() : nullptr;
1456  auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
1457  auto *AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
1458  auto *LAA = &getAnalysis<LoopAccessLegacyAnalysis>();
1459  auto *DB = &getAnalysis<DemandedBitsWrapperPass>().getDemandedBits();
1460  auto *ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE();
1461 
1462  std::function<const LoopAccessInfo &(Loop &)> GetLAA =
1463  [&](Loop &L) -> const LoopAccessInfo & { return LAA->getInfo(&L); };
1464 
1465  return Impl.runImpl(F, *SE, *LI, *TTI, *DT, *BFI, TLI, *DB, *AA, *AC,
1466  GetLAA, *ORE);
1467  }
1468 
1469  void getAnalysisUsage(AnalysisUsage &AU) const override {
1480 
1481  // We currently do not preserve loopinfo/dominator analyses with outer loop
1482  // vectorization. Until this is addressed, mark these analyses as preserved
1483  // only for non-VPlan-native path.
1484  // TODO: Preserve Loop and Dominator analyses for VPlan-native path.
1485  if (!EnableVPlanNativePath) {
1488  }
1489 
1492  }
1493 };
1494 
1495 } // end anonymous namespace
1496 
1497 //===----------------------------------------------------------------------===//
1498 // Implementation of LoopVectorizationLegality, InnerLoopVectorizer and
1499 // LoopVectorizationCostModel and LoopVectorizationPlanner.
1500 //===----------------------------------------------------------------------===//
1501 
1503  // We need to place the broadcast of invariant variables outside the loop,
1504  // but only if it's proven safe to do so. Else, broadcast will be inside
1505  // vector loop body.
1506  Instruction *Instr = dyn_cast<Instruction>(V);
1507  bool SafeToHoist = OrigLoop->isLoopInvariant(V) &&
1508  (!Instr ||
1510  // Place the code for broadcasting invariant variables in the new preheader.
1512  if (SafeToHoist)
1514 
1515  // Broadcast the scalar into all locations in the vector.
1516  Value *Shuf = Builder.CreateVectorSplat(VF, V, "broadcast");
1517 
1518  return Shuf;
1519 }
1520 
1522  const InductionDescriptor &II, Value *Step, Instruction *EntryVal) {
1523  assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) &&
1524  "Expected either an induction phi-node or a truncate of it!");
1525  Value *Start = II.getStartValue();
1526 
1527  // Construct the initial value of the vector IV in the vector loop preheader
1528  auto CurrIP = Builder.saveIP();
1530  if (isa<TruncInst>(EntryVal)) {
1531  assert(Start->getType()->isIntegerTy() &&
1532  "Truncation requires an integer type");
1533  auto *TruncType = cast<IntegerType>(EntryVal->getType());
1534  Step = Builder.CreateTrunc(Step, TruncType);
1535  Start = Builder.CreateCast(Instruction::Trunc, Start, TruncType);
1536  }
1537  Value *SplatStart = Builder.CreateVectorSplat(VF, Start);
1538  Value *SteppedStart =
1539  getStepVector(SplatStart, 0, Step, II.getInductionOpcode());
1540 
1541  // We create vector phi nodes for both integer and floating-point induction
1542  // variables. Here, we determine the kind of arithmetic we will perform.
1543  Instruction::BinaryOps AddOp;
1544  Instruction::BinaryOps MulOp;
1545  if (Step->getType()->isIntegerTy()) {
1546  AddOp = Instruction::Add;
1547  MulOp = Instruction::Mul;
1548  } else {
1549  AddOp = II.getInductionOpcode();
1550  MulOp = Instruction::FMul;
1551  }
1552 
1553  // Multiply the vectorization factor by the step using integer or
1554  // floating-point arithmetic as appropriate.
1555  Value *ConstVF = getSignedIntOrFpConstant(Step->getType(), VF);
1556  Value *Mul = addFastMathFlag(Builder.CreateBinOp(MulOp, Step, ConstVF));
1557 
1558  // Create a vector splat to use in the induction update.
1559  //
1560  // FIXME: If the step is non-constant, we create the vector splat with
1561  // IRBuilder. IRBuilder can constant-fold the multiply, but it doesn't
1562  // handle a constant vector splat.
1563  Value *SplatVF = isa<Constant>(Mul)
1564  ? ConstantVector::getSplat(VF, cast<Constant>(Mul))
1565  : Builder.CreateVectorSplat(VF, Mul);
1566  Builder.restoreIP(CurrIP);
1567 
1568  // We may need to add the step a number of times, depending on the unroll
1569  // factor. The last of those goes into the PHI.
1570  PHINode *VecInd = PHINode::Create(SteppedStart->getType(), 2, "vec.ind",
1572  VecInd->setDebugLoc(EntryVal->getDebugLoc());
1573  Instruction *LastInduction = VecInd;
1574  for (unsigned Part = 0; Part < UF; ++Part) {
1575  VectorLoopValueMap.setVectorValue(EntryVal, Part, LastInduction);
1576 
1577  if (isa<TruncInst>(EntryVal))
1578  addMetadata(LastInduction, EntryVal);
1579  recordVectorLoopValueForInductionCast(II, EntryVal, LastInduction, Part);
1580 
1581  LastInduction = cast<Instruction>(addFastMathFlag(
1582  Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")));
1583  LastInduction->setDebugLoc(EntryVal->getDebugLoc());
1584  }
1585 
1586  // Move the last step to the end of the latch block. This ensures consistent
1587  // placement of all induction updates.
1588  auto *LoopVectorLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch();
1589  auto *Br = cast<BranchInst>(LoopVectorLatch->getTerminator());
1590  auto *ICmp = cast<Instruction>(Br->getCondition());
1591  LastInduction->moveBefore(ICmp);
1592  LastInduction->setName("vec.ind.next");
1593 
1594  VecInd->addIncoming(SteppedStart, LoopVectorPreHeader);
1595  VecInd->addIncoming(LastInduction, LoopVectorLatch);
1596 }
1597 
1599  return Cost->isScalarAfterVectorization(I, VF) ||
1601 }
1602 
1605  return true;
1606  auto isScalarInst = [&](User *U) -> bool {
1607  auto *I = cast<Instruction>(U);
1609  };
1610  return llvm::any_of(IV->users(), isScalarInst);
1611 }
1612 
1614  const InductionDescriptor &ID, const Instruction *EntryVal,
1615  Value *VectorLoopVal, unsigned Part, unsigned Lane) {
1616  assert((isa<PHINode>(EntryVal) || isa<TruncInst>(EntryVal)) &&
1617  "Expected either an induction phi-node or a truncate of it!");
1618 
1619  // This induction variable is not the phi from the original loop but the
1620  // newly-created IV based on the proof that casted Phi is equal to the
1621  // uncasted Phi in the vectorized loop (under a runtime guard possibly). It
1622  // re-uses the same InductionDescriptor that original IV uses but we don't
1623  // have to do any recording in this case - that is done when original IV is
1624  // processed.
1625  if (isa<TruncInst>(EntryVal))
1626  return;
1627 
1628  const SmallVectorImpl<Instruction *> &Casts = ID.getCastInsts();
1629  if (Casts.empty())
1630  return;
1631  // Only the first Cast instruction in the Casts vector is of interest.
1632  // The rest of the Casts (if exist) have no uses outside the
1633  // induction update chain itself.
1634  Instruction *CastInst = *Casts.begin();
1635  if (Lane < UINT_MAX)
1636  VectorLoopValueMap.setScalarValue(CastInst, {Part, Lane}, VectorLoopVal);
1637  else
1638  VectorLoopValueMap.setVectorValue(CastInst, Part, VectorLoopVal);
1639 }
1640 
1642  assert((IV->getType()->isIntegerTy() || IV != OldInduction) &&
1643  "Primary induction variable must have an integer type");
1644 
1645  auto II = Legal->getInductionVars()->find(IV);
1646  assert(II != Legal->getInductionVars()->end() && "IV is not an induction");
1647 
1648  auto ID = II->second;
1649  assert(IV->getType() == ID.getStartValue()->getType() && "Types must match");
1650 
1651  // The scalar value to broadcast. This will be derived from the canonical
1652  // induction variable.
1653  Value *ScalarIV = nullptr;
1654 
1655  // The value from the original loop to which we are mapping the new induction
1656  // variable.
1657  Instruction *EntryVal = Trunc ? cast<Instruction>(Trunc) : IV;
1658 
1659  // True if we have vectorized the induction variable.
1660  auto VectorizedIV = false;
1661 
1662  // Determine if we want a scalar version of the induction variable. This is
1663  // true if the induction variable itself is not widened, or if it has at
1664  // least one user in the loop that is not widened.
1665  auto NeedsScalarIV = VF > 1 && needsScalarInduction(EntryVal);
1666 
1667  // Generate code for the induction step. Note that induction steps are
1668  // required to be loop-invariant
1669  assert(PSE.getSE()->isLoopInvariant(ID.getStep(), OrigLoop) &&
1670  "Induction step should be loop invariant");
1671  auto &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
1672  Value *Step = nullptr;
1673  if (PSE.getSE()->isSCEVable(IV->getType())) {
1674  SCEVExpander Exp(*PSE.getSE(), DL, "induction");
1675  Step = Exp.expandCodeFor(ID.getStep(), ID.getStep()->getType(),
1677  } else {
1678  Step = cast<SCEVUnknown>(ID.getStep())->getValue();
1679  }
1680 
1681  // Try to create a new independent vector induction variable. If we can't
1682  // create the phi node, we will splat the scalar induction variable in each
1683  // loop iteration.
1684  if (VF > 1 && !shouldScalarizeInstruction(EntryVal)) {
1685  createVectorIntOrFpInductionPHI(ID, Step, EntryVal);
1686  VectorizedIV = true;
1687  }
1688 
1689  // If we haven't yet vectorized the induction variable, or if we will create
1690  // a scalar one, we need to define the scalar induction variable and step
1691  // values. If we were given a truncation type, truncate the canonical
1692  // induction variable and step. Otherwise, derive these values from the
1693  // induction descriptor.
1694  if (!VectorizedIV || NeedsScalarIV) {
1695  ScalarIV = Induction;
1696  if (IV != OldInduction) {
1697  ScalarIV = IV->getType()->isIntegerTy()
1699  : Builder.CreateCast(Instruction::SIToFP, Induction,
1700  IV->getType());
1701  ScalarIV = emitTransformedIndex(Builder, ScalarIV, PSE.getSE(), DL, ID);
1702  ScalarIV->setName("offset.idx");
1703  }
1704  if (Trunc) {
1705  auto *TruncType = cast<IntegerType>(Trunc->getType());
1706  assert(Step->getType()->isIntegerTy() &&
1707  "Truncation requires an integer step");
1708  ScalarIV = Builder.CreateTrunc(ScalarIV, TruncType);
1709  Step = Builder.CreateTrunc(Step, TruncType);
1710  }
1711  }
1712 
1713  // If we haven't yet vectorized the induction variable, splat the scalar
1714  // induction variable, and build the necessary step vectors.
1715  // TODO: Don't do it unless the vectorized IV is really required.
1716  if (!VectorizedIV) {
1717  Value *Broadcasted = getBroadcastInstrs(ScalarIV);
1718  for (unsigned Part = 0; Part < UF; ++Part) {
1719  Value *EntryPart =
1720  getStepVector(Broadcasted, VF * Part, Step, ID.getInductionOpcode());
1721  VectorLoopValueMap.setVectorValue(EntryVal, Part, EntryPart);
1722  if (Trunc)
1723  addMetadata(EntryPart, Trunc);
1724  recordVectorLoopValueForInductionCast(ID, EntryVal, EntryPart, Part);
1725  }
1726  }
1727 
1728  // If an induction variable is only used for counting loop iterations or
1729  // calculating addresses, it doesn't need to be widened. Create scalar steps
1730  // that can be used by instructions we will later scalarize. Note that the
1731  // addition of the scalar steps will not increase the number of instructions
1732  // in the loop in the common case prior to InstCombine. We will be trading
1733  // one vector extract for each scalar step.
1734  if (NeedsScalarIV)
1735  buildScalarSteps(ScalarIV, Step, EntryVal, ID);
1736 }
1737 
1739  Instruction::BinaryOps BinOp) {
1740  // Create and check the types.
1741  assert(Val->getType()->isVectorTy() && "Must be a vector");
1742  int VLen = Val->getType()->getVectorNumElements();
1743 
1744  Type *STy = Val->getType()->getScalarType();
1745  assert((STy->isIntegerTy() || STy->isFloatingPointTy()) &&
1746  "Induction Step must be an integer or FP");
1747  assert(Step->getType() == STy && "Step has wrong type");
1748 
1750 
1751  if (STy->isIntegerTy()) {
1752  // Create a vector of consecutive numbers from zero to VF.
1753  for (int i = 0; i < VLen; ++i)
1754  Indices.push_back(ConstantInt::get(STy, StartIdx + i));
1755 
1756  // Add the consecutive indices to the vector value.
1757  Constant *Cv = ConstantVector::get(Indices);
1758  assert(Cv->getType() == Val->getType() && "Invalid consecutive vec");
1759  Step = Builder.CreateVectorSplat(VLen, Step);
1760  assert(Step->getType() == Val->getType() && "Invalid step vec");
1761  // FIXME: The newly created binary instructions should contain nsw/nuw flags,
1762  // which can be found from the original scalar operations.
1763  Step = Builder.CreateMul(Cv, Step);
1764  return Builder.CreateAdd(Val, Step, "induction");
1765  }
1766 
1767  // Floating point induction.
1768  assert((BinOp == Instruction::FAdd || BinOp == Instruction::FSub) &&
1769  "Binary Opcode should be specified for FP induction");
1770  // Create a vector of consecutive numbers from zero to VF.
1771  for (int i = 0; i < VLen; ++i)
1772  Indices.push_back(ConstantFP::get(STy, (double)(StartIdx + i)));
1773 
1774  // Add the consecutive indices to the vector value.
1775  Constant *Cv = ConstantVector::get(Indices);
1776 
1777  Step = Builder.CreateVectorSplat(VLen, Step);
1778 
1779  // Floating point operations had to be 'fast' to enable the induction.
1780  FastMathFlags Flags;
1781  Flags.setFast();
1782 
1783  Value *MulOp = Builder.CreateFMul(Cv, Step);
1784  if (isa<Instruction>(MulOp))
1785  // Have to check, MulOp may be a constant
1786  cast<Instruction>(MulOp)->setFastMathFlags(Flags);
1787 
1788  Value *BOp = Builder.CreateBinOp(BinOp, Val, MulOp, "induction");
1789  if (isa<Instruction>(BOp))
1790  cast<Instruction>(BOp)->setFastMathFlags(Flags);
1791  return BOp;
1792 }
1793 
1795  Instruction *EntryVal,
1796  const InductionDescriptor &ID) {
1797  // We shouldn't have to build scalar steps if we aren't vectorizing.
1798  assert(VF > 1 && "VF should be greater than one");
1799 
1800  // Get the value type and ensure it and the step have the same integer type.
1801  Type *ScalarIVTy = ScalarIV->getType()->getScalarType();
1802  assert(ScalarIVTy == Step->getType() &&
1803  "Val and Step should have the same type");
1804 
1805  // We build scalar steps for both integer and floating-point induction
1806  // variables. Here, we determine the kind of arithmetic we will perform.
1807  Instruction::BinaryOps AddOp;
1808  Instruction::BinaryOps MulOp;
1809  if (ScalarIVTy->isIntegerTy()) {
1810  AddOp = Instruction::Add;
1811  MulOp = Instruction::Mul;
1812  } else {
1813  AddOp = ID.getInductionOpcode();
1814  MulOp = Instruction::FMul;
1815  }
1816 
1817  // Determine the number of scalars we need to generate for each unroll
1818  // iteration. If EntryVal is uniform, we only need to generate the first
1819  // lane. Otherwise, we generate all VF values.
1820  unsigned Lanes =
1821  Cost->isUniformAfterVectorization(cast<Instruction>(EntryVal), VF) ? 1
1822  : VF;
1823  // Compute the scalar steps and save the results in VectorLoopValueMap.
1824  for (unsigned Part = 0; Part < UF; ++Part) {
1825  for (unsigned Lane = 0; Lane < Lanes; ++Lane) {
1826  auto *StartIdx = getSignedIntOrFpConstant(ScalarIVTy, VF * Part + Lane);
1827  auto *Mul = addFastMathFlag(Builder.CreateBinOp(MulOp, StartIdx, Step));
1828  auto *Add = addFastMathFlag(Builder.CreateBinOp(AddOp, ScalarIV, Mul));
1829  VectorLoopValueMap.setScalarValue(EntryVal, {Part, Lane}, Add);
1830  recordVectorLoopValueForInductionCast(ID, EntryVal, Add, Part, Lane);
1831  }
1832  }
1833 }
1834 
1836  assert(V != Induction && "The new induction variable should not be used.");
1837  assert(!V->getType()->isVectorTy() && "Can't widen a vector");
1838  assert(!V->getType()->isVoidTy() && "Type does not produce a value");
1839 
1840  // If we have a stride that is replaced by one, do it here. Defer this for
1841  // the VPlan-native path until we start running Legal checks in that path.
1843  V = ConstantInt::get(V->getType(), 1);
1844 
1845  // If we have a vector mapped to this value, return it.
1846  if (VectorLoopValueMap.hasVectorValue(V, Part))
1847  return VectorLoopValueMap.getVectorValue(V, Part);
1848 
1849  // If the value has not been vectorized, check if it has been scalarized
1850  // instead. If it has been scalarized, and we actually need the value in
1851  // vector form, we will construct the vector values on demand.
1853  Value *ScalarValue = VectorLoopValueMap.getScalarValue(V, {Part, 0});
1854 
1855  // If we've scalarized a value, that value should be an instruction.
1856  auto *I = cast<Instruction>(V);
1857 
1858  // If we aren't vectorizing, we can just copy the scalar map values over to
1859  // the vector map.
1860  if (VF == 1) {
1861  VectorLoopValueMap.setVectorValue(V, Part, ScalarValue);
1862  return ScalarValue;
1863  }
1864 
1865  // Get the last scalar instruction we generated for V and Part. If the value
1866  // is known to be uniform after vectorization, this corresponds to lane zero
1867  // of the Part unroll iteration. Otherwise, the last instruction is the one
1868  // we created for the last vector lane of the Part unroll iteration.
1869  unsigned LastLane = Cost->isUniformAfterVectorization(I, VF) ? 0 : VF - 1;
1870  auto *LastInst = cast<Instruction>(
1871  VectorLoopValueMap.getScalarValue(V, {Part, LastLane}));
1872 
1873  // Set the insert point after the last scalarized instruction. This ensures
1874  // the insertelement sequence will directly follow the scalar definitions.
1875  auto OldIP = Builder.saveIP();
1876  auto NewIP = std::next(BasicBlock::iterator(LastInst));
1877  Builder.SetInsertPoint(&*NewIP);
1878 
1879  // However, if we are vectorizing, we need to construct the vector values.
1880  // If the value is known to be uniform after vectorization, we can just
1881  // broadcast the scalar value corresponding to lane zero for each unroll
1882  // iteration. Otherwise, we construct the vector values using insertelement
1883  // instructions. Since the resulting vectors are stored in
1884  // VectorLoopValueMap, we will only generate the insertelements once.
1885  Value *VectorValue = nullptr;
1887  VectorValue = getBroadcastInstrs(ScalarValue);
1888  VectorLoopValueMap.setVectorValue(V, Part, VectorValue);
1889  } else {
1890  // Initialize packing with insertelements to start from undef.
1892  VectorLoopValueMap.setVectorValue(V, Part, Undef);
1893  for (unsigned Lane = 0; Lane < VF; ++Lane)
1894  packScalarIntoVectorValue(V, {Part, Lane});
1895  VectorValue = VectorLoopValueMap.getVectorValue(V, Part);
1896  }
1897  Builder.restoreIP(OldIP);
1898  return VectorValue;
1899  }
1900 
1901  // If this scalar is unknown, assume that it is a constant or that it is
1902  // loop invariant. Broadcast V and save the value for future uses.
1903  Value *B = getBroadcastInstrs(V);
1904  VectorLoopValueMap.setVectorValue(V, Part, B);
1905  return B;
1906 }
1907 
1908 Value *
1910  const VPIteration &Instance) {
1911  // If the value is not an instruction contained in the loop, it should
1912  // already be scalar.
1913  if (OrigLoop->isLoopInvariant(V))
1914  return V;
1915 
1916  assert(Instance.Lane > 0
1917  ? !Cost->isUniformAfterVectorization(cast<Instruction>(V), VF)
1918  : true && "Uniform values only have lane zero");
1919 
1920  // If the value from the original loop has not been vectorized, it is
1921  // represented by UF x VF scalar values in the new loop. Return the requested
1922  // scalar value.
1923  if (VectorLoopValueMap.hasScalarValue(V, Instance))
1924  return VectorLoopValueMap.getScalarValue(V, Instance);
1925 
1926  // If the value has not been scalarized, get its entry in VectorLoopValueMap
1927  // for the given unroll part. If this entry is not a vector type (i.e., the
1928  // vectorization factor is one), there is no need to generate an
1929  // extractelement instruction.
1930  auto *U = getOrCreateVectorValue(V, Instance.Part);
1931  if (!U->getType()->isVectorTy()) {
1932  assert(VF == 1 && "Value not scalarized has non-vector type");
1933  return U;
1934  }
1935 
1936  // Otherwise, the value from the original loop has been vectorized and is
1937  // represented by UF vector values. Extract and return the requested scalar
1938  // value from the appropriate vector lane.
1939  return Builder.CreateExtractElement(U, Builder.getInt32(Instance.Lane));
1940 }
1941 
1943  Value *V, const VPIteration &Instance) {
1944  assert(V != Induction && "The new induction variable should not be used.");
1945  assert(!V->getType()->isVectorTy() && "Can't pack a vector");
1946  assert(!V->getType()->isVoidTy() && "Type does not produce a value");
1947 
1948  Value *ScalarInst = VectorLoopValueMap.getScalarValue(V, Instance);
1949  Value *VectorValue = VectorLoopValueMap.getVectorValue(V, Instance.Part);
1950  VectorValue = Builder.CreateInsertElement(VectorValue, ScalarInst,
1951  Builder.getInt32(Instance.Lane));
1952  VectorLoopValueMap.resetVectorValue(V, Instance.Part, VectorValue);
1953 }
1954 
1956  assert(Vec->getType()->isVectorTy() && "Invalid type");
1957  SmallVector<Constant *, 8> ShuffleMask;
1958  for (unsigned i = 0; i < VF; ++i)
1959  ShuffleMask.push_back(Builder.getInt32(VF - i - 1));
1960 
1961  return Builder.CreateShuffleVector(Vec, UndefValue::get(Vec->getType()),
1962  ConstantVector::get(ShuffleMask),
1963  "reverse");
1964 }
1965 
1966 // Return whether we allow using masked interleave-groups (for dealing with
1967 // strided loads/stores that reside in predicated blocks, or for dealing
1968 // with gaps).
1970  // If an override option has been passed in for interleaved accesses, use it.
1971  if (EnableMaskedInterleavedMemAccesses.getNumOccurrences() > 0)
1973 
1975 }
1976 
1977 // Try to vectorize the interleave group that \p Instr belongs to.
1978 //
1979 // E.g. Translate following interleaved load group (factor = 3):
1980 // for (i = 0; i < N; i+=3) {
1981 // R = Pic[i]; // Member of index 0
1982 // G = Pic[i+1]; // Member of index 1
1983 // B = Pic[i+2]; // Member of index 2
1984 // ... // do something to R, G, B
1985 // }
1986 // To:
1987 // %wide.vec = load <12 x i32> ; Read 4 tuples of R,G,B
1988 // %R.vec = shuffle %wide.vec, undef, <0, 3, 6, 9> ; R elements
1989 // %G.vec = shuffle %wide.vec, undef, <1, 4, 7, 10> ; G elements
1990 // %B.vec = shuffle %wide.vec, undef, <2, 5, 8, 11> ; B elements
1991 //
1992 // Or translate following interleaved store group (factor = 3):
1993 // for (i = 0; i < N; i+=3) {
1994 // ... do something to R, G, B
1995 // Pic[i] = R; // Member of index 0
1996 // Pic[i+1] = G; // Member of index 1
1997 // Pic[i+2] = B; // Member of index 2
1998 // }
1999 // To:
2000 // %R_G.vec = shuffle %R.vec, %G.vec, <0, 1, 2, ..., 7>
2001 // %B_U.vec = shuffle %B.vec, undef, <0, 1, 2, 3, u, u, u, u>
2002 // %interleaved.vec = shuffle %R_G.vec, %B_U.vec,
2003 // <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> ; Interleave R,G,B elements
2004 // store <12 x i32> %interleaved.vec ; Write 4 tuples of R,G,B
2006  VectorParts *BlockInMask) {
2007  const InterleaveGroup<Instruction> *Group =
2009  assert(Group && "Fail to get an interleaved access group.");
2010 
2011  // Skip if current instruction is not the insert position.
2012  if (Instr != Group->getInsertPos())
2013  return;
2014 
2015  const DataLayout &DL = Instr->getModule()->getDataLayout();
2016  Value *Ptr = getLoadStorePointerOperand(Instr);
2017 
2018  // Prepare for the vector type of the interleaved load/store.
2019  Type *ScalarTy = getMemInstValueType(Instr);
2020  unsigned InterleaveFactor = Group->getFactor();
2021  Type *VecTy = VectorType::get(ScalarTy, InterleaveFactor * VF);
2022  Type *PtrTy = VecTy->getPointerTo(getLoadStoreAddressSpace(Instr));
2023 
2024  // Prepare for the new pointers.
2026  SmallVector<Value *, 2> NewPtrs;
2027  unsigned Index = Group->getIndex(Instr);
2028 
2029  VectorParts Mask;
2030  bool IsMaskForCondRequired = BlockInMask;
2031  if (IsMaskForCondRequired) {
2032  Mask = *BlockInMask;
2033  // TODO: extend the masked interleaved-group support to reversed access.
2034  assert(!Group->isReverse() && "Reversed masked interleave-group "
2035  "not supported.");
2036  }
2037 
2038  // If the group is reverse, adjust the index to refer to the last vector lane
2039  // instead of the first. We adjust the index from the first vector lane,
2040  // rather than directly getting the pointer for lane VF - 1, because the
2041  // pointer operand of the interleaved access is supposed to be uniform. For
2042  // uniform instructions, we're only required to generate a value for the
2043  // first vector lane in each unroll iteration.
2044  if (Group->isReverse())
2045  Index += (VF - 1) * Group->getFactor();
2046 
2047  bool InBounds = false;
2048  if (auto *gep = dyn_cast<GetElementPtrInst>(Ptr->stripPointerCasts()))
2049  InBounds = gep->isInBounds();
2050 
2051  for (unsigned Part = 0; Part < UF; Part++) {
2052  Value *NewPtr = getOrCreateScalarValue(Ptr, {Part, 0});
2053 
2054  // Notice current instruction could be any index. Need to adjust the address
2055  // to the member of index 0.
2056  //
2057  // E.g. a = A[i+1]; // Member of index 1 (Current instruction)
2058  // b = A[i]; // Member of index 0
2059  // Current pointer is pointed to A[i+1], adjust it to A[i].
2060  //
2061  // E.g. A[i+1] = a; // Member of index 1
2062  // A[i] = b; // Member of index 0
2063  // A[i+2] = c; // Member of index 2 (Current instruction)
2064  // Current pointer is pointed to A[i+2], adjust it to A[i].
2065  NewPtr = Builder.CreateGEP(ScalarTy, NewPtr, Builder.getInt32(-Index));
2066  if (InBounds)
2067  cast<GetElementPtrInst>(NewPtr)->setIsInBounds(true);
2068 
2069  // Cast to the vector pointer type.
2070  NewPtrs.push_back(Builder.CreateBitCast(NewPtr, PtrTy));
2071  }
2072 
2073  setDebugLocFromInst(Builder, Instr);
2074  Value *UndefVec = UndefValue::get(VecTy);
2075 
2076  Value *MaskForGaps = nullptr;
2077  if (Group->requiresScalarEpilogue() && !Cost->isScalarEpilogueAllowed()) {
2078  MaskForGaps = createBitMaskForGaps(Builder, VF, *Group);
2079  assert(MaskForGaps && "Mask for Gaps is required but it is null");
2080  }
2081 
2082  // Vectorize the interleaved load group.
2083  if (isa<LoadInst>(Instr)) {
2084  // For each unroll part, create a wide load for the group.
2085  SmallVector<Value *, 2> NewLoads;
2086  for (unsigned Part = 0; Part < UF; Part++) {
2087  Instruction *NewLoad;
2088  if (IsMaskForCondRequired || MaskForGaps) {
2090  "masked interleaved groups are not allowed.");
2091  Value *GroupMask = MaskForGaps;
2092  if (IsMaskForCondRequired) {
2093  auto *Undefs = UndefValue::get(Mask[Part]->getType());
2094  auto *RepMask = createReplicatedMask(Builder, InterleaveFactor, VF);
2095  Value *ShuffledMask = Builder.CreateShuffleVector(
2096  Mask[Part], Undefs, RepMask, "interleaved.mask");
2097  GroupMask = MaskForGaps
2098  ? Builder.CreateBinOp(Instruction::And, ShuffledMask,
2099  MaskForGaps)
2100  : ShuffledMask;
2101  }
2102  NewLoad =
2103  Builder.CreateMaskedLoad(NewPtrs[Part], Group->getAlignment(),
2104  GroupMask, UndefVec, "wide.masked.vec");
2105  }
2106  else
2107  NewLoad = Builder.CreateAlignedLoad(VecTy, NewPtrs[Part],
2108  Group->getAlignment(), "wide.vec");
2109  Group->addMetadata(NewLoad);
2110  NewLoads.push_back(NewLoad);
2111  }
2112 
2113  // For each member in the group, shuffle out the appropriate data from the
2114  // wide loads.
2115  for (unsigned I = 0; I < InterleaveFactor; ++I) {
2116  Instruction *Member = Group->getMember(I);
2117 
2118  // Skip the gaps in the group.
2119  if (!Member)
2120  continue;
2121 
2122  Constant *StrideMask = createStrideMask(Builder, I, InterleaveFactor, VF);
2123  for (unsigned Part = 0; Part < UF; Part++) {
2124  Value *StridedVec = Builder.CreateShuffleVector(
2125  NewLoads[Part], UndefVec, StrideMask, "strided.vec");
2126 
2127  // If this member has different type, cast the result type.
2128  if (Member->getType() != ScalarTy) {
2129  VectorType *OtherVTy = VectorType::get(Member->getType(), VF);
2130  StridedVec = createBitOrPointerCast(StridedVec, OtherVTy, DL);
2131  }
2132 
2133  if (Group->isReverse())
2134  StridedVec = reverseVector(StridedVec);
2135 
2136  VectorLoopValueMap.setVectorValue(Member, Part, StridedVec);
2137  }
2138  }
2139  return;
2140  }
2141 
2142  // The sub vector type for current instruction.
2143  VectorType *SubVT = VectorType::get(ScalarTy, VF);
2144 
2145  // Vectorize the interleaved store group.
2146  for (unsigned Part = 0; Part < UF; Part++) {
2147  // Collect the stored vector from each member.
2148  SmallVector<Value *, 4> StoredVecs;
2149  for (unsigned i = 0; i < InterleaveFactor; i++) {
2150  // Interleaved store group doesn't allow a gap, so each index has a member
2151  Instruction *Member = Group->getMember(i);
2152  assert(Member && "Fail to get a member from an interleaved store group");
2153 
2154  Value *StoredVec = getOrCreateVectorValue(
2155  cast<StoreInst>(Member)->getValueOperand(), Part);
2156  if (Group->isReverse())
2157  StoredVec = reverseVector(StoredVec);
2158 
2159  // If this member has different type, cast it to a unified type.
2160 
2161  if (StoredVec->getType() != SubVT)
2162  StoredVec = createBitOrPointerCast(StoredVec, SubVT, DL);
2163 
2164  StoredVecs.push_back(StoredVec);
2165  }
2166 
2167  // Concatenate all vectors into a wide vector.
2168  Value *WideVec = concatenateVectors(Builder, StoredVecs);
2169 
2170  // Interleave the elements in the wide vector.
2171  Constant *IMask = createInterleaveMask(Builder, VF, InterleaveFactor);
2172  Value *IVec = Builder.CreateShuffleVector(WideVec, UndefVec, IMask,
2173  "interleaved.vec");
2174 
2175  Instruction *NewStoreInstr;
2176  if (IsMaskForCondRequired) {
2177  auto *Undefs = UndefValue::get(Mask[Part]->getType());
2178  auto *RepMask = createReplicatedMask(Builder, InterleaveFactor, VF);
2179  Value *ShuffledMask = Builder.CreateShuffleVector(
2180  Mask[Part], Undefs, RepMask, "interleaved.mask");
2181  NewStoreInstr = Builder.CreateMaskedStore(
2182  IVec, NewPtrs[Part], Group->getAlignment(), ShuffledMask);
2183  }
2184  else
2185  NewStoreInstr = Builder.CreateAlignedStore(IVec, NewPtrs[Part],
2186  Group->getAlignment());
2187 
2188  Group->addMetadata(NewStoreInstr);
2189  }
2190 }
2191 
2193  VectorParts *BlockInMask) {
2194  // Attempt to issue a wide load.
2195  LoadInst *LI = dyn_cast<LoadInst>(Instr);
2196  StoreInst *SI = dyn_cast<StoreInst>(Instr);
2197 
2198  assert((LI || SI) && "Invalid Load/Store instruction");
2199 
2201  Cost->getWideningDecision(Instr, VF);
2203  "CM decision should be taken at this point");
2205  return vectorizeInterleaveGroup(Instr);
2206 
2207  Type *ScalarDataTy = getMemInstValueType(Instr);
2208  Type *DataTy = VectorType::get(ScalarDataTy, VF);
2209  Value *Ptr = getLoadStorePointerOperand(Instr);
2210  unsigned Alignment = getLoadStoreAlignment(Instr);
2211  // An alignment of 0 means target abi alignment. We need to use the scalar's
2212  // target abi alignment in such a case.
2213  const DataLayout &DL = Instr->getModule()->getDataLayout();
2214  if (!Alignment)
2215  Alignment = DL.getABITypeAlignment(ScalarDataTy);
2216  unsigned AddressSpace = getLoadStoreAddressSpace(Instr);
2217 
2218  // Determine if the pointer operand of the access is either consecutive or
2219  // reverse consecutive.
2220  bool Reverse = (Decision == LoopVectorizationCostModel::CM_Widen_Reverse);
2221  bool ConsecutiveStride =
2222  Reverse || (Decision == LoopVectorizationCostModel::CM_Widen);
2223  bool CreateGatherScatter =
2225 
2226  // Either Ptr feeds a vector load/store, or a vector GEP should feed a vector
2227  // gather/scatter. Otherwise Decision should have been to Scalarize.
2228  assert((ConsecutiveStride || CreateGatherScatter) &&
2229  "The instruction should be scalarized");
2230 
2231  // Handle consecutive loads/stores.
2232  if (ConsecutiveStride)
2233  Ptr = getOrCreateScalarValue(Ptr, {0, 0});
2234 
2235  VectorParts Mask;
2236  bool isMaskRequired = BlockInMask;
2237  if (isMaskRequired)
2238  Mask = *BlockInMask;
2239 
2240  bool InBounds = false;
2241  if (auto *gep = dyn_cast<GetElementPtrInst>(
2242  getLoadStorePointerOperand(Instr)->stripPointerCasts()))
2243  InBounds = gep->isInBounds();
2244 
2245  const auto CreateVecPtr = [&](unsigned Part, Value *Ptr) -> Value * {
2246  // Calculate the pointer for the specific unroll-part.
2247  GetElementPtrInst *PartPtr = nullptr;
2248 
2249  if (Reverse) {
2250  // If the address is consecutive but reversed, then the
2251  // wide store needs to start at the last vector element.
2252  PartPtr = cast<GetElementPtrInst>(
2253  Builder.CreateGEP(ScalarDataTy, Ptr, Builder.getInt32(-Part * VF)));
2254  PartPtr->setIsInBounds(InBounds);
2255  PartPtr = cast<GetElementPtrInst>(
2256  Builder.CreateGEP(ScalarDataTy, PartPtr, Builder.getInt32(1 - VF)));
2257  PartPtr->setIsInBounds(InBounds);
2258  if (isMaskRequired) // Reverse of a null all-one mask is a null mask.
2259  Mask[Part] = reverseVector(Mask[Part]);
2260  } else {
2261  PartPtr = cast<GetElementPtrInst>(
2262  Builder.CreateGEP(ScalarDataTy, Ptr, Builder.getInt32(Part * VF)));
2263  PartPtr->setIsInBounds(InBounds);
2264  }
2265 
2266  return Builder.CreateBitCast(PartPtr, DataTy->getPointerTo(AddressSpace));
2267  };
2268 
2269  // Handle Stores:
2270  if (SI) {
2272 
2273  for (unsigned Part = 0; Part < UF; ++Part) {
2274  Instruction *NewSI = nullptr;
2275  Value *StoredVal = getOrCreateVectorValue(SI->getValueOperand(), Part);
2276  if (CreateGatherScatter) {
2277  Value *MaskPart = isMaskRequired ? Mask[Part] : nullptr;
2278  Value *VectorGep = getOrCreateVectorValue(Ptr, Part);
2279  NewSI = Builder.CreateMaskedScatter(StoredVal, VectorGep, Alignment,
2280  MaskPart);
2281  } else {
2282  if (Reverse) {
2283  // If we store to reverse consecutive memory locations, then we need
2284  // to reverse the order of elements in the stored value.
2285  StoredVal = reverseVector(StoredVal);
2286  // We don't want to update the value in the map as it might be used in
2287  // another expression. So don't call resetVectorValue(StoredVal).
2288  }
2289  auto *VecPtr = CreateVecPtr(Part, Ptr);
2290  if (isMaskRequired)
2291  NewSI = Builder.CreateMaskedStore(StoredVal, VecPtr, Alignment,
2292  Mask[Part]);
2293  else
2294  NewSI = Builder.CreateAlignedStore(StoredVal, VecPtr, Alignment);
2295  }
2296  addMetadata(NewSI, SI);
2297  }
2298  return;
2299  }
2300 
2301  // Handle loads.
2302  assert(LI && "Must have a load instruction");
2304  for (unsigned Part = 0; Part < UF; ++Part) {
2305  Value *NewLI;
2306  if (CreateGatherScatter) {
2307  Value *MaskPart = isMaskRequired ? Mask[Part] : nullptr;
2308  Value *VectorGep = getOrCreateVectorValue(Ptr, Part);
2309  NewLI = Builder.CreateMaskedGather(VectorGep, Alignment, MaskPart,
2310  nullptr, "wide.masked.gather");
2311  addMetadata(NewLI, LI);
2312  } else {
2313  auto *VecPtr = CreateVecPtr(Part, Ptr);
2314  if (isMaskRequired)
2315  NewLI = Builder.CreateMaskedLoad(VecPtr, Alignment, Mask[Part],
2316  UndefValue::get(DataTy),
2317  "wide.masked.load");
2318  else
2319  NewLI =
2320  Builder.CreateAlignedLoad(DataTy, VecPtr, Alignment, "wide.load");
2321 
2322  // Add metadata to the load, but setVectorValue to the reverse shuffle.
2323  addMetadata(NewLI, LI);
2324  if (Reverse)
2325  NewLI = reverseVector(NewLI);
2326  }
2327  VectorLoopValueMap.setVectorValue(Instr, Part, NewLI);
2328  }
2329 }
2330 
2332  const VPIteration &Instance,
2333  bool IfPredicateInstr) {
2334  assert(!Instr->getType()->isAggregateType() && "Can't handle vectors");
2335 
2336  setDebugLocFromInst(Builder, Instr);
2337 
2338  // Does this instruction return a value ?
2339  bool IsVoidRetTy = Instr->getType()->isVoidTy();
2340 
2341  Instruction *Cloned = Instr->clone();
2342  if (!IsVoidRetTy)
2343  Cloned->setName(Instr->getName() + ".cloned");
2344 
2345  // Replace the operands of the cloned instructions with their scalar
2346  // equivalents in the new loop.
2347  for (unsigned op = 0, e = Instr->getNumOperands(); op != e; ++op) {
2348  auto *NewOp = getOrCreateScalarValue(Instr->getOperand(op), Instance);
2349  Cloned->setOperand(op, NewOp);
2350  }
2351  addNewMetadata(Cloned, Instr);
2352 
2353  // Place the cloned scalar in the new loop.
2354  Builder.Insert(Cloned);
2355 
2356  // Add the cloned scalar to the scalar map entry.
2357  VectorLoopValueMap.setScalarValue(Instr, Instance, Cloned);
2358 
2359  // If we just cloned a new assumption, add it the assumption cache.
2360  if (auto *II = dyn_cast<IntrinsicInst>(Cloned))
2361  if (II->getIntrinsicID() == Intrinsic::assume)
2362  AC->registerAssumption(II);
2363 
2364  // End if-block.
2365  if (IfPredicateInstr)
2366  PredicatedInstructions.push_back(Cloned);
2367 }
2368 
2370  Value *End, Value *Step,
2371  Instruction *DL) {
2372  BasicBlock *Header = L->getHeader();
2373  BasicBlock *Latch = L->getLoopLatch();
2374  // As we're just creating this loop, it's possible no latch exists
2375  // yet. If so, use the header as this will be a single block loop.
2376  if (!Latch)
2377  Latch = Header;
2378 
2381  setDebugLocFromInst(Builder, OldInst);
2382  auto *Induction = Builder.CreatePHI(Start->getType(), 2, "index");
2383 
2385  setDebugLocFromInst(Builder, OldInst);
2386 
2387  // Create i+1 and fill the PHINode.
2388  Value *Next = Builder.CreateAdd(Induction, Step, "index.next");
2389  Induction->addIncoming(Start, L->getLoopPreheader());
2390  Induction->addIncoming(Next, Latch);
2391  // Create the compare.
2392  Value *ICmp = Builder.CreateICmpEQ(Next, End);
2393  Builder.CreateCondBr(ICmp, L->getExitBlock(), Header);
2394 
2395  // Now we have two terminators. Remove the old one from the block.
2396  Latch->getTerminator()->eraseFromParent();
2397 
2398  return Induction;
2399 }
2400 
2402  if (TripCount)
2403  return TripCount;
2404 
2405  assert(L && "Create Trip Count for null loop.");
2407  // Find the loop boundaries.
2408  ScalarEvolution *SE = PSE.getSE();
2409  const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount();
2410  assert(BackedgeTakenCount != SE->getCouldNotCompute() &&
2411  "Invalid loop count");
2412 
2413  Type *IdxTy = Legal->getWidestInductionType();
2414  assert(IdxTy && "No type for induction");
2415 
2416  // The exit count might have the type of i64 while the phi is i32. This can
2417  // happen if we have an induction variable that is sign extended before the
2418  // compare. The only way that we get a backedge taken count is that the
2419  // induction variable was signed and as such will not overflow. In such a case
2420  // truncation is legal.
2421  if (BackedgeTakenCount->getType()->getPrimitiveSizeInBits() >
2422  IdxTy->getPrimitiveSizeInBits())
2423  BackedgeTakenCount = SE->getTruncateOrNoop(BackedgeTakenCount, IdxTy);
2424  BackedgeTakenCount = SE->getNoopOrZeroExtend(BackedgeTakenCount, IdxTy);
2425 
2426  // Get the total trip count from the count by adding 1.
2427  const SCEV *ExitCount = SE->getAddExpr(
2428  BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType()));
2429 
2430  const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
2431 
2432  // Expand the trip count and place the new instructions in the preheader.
2433  // Notice that the pre-header does not change, only the loop body.
2434  SCEVExpander Exp(*SE, DL, "induction");
2435 
2436  // Count holds the overall loop count (N).
2437  TripCount = Exp.expandCodeFor(ExitCount, ExitCount->getType(),
2439 
2440  if (TripCount->getType()->isPointerTy())
2441  TripCount =
2442  CastInst::CreatePointerCast(TripCount, IdxTy, "exitcount.ptrcnt.to.int",
2444 
2445  return TripCount;
2446 }
2447 
2449  if (VectorTripCount)
2450  return VectorTripCount;
2451 
2452  Value *TC = getOrCreateTripCount(L);
2454 
2455  Type *Ty = TC->getType();
2456  Constant *Step = ConstantInt::get(Ty, VF * UF);
2457 
2458  // If the tail is to be folded by masking, round the number of iterations N
2459  // up to a multiple of Step instead of rounding down. This is done by first
2460  // adding Step-1 and then rounding down. Note that it's ok if this addition
2461  // overflows: the vector induction variable will eventually wrap to zero given
2462  // that it starts at zero and its Step is a power of two; the loop will then
2463  // exit, with the last early-exit vector comparison also producing all-true.
2464  if (Cost->foldTailByMasking()) {
2465  assert(isPowerOf2_32(VF * UF) &&
2466  "VF*UF must be a power of 2 when folding tail by masking");
2467  TC = Builder.CreateAdd(TC, ConstantInt::get(Ty, VF * UF - 1), "n.rnd.up");
2468  }
2469 
2470  // Now we need to generate the expression for the part of the loop that the
2471  // vectorized body will execute. This is equal to N - (N % Step) if scalar
2472  // iterations are not required for correctness, or N - Step, otherwise. Step
2473  // is equal to the vectorization factor (number of SIMD elements) times the
2474  // unroll factor (number of SIMD instructions).
2475  Value *R = Builder.CreateURem(TC, Step, "n.mod.vf");
2476 
2477  // If there is a non-reversed interleaved group that may speculatively access
2478  // memory out-of-bounds, we need to ensure that there will be at least one
2479  // iteration of the scalar epilogue loop. Thus, if the step evenly divides
2480  // the trip count, we set the remainder to be equal to the step. If the step
2481  // does not evenly divide the trip count, no adjustment is necessary since
2482  // there will already be scalar iterations. Note that the minimum iterations
2483  // check ensures that N >= Step.
2484  if (VF > 1 && Cost->requiresScalarEpilogue()) {
2485  auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0));
2486  R = Builder.CreateSelect(IsZero, Step, R);
2487  }
2488 
2489  VectorTripCount = Builder.CreateSub(TC, R, "n.vec");
2490 
2491  return VectorTripCount;
2492 }
2493 
2495  const DataLayout &DL) {
2496  // Verify that V is a vector type with same number of elements as DstVTy.
2497  unsigned VF = DstVTy->getNumElements();
2498  VectorType *SrcVecTy = cast<VectorType>(V->getType());
2499  assert((VF == SrcVecTy->getNumElements()) && "Vector dimensions do not match");
2500  Type *SrcElemTy = SrcVecTy->getElementType();
2501  Type *DstElemTy = DstVTy->getElementType();
2502  assert((DL.getTypeSizeInBits(SrcElemTy) == DL.getTypeSizeInBits(DstElemTy)) &&
2503  "Vector elements must have same size");
2504 
2505  // Do a direct cast if element types are castable.
2506  if (CastInst::isBitOrNoopPointerCastable(SrcElemTy, DstElemTy, DL)) {
2507  return Builder.CreateBitOrPointerCast(V, DstVTy);
2508  }
2509  // V cannot be directly casted to desired vector type.
2510  // May happen when V is a floating point vector but DstVTy is a vector of
2511  // pointers or vice-versa. Handle this using a two-step bitcast using an
2512  // intermediate Integer type for the bitcast i.e. Ptr <-> Int <-> Float.
2513  assert((DstElemTy->isPointerTy() != SrcElemTy->isPointerTy()) &&
2514  "Only one type should be a pointer type");
2515  assert((DstElemTy->isFloatingPointTy() != SrcElemTy->isFloatingPointTy()) &&
2516  "Only one type should be a floating point type");
2517  Type *IntTy =
2519  VectorType *VecIntTy = VectorType::get(IntTy, VF);
2520  Value *CastVal = Builder.CreateBitOrPointerCast(V, VecIntTy);
2521  return Builder.CreateBitOrPointerCast(CastVal, DstVTy);
2522 }
2523 
2525  BasicBlock *Bypass) {
2526  Value *Count = getOrCreateTripCount(L);
2527  BasicBlock *BB = L->getLoopPreheader();
2529 
2530  // Generate code to check if the loop's trip count is less than VF * UF, or
2531  // equal to it in case a scalar epilogue is required; this implies that the
2532  // vector trip count is zero. This check also covers the case where adding one
2533  // to the backedge-taken count overflowed leading to an incorrect trip count
2534  // of zero. In this case we will also jump to the scalar loop.
2537 
2538  // If tail is to be folded, vector loop takes care of all iterations.
2539  Value *CheckMinIters = Builder.getFalse();
2540  if (!Cost->foldTailByMasking())
2541  CheckMinIters = Builder.CreateICmp(
2542  P, Count, ConstantInt::get(Count->getType(), VF * UF),
2543  "min.iters.check");
2544 
2545  BasicBlock *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
2546  // Update dominator tree immediately if the generated block is a
2547  // LoopBypassBlock because SCEV expansions to generate loop bypass
2548  // checks may query it before the current function is finished.
2549  DT->addNewBlock(NewBB, BB);
2550  if (L->getParentLoop())
2551  L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
2553  BranchInst::Create(Bypass, NewBB, CheckMinIters));
2554  LoopBypassBlocks.push_back(BB);
2555 }
2556 
2558  BasicBlock *BB = L->getLoopPreheader();
2559 
2560  // Generate the code to check that the SCEV assumptions that we made.
2561  // We want the new basic block to start at the first instruction in a
2562  // sequence of instructions that form a check.
2563  SCEVExpander Exp(*PSE.getSE(), Bypass->getModule()->getDataLayout(),
2564  "scev.check");
2565  Value *SCEVCheck =
2566  Exp.expandCodeForPredicate(&PSE.getUnionPredicate(), BB->getTerminator());
2567 
2568  if (auto *C = dyn_cast<ConstantInt>(SCEVCheck))
2569  if (C->isZero())
2570  return;
2571 
2573  "Cannot SCEV check stride or overflow when folding tail");
2574  // Create a new block containing the stride check.
2575  BB->setName("vector.scevcheck");
2576  auto *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
2577  // Update dominator tree immediately if the generated block is a
2578  // LoopBypassBlock because SCEV expansions to generate loop bypass
2579  // checks may query it before the current function is finished.
2580  DT->addNewBlock(NewBB, BB);
2581  if (L->getParentLoop())
2582  L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
2584  BranchInst::Create(Bypass, NewBB, SCEVCheck));
2585  LoopBypassBlocks.push_back(BB);
2586  AddedSafetyChecks = true;
2587 }
2588 
2590  // VPlan-native path does not do any analysis for runtime checks currently.
2592  return;
2593 
2594  BasicBlock *BB = L->getLoopPreheader();
2595 
2596  // Generate the code that checks in runtime if arrays overlap. We put the
2597  // checks into a separate block to make the more common case of few elements
2598  // faster.
2599  Instruction *FirstCheckInst;
2600  Instruction *MemRuntimeCheck;
2601  std::tie(FirstCheckInst, MemRuntimeCheck) =
2603  if (!MemRuntimeCheck)
2604  return;
2605 
2606  assert(!Cost->foldTailByMasking() && "Cannot check memory when folding tail");
2607  // Create a new block containing the memory check.
2608  BB->setName("vector.memcheck");
2609  auto *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
2610  // Update dominator tree immediately if the generated block is a
2611  // LoopBypassBlock because SCEV expansions to generate loop bypass
2612  // checks may query it before the current function is finished.
2613  DT->addNewBlock(NewBB, BB);
2614  if (L->getParentLoop())
2615  L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
2617  BranchInst::Create(Bypass, NewBB, MemRuntimeCheck));
2618  LoopBypassBlocks.push_back(BB);
2619  AddedSafetyChecks = true;
2620 
2621  // We currently don't use LoopVersioning for the actual loop cloning but we
2622  // still use it to add the noalias metadata.
2623  LVer = llvm::make_unique<LoopVersioning>(*Legal->getLAI(), OrigLoop, LI, DT,
2624  PSE.getSE());
2625  LVer->prepareNoAliasMetadata();
2626 }
2627 
2629  IRBuilder<> &B, Value *Index, ScalarEvolution *SE, const DataLayout &DL,
2630  const InductionDescriptor &ID) const {
2631 
2632  SCEVExpander Exp(*SE, DL, "induction");
2633  auto Step = ID.getStep();
2634  auto StartValue = ID.getStartValue();
2635  assert(Index->getType() == Step->getType() &&
2636  "Index type does not match StepValue type");
2637 
2638  // Note: the IR at this point is broken. We cannot use SE to create any new
2639  // SCEV and then expand it, hoping that SCEV's simplification will give us
2640  // a more optimal code. Unfortunately, attempt of doing so on invalid IR may
2641  // lead to various SCEV crashes. So all we can do is to use builder and rely
2642  // on InstCombine for future simplifications. Here we handle some trivial
2643  // cases only.
2644  auto CreateAdd = [&B](Value *X, Value *Y) {
2645  assert(X->getType() == Y->getType() && "Types don't match!");
2646  if (auto *CX = dyn_cast<ConstantInt>(X))
2647  if (CX->isZero())
2648  return Y;
2649  if (auto *CY = dyn_cast<ConstantInt>(Y))
2650  if (CY->isZero())
2651  return X;
2652  return B.CreateAdd(X, Y);
2653  };
2654 
2655  auto CreateMul = [&B](Value *X, Value *Y) {
2656  assert(X->getType() == Y->getType() && "Types don't match!");
2657  if (auto *CX = dyn_cast<ConstantInt>(X))
2658  if (CX->isOne())
2659  return Y;
2660  if (auto *CY = dyn_cast<ConstantInt>(Y))
2661  if (CY->isOne())
2662  return X;
2663  return B.CreateMul(X, Y);
2664  };
2665 
2666  switch (ID.getKind()) {
2668  assert(Index->getType() == StartValue->getType() &&
2669  "Index type does not match StartValue type");
2671  return B.CreateSub(StartValue, Index);
2672  auto *Offset = CreateMul(
2673  Index, Exp.expandCodeFor(Step, Index->getType(), &*B.GetInsertPoint()));
2674  return CreateAdd(StartValue, Offset);
2675  }
2677  assert(isa<SCEVConstant>(Step) &&
2678  "Expected constant step for pointer induction");
2679  return B.CreateGEP(
2680  StartValue->getType()->getPointerElementType(), StartValue,
2681  CreateMul(Index, Exp.expandCodeFor(Step, Index->getType(),
2682  &*B.GetInsertPoint())));
2683  }
2685  assert(Step->getType()->isFloatingPointTy() && "Expected FP Step value");
2686  auto InductionBinOp = ID.getInductionBinOp();
2687  assert(InductionBinOp &&
2688  (InductionBinOp->getOpcode() == Instruction::FAdd ||
2689  InductionBinOp->getOpcode() == Instruction::FSub) &&
2690  "Original bin op should be defined for FP induction");
2691 
2692  Value *StepValue = cast<SCEVUnknown>(Step)->getValue();
2693 
2694  // Floating point operations had to be 'fast' to enable the induction.
2695  FastMathFlags Flags;
2696  Flags.setFast();
2697 
2698  Value *MulExp = B.CreateFMul(StepValue, Index);
2699  if (isa<Instruction>(MulExp))
2700  // We have to check, the MulExp may be a constant.
2701  cast<Instruction>(MulExp)->setFastMathFlags(Flags);
2702 
2703  Value *BOp = B.CreateBinOp(InductionBinOp->getOpcode(), StartValue, MulExp,
2704  "induction");
2705  if (isa<Instruction>(BOp))
2706  cast<Instruction>(BOp)->setFastMathFlags(Flags);
2707 
2708  return BOp;
2709  }
2711  return nullptr;
2712  }
2713  llvm_unreachable("invalid enum");
2714 }
2715 
2717  /*
2718  In this function we generate a new loop. The new loop will contain
2719  the vectorized instructions while the old loop will continue to run the
2720  scalar remainder.
2721 
2722  [ ] <-- loop iteration number check.
2723  / |
2724  / v
2725  | [ ] <-- vector loop bypass (may consist of multiple blocks).
2726  | / |
2727  | / v
2728  || [ ] <-- vector pre header.
2729  |/ |
2730  | v
2731  | [ ] \
2732  | [ ]_| <-- vector loop.
2733  | |
2734  | v
2735  | -[ ] <--- middle-block.
2736  | / |
2737  | / v
2738  -|- >[ ] <--- new preheader.
2739  | |
2740  | v
2741  | [ ] \
2742  | [ ]_| <-- old scalar loop to handle remainder.
2743  \ |
2744  \ v
2745  >[ ] <-- exit block.
2746  ...
2747  */
2748 
2749  BasicBlock *OldBasicBlock = OrigLoop->getHeader();
2750  BasicBlock *VectorPH = OrigLoop->getLoopPreheader();
2751  BasicBlock *ExitBlock = OrigLoop->getExitBlock();
2752  MDNode *OrigLoopID = OrigLoop->getLoopID();
2753  assert(VectorPH && "Invalid loop structure");
2754  assert(ExitBlock && "Must have an exit block");
2755 
2756  // Some loops have a single integer induction variable, while other loops
2757  // don't. One example is c++ iterators that often have multiple pointer
2758  // induction variables. In the code below we also support a case where we
2759  // don't have a single induction variable.
2760  //
2761  // We try to obtain an induction variable from the original loop as hard
2762  // as possible. However if we don't find one that:
2763  // - is an integer
2764  // - counts from zero, stepping by one
2765  // - is the size of the widest induction variable type
2766  // then we create a new one.
2768  Type *IdxTy = Legal->getWidestInductionType();
2769 
2770  // Split the single block loop into the two loop structure described above.
2771  BasicBlock *VecBody =
2772  VectorPH->splitBasicBlock(VectorPH->getTerminator(), "vector.body");
2773  BasicBlock *MiddleBlock =
2774  VecBody->splitBasicBlock(VecBody->getTerminator(), "middle.block");
2775  BasicBlock *ScalarPH =
2776  MiddleBlock->splitBasicBlock(MiddleBlock->getTerminator(), "scalar.ph");
2777 
2778  // Create and register the new vector loop.
2779  Loop *Lp = LI->AllocateLoop();
2780  Loop *ParentLoop = OrigLoop->getParentLoop();
2781 
2782  // Insert the new loop into the loop nest and register the new basic blocks
2783  // before calling any utilities such as SCEV that require valid LoopInfo.
2784  if (ParentLoop) {
2785  ParentLoop->addChildLoop(Lp);
2786  ParentLoop->addBasicBlockToLoop(ScalarPH, *LI);
2787  ParentLoop->addBasicBlockToLoop(MiddleBlock, *LI);
2788  } else {
2789  LI->addTopLevelLoop(Lp);
2790  }
2791  Lp->addBasicBlockToLoop(VecBody, *LI);
2792 
2793  // Find the loop boundaries.
2794  Value *Count = getOrCreateTripCount(Lp);
2795 
2796  Value *StartIdx = ConstantInt::get(IdxTy, 0);
2797 
2798  // Now, compare the new count to zero. If it is zero skip the vector loop and
2799  // jump to the scalar loop. This check also covers the case where the
2800  // backedge-taken count is uint##_max: adding one to it will overflow leading
2801  // to an incorrect trip count of zero. In this (rare) case we will also jump
2802  // to the scalar loop.
2803  emitMinimumIterationCountCheck(Lp, ScalarPH);
2804 
2805  // Generate the code to check any assumptions that we've made for SCEV
2806  // expressions.
2807  emitSCEVChecks(Lp, ScalarPH);
2808 
2809  // Generate the code that checks in runtime if arrays overlap. We put the
2810  // checks into a separate block to make the more common case of few elements
2811  // faster.
2812  emitMemRuntimeChecks(Lp, ScalarPH);
2813 
2814  // Generate the induction variable.
2815  // The loop step is equal to the vectorization factor (num of SIMD elements)
2816  // times the unroll factor (num of SIMD instructions).
2817  Value *CountRoundDown = getOrCreateVectorTripCount(Lp);
2818  Constant *Step = ConstantInt::get(IdxTy, VF * UF);
2819  Induction =
2820  createInductionVariable(Lp, StartIdx, CountRoundDown, Step,
2822 
2823  // We are going to resume the execution of the scalar loop.
2824  // Go over all of the induction variables that we found and fix the
2825  // PHIs that are left in the scalar version of the loop.
2826  // The starting values of PHI nodes depend on the counter of the last
2827  // iteration in the vectorized loop.
2828  // If we come from a bypass edge then we need to start from the original
2829  // start value.
2830 
2831  // This variable saves the new starting index for the scalar loop. It is used
2832  // to test if there are any tail iterations left once the vector loop has
2833  // completed.
2835  for (auto &InductionEntry : *List) {
2836  PHINode *OrigPhi = InductionEntry.first;
2837  InductionDescriptor II = InductionEntry.second;
2838 
2839  // Create phi nodes to merge from the backedge-taken check block.
2840  PHINode *BCResumeVal = PHINode::Create(
2841  OrigPhi->getType(), 3, "bc.resume.val", ScalarPH->getTerminator());
2842  // Copy original phi DL over to the new one.
2843  BCResumeVal->setDebugLoc(OrigPhi->getDebugLoc());
2844  Value *&EndValue = IVEndValues[OrigPhi];
2845  if (OrigPhi == OldInduction) {
2846  // We know what the end value is.
2847  EndValue = CountRoundDown;
2848  } else {
2850  Type *StepType = II.getStep()->getType();
2851  Instruction::CastOps CastOp =
2852  CastInst::getCastOpcode(CountRoundDown, true, StepType, true);
2853  Value *CRD = B.CreateCast(CastOp, CountRoundDown, StepType, "cast.crd");
2854  const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
2855  EndValue = emitTransformedIndex(B, CRD, PSE.getSE(), DL, II);
2856  EndValue->setName("ind.end");
2857  }
2858 
2859  // The new PHI merges the original incoming value, in case of a bypass,
2860  // or the value at the end of the vectorized loop.
2861  BCResumeVal->addIncoming(EndValue, MiddleBlock);
2862 
2863  // Fix the scalar body counter (PHI node).
2864  unsigned BlockIdx = OrigPhi->getBasicBlockIndex(ScalarPH);
2865 
2866  // The old induction's phi node in the scalar body needs the truncated
2867  // value.
2868  for (BasicBlock *BB : LoopBypassBlocks)
2869  BCResumeVal->addIncoming(II.getStartValue(), BB);
2870  OrigPhi->setIncomingValue(BlockIdx, BCResumeVal);
2871  }
2872 
2873  // Add a check in the middle block to see if we have completed
2874  // all of the iterations in the first vector loop.
2875  // If (N - N%VF) == N, then we *don't* need to run the remainder.
2876  // If tail is to be folded, we know we don't need to run the remainder.
2877  Value *CmpN = Builder.getTrue();
2878  if (!Cost->foldTailByMasking())
2879  CmpN =
2880  CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ, Count,
2881  CountRoundDown, "cmp.n", MiddleBlock->getTerminator());
2882  ReplaceInstWithInst(MiddleBlock->getTerminator(),
2883  BranchInst::Create(ExitBlock, ScalarPH, CmpN));
2884 
2885  // Get ready to start creating new instructions into the vectorized body.
2887 
2888  // Save the state.
2890  LoopScalarPreHeader = ScalarPH;
2891  LoopMiddleBlock = MiddleBlock;
2892  LoopExitBlock = ExitBlock;
2893  LoopVectorBody = VecBody;
2894  LoopScalarBody = OldBasicBlock;
2895 
2896  Optional<MDNode *> VectorizedLoopID =
2898  LLVMLoopVectorizeFollowupVectorized});
2899  if (VectorizedLoopID.hasValue()) {
2900  Lp->setLoopID(VectorizedLoopID.getValue());
2901 
2902  // Do not setAlreadyVectorized if loop attributes have been defined
2903  // explicitly.
2904  return LoopVectorPreHeader;
2905  }
2906 
2907  // Keep all loop hints from the original loop on the vector loop (we'll
2908  // replace the vectorizer-specific hints below).
2909  if (MDNode *LID = OrigLoop->getLoopID())
2910  Lp->setLoopID(LID);
2911 
2912  LoopVectorizeHints Hints(Lp, true, *ORE);
2913  Hints.setAlreadyVectorized();
2914 
2915  return LoopVectorPreHeader;
2916 }
2917 
2918 // Fix up external users of the induction variable. At this point, we are
2919 // in LCSSA form, with all external PHIs that use the IV having one input value,
2920 // coming from the remainder loop. We need those PHIs to also have a correct
2921 // value for the IV when arriving directly from the middle block.
2923  const InductionDescriptor &II,
2924  Value *CountRoundDown, Value *EndValue,
2925  BasicBlock *MiddleBlock) {
2926  // There are two kinds of external IV usages - those that use the value
2927  // computed in the last iteration (the PHI) and those that use the penultimate
2928  // value (the value that feeds into the phi from the loop latch).
2929  // We allow both, but they, obviously, have different values.
2930 
2931  assert(OrigLoop->getExitBlock() && "Expected a single exit block");
2932 
2933  DenseMap<Value *, Value *> MissingVals;
2934 
2935  // An external user of the last iteration's value should see the value that
2936  // the remainder loop uses to initialize its own IV.
2938  for (User *U : PostInc->users()) {
2939  Instruction *UI = cast<Instruction>(U);
2940  if (!OrigLoop->contains(UI)) {
2941  assert(isa<PHINode>(UI) && "Expected LCSSA form");
2942  MissingVals[UI] = EndValue;
2943  }
2944  }
2945 
2946  // An external user of the penultimate value need to see EndValue - Step.
2947  // The simplest way to get this is to recompute it from the constituent SCEVs,
2948  // that is Start + (Step * (CRD - 1)).
2949  for (User *U : OrigPhi->users()) {
2950  auto *UI = cast<Instruction>(U);
2951  if (!OrigLoop->contains(UI)) {
2952  const DataLayout &DL =
2954  assert(isa<PHINode>(UI) && "Expected LCSSA form");
2955 
2956  IRBuilder<> B(MiddleBlock->getTerminator());
2957  Value *CountMinusOne = B.CreateSub(
2958  CountRoundDown, ConstantInt::get(CountRoundDown->getType(), 1));
2959  Value *CMO =
2960  !II.getStep()->getType()->isIntegerTy()
2961  ? B.CreateCast(Instruction::SIToFP, CountMinusOne,
2962  II.getStep()->getType())
2963  : B.CreateSExtOrTrunc(CountMinusOne, II.getStep()->getType());
2964  CMO->setName("cast.cmo");
2965  Value *Escape = emitTransformedIndex(B, CMO, PSE.getSE(), DL, II);
2966  Escape->setName("ind.escape");
2967  MissingVals[UI] = Escape;
2968  }
2969  }
2970 
2971  for (auto &I : MissingVals) {
2972  PHINode *PHI = cast<PHINode>(I.first);
2973  // One corner case we have to handle is two IVs "chasing" each-other,
2974  // that is %IV2 = phi [...], [ %IV1, %latch ]
2975  // In this case, if IV1 has an external use, we need to avoid adding both
2976  // "last value of IV1" and "penultimate value of IV2". So, verify that we
2977  // don't already have an incoming value for the middle block.
2978  if (PHI->getBasicBlockIndex(MiddleBlock) == -1)
2979  PHI->addIncoming(I.second, MiddleBlock);
2980  }
2981 }
2982 
2983 namespace {
2984 
2985 struct CSEDenseMapInfo {
2986  static bool canHandle(const Instruction *I) {
2987  return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
2988  isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I);
2989  }
2990 
2991  static inline Instruction *getEmptyKey() {
2993  }
2994 
2995  static inline Instruction *getTombstoneKey() {
2997  }
2998 
2999  static unsigned getHashValue(const Instruction *I) {
3000  assert(canHandle(I) && "Unknown instruction!");
3002  I->value_op_end()));
3003  }
3004 
3005  static bool isEqual(const Instruction *LHS, const Instruction *RHS) {
3006  if (LHS == getEmptyKey() || RHS == getEmptyKey() ||
3007  LHS == getTombstoneKey() || RHS == getTombstoneKey())
3008  return LHS == RHS;
3009  return LHS->isIdenticalTo(RHS);
3010  }
3011 };
3012 
3013 } // end anonymous namespace
3014 
3015 ///Perform cse of induction variable instructions.
3016 static void cse(BasicBlock *BB) {
3017  // Perform simple cse.
3019  for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) {
3020  Instruction *In = &*I++;
3021 
3022  if (!CSEDenseMapInfo::canHandle(In))
3023  continue;
3024 
3025  // Check if we can replace this instruction with any of the
3026  // visited instructions.
3027  if (Instruction *V = CSEMap.lookup(In)) {
3028  In->replaceAllUsesWith(V);
3029  In->eraseFromParent();
3030  continue;
3031  }
3032 
3033  CSEMap[In] = In;
3034  }
3035 }
3036 
3037 /// Estimate the overhead of scalarizing an instruction. This is a
3038 /// convenience wrapper for the type-based getScalarizationOverhead API.
3039 static unsigned getScalarizationOverhead(Instruction *I, unsigned VF,
3040  const TargetTransformInfo &TTI) {
3041  if (VF == 1)
3042  return 0;
3043 
3044  unsigned Cost = 0;
3045  Type *RetTy = ToVectorTy(I->getType(), VF);
3046  if (!RetTy->isVoidTy() &&
3047  (!isa<LoadInst>(I) ||
3049  Cost += TTI.getScalarizationOverhead(RetTy, true, false);
3050 
3051  // Some targets keep addresses scalar.
3052  if (isa<LoadInst>(I) && !TTI.prefersVectorizedAddressing())
3053  return Cost;
3054 
3055  if (CallInst *CI = dyn_cast<CallInst>(I)) {
3056  SmallVector<const Value *, 4> Operands(CI->arg_operands());
3057  Cost += TTI.getOperandsScalarizationOverhead(Operands, VF);
3058  }
3059  else if (!isa<StoreInst>(I) ||
3062  Cost += TTI.getOperandsScalarizationOverhead(Operands, VF);
3063  }
3064 
3065  return Cost;
3066 }
3067 
3068 // Estimate cost of a call instruction CI if it were vectorized with factor VF.
3069 // Return the cost of the instruction, including scalarization overhead if it's
3070 // needed. The flag NeedToScalarize shows if the call needs to be scalarized -
3071 // i.e. either vector version isn't available, or is too expensive.
3072 static unsigned getVectorCallCost(CallInst *CI, unsigned VF,
3073  const TargetTransformInfo &TTI,
3074  const TargetLibraryInfo *TLI,
3075  bool &NeedToScalarize) {
3076  Function *F = CI->getCalledFunction();
3077  StringRef FnName = CI->getCalledFunction()->getName();
3078  Type *ScalarRetTy = CI->getType();
3079  SmallVector<Type *, 4> Tys, ScalarTys;
3080  for (auto &ArgOp : CI->arg_operands())
3081  ScalarTys.push_back(ArgOp->getType());
3082 
3083  // Estimate cost of scalarized vector call. The source operands are assumed
3084  // to be vectors, so we need to extract individual elements from there,
3085  // execute VF scalar calls, and then gather the result into the vector return
3086  // value.
3087  unsigned ScalarCallCost = TTI.getCallInstrCost(F, ScalarRetTy, ScalarTys);
3088  if (VF == 1)
3089  return ScalarCallCost;
3090 
3091  // Compute corresponding vector type for return value and arguments.
3092  Type *RetTy = ToVectorTy(ScalarRetTy, VF);
3093  for (Type *ScalarTy : ScalarTys)
3094  Tys.push_back(ToVectorTy(ScalarTy, VF));
3095 
3096  // Compute costs of unpacking argument values for the scalar calls and
3097  // packing the return values to a vector.
3098  unsigned ScalarizationCost = getScalarizationOverhead(CI, VF, TTI);
3099 
3100  unsigned Cost = ScalarCallCost * VF + ScalarizationCost;
3101 
3102  // If we can't emit a vector call for this function, then the currently found
3103  // cost is the cost we need to return.
3104  NeedToScalarize = true;
3105  if (!TLI || !TLI->isFunctionVectorizable(FnName, VF) || CI->isNoBuiltin())
3106  return Cost;
3107 
3108  // If the corresponding vector cost is cheaper, return its cost.
3109  unsigned VectorCallCost = TTI.getCallInstrCost(nullptr, RetTy, Tys);
3110  if (VectorCallCost < Cost) {
3111  NeedToScalarize = false;
3112  return VectorCallCost;
3113  }
3114  return Cost;
3115 }
3116 
3117 // Estimate cost of an intrinsic call instruction CI if it were vectorized with
3118 // factor VF. Return the cost of the instruction, including scalarization
3119 // overhead if it's needed.
3120 static unsigned getVectorIntrinsicCost(CallInst *CI, unsigned VF,
3121  const TargetTransformInfo &TTI,
3122  const TargetLibraryInfo *TLI) {
3124  assert(ID && "Expected intrinsic call!");
3125 
3126  FastMathFlags FMF;
3127  if (auto *FPMO = dyn_cast<FPMathOperator>(CI))
3128  FMF = FPMO->getFastMathFlags();
3129 
3130  SmallVector<Value *, 4> Operands(CI->arg_operands());
3131  return TTI.getIntrinsicInstrCost(ID, CI->getType(), Operands, FMF, VF);
3132 }
3133 
3135  auto *I1 = cast<IntegerType>(T1->getVectorElementType());
3136  auto *I2 = cast<IntegerType>(T2->getVectorElementType());
3137  return I1->getBitWidth() < I2->getBitWidth() ? T1 : T2;
3138 }
3140  auto *I1 = cast<IntegerType>(T1->getVectorElementType());
3141  auto *I2 = cast<IntegerType>(T2->getVectorElementType());
3142  return I1->getBitWidth() > I2->getBitWidth() ? T1 : T2;
3143 }
3144 
3146  // For every instruction `I` in MinBWs, truncate the operands, create a
3147  // truncated version of `I` and reextend its result. InstCombine runs
3148  // later and will remove any ext/trunc pairs.
3149  SmallPtrSet<Value *, 4> Erased;
3150  for (const auto &KV : Cost->getMinimalBitwidths()) {
3151  // If the value wasn't vectorized, we must maintain the original scalar
3152  // type. The absence of the value from VectorLoopValueMap indicates that it
3153  // wasn't vectorized.
3154  if (!VectorLoopValueMap.hasAnyVectorValue(KV.first))
3155  continue;
3156  for (unsigned Part = 0; Part < UF; ++Part) {
3157  Value *I = getOrCreateVectorValue(KV.first, Part);
3158  if (Erased.find(I) != Erased.end() || I->use_empty() ||
3159  !isa<Instruction>(I))
3160  continue;
3161  Type *OriginalTy = I->getType();
3162  Type *ScalarTruncatedTy =
3163  IntegerType::get(OriginalTy->getContext(), KV.second);
3164  Type *TruncatedTy = VectorType::get(ScalarTruncatedTy,
3165  OriginalTy->getVectorNumElements());
3166  if (TruncatedTy == OriginalTy)
3167  continue;
3168 
3169  IRBuilder<> B(cast<Instruction>(I));
3170  auto ShrinkOperand = [&](Value *V) -> Value * {
3171  if (auto *ZI = dyn_cast<ZExtInst>(V))
3172  if (ZI->getSrcTy() == TruncatedTy)
3173  return ZI->getOperand(0);
3174  return B.CreateZExtOrTrunc(V, TruncatedTy);
3175  };
3176 
3177  // The actual instruction modification depends on the instruction type,
3178  // unfortunately.
3179  Value *NewI = nullptr;
3180  if (auto *BO = dyn_cast<BinaryOperator>(I)) {
3181  NewI = B.CreateBinOp(BO->getOpcode(), ShrinkOperand(BO->getOperand(0)),
3182  ShrinkOperand(BO->getOperand(1)));
3183 
3184  // Any wrapping introduced by shrinking this operation shouldn't be
3185  // considered undefined behavior. So, we can't unconditionally copy
3186  // arithmetic wrapping flags to NewI.
3187  cast<BinaryOperator>(NewI)->copyIRFlags(I, /*IncludeWrapFlags=*/false);
3188  } else if (auto *CI = dyn_cast<ICmpInst>(I)) {
3189  NewI =
3190  B.CreateICmp(CI->getPredicate(), ShrinkOperand(CI->getOperand(0)),
3191  ShrinkOperand(CI->getOperand(1)));
3192  } else if (auto *SI = dyn_cast<SelectInst>(I)) {
3193  NewI = B.CreateSelect(SI->getCondition(),
3194  ShrinkOperand(SI->getTrueValue()),
3195  ShrinkOperand(SI->getFalseValue()));
3196  } else if (auto *CI = dyn_cast<CastInst>(I)) {
3197  switch (CI->getOpcode()) {
3198  default:
3199  llvm_unreachable("Unhandled cast!");
3200  case Instruction::Trunc:
3201  NewI = ShrinkOperand(CI->getOperand(0));
3202  break;
3203  case Instruction::SExt:
3204  NewI = B.CreateSExtOrTrunc(
3205  CI->getOperand(0),
3206  smallestIntegerVectorType(OriginalTy, TruncatedTy));
3207  break;
3208  case Instruction::ZExt:
3209  NewI = B.CreateZExtOrTrunc(
3210  CI->getOperand(0),
3211  smallestIntegerVectorType(OriginalTy, TruncatedTy));
3212  break;
3213  }
3214  } else if (auto *SI = dyn_cast<ShuffleVectorInst>(I)) {
3215  auto Elements0 = SI->getOperand(0)->getType()->getVectorNumElements();
3216  auto *O0 = B.CreateZExtOrTrunc(
3217  SI->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements0));
3218  auto Elements1 = SI->getOperand(1)->getType()->getVectorNumElements();
3219  auto *O1 = B.CreateZExtOrTrunc(
3220  SI->getOperand(1), VectorType::get(ScalarTruncatedTy, Elements1));
3221 
3222  NewI = B.CreateShuffleVector(O0, O1, SI->getMask());
3223  } else if (isa<LoadInst>(I) || isa<PHINode>(I)) {
3224  // Don't do anything with the operands, just extend the result.
3225  continue;
3226  } else if (auto *IE = dyn_cast<InsertElementInst>(I)) {
3227  auto Elements = IE->getOperand(0)->getType()->getVectorNumElements();
3228  auto *O0 = B.CreateZExtOrTrunc(
3229  IE->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements));
3230  auto *O1 = B.CreateZExtOrTrunc(IE->getOperand(1), ScalarTruncatedTy);
3231  NewI = B.CreateInsertElement(O0, O1, IE->getOperand(2));
3232  } else if (auto *EE = dyn_cast<ExtractElementInst>(I)) {
3233  auto Elements = EE->getOperand(0)->getType()->getVectorNumElements();
3234  auto *O0 = B.CreateZExtOrTrunc(
3235  EE->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements));
3236  NewI = B.CreateExtractElement(O0, EE->getOperand(2));
3237  } else {
3238  // If we don't know what to do, be conservative and don't do anything.
3239  continue;
3240  }
3241 
3242  // Lastly, extend the result.
3243  NewI->takeName(cast<Instruction>(I));
3244  Value *Res = B.CreateZExtOrTrunc(NewI, OriginalTy);
3245  I->replaceAllUsesWith(Res);
3246  cast<Instruction>(I)->eraseFromParent();
3247  Erased.insert(I);
3248  VectorLoopValueMap.resetVectorValue(KV.first, Part, Res);
3249  }
3250  }
3251 
3252  // We'll have created a bunch of ZExts that are now parentless. Clean up.
3253  for (const auto &KV : Cost->getMinimalBitwidths()) {
3254  // If the value wasn't vectorized, we must maintain the original scalar
3255  // type. The absence of the value from VectorLoopValueMap indicates that it
3256  // wasn't vectorized.
3257  if (!VectorLoopValueMap.hasAnyVectorValue(KV.first))
3258  continue;
3259  for (unsigned Part = 0; Part < UF; ++Part) {
3260  Value *I = getOrCreateVectorValue(KV.first, Part);
3261  ZExtInst *Inst = dyn_cast<ZExtInst>(I);
3262  if (Inst && Inst->use_empty()) {
3263  Value *NewI = Inst->getOperand(0);
3264  Inst->eraseFromParent();
3265  VectorLoopValueMap.resetVectorValue(KV.first, Part, NewI);
3266  }
3267  }
3268  }
3269 }
3270 
3272  // Insert truncates and extends for any truncated instructions as hints to
3273  // InstCombine.
3274  if (VF > 1)
3276 
3277  // Fix widened non-induction PHIs by setting up the PHI operands.
3278  if (OrigPHIsToFix.size()) {
3280  "Unexpected non-induction PHIs for fixup in non VPlan-native path");
3282  }
3283 
3284  // At this point every instruction in the original loop is widened to a
3285  // vector form. Now we need to fix the recurrences in the loop. These PHI
3286  // nodes are currently empty because we did not want to introduce cycles.
3287  // This is the second stage of vectorizing recurrences.
3289 
3290  // Update the dominator tree.
3291  //
3292  // FIXME: After creating the structure of the new loop, the dominator tree is
3293  // no longer up-to-date, and it remains that way until we update it
3294  // here. An out-of-date dominator tree is problematic for SCEV,
3295  // because SCEVExpander uses it to guide code generation. The
3296  // vectorizer use SCEVExpanders in several places. Instead, we should
3297  // keep the dominator tree up-to-date as we go.
3298  updateAnalysis();
3299 
3300  // Fix-up external users of the induction variables.
3301  for (auto &Entry : *Legal->getInductionVars())
3302  fixupIVUsers(Entry.first, Entry.second,
3304  IVEndValues[Entry.first], LoopMiddleBlock);
3305 
3306  fixLCSSAPHIs();
3308  sinkScalarOperands(&*PI);
3309 
3310  // Remove redundant induction instructions.
3312 }
3313 
3315  // In order to support recurrences we need to be able to vectorize Phi nodes.
3316  // Phi nodes have cycles, so we need to vectorize them in two stages. This is
3317  // stage #2: We now need to fix the recurrences by adding incoming edges to
3318  // the currently empty PHI nodes. At this point every instruction in the
3319  // original loop is widened to a vector form so we can use them to construct
3320  // the incoming edges.
3321  for (PHINode &Phi : OrigLoop->getHeader()->phis()) {
3322  // Handle first-order recurrences and reductions that need to be fixed.
3323  if (Legal->isFirstOrderRecurrence(&Phi))
3325  else if (Legal->isReductionVariable(&Phi))
3326  fixReduction(&Phi);
3327  }
3328 }
3329 
3331  // This is the second phase of vectorizing first-order recurrences. An
3332  // overview of the transformation is described below. Suppose we have the
3333  // following loop.
3334  //
3335  // for (int i = 0; i < n; ++i)
3336  // b[i] = a[i] - a[i - 1];
3337  //
3338  // There is a first-order recurrence on "a". For this loop, the shorthand
3339  // scalar IR looks like:
3340  //
3341  // scalar.ph:
3342  // s_init = a[-1]
3343  // br scalar.body
3344  //
3345  // scalar.body:
3346  // i = phi [0, scalar.ph], [i+1, scalar.body]
3347  // s1 = phi [s_init, scalar.ph], [s2, scalar.body]
3348  // s2 = a[i]
3349  // b[i] = s2 - s1
3350  // br cond, scalar.body, ...
3351  //
3352  // In this example, s1 is a recurrence because it's value depends on the
3353  // previous iteration. In the first phase of vectorization, we created a
3354  // temporary value for s1. We now complete the vectorization and produce the
3355  // shorthand vector IR shown below (for VF = 4, UF = 1).
3356  //
3357  // vector.ph:
3358  // v_init = vector(..., ..., ..., a[-1])
3359  // br vector.body
3360  //
3361  // vector.body
3362  // i = phi [0, vector.ph], [i+4, vector.body]
3363  // v1 = phi [v_init, vector.ph], [v2, vector.body]
3364  // v2 = a[i, i+1, i+2, i+3];
3365  // v3 = vector(v1(3), v2(0, 1, 2))
3366  // b[i, i+1, i+2, i+3] = v2 - v3
3367  // br cond, vector.body, middle.block
3368  //
3369  // middle.block:
3370  // x = v2(3)
3371  // br scalar.ph
3372  //
3373  // scalar.ph:
3374  // s_init = phi [x, middle.block], [a[-1], otherwise]
3375  // br scalar.body
3376  //
3377  // After execution completes the vector loop, we extract the next value of
3378  // the recurrence (x) to use as the initial value in the scalar loop.
3379 
3380  // Get the original loop preheader and single loop latch.
3381  auto *Preheader = OrigLoop->getLoopPreheader();
3382  auto *Latch = OrigLoop->getLoopLatch();
3383 
3384  // Get the initial and previous values of the scalar recurrence.
3385  auto *ScalarInit = Phi->getIncomingValueForBlock(Preheader);
3386  auto *Previous = Phi->getIncomingValueForBlock(Latch);
3387 
3388  // Create a vector from the initial value.
3389  auto *VectorInit = ScalarInit;
3390  if (VF > 1) {
3392  VectorInit = Builder.CreateInsertElement(
3393  UndefValue::get(VectorType::get(VectorInit->getType(), VF)), VectorInit,
3394  Builder.getInt32(VF - 1), "vector.recur.init");
3395  }
3396 
3397  // We constructed a temporary phi node in the first phase of vectorization.
3398  // This phi node will eventually be deleted.
3400  cast<Instruction>(VectorLoopValueMap.getVectorValue(Phi, 0)));
3401 
3402  // Create a phi node for the new recurrence. The current value will either be
3403  // the initial value inserted into a vector or loop-varying vector value.
3404  auto *VecPhi = Builder.CreatePHI(VectorInit->getType(), 2, "vector.recur");
3405  VecPhi->addIncoming(VectorInit, LoopVectorPreHeader);
3406 
3407  // Get the vectorized previous value of the last part UF - 1. It appears last
3408  // among all unrolled iterations, due to the order of their construction.
3409  Value *PreviousLastPart = getOrCreateVectorValue(Previous, UF - 1);
3410 
3411  // Set the insertion point after the previous value if it is an instruction.
3412  // Note that the previous value may have been constant-folded so it is not
3413  // guaranteed to be an instruction in the vector loop. Also, if the previous
3414  // value is a phi node, we should insert after all the phi nodes to avoid
3415  // breaking basic block verification.
3416  if (LI->getLoopFor(LoopVectorBody)->isLoopInvariant(PreviousLastPart) ||
3417  isa<PHINode>(PreviousLastPart))
3419  else
3421  &*++BasicBlock::iterator(cast<Instruction>(PreviousLastPart)));
3422 
3423  // We will construct a vector for the recurrence by combining the values for
3424  // the current and previous iterations. This is the required shuffle mask.
3425  SmallVector<Constant *, 8> ShuffleMask(VF);
3426  ShuffleMask[0] = Builder.getInt32(VF - 1);
3427  for (unsigned I = 1; I < VF; ++I)
3428  ShuffleMask[I] = Builder.getInt32(I + VF - 1);
3429 
3430  // The vector from which to take the initial value for the current iteration
3431  // (actual or unrolled). Initially, this is the vector phi node.
3432  Value *Incoming = VecPhi;
3433 
3434  // Shuffle the current and previous vector and update the vector parts.
3435  for (unsigned Part = 0; Part < UF; ++Part) {
3436  Value *PreviousPart = getOrCreateVectorValue(Previous, Part);
3437  Value *PhiPart = VectorLoopValueMap.getVectorValue(Phi, Part);
3438  auto *Shuffle =
3439  VF > 1 ? Builder.CreateShuffleVector(Incoming, PreviousPart,
3440  ConstantVector::get(ShuffleMask))
3441  : Incoming;
3442  PhiPart->replaceAllUsesWith(Shuffle);
3443  cast<Instruction>(PhiPart)->eraseFromParent();
3444  VectorLoopValueMap.resetVectorValue(Phi, Part, Shuffle);
3445  Incoming = PreviousPart;
3446  }
3447 
3448  // Fix the latch value of the new recurrence in the vector loop.
3449  VecPhi->addIncoming(Incoming, LI->getLoopFor(LoopVectorBody)->getLoopLatch());
3450 
3451  // Extract the last vector element in the middle block. This will be the
3452  // initial value for the recurrence when jumping to the scalar loop.
3453  auto *ExtractForScalar = Incoming;
3454  if (VF > 1) {
3456  ExtractForScalar = Builder.CreateExtractElement(
3457  ExtractForScalar, Builder.getInt32(VF - 1), "vector.recur.extract");
3458  }
3459  // Extract the second last element in the middle block if the
3460  // Phi is used outside the loop. We need to extract the phi itself
3461  // and not the last element (the phi update in the current iteration). This
3462  // will be the value when jumping to the exit block from the LoopMiddleBlock,
3463  // when the scalar loop is not run at all.
3464  Value *ExtractForPhiUsedOutsideLoop = nullptr;
3465  if (VF > 1)
3466  ExtractForPhiUsedOutsideLoop = Builder.CreateExtractElement(
3467  Incoming, Builder.getInt32(VF - 2), "vector.recur.extract.for.phi");
3468  // When loop is unrolled without vectorizing, initialize
3469  // ExtractForPhiUsedOutsideLoop with the value just prior to unrolled value of
3470  // `Incoming`. This is analogous to the vectorized case above: extracting the
3471  // second last element when VF > 1.
3472  else if (UF > 1)
3473  ExtractForPhiUsedOutsideLoop = getOrCreateVectorValue(Previous, UF - 2);
3474 
3475  // Fix the initial value of the original recurrence in the scalar loop.
3477  auto *Start = Builder.CreatePHI(Phi->getType(), 2, "scalar.recur.init");
3478  for (auto *BB : predecessors(LoopScalarPreHeader)) {
3479  auto *Incoming = BB == LoopMiddleBlock ? ExtractForScalar : ScalarInit;
3480  Start->addIncoming(Incoming, BB);
3481  }
3482 
3484  Phi->setName("scalar.recur");
3485 
3486  // Finally, fix users of the recurrence outside the loop. The users will need
3487  // either the last value of the scalar recurrence or the last value of the
3488  // vector recurrence we extracted in the middle block. Since the loop is in
3489  // LCSSA form, we just need to find all the phi nodes for the original scalar
3490  // recurrence in the exit block, and then add an edge for the middle block.
3491  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
3492  if (LCSSAPhi.getIncomingValue(0) == Phi) {
3493  LCSSAPhi.addIncoming(ExtractForPhiUsedOutsideLoop, LoopMiddleBlock);
3494  }
3495  }
3496 }
3497 
3499  Constant *Zero = Builder.getInt32(0);
3500 
3501  // Get it's reduction variable descriptor.
3503  "Unable to find the reduction variable");
3504  RecurrenceDescriptor RdxDesc = (*Legal->getReductionVars())[Phi];
3505 
3507  TrackingVH<Value> ReductionStartValue = RdxDesc.getRecurrenceStartValue();
3508  Instruction *LoopExitInst = RdxDesc.getLoopExitInstr();
3510  RdxDesc.getMinMaxRecurrenceKind();
3511  setDebugLocFromInst(Builder, ReductionStartValue);
3512 
3513  // We need to generate a reduction vector from the incoming scalar.
3514  // To do so, we need to generate the 'identity' vector and override
3515  // one of the elements with the incoming scalar reduction. We need
3516  // to do it in the vector-loop preheader.
3518 
3519  // This is the vector-clone of the value that leaves the loop.
3520  Type *VecTy = getOrCreateVectorValue(LoopExitInst, 0)->getType();
3521 
3522  // Find the reduction identity variable. Zero for addition, or, xor,
3523  // one for multiplication, -1 for And.
3524  Value *Identity;
3525  Value *VectorStart;
3528  // MinMax reduction have the start value as their identify.
3529  if (VF == 1) {
3530  VectorStart = Identity = ReductionStartValue;
3531  } else {
3532  VectorStart = Identity =
3533  Builder.CreateVectorSplat(VF, ReductionStartValue, "minmax.ident");
3534  }
3535  } else {
3536  // Handle other reduction kinds:
3538  RK, VecTy->getScalarType());
3539  if (VF == 1) {
3540  Identity = Iden;
3541  // This vector is the Identity vector where the first element is the
3542  // incoming scalar reduction.
3543  VectorStart = ReductionStartValue;
3544  } else {
3545  Identity = ConstantVector::getSplat(VF, Iden);
3546 
3547  // This vector is the Identity vector where the first element is the
3548  // incoming scalar reduction.
3549  VectorStart =
3550  Builder.CreateInsertElement(Identity, ReductionStartValue, Zero);
3551  }
3552  }
3553 
3554  // Fix the vector-loop phi.
3555 
3556  // Reductions do not have to start at zero. They can start with
3557  // any loop invariant values.
3558  BasicBlock *Latch = OrigLoop->getLoopLatch();
3559  Value *LoopVal = Phi->getIncomingValueForBlock(Latch);
3560  for (unsigned Part = 0; Part < UF; ++Part) {
3561  Value *VecRdxPhi = getOrCreateVectorValue(Phi, Part);
3562  Value *Val = getOrCreateVectorValue(LoopVal, Part);
3563  // Make sure to add the reduction stat value only to the
3564  // first unroll part.
3565  Value *StartVal = (Part == 0) ? VectorStart : Identity;
3566  cast<PHINode>(VecRdxPhi)->addIncoming(StartVal, LoopVectorPreHeader);
3567  cast<PHINode>(VecRdxPhi)
3568  ->addIncoming(Val, LI->getLoopFor(LoopVectorBody)->getLoopLatch());
3569  }
3570 
3571  // Before each round, move the insertion point right between
3572  // the PHIs and the values we are going to write.
3573  // This allows us to write both PHINodes and the extractelement
3574  // instructions.
3576 
3577  setDebugLocFromInst(Builder, LoopExitInst);
3578 
3579  // If the vector reduction can be performed in a smaller type, we truncate
3580  // then extend the loop exit value to enable InstCombine to evaluate the
3581  // entire expression in the smaller type.
3582  if (VF > 1 && Phi->getType() != RdxDesc.getRecurrenceType()) {
3583  Type *RdxVecTy = VectorType::get(RdxDesc.getRecurrenceType(), VF);
3586  VectorParts RdxParts(UF);
3587  for (unsigned Part = 0; Part < UF; ++Part) {
3588  RdxParts[Part] = VectorLoopValueMap.getVectorValue(LoopExitInst, Part);
3589  Value *Trunc = Builder.CreateTrunc(RdxParts[Part], RdxVecTy);
3590  Value *Extnd = RdxDesc.isSigned() ? Builder.CreateSExt(Trunc, VecTy)
3591  : Builder.CreateZExt(Trunc, VecTy);
3592  for (Value::user_iterator UI = RdxParts[Part]->user_begin();
3593  UI != RdxParts[Part]->user_end();)
3594  if (*UI != Trunc) {
3595  (*UI++)->replaceUsesOfWith(RdxParts[Part], Extnd);
3596  RdxParts[Part] = Extnd;
3597  } else {
3598  ++UI;
3599  }
3600  }
3602  for (unsigned Part = 0; Part < UF; ++Part) {
3603  RdxParts[Part] = Builder.CreateTrunc(RdxParts[Part], RdxVecTy);
3604  VectorLoopValueMap.resetVectorValue(LoopExitInst, Part, RdxParts[Part]);
3605  }
3606  }
3607 
3608  // Reduce all of the unrolled parts into a single vector.
3609  Value *ReducedPartRdx = VectorLoopValueMap.getVectorValue(LoopExitInst, 0);
3611  setDebugLocFromInst(Builder, ReducedPartRdx);
3612  for (unsigned Part = 1; Part < UF; ++Part) {
3613  Value *RdxPart = VectorLoopValueMap.getVectorValue(LoopExitInst, Part);
3614  if (Op != Instruction::ICmp && Op != Instruction::FCmp)
3615  // Floating point operations had to be 'fast' to enable the reduction.
3616  ReducedPartRdx = addFastMathFlag(
3618  ReducedPartRdx, "bin.rdx"),
3619  RdxDesc.getFastMathFlags());
3620  else
3621  ReducedPartRdx = createMinMaxOp(Builder, MinMaxKind, ReducedPartRdx,
3622  RdxPart);
3623  }
3624 
3625  if (VF > 1) {
3626  bool NoNaN = Legal->hasFunNoNaNAttr();
3627  ReducedPartRdx =
3628  createTargetReduction(Builder, TTI, RdxDesc, ReducedPartRdx, NoNaN);
3629  // If the reduction can be performed in a smaller type, we need to extend
3630  // the reduction to the wider type before we branch to the original loop.
3631  if (Phi->getType() != RdxDesc.getRecurrenceType())
3632  ReducedPartRdx =
3633  RdxDesc.isSigned()
3634  ? Builder.CreateSExt(ReducedPartRdx, Phi->getType())
3635  : Builder.CreateZExt(ReducedPartRdx, Phi->getType());
3636  }
3637 
3638  // Create a phi node that merges control-flow from the backedge-taken check
3639  // block and the middle block.
3640  PHINode *BCBlockPhi = PHINode::Create(Phi->getType(), 2, "bc.merge.rdx",
3642  for (unsigned I = 0, E = LoopBypassBlocks.size(); I != E; ++I)
3643  BCBlockPhi->addIncoming(ReductionStartValue, LoopBypassBlocks[I]);
3644  BCBlockPhi->addIncoming(ReducedPartRdx, LoopMiddleBlock);
3645 
3646  // Now, we need to fix the users of the reduction variable
3647  // inside and outside of the scalar remainder loop.
3648  // We know that the loop is in LCSSA form. We need to update the
3649  // PHI nodes in the exit blocks.
3650  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
3651  // All PHINodes need to have a single entry edge, or two if
3652  // we already fixed them.
3653  assert(LCSSAPhi.getNumIncomingValues() < 3 && "Invalid LCSSA PHI");
3654 
3655  // We found a reduction value exit-PHI. Update it with the
3656  // incoming bypass edge.
3657  if (LCSSAPhi.getIncomingValue(0) == LoopExitInst)
3658  LCSSAPhi.addIncoming(ReducedPartRdx, LoopMiddleBlock);
3659  } // end of the LCSSA phi scan.
3660 
3661  // Fix the scalar loop reduction variable with the incoming reduction sum
3662  // from the vector body and from the backedge value.
3663  int IncomingEdgeBlockIdx =
3665  assert(IncomingEdgeBlockIdx >= 0 && "Invalid block index");
3666  // Pick the other block.
3667  int SelfEdgeBlockIdx = (IncomingEdgeBlockIdx ? 0 : 1);
3668  Phi->setIncomingValue(SelfEdgeBlockIdx, BCBlockPhi);
3669  Phi->setIncomingValue(IncomingEdgeBlockIdx, LoopExitInst);
3670 }
3671 
3673  for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
3674  if (LCSSAPhi.getNumIncomingValues() == 1) {
3675  auto *IncomingValue = LCSSAPhi.getIncomingValue(0);
3676  // Non-instruction incoming values will have only one value.
3677  unsigned LastLane = 0;
3678  if (isa<Instruction>(IncomingValue))
3679  LastLane = Cost->isUniformAfterVectorization(
3680  cast<Instruction>(IncomingValue), VF)
3681  ? 0
3682  : VF - 1;
3683  // Can be a loop invariant incoming value or the last scalar value to be
3684  // extracted from the vectorized loop.
3686  Value *lastIncomingValue =
3687  getOrCreateScalarValue(IncomingValue, { UF - 1, LastLane });
3688  LCSSAPhi.addIncoming(lastIncomingValue, LoopMiddleBlock);
3689  }
3690  }
3691 }
3692 
3694  // The basic block and loop containing the predicated instruction.
3695  auto *PredBB = PredInst->getParent();
3696  auto *VectorLoop = LI->getLoopFor(PredBB);
3697 
3698  // Initialize a worklist with the operands of the predicated instruction.
3699  SetVector<Value *> Worklist(PredInst->op_begin(), PredInst->op_end());
3700 
3701  // Holds instructions that we need to analyze again. An instruction may be
3702  // reanalyzed if we don't yet know if we can sink it or not.
3703  SmallVector<Instruction *, 8> InstsToReanalyze;
3704 
3705  // Returns true if a given use occurs in the predicated block. Phi nodes use
3706  // their operands in their corresponding predecessor blocks.
3707  auto isBlockOfUsePredicated = [&](Use &U) -> bool {
3708  auto *I = cast<Instruction>(U.getUser());
3709  BasicBlock *BB = I->getParent();
3710  if (auto *Phi = dyn_cast<PHINode>(I))
3711  BB = Phi->getIncomingBlock(
3712  PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3713  return BB == PredBB;
3714  };
3715 
3716  // Iteratively sink the scalarized operands of the predicated instruction
3717  // into the block we created for it. When an instruction is sunk, it's
3718  // operands are then added to the worklist. The algorithm ends after one pass
3719  // through the worklist doesn't sink a single instruction.
3720  bool Changed;
3721  do {
3722  // Add the instructions that need to be reanalyzed to the worklist, and
3723  // reset the changed indicator.
3724  Worklist.insert(InstsToReanalyze.begin(), InstsToReanalyze.end());
3725  InstsToReanalyze.clear();
3726  Changed = false;
3727 
3728  while (!Worklist.empty()) {
3729  auto *I = dyn_cast<Instruction>(Worklist.pop_back_val());
3730 
3731  // We can't sink an instruction if it is a phi node, is already in the
3732  // predicated block, is not in the loop, or may have side effects.
3733  if (!I || isa<PHINode>(I) || I->getParent() == PredBB ||
3734  !VectorLoop->contains(I) || I->mayHaveSideEffects())
3735  continue;
3736 
3737  // It's legal to sink the instruction if all its uses occur in the
3738  // predicated block. Otherwise, there's nothing to do yet, and we may
3739  // need to reanalyze the instruction.
3740  if (!llvm::all_of(I->uses(), isBlockOfUsePredicated)) {
3741  InstsToReanalyze.push_back(I);
3742  continue;
3743  }
3744 
3745  // Move the instruction to the beginning of the predicated block, and add
3746  // it's operands to the worklist.
3747  I->moveBefore(&*PredBB->getFirstInsertionPt());
3748  Worklist.insert(I->op_begin(), I->op_end());
3749 
3750  // The sinking may have enabled other instructions to be sunk, so we will
3751  // need to iterate.
3752  Changed = true;
3753  }
3754  } while (Changed);
3755 }
3756 
3758  for (PHINode *OrigPhi : OrigPHIsToFix) {
3759  PHINode *NewPhi =
3760  cast<PHINode>(VectorLoopValueMap.getVectorValue(OrigPhi, 0));
3761  unsigned NumIncomingValues = OrigPhi->getNumIncomingValues();
3762 
3763  SmallVector<BasicBlock *, 2> ScalarBBPredecessors(
3764  predecessors(OrigPhi->getParent()));
3765  SmallVector<BasicBlock *, 2> VectorBBPredecessors(
3766  predecessors(NewPhi->getParent()));
3767  assert(ScalarBBPredecessors.size() == VectorBBPredecessors.size() &&
3768  "Scalar and Vector BB should have the same number of predecessors");
3769 
3770  // The insertion point in Builder may be invalidated by the time we get
3771  // here. Force the Builder insertion point to something valid so that we do
3772  // not run into issues during insertion point restore in
3773  // getOrCreateVectorValue calls below.
3774  Builder.SetInsertPoint(NewPhi);
3775 
3776  // The predecessor order is preserved and we can rely on mapping between
3777  // scalar and vector block predecessors.
3778  for (unsigned i = 0; i < NumIncomingValues; ++i) {
3779  BasicBlock *NewPredBB = VectorBBPredecessors[i];
3780 
3781  // When looking up the new scalar/vector values to fix up, use incoming
3782  // values from original phi.
3783  Value *ScIncV =
3784  OrigPhi->getIncomingValueForBlock(ScalarBBPredecessors[i]);
3785 
3786  // Scalar incoming value may need a broadcast
3787  Value *NewIncV = getOrCreateVectorValue(ScIncV, 0);
3788  NewPhi->addIncoming(NewIncV, NewPredBB);
3789  }
3790  }
3791 }
3792 
3794  unsigned VF) {
3795  PHINode *P = cast<PHINode>(PN);
3796  if (EnableVPlanNativePath) {
3797  // Currently we enter here in the VPlan-native path for non-induction
3798  // PHIs where all control flow is uniform. We simply widen these PHIs.
3799  // Create a vector phi with no operands - the vector phi operands will be
3800  // set at the end of vector code generation.
3801  Type *VecTy =
3802  (VF == 1) ? PN->getType() : VectorType::get(PN->getType(), VF);
3803  Value *VecPhi = Builder.CreatePHI(VecTy, PN->getNumOperands(), "vec.phi");
3804  VectorLoopValueMap.setVectorValue(P, 0, VecPhi);
3805  OrigPHIsToFix.push_back(P);
3806 
3807  return;
3808  }
3809 
3810  assert(PN->getParent() == OrigLoop->getHeader() &&
3811  "Non-header phis should have been handled elsewhere");
3812 
3813  // In order to support recurrences we need to be able to vectorize Phi nodes.
3814  // Phi nodes have cycles, so we need to vectorize them in two stages. This is
3815  // stage #1: We create a new vector PHI node with no incoming edges. We'll use
3816  // this value when we vectorize all of the instructions that use the PHI.
3818  for (unsigned Part = 0; Part < UF; ++Part) {
3819  // This is phase one of vectorizing PHIs.
3820  Type *VecTy =
3821  (VF == 1) ? PN->getType() : VectorType::get(PN->getType(), VF);
3822  Value *EntryPart = PHINode::Create(
3823  VecTy, 2, "vec.phi", &*LoopVectorBody->getFirstInsertionPt());
3824  VectorLoopValueMap.setVectorValue(P, Part, EntryPart);
3825  }
3826  return;
3827  }
3828 
3830 
3831  // This PHINode must be an induction variable.
3832  // Make sure that we know about it.
3833  assert(Legal->getInductionVars()->count(P) && "Not an induction variable");
3834 
3836  const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
3837 
3838  // FIXME: The newly created binary instructions should contain nsw/nuw flags,
3839  // which can be found from the original scalar operations.
3840  switch (II.getKind()) {
3842  llvm_unreachable("Unknown induction");
3845  llvm_unreachable("Integer/fp induction is handled elsewhere.");
3847  // Handle the pointer induction variable case.
3848  assert(P->getType()->isPointerTy() && "Unexpected type.");
3849  // This is the normalized GEP that starts counting at zero.
3850  Value *PtrInd = Induction;
3851  PtrInd = Builder.CreateSExtOrTrunc(PtrInd, II.getStep()->getType());
3852  // Determine the number of scalars we need to generate for each unroll
3853  // iteration. If the instruction is uniform, we only need to generate the
3854  // first lane. Otherwise, we generate all VF values.
3855  unsigned Lanes = Cost->isUniformAfterVectorization(P, VF) ? 1 : VF;
3856  // These are the scalar results. Notice that we don't generate vector GEPs
3857  // because scalar GEPs result in better code.
3858  for (unsigned Part = 0; Part < UF; ++Part) {
3859  for (unsigned Lane = 0; Lane < Lanes; ++Lane) {
3860  Constant *Idx = ConstantInt::get(PtrInd->getType(), Lane + Part * VF);
3861  Value *GlobalIdx = Builder.CreateAdd(PtrInd, Idx);
3862  Value *SclrGep =
3863  emitTransformedIndex(Builder, GlobalIdx, PSE.getSE(), DL, II);
3864  SclrGep->setName("next.gep");
3865  VectorLoopValueMap.setScalarValue(P, {Part, Lane}, SclrGep);
3866  }
3867  }
3868  return;
3869  }
3870  }
3871 }
3872 
3873 /// A helper function for checking whether an integer division-related
3874 /// instruction may divide by zero (in which case it must be predicated if
3875 /// executed conditionally in the scalar code).
3876 /// TODO: It may be worthwhile to generalize and check isKnownNonZero().
3877 /// Non-zero divisors that are non compile-time constants will not be
3878 /// converted into multiplication, so we will still end up scalarizing
3879 /// the division, but can do so w/o predication.
3881  assert((I.getOpcode() == Instruction::UDiv ||
3882  I.getOpcode() == Instruction::SDiv ||
3883  I.getOpcode() == Instruction::URem ||
3884  I.getOpcode() == Instruction::SRem) &&
3885  "Unexpected instruction");
3886  Value *Divisor = I.getOperand(1);
3887  auto *CInt = dyn_cast<ConstantInt>(Divisor);
3888  return !CInt || CInt->isZero();
3889 }
3890 
3892  switch (I.getOpcode()) {
3893  case Instruction::Br:
3894  case Instruction::PHI:
3895  llvm_unreachable("This instruction is handled by a different recipe.");
3896  case Instruction::GetElementPtr: {
3897  // Construct a vector GEP by widening the operands of the scalar GEP as
3898  // necessary. We mark the vector GEP 'inbounds' if appropriate. A GEP
3899  // results in a vector of pointers when at least one operand of the GEP
3900  // is vector-typed. Thus, to keep the representation compact, we only use
3901  // vector-typed operands for loop-varying values.
3902  auto *GEP = cast<GetElementPtrInst>(&I);
3903 
3904  if (VF > 1 && OrigLoop->hasLoopInvariantOperands(GEP)) {
3905  // If we are vectorizing, but the GEP has only loop-invariant operands,
3906  // the GEP we build (by only using vector-typed operands for
3907  // loop-varying values) would be a scalar pointer. Thus, to ensure we
3908  // produce a vector of pointers, we need to either arbitrarily pick an
3909  // operand to broadcast, or broadcast a clone of the original GEP.
3910  // Here, we broadcast a clone of the original.
3911  //
3912  // TODO: If at some point we decide to scalarize instructions having
3913  // loop-invariant operands, this special case will no longer be
3914  // required. We would add the scalarization decision to
3915  // collectLoopScalars() and teach getVectorValue() to broadcast
3916  // the lane-zero scalar value.
3917  auto *Clone = Builder.Insert(GEP->clone());
3918  for (unsigned Part = 0; Part < UF; ++Part) {
3919  Value *EntryPart = Builder.CreateVectorSplat(VF, Clone);
3920  VectorLoopValueMap.setVectorValue(&I, Part, EntryPart);
3921  addMetadata(EntryPart, GEP);
3922  }
3923  } else {
3924  // If the GEP has at least one loop-varying operand, we are sure to
3925  // produce a vector of pointers. But if we are only unrolling, we want
3926  // to produce a scalar GEP for each unroll part. Thus, the GEP we
3927  // produce with the code below will be scalar (if VF == 1) or vector
3928  // (otherwise). Note that for the unroll-only case, we still maintain
3929  // values in the vector mapping with initVector, as we do for other
3930  // instructions.
3931  for (unsigned Part = 0; Part < UF; ++Part) {
3932  // The pointer operand of the new GEP. If it's loop-invariant, we
3933  // won't broadcast it.
3934  auto *Ptr =
3935  OrigLoop->isLoopInvariant(GEP->getPointerOperand())
3936  ? GEP->getPointerOperand()
3937  : getOrCreateVectorValue(GEP->getPointerOperand(), Part);
3938 
3939  // Collect all the indices for the new GEP. If any index is
3940  // loop-invariant, we won't broadcast it.
3941  SmallVector<Value *, 4> Indices;
3942  for (auto &U : make_range(GEP->idx_begin(), GEP->idx_end())) {
3943  if (OrigLoop->isLoopInvariant(U.get()))
3944  Indices.push_back(U.get());
3945  else
3946  Indices.push_back(getOrCreateVectorValue(U.get(), Part));
3947  }
3948 
3949  // Create the new GEP. Note that this GEP may be a scalar if VF == 1,
3950  // but it should be a vector, otherwise.
3951  auto *NewGEP =
3952  GEP->isInBounds()
3953  ? Builder.CreateInBoundsGEP(GEP->getSourceElementType(), Ptr,
3954  Indices)
3955  : Builder.CreateGEP(GEP->getSourceElementType(), Ptr, Indices);
3956  assert((VF == 1 || NewGEP->getType()->isVectorTy()) &&
3957  "NewGEP is not a pointer vector");
3958  VectorLoopValueMap.setVectorValue(&I, Part, NewGEP);
3959  addMetadata(NewGEP, GEP);
3960  }
3961  }
3962 
3963  break;
3964  }
3965  case Instruction::UDiv:
3966  case Instruction::SDiv:
3967  case Instruction::SRem:
3968  case Instruction::URem:
3969  case Instruction::Add:
3970  case Instruction::FAdd:
3971  case Instruction::Sub:
3972  case Instruction::FSub:
3973  case Instruction::Mul:
3974  case Instruction::FMul:
3975  case Instruction::FDiv:
3976  case Instruction::FRem:
3977  case Instruction::Shl:
3978  case Instruction::LShr:
3979  case Instruction::AShr:
3980  case Instruction::And:
3981  case Instruction::Or:
3982  case Instruction::Xor: {
3983  // Just widen binops.
3984  auto *BinOp = cast<BinaryOperator>(&I);
3985  setDebugLocFromInst(Builder, BinOp);
3986 
3987  for (unsigned Part = 0; Part < UF; ++Part) {
3988  Value *A = getOrCreateVectorValue(BinOp->getOperand(0), Part);
3989  Value *B = getOrCreateVectorValue(BinOp->getOperand(1), Part);
3990  Value *V = Builder.CreateBinOp(BinOp->getOpcode(), A, B);
3991 
3992  if (BinaryOperator *VecOp = dyn_cast<BinaryOperator>(V))
3993  VecOp->copyIRFlags(BinOp);
3994 
3995  // Use this vector value for all users of the original instruction.
3996  VectorLoopValueMap.setVectorValue(&I, Part, V);
3997  addMetadata(V, BinOp);
3998  }
3999 
4000  break;
4001  }
4002  case Instruction::Select: {
4003  // Widen selects.
4004  // If the selector is loop invariant we can create a select
4005  // instruction with a scalar condition. Otherwise, use vector-select.
4006  auto *SE = PSE.getSE();
4007  bool InvariantCond =
4010 
4011  // The condition can be loop invariant but still defined inside the
4012  // loop. This means that we can't just use the original 'cond' value.
4013  // We have to take the 'vectorized' value and pick the first lane.
4014  // Instcombine will make this a no-op.
4015 
4016  auto *ScalarCond = getOrCreateScalarValue(I.getOperand(0), {0, 0});
4017 
4018  for (unsigned Part = 0; Part < UF; ++Part) {
4019  Value *Cond = getOrCreateVectorValue(I.getOperand(0), Part);
4020  Value *Op0 = getOrCreateVectorValue(I.getOperand(1), Part);
4021  Value *Op1 = getOrCreateVectorValue(I.getOperand(2), Part);
4022  Value *Sel =
4023  Builder.CreateSelect(InvariantCond ? ScalarCond : Cond, Op0, Op1);
4024  VectorLoopValueMap.setVectorValue(&I, Part, Sel);
4025  addMetadata(Sel, &I);
4026  }
4027 
4028  break;
4029  }
4030 
4031  case Instruction::ICmp:
4032  case Instruction::FCmp: {
4033  // Widen compares. Generate vector compares.
4034  bool FCmp = (I.getOpcode() == Instruction::FCmp);
4035  auto *Cmp = dyn_cast<CmpInst>(&I);
4037  for (unsigned Part = 0; Part < UF; ++Part) {
4038  Value *A = getOrCreateVectorValue(Cmp->getOperand(0), Part);
4039  Value *B = getOrCreateVectorValue(Cmp->getOperand(1), Part);
4040  Value *C = nullptr;
4041  if (FCmp) {
4042  // Propagate fast math flags.
4044  Builder.setFastMathFlags(Cmp->getFastMathFlags());
4045  C = Builder.CreateFCmp(Cmp->getPredicate(), A, B);
4046  } else {
4047  C = Builder.CreateICmp(Cmp->getPredicate(), A, B);
4048  }
4049  VectorLoopValueMap.setVectorValue(&I, Part, C);
4050  addMetadata(C, &I);
4051  }
4052 
4053  break;
4054  }
4055 
4056  case Instruction::ZExt:
4057  case Instruction::SExt:
4058  case Instruction::FPToUI:
4059  case Instruction::FPToSI:
4060  case Instruction::FPExt:
4061  case Instruction::PtrToInt:
4062  case Instruction::IntToPtr:
4063  case Instruction::SIToFP:
4064  case Instruction::UIToFP:
4065  case Instruction::Trunc:
4066  case Instruction::FPTrunc:
4067  case Instruction::BitCast: {
4068  auto *CI = dyn_cast<CastInst>(&I);
4070 
4071  /// Vectorize casts.
4072  Type *DestTy =
4073  (VF == 1) ? CI->getType() : VectorType::get(CI->getType(), VF);
4074 
4075  for (unsigned Part = 0; Part < UF; ++Part) {
4076  Value *A = getOrCreateVectorValue(CI->getOperand(0), Part);
4077  Value *Cast = Builder.CreateCast(CI->getOpcode(), A, DestTy);
4078  VectorLoopValueMap.setVectorValue(&I, Part, Cast);
4079  addMetadata(Cast, &I);
4080  }
4081  break;
4082  }
4083 
4084  case Instruction::Call: {
4085  // Ignore dbg intrinsics.
4086  if (isa<DbgInfoIntrinsic>(I))
4087  break;
4089 
4090  Module *M = I.getParent()->getParent()->getParent();
4091  auto *CI = cast<CallInst>(&I);
4092 
4093  StringRef FnName = CI->getCalledFunction()->getName();
4094  Function *F = CI->getCalledFunction();
4095  Type *RetTy = ToVectorTy(CI->getType(), VF);
4097  for (Value *ArgOperand : CI->arg_operands())
4098  Tys.push_back(ToVectorTy(ArgOperand->getType(), VF));
4099 
4101 
4102  // The flag shows whether we use Intrinsic or a usual Call for vectorized
4103  // version of the instruction.
4104  // Is it beneficial to perform intrinsic call compared to lib call?
4105  bool NeedToScalarize;
4106  unsigned CallCost = getVectorCallCost(CI, VF, *TTI, TLI, NeedToScalarize);
4107  bool UseVectorIntrinsic =
4108  ID && getVectorIntrinsicCost(CI, VF, *TTI, TLI) <= CallCost;
4109  assert((UseVectorIntrinsic || !NeedToScalarize) &&
4110  "Instruction should be scalarized elsewhere.");
4111 
4112  for (unsigned Part = 0; Part < UF; ++Part) {
4114  for (unsigned i = 0, ie = CI->getNumArgOperands(); i != ie; ++i) {
4115  Value *Arg = CI->getArgOperand(i);
4116  // Some intrinsics have a scalar argument - don't replace it with a
4117  // vector.
4118  if (!UseVectorIntrinsic || !hasVectorInstrinsicScalarOpd(ID, i))
4119  Arg = getOrCreateVectorValue(CI->getArgOperand(i), Part);
4120  Args.push_back(Arg);
4121  }
4122 
4123  Function *VectorF;
4124  if (UseVectorIntrinsic) {
4125  // Use vector version of the intrinsic.
4126  Type *TysForDecl[] = {CI->getType()};
4127  if (VF > 1)
4128  TysForDecl[0] = VectorType::get(CI->getType()->getScalarType(), VF);
4129  VectorF = Intrinsic::getDeclaration(M, ID, TysForDecl);
4130  } else {
4131  // Use vector version of the library call.
4132  StringRef VFnName = TLI->getVectorizedFunction(FnName, VF);
4133  assert(!VFnName.empty() && "Vector function name is empty.");
4134  VectorF = M->getFunction(VFnName);
4135  if (!VectorF) {
4136  // Generate a declaration
4137  FunctionType *FTy = FunctionType::get(RetTy, Tys, false);
4138  VectorF =
4139  Function::Create(FTy, Function::ExternalLinkage, VFnName, M);
4140  VectorF->copyAttributesFrom(F);
4141  }
4142  }
4143  assert(VectorF && "Can't create vector function.");
4144 
4146  CI->getOperandBundlesAsDefs(OpBundles);
4147  CallInst *V = Builder.CreateCall(VectorF, Args, OpBundles);
4148 
4149  if (isa<FPMathOperator>(V))
4150  V->copyFastMathFlags(CI);
4151 
4152  VectorLoopValueMap.setVectorValue(&I, Part, V);
4153  addMetadata(V, &I);
4154  }
4155 
4156  break;
4157  }
4158 
4159  default:
4160  // This instruction is not vectorized by simple widening.
4161  LLVM_DEBUG(dbgs() << "LV: Found an unhandled instruction: " << I);
4162  llvm_unreachable("Unhandled instruction!");
4163  } // end of switch.
4164 }
4165 
4167  // Forget the original basic block.
4169 
4170  // DT is not kept up-to-date for outer loop vectorization
4172  return;
4173 
4174  // Update the dominator tree information.
4176  "Entry does not dominate exit.");
4177 
4184 }
4185 
4186 void LoopVectorizationCostModel::collectLoopScalars(unsigned VF) {
4187  // We should not collect Scalars more than once per VF. Right now, this
4188  // function is called from collectUniformsAndScalars(), which already does
4189  // this check. Collecting Scalars for VF=1 does not make any sense.
4190  assert(VF >= 2 && Scalars.find(VF) == Scalars.end() &&
4191  "This function should not be visited twice for the same VF");
4192 
4194 
4195  // These sets are used to seed the analysis with pointers used by memory
4196  // accesses that will remain scalar.
4198  SmallPtrSet<Instruction *, 8> PossibleNonScalarPtrs;
4199 
4200  // A helper that returns true if the use of Ptr by MemAccess will be scalar.
4201  // The pointer operands of loads and stores will be scalar as long as the
4202  // memory access is not a gather or scatter operation. The value operand of a
4203  // store will remain scalar if the store is scalarized.
4204  auto isScalarUse = [&](Instruction *MemAccess, Value *Ptr) {
4205  InstWidening WideningDecision = getWideningDecision(MemAccess, VF);
4206  assert(WideningDecision != CM_Unknown &&
4207  "Widening decision should be ready at this moment");
4208  if (auto *Store = dyn_cast<StoreInst>(MemAccess))
4209  if (Ptr == Store->getValueOperand())
4210  return WideningDecision == CM_Scalarize;
4211  assert(Ptr == getLoadStorePointerOperand(MemAccess) &&
4212  "Ptr is neither a value or pointer operand");
4213  return WideningDecision != CM_GatherScatter;
4214  };
4215 
4216  // A helper that returns true if the given value is a bitcast or
4217  // getelementptr instruction contained in the loop.
4218  auto isLoopVaryingBitCastOrGEP = [&](Value *V) {
4219  return ((isa<BitCastInst>(V) && V->getType()->isPointerTy()) ||
4220  isa<GetElementPtrInst>(V)) &&
4221  !TheLoop->isLoopInvariant(V);
4222  };
4223 
4224  // A helper that evaluates a memory access's use of a pointer. If the use
4225  // will be a scalar use, and the pointer is only used by memory accesses, we
4226  // place the pointer in ScalarPtrs. Otherwise, the pointer is placed in
4227  // PossibleNonScalarPtrs.
4228  auto evaluatePtrUse = [&](Instruction *MemAccess, Value *Ptr) {
4229  // We only care about bitcast and getelementptr instructions contained in
4230  // the loop.
4231  if (!isLoopVaryingBitCastOrGEP(Ptr))
4232  return;
4233 
4234  // If the pointer has already been identified as scalar (e.g., if it was
4235  // also identified as uniform), there's nothing to do.
4236  auto *I = cast<Instruction>(Ptr);
4237  if (Worklist.count(I))
4238  return;
4239 
4240  // If the use of the pointer will be a scalar use, and all users of the
4241  // pointer are memory accesses, place the pointer in ScalarPtrs. Otherwise,
4242  // place the pointer in PossibleNonScalarPtrs.
4243  if (isScalarUse(MemAccess, Ptr) && llvm::all_of(I->users(), [&](User *U) {
4244  return isa<LoadInst>(U) || isa<StoreInst>(U);
4245  }))
4246  ScalarPtrs.insert(I);
4247  else
4248  PossibleNonScalarPtrs.insert(I);
4249  };
4250 
4251  // We seed the scalars analysis with three classes of instructions: (1)
4252  // instructions marked uniform-after-vectorization, (2) bitcast and
4253  // getelementptr instructions used by memory accesses requiring a scalar use,
4254  // and (3) pointer induction variables and their update instructions (we
4255  // currently only scalarize these).
4256  //
4257  // (1) Add to the worklist all instructions that have been identified as
4258  // uniform-after-vectorization.
4259  Worklist.insert(Uniforms[VF].begin(), Uniforms[VF].end());
4260 
4261  // (2) Add to the worklist all bitcast and getelementptr instructions used by
4262  // memory accesses requiring a scalar use. The pointer operands of loads and
4263  // stores will be scalar as long as the memory accesses is not a gather or
4264  // scatter operation. The value operand of a store will remain scalar if the
4265  // store is scalarized.
4266  for (auto *BB : TheLoop->blocks())
4267  for (auto &I : *BB) {
4268  if (auto *Load = dyn_cast<LoadInst>(&I)) {
4269  evaluatePtrUse(Load, Load->getPointerOperand());
4270  } else if (auto *Store = dyn_cast<StoreInst>(&I)) {
4271  evaluatePtrUse(Store, Store->getPointerOperand());
4272  evaluatePtrUse(Store, Store->getValueOperand());
4273  }
4274  }
4275  for (auto *I : ScalarPtrs)
4276  if (PossibleNonScalarPtrs.find(I) == PossibleNonScalarPtrs.end()) {
4277  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *I << "\n");
4278  Worklist.insert(I);
4279  }
4280 
4281  // (3) Add to the worklist all pointer induction variables and their update
4282  // instructions.
4283  //
4284  // TODO: Once we are able to vectorize pointer induction variables we should
4285  // no longer insert them into the worklist here.
4286  auto *Latch = TheLoop->getLoopLatch();
4287  for (auto &Induction : *Legal->getInductionVars()) {
4288  auto *Ind = Induction.first;
4289  auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
4290  if (Induction.second.getKind() != InductionDescriptor::IK_PtrInduction)
4291  continue;
4292  Worklist.insert(Ind);
4293  Worklist.insert(IndUpdate);
4294  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
4295  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate
4296  << "\n");
4297  }
4298 
4299  // Insert the forced scalars.
4300  // FIXME: Currently widenPHIInstruction() often creates a dead vector
4301  // induction variable when the PHI user is scalarized.
4302  auto ForcedScalar = ForcedScalars.find(VF);
4303  if (ForcedScalar != ForcedScalars.end())
4304  for (auto *I : ForcedScalar->second)
4305  Worklist.insert(I);
4306 
4307  // Expand the worklist by looking through any bitcasts and getelementptr
4308  // instructions we've already identified as scalar. This is similar to the
4309  // expansion step in collectLoopUniforms(); however, here we're only
4310  // expanding to include additional bitcasts and getelementptr instructions.
4311  unsigned Idx = 0;
4312  while (Idx != Worklist.size()) {
4313  Instruction *Dst = Worklist[Idx++];
4314  if (!isLoopVaryingBitCastOrGEP(Dst->getOperand(0)))
4315  continue;
4316  auto *Src = cast<Instruction>(Dst->getOperand(0));
4317  if (llvm::all_of(Src->users(), [&](User *U) -> bool {
4318  auto *J = cast<Instruction>(U);
4319  return !TheLoop->contains(J) || Worklist.count(J) ||
4320  ((isa<LoadInst>(J) || isa<StoreInst>(J)) &&
4321  isScalarUse(J, Src));
4322  })) {
4323  Worklist.insert(Src);
4324  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Src << "\n");
4325  }
4326  }
4327 
4328  // An induction variable will remain scalar if all users of the induction
4329  // variable and induction variable update remain scalar.
4330  for (auto &Induction : *Legal->getInductionVars()) {
4331  auto *Ind = Induction.first;
4332  auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
4333 
4334  // We already considered pointer induction variables, so there's no reason
4335  // to look at their users again.
4336  //
4337  // TODO: Once we are able to vectorize pointer induction variables we
4338  // should no longer skip over them here.
4339  if (Induction.second.getKind() == InductionDescriptor::IK_PtrInduction)
4340  continue;
4341 
4342  // Determine if all users of the induction variable are scalar after
4343  // vectorization.
4344  auto ScalarInd = llvm::all_of(Ind->users(), [&](User *U) -> bool {
4345  auto *I = cast<Instruction>(U);
4346  return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I);
4347  });
4348  if (!ScalarInd)
4349  continue;
4350 
4351  // Determine if all users of the induction variable update instruction are
4352  // scalar after vectorization.
4353  auto ScalarIndUpdate =
4354  llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
4355  auto *I = cast<Instruction>(U);
4356  return I == Ind || !TheLoop->contains(I) || Worklist.count(I);
4357  });
4358  if (!ScalarIndUpdate)
4359  continue;
4360 
4361  // The induction variable and its update instruction will remain scalar.
4362  Worklist.insert(Ind);
4363  Worklist.insert(IndUpdate);
4364  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
4365  LLVM_DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate
4366  << "\n");
4367  }
4368 
4369  Scalars[VF].insert(Worklist.begin(), Worklist.end());
4370 }
4371 
4373  if (!blockNeedsPredication(I->getParent()))
4374  return false;
4375  switch(I->getOpcode()) {
4376  default:
4377  break;
4378  case Instruction::Load:
4379  case Instruction::Store: {
4380  if (!Legal->isMaskRequired(I))
4381  return false;
4382  auto *Ptr = getLoadStorePointerOperand(I);
4383  auto *Ty = getMemInstValueType(I);
4384  // We have already decided how to vectorize this instruction, get that
4385  // result.
4386  if (VF > 1) {
4387  InstWidening WideningDecision = getWideningDecision(I, VF);
4388  assert(WideningDecision != CM_Unknown &&
4389  "Widening decision should be ready at this moment");
4390  return WideningDecision == CM_Scalarize;
4391  }
4392  return isa<LoadInst>(I) ?
4393  !(isLegalMaskedLoad(Ty, Ptr) || isLegalMaskedGather(Ty))
4394  : !(isLegalMaskedStore(Ty, Ptr) || isLegalMaskedScatter(Ty));
4395  }
4396  case Instruction::UDiv:
4397  case Instruction::SDiv:
4398  case Instruction::SRem:
4399  case Instruction::URem:
4400  return mayDivideByZero(*I);
4401  }
4402  return false;
4403 }
4404 
4406  unsigned VF) {
4407  assert(isAccessInterleaved(I) && "Expecting interleaved access.");
4408  assert(getWideningDecision(I, VF) == CM_Unknown &&
4409  "Decision should not be set yet.");
4410  auto *Group = getInterleavedAccessGroup(I);
4411  assert(Group && "Must have a group.");
4412 
4413  // Check if masking is required.
4414  // A Group may need masking for one of two reasons: it resides in a block that
4415  // needs predication, or it was decided to use masking to deal with gaps.
4416  bool PredicatedAccessRequiresMasking =
4418  bool AccessWithGapsRequiresMasking =
4419  Group->requiresScalarEpilogue() && !IsScalarEpilogueAllowed;
4420  if (!PredicatedAccessRequiresMasking && !AccessWithGapsRequiresMasking)
4421  return true;
4422 
4423  // If masked interleaving is required, we expect that the user/target had
4424  // enabled it, because otherwise it either wouldn't have been created or
4425  // it should have been invalidated by the CostModel.
4427  "Masked interleave-groups for predicated accesses are not enabled.");
4428 
4429  auto *Ty = getMemInstValueType(I);
4430  return isa<LoadInst>(I) ? TTI.isLegalMaskedLoad(Ty)
4431  : TTI.isLegalMaskedStore(Ty);
4432 }
4433 
4435  unsigned VF) {
4436  // Get and ensure we have a valid memory instruction.
4437  LoadInst *LI = dyn_cast<LoadInst>(I);
4439  assert((LI || SI) && "Invalid memory instruction");
4440 
4441  auto *Ptr = getLoadStorePointerOperand(I);
4442 
4443  // In order to be widened, the pointer should be consecutive, first of all.
4444  if (!Legal->isConsecutivePtr(Ptr))
4445  return false;
4446 
4447  // If the instruction is a store located in a predicated block, it will be
4448  // scalarized.
4449  if (isScalarWithPredication(I))
4450  return false;
4451 
4452  // If the instruction's allocated size doesn't equal it's type size, it
4453  // requires padding and will be scalarized.
4454  auto &DL = I->getModule()->getDataLayout();
4455  auto *ScalarTy = LI ? LI->getType() : SI->getValueOperand()->getType();
4456  if (hasIrregularType(ScalarTy, DL, VF))
4457  return false;
4458 
4459  return true;
4460 }
4461 
4462 void LoopVectorizationCostModel::collectLoopUniforms(unsigned VF) {
4463  // We should not collect Uniforms more than once per VF. Right now,
4464  // this function is called from collectUniformsAndScalars(), which
4465  // already does this check. Collecting Uniforms for VF=1 does not make any
4466  // sense.
4467 
4468  assert(VF >= 2 && Uniforms.find(VF) == Uniforms.end() &&
4469  "This function should not be visited twice for the same VF");
4470 
4471  // Visit the list of Uniforms. If we'll not find any uniform value, we'll
4472  // not analyze again. Uniforms.count(VF) will return 1.
4473  Uniforms[VF].clear();
4474 
4475  // We now know that the loop is vectorizable!
4476  // Collect instructions inside the loop that will remain uniform after
4477  // vectorization.
4478 
4479  // Global values, params and instructions outside of current loop are out of
4480  // scope.
4481  auto isOutOfScope = [&](Value *V) -> bool {
4483  return (!I || !TheLoop->contains(I));
4484  };
4485 
4486  SetVector<Instruction *> Worklist;
4487  BasicBlock *Latch = TheLoop->getLoopLatch();
4488 
4489  // Start with the conditional branch. If the branch condition is an
4490  // instruction contained in the loop that is only used by the branch, it is
4491  // uniform.
4492  auto *Cmp = dyn_cast<Instruction>(Latch->getTerminator()->getOperand(0));
4493  if (Cmp && TheLoop->contains(Cmp) && Cmp->hasOneUse()) {
4494  Worklist.insert(Cmp);
4495  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *Cmp << "\n");
4496  }
4497 
4498  // Holds consecutive and consecutive-like pointers. Consecutive-like pointers
4499  // are pointers that are treated like consecutive pointers during
4500  // vectorization. The pointer operands of interleaved accesses are an
4501  // example.
4502  SmallSetVector<Instruction *, 8> ConsecutiveLikePtrs;
4503 
4504  // Holds pointer operands of instructions that are possibly non-uniform.
4505  SmallPtrSet<Instruction *, 8> PossibleNonUniformPtrs;
4506 
4507  auto isUniformDecision = [&](Instruction *I, unsigned VF) {
4508  InstWidening WideningDecision = getWideningDecision(I, VF);
4509  assert(WideningDecision != CM_Unknown &&
4510  "Widening decision should be ready at this moment");
4511 
4512  return (WideningDecision == CM_Widen ||
4513  WideningDecision == CM_Widen_Reverse ||
4514  WideningDecision == CM_Interleave);
4515  };
4516  // Iterate over the instructions in the loop, and collect all
4517  // consecutive-like pointer operands in ConsecutiveLikePtrs. If it's possible
4518  // that a consecutive-like pointer operand will be scalarized, we collect it
4519  // in PossibleNonUniformPtrs instead. We use two sets here because a single
4520  // getelementptr instruction can be used by both vectorized and scalarized
4521  // memory instructions. For example, if a loop loads and stores from the same
4522  // location, but the store is conditional, the store will be scalarized, and
4523  // the getelementptr won't remain uniform.
4524  for (auto *BB : TheLoop->blocks())
4525  for (auto &I : *BB) {
4526  // If there's no pointer operand, there's nothing to do.
4527  auto *Ptr = dyn_cast_or_null<Instruction>(getLoadStorePointerOperand(&I));
4528  if (!Ptr)
4529  continue;
4530 
4531  // True if all users of Ptr are memory accesses that have Ptr as their
4532  // pointer operand.
4533  auto UsersAreMemAccesses =
4534  llvm::all_of(Ptr->users(), [&](User *U) -> bool {
4535  return getLoadStorePointerOperand(U) == Ptr;
4536  });
4537 
4538  // Ensure the memory instruction will not be scalarized or used by
4539  // gather/scatter, making its pointer operand non-uniform. If the pointer
4540  // operand is used by any instruction other than a memory access, we
4541  // conservatively assume the pointer operand may be non-uniform.
4542  if (!UsersAreMemAccesses || !isUniformDecision(&I, VF))
4543  PossibleNonUniformPtrs.insert(Ptr);
4544 
4545  // If the memory instruction will be vectorized and its pointer operand
4546  // is consecutive-like, or interleaving - the pointer operand should
4547  // remain uniform.
4548  else
4549  ConsecutiveLikePtrs.insert(Ptr);
4550  }
4551 
4552  // Add to the Worklist all consecutive and consecutive-like pointers that
4553  // aren't also identified as possibly non-uniform.
4554  for (auto *V : ConsecutiveLikePtrs)
4555  if (PossibleNonUniformPtrs.find(V) == PossibleNonUniformPtrs.end()) {
4556  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *V << "\n");
4557  Worklist.insert(V);
4558  }
4559 
4560  // Expand Worklist in topological order: whenever a new instruction
4561  // is added , its users should be already inside Worklist. It ensures
4562  // a uniform instruction will only be used by uniform instructions.
4563  unsigned idx = 0;
4564  while (idx != Worklist.size()) {
4565  Instruction *I = Worklist[idx++];
4566 
4567  for (auto OV : I->operand_values()) {
4568  // isOutOfScope operands cannot be uniform instructions.
4569  if (isOutOfScope(OV))
4570  continue;
4571  // First order recurrence Phi's should typically be considered
4572  // non-uniform.
4573  auto *OP = dyn_cast<PHINode>(OV);
4574  if (OP && Legal->isFirstOrderRecurrence(OP))
4575  continue;
4576  // If all the users of the operand are uniform, then add the
4577  // operand into the uniform worklist.
4578  auto *OI = cast<Instruction>(OV);
4579  if (llvm::all_of(OI->users(), [&](User *U) -> bool {
4580  auto *J = cast<Instruction>(U);
4581  return Worklist.count(J) ||
4582  (OI == getLoadStorePointerOperand(J) &&
4583  isUniformDecision(J, VF));
4584  })) {
4585  Worklist.insert(OI);
4586  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *OI << "\n");
4587  }
4588  }
4589  }
4590 
4591  // Returns true if Ptr is the pointer operand of a memory access instruction
4592  // I, and I is known to not require scalarization.
4593  auto isVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool {
4594  return getLoadStorePointerOperand(I) == Ptr && isUniformDecision(I, VF);
4595  };
4596 
4597  // For an instruction to be added into Worklist above, all its users inside
4598  // the loop should also be in Worklist. However, this condition cannot be
4599  // true for phi nodes that form a cyclic dependence. We must process phi
4600  // nodes separately. An induction variable will remain uniform if all users
4601  // of the induction variable and induction variable update remain uniform.
4602  // The code below handles both pointer and non-pointer induction variables.
4603  for (auto &Induction : *Legal->getInductionVars()) {
4604  auto *Ind = Induction.first;
4605  auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
4606 
4607  // Determine if all users of the induction variable are uniform after
4608  // vectorization.
4609  auto UniformInd = llvm::all_of(Ind->users(), [&](User *U) -> bool {
4610  auto *I = cast<Instruction>(U);
4611  return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) ||
4612  isVectorizedMemAccessUse(I, Ind);
4613  });
4614  if (!UniformInd)
4615  continue;
4616 
4617  // Determine if all users of the induction variable update instruction are
4618  // uniform after vectorization.
4619  auto UniformIndUpdate =
4620  llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
4621  auto *I = cast<Instruction>(U);
4622  return I == Ind || !TheLoop->contains(I) || Worklist.count(I) ||
4623  isVectorizedMemAccessUse(I, IndUpdate);
4624  });
4625  if (!UniformIndUpdate)
4626  continue;
4627 
4628  // The induction variable and its update instruction will remain uniform.
4629  Worklist.insert(Ind);
4630  Worklist.insert(IndUpdate);
4631  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *Ind << "\n");
4632  LLVM_DEBUG(dbgs() << "LV: Found uniform instruction: " << *IndUpdate
4633  << "\n");
4634  }
4635 
4636  Uniforms[VF].insert(Worklist.begin(), Worklist.end());
4637 }
4638 
4641  // TODO: It may by useful to do since it's still likely to be dynamically
4642  // uniform if the target can skip.
4643  LLVM_DEBUG(
4644  dbgs() << "LV: Not inserting runtime ptr check for divergent target");
4645 
4646  ORE->emit(
4647  createMissedAnalysis("CantVersionLoopWithDivergentTarget")
4648  << "runtime pointer checks needed. Not enabled for divergent target");
4649 
4650  return None;
4651  }
4652 
4653  unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
4654  if (!OptForSize) // Remaining checks deal with scalar loop when OptForSize.
4655  return computeFeasibleMaxVF(OptForSize, TC);
4656 
4658  ORE->emit(createMissedAnalysis("CantVersionLoopWithOptForSize")
4659  << "runtime pointer checks needed. Enable vectorization of this "
4660  "loop with '#pragma clang loop vectorize(enable)' when "
4661  "compiling with -Os/-Oz");
4662  LLVM_DEBUG(
4663  dbgs()
4664  << "LV: Aborting. Runtime ptr check is required with -Os/-Oz.\n");
4665  return None;
4666  }
4667 
4668  if (!PSE.getUnionPredicate().getPredicates().empty()) {
4669  ORE->emit(createMissedAnalysis("CantVersionLoopWithOptForSize")
4670  << "runtime SCEV checks needed. Enable vectorization of this "
4671  "loop with '#pragma clang loop vectorize(enable)' when "
4672  "compiling with -Os/-Oz");
4673  LLVM_DEBUG(
4674  dbgs()
4675  << "LV: Aborting. Runtime SCEV check is required with -Os/-Oz.\n");
4676  return None;
4677  }
4678 
4679  // FIXME: Avoid specializing for stride==1 instead of bailing out.
4680  if (!Legal->getLAI()->getSymbolicStrides().empty()) {
4681  ORE->emit(createMissedAnalysis("CantVersionLoopWithOptForSize")
4682  << "runtime stride == 1 checks needed. Enable vectorization of "
4683  "this loop with '#pragma clang loop vectorize(enable)' when "
4684  "compiling with -Os/-Oz");
4685  LLVM_DEBUG(
4686  dbgs()
4687  << "LV: Aborting. Runtime stride check is required with -Os/-Oz.\n");
4688  return None;
4689  }
4690 
4691  // If we optimize the program for size, avoid creating the tail loop.
4692  LLVM_DEBUG(dbgs() << "LV: Found trip count: " << TC << '\n');
4693 
4694  if (TC == 1) {
4695  ORE->emit(createMissedAnalysis("SingleIterationLoop")
4696  << "loop trip count is one, irrelevant for vectorization");
4697  LLVM_DEBUG(dbgs() << "LV: Aborting, single iteration (non) loop.\n");
4698  return None;
4699  }
4700 
4701  // Record that scalar epilogue is not allowed.
4702  LLVM_DEBUG(dbgs() << "LV: Not allowing scalar epilogue due to -Os/-Oz.\n");
4703 
4704  IsScalarEpilogueAllowed = !OptForSize;
4705 
4706  // We don't create an epilogue when optimizing for size.
4707  // Invalidate interleave groups that require an epilogue if we can't mask
4708  // the interleave-group.
4710  InterleaveInfo.invalidateGroupsRequiringScalarEpilogue();
4711 
4712  unsigned MaxVF = computeFeasibleMaxVF(OptForSize, TC);
4713 
4714  if (TC > 0 && TC % MaxVF == 0) {
4715  LLVM_DEBUG(dbgs() << "LV: No tail will remain for any chosen VF.\n");
4716  return MaxVF;
4717  }
4718 
4719  // If we don't know the precise trip count, or if the trip count that we
4720  // found modulo the vectorization factor is not zero, try to fold the tail
4721  // by masking.
4722  // FIXME: look for a smaller MaxVF that does divide TC rather than masking.
4723  if (Legal->canFoldTailByMasking()) {
4724  FoldTailByMasking = true;
4725  return MaxVF;
4726  }
4727 
4728  if (TC == 0) {
4729  ORE->emit(
4730  createMissedAnalysis("UnknownLoopCountComplexCFG")
4731  << "unable to calculate the loop count due to complex control flow");
4732  return None;
4733  }
4734 
4735  ORE->emit(createMissedAnalysis("NoTailLoopWithOptForSize")
4736  << "cannot optimize for size and vectorize at the same time. "
4737  "Enable vectorization of this loop with '#pragma clang loop "
4738  "vectorize(enable)' when compiling with -Os/-Oz");
4739  return None;
4740 }
4741 
4742 unsigned
4743 LoopVectorizationCostModel::computeFeasibleMaxVF(bool OptForSize,
4744  unsigned ConstTripCount) {
4745  MinBWs = computeMinimumValueSizes(TheLoop->getBlocks(), *DB, &TTI);
4746  unsigned SmallestType, WidestType;
4747  std::tie(SmallestType, WidestType) = getSmallestAndWidestTypes();
4748  unsigned WidestRegister = TTI.getRegisterBitWidth(true);
4749 
4750  // Get the maximum safe dependence distance in bits computed by LAA.
4751  // It is computed by MaxVF * sizeOf(type) * 8, where type is taken from
4752  // the memory accesses that is most restrictive (involved in the smallest
4753  // dependence distance).
4754  unsigned MaxSafeRegisterWidth = Legal->getMaxSafeRegisterWidth();
4755 
4756  WidestRegister = std::min(WidestRegister, MaxSafeRegisterWidth);
4757 
4758  unsigned MaxVectorSize = WidestRegister / WidestType;
4759 
4760  LLVM_DEBUG(dbgs() << "LV: The Smallest and Widest types: " << SmallestType
4761  << " / " << WidestType << " bits.\n");
4762  LLVM_DEBUG(dbgs() << "LV: The Widest register safe to use is: "
4763  << WidestRegister << " bits.\n");
4764 
4765  assert(MaxVectorSize <= 256 && "Did not expect to pack so many elements"
4766  " into one vector!");
4767  if (MaxVectorSize == 0) {
4768  LLVM_DEBUG(dbgs() << "LV: The target has no vector registers.\n");
4769  MaxVectorSize = 1;
4770  return MaxVectorSize;
4771  } else if (ConstTripCount && ConstTripCount < MaxVectorSize &&
4772  isPowerOf2_32(ConstTripCount)) {
4773  // We need to clamp the VF to be the ConstTripCount. There is no point in
4774  // choosing a higher viable VF as done in the loop below.
4775  LLVM_DEBUG(dbgs() << "LV: Clamping the MaxVF to the constant trip count: "
4776  << ConstTripCount << "\n");
4777  MaxVectorSize = ConstTripCount;
4778  return MaxVectorSize;
4779  }
4780 
4781  unsigned MaxVF = MaxVectorSize;
4782  if (TTI.shouldMaximizeVectorBandwidth(OptForSize) ||
4783  (MaximizeBandwidth && !OptForSize)) {
4784  // Collect all viable vectorization factors larger than the default MaxVF
4785  // (i.e. MaxVectorSize).
4787  unsigned NewMaxVectorSize = WidestRegister / SmallestType;
4788  for (unsigned VS = MaxVectorSize * 2; VS <= NewMaxVectorSize; VS *= 2)
4789  VFs.push_back(VS);
4790 
4791  // For each VF calculate its register usage.
4792  auto RUs = calculateRegisterUsage(VFs);
4793 
4794  // Select the largest VF which doesn't require more registers than existing
4795  // ones.
4796  unsigned TargetNumRegisters = TTI.getNumberOfRegisters(true);
4797  for (int i = RUs.size() - 1; i >= 0; --i) {
4798  if (RUs[i].MaxLocalUsers <= TargetNumRegisters) {
4799  MaxVF = VFs[i];
4800  break;
4801  }
4802  }
4803  if (unsigned MinVF = TTI.getMinimumVF(SmallestType)) {
4804  if (MaxVF < MinVF) {
4805  LLVM_DEBUG(dbgs() << "LV: Overriding calculated MaxVF(" << MaxVF
4806  << ") with target's minimum: " << MinVF << '\n');
4807  MaxVF = MinVF;
4808  }
4809  }
4810  }
4811  return MaxVF;
4812 }
4813 
4816  float Cost = expectedCost(1).first;
4817  const float ScalarCost = Cost;
4818  unsigned Width = 1;
4819  LLVM_DEBUG(dbgs() << "LV: Scalar loop costs: " << (int)ScalarCost << ".\n");
4820 
4821  bool ForceVectorization = Hints->getForce() == LoopVectorizeHints::FK_Enabled;
4822  if (ForceVectorization && MaxVF > 1) {
4823  // Ignore scalar width, because the user explicitly wants vectorization.
4824  // Initialize cost to max so that VF = 2 is, at least, chosen during cost
4825  // evaluation.
4827  }
4828 
4829  for (unsigned i = 2; i <= MaxVF; i *= 2) {
4830  // Notice that the vector loop needs to be executed less times, so
4831  // we need to divide the cost of the vector loops by the width of
4832  // the vector elements.
4833  VectorizationCostTy C = expectedCost(i);
4834  float VectorCost = C.first / (float)i;
4835  LLVM_DEBUG(dbgs() << "LV: Vector loop of width " << i
4836  << " costs: " << (int)VectorCost << ".\n");
4837  if (!C.second && !ForceVectorization) {
4838  LLVM_DEBUG(
4839  dbgs() << "LV: Not considering vector loop of width " << i
4840  << " because it will not generate any vector instructions.\n");
4841  continue;
4842  }
4843  if (VectorCost < Cost) {
4844  Cost = VectorCost;
4845  Width = i;
4846  }
4847  }
4848 
4849  if (!EnableCondStoresVectorization && NumPredStores) {
4850  ORE->emit(createMissedAnalysis("ConditionalStore")
4851  << "store that is conditionally executed prevents vectorization");
4852  LLVM_DEBUG(
4853  dbgs() << "LV: No vectorization. There are conditional stores.\n");
4854  Width = 1;
4855  Cost = ScalarCost;
4856  }
4857 
4858  LLVM_DEBUG(if (ForceVectorization && Width > 1 && Cost >= ScalarCost) dbgs()
4859  << "LV: Vectorization seems to be not beneficial, "
4860  << "but was forced by a user.\n");
4861  LLVM_DEBUG(dbgs() << "LV: Selecting VF: " << Width << ".\n");
4862  VectorizationFactor Factor = {Width, (unsigned)(Width * Cost)};
4863  return Factor;
4864 }
4865 
4866 std::pair<unsigned, unsigned>
4868  unsigned MinWidth = -1U;
4869  unsigned MaxWidth = 8;
4870  const DataLayout &DL = TheFunction->getParent()->getDataLayout();
4871 
4872  // For each block.
4873  for (BasicBlock *BB : TheLoop->blocks()) {
4874  // For each instruction in the loop.
4875  for (Instruction &I : BB->instructionsWithoutDebug()) {
4876  Type *T = I.getType();
4877 
4878  // Skip ignored values.
4879  if (ValuesToIgnore.find(&I) != ValuesToIgnore.end())
4880  continue;
4881 
4882  // Only examine Loads, Stores and PHINodes.
4883  if (!isa<LoadInst>(I) && !isa<StoreInst>(I) && !isa<PHINode>(I))
4884  continue;
4885 
4886  // Examine PHI nodes that are reduction variables. Update the type to
4887  // account for the recurrence type.
4888  if (auto *PN = dyn_cast<PHINode>(&I)) {
4889  if (!Legal->isReductionVariable(PN))
4890  continue;
4891  RecurrenceDescriptor RdxDesc = (*Legal->getReductionVars())[PN];
4892  T = RdxDesc.getRecurrenceType();
4893  }
4894 
4895  // Examine the stored values.
4896  if (auto *ST = dyn_cast<StoreInst>(&I))
4897  T = ST->getValueOperand()->getType();
4898 
4899  // Ignore loaded pointer types and stored pointer types that are not
4900  // vectorizable.
4901  //
4902  // FIXME: The check here attempts to predict whether a load or store will
4903  // be vectorized. We only know this for certain after a VF has
4904  // been selected. Here, we assume that if an access can be
4905  // vectorized, it will be. We should also look at extending this
4906  // optimization to non-pointer types.
4907  //
4908  if (T->isPointerTy() && !isConsecutiveLoadOrStore(&I) &&
4909  !isAccessInterleaved(&I) && !isLegalGatherOrScatter(&I))
4910  continue;
4911 
4912  MinWidth = std::min(MinWidth,
4913  (unsigned)DL.getTypeSizeInBits(T->getScalarType()));
4914  MaxWidth = std::max(MaxWidth,
4915  (unsigned)DL.getTypeSizeInBits(T->getScalarType()));
4916  }
4917  }
4918 
4919  return {MinWidth, MaxWidth};
4920 }
4921 
4923  unsigned VF,
4924  unsigned LoopCost) {
4925  // -- The interleave heuristics --
4926  // We interleave the loop in order to expose ILP and reduce the loop overhead.
4927  // There are many micro-architectural considerations that we can't predict
4928  // at this level. For example, frontend pressure (on decode or fetch) due to
4929  // code size, or the number and capabilities of the execution ports.
4930  //
4931  // We use the following heuristics to select the interleave count:
4932  // 1. If the code has reductions, then we interleave to break the cross
4933  // iteration dependency.
4934  // 2. If the loop is really small, then we interleave to reduce the loop
4935  // overhead.
4936  // 3. We don't interleave if we think that we will spill registers to memory
4937  // due to the increased register pressure.
4938 
4939  // When we optimize for size, we don't interleave.
4940  if (OptForSize)
4941  return 1;
4942 
4943  // We used the distance for the interleave count.
4944  if (Legal->getMaxSafeDepDistBytes() != -1U)
4945  return 1;
4946 
4947  // Do not interleave loops with a relatively small trip count.
4948  unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
4949  if (TC > 1 && TC < TinyTripCountInterleaveThreshold)
4950  return 1;
4951 
4952  unsigned TargetNumRegisters = TTI.getNumberOfRegisters(VF > 1);
4953  LLVM_DEBUG(dbgs() << "LV: The target has " << TargetNumRegisters
4954