LLVM  9.0.0svn
MCInstrDesc.cpp
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1 //===------ llvm/MC/MCInstrDesc.cpp- Instruction Descriptors --------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines methods on the MCOperandInfo and MCInstrDesc classes, which
10 // are used to describe target instructions and their operands.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/MC/MCInstrDesc.h"
15 #include "llvm/MC/MCInst.h"
16 #include "llvm/MC/MCRegisterInfo.h"
18 
19 using namespace llvm;
20 
22  std::string &Info) const {
24  return ComplexDeprecationInfo(MI, STI, Info);
26  // FIXME: it would be nice to include the subtarget feature here.
27  Info = "deprecated";
28  return true;
29  }
30  return false;
31 }
33  const MCRegisterInfo &RI) const {
34  if (isBranch() || isCall() || isReturn() || isIndirectBranch())
35  return true;
36  unsigned PC = RI.getProgramCounter();
37  if (PC == 0)
38  return false;
39  if (hasDefOfPhysReg(MI, PC, RI))
40  return true;
41  return false;
42 }
43 
45  const MCRegisterInfo *MRI) const {
46  if (const MCPhysReg *ImpDefs = ImplicitDefs)
47  for (; *ImpDefs; ++ImpDefs)
48  if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs)))
49  return true;
50  return false;
51 }
52 
53 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
54  const MCRegisterInfo &RI) const {
55  for (int i = 0, e = NumDefs; i != e; ++i)
56  if (MI.getOperand(i).isReg() &&
57  RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
58  return true;
59  if (variadicOpsAreDefs())
60  for (int i = NumOperands - 1, e = MI.getNumOperands(); i != e; ++i)
61  if (MI.getOperand(i).isReg() &&
62  RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
63  return true;
64  return hasImplicitDefOfPhysReg(Reg, &RI);
65 }
This class represents lattice values for constants.
Definition: AllocatorList.h:23
unsigned Reg
bool isReg() const
Definition: MCInst.h:57
bool getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, std::string &Info) const
Returns true if a certain instruction is deprecated and if so returns the reason in Info...
Definition: MCInstrDesc.cpp:21
bool isReturn() const
Return true if the instruction is a return.
Definition: MCInstrDesc.h:245
bool isBranch() const
Returns true if this is a conditional, unconditional, or indirect branch.
Definition: MCInstrDesc.h:276
const FeatureBitset & getFeatureBits() const
bool isSubRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA.
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:64
bool hasDefOfPhysReg(const MCInst &MI, unsigned Reg, const MCRegisterInfo &RI) const
Return true if this instruction defines the specified physical register, either explicitly or implici...
Definition: MCInstrDesc.cpp:53
Analysis containing CSE Info
Definition: CSEInfo.cpp:20
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
unsigned short NumOperands
Definition: MCInstrDesc.h:166
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
bool mayAffectControlFlow(const MCInst &MI, const MCRegisterInfo &RI) const
Return true if this is a branch or an instruction which directly writes to the program counter...
Definition: MCInstrDesc.cpp:32
unsigned const MachineRegisterInfo * MRI
int64_t DeprecatedFeature
Definition: MCInstrDesc.h:178
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:173
bool(* ComplexDeprecationInfo)(MCInst &, const MCSubtargetInfo &, std::string &)
Definition: MCInstrDesc.h:182
unsigned getNumOperands() const
Definition: MCInst.h:181
bool isIndirectBranch() const
Return true if this is an indirect branch, such as a branch through a register.
Definition: MCInstrDesc.h:280
unsigned char NumDefs
Definition: MCInstrDesc.h:167
bool isSubRegisterEq(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:179
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:257
Generic base class for all target subtargets.
bool variadicOpsAreDefs() const
Return true if variadic operands of this instruction are definitions.
Definition: MCInstrDesc.h:387
unsigned getProgramCounter() const
Return the register which is the program counter.
IRTranslator LLVM IR MI
bool hasImplicitDefOfPhysReg(unsigned Reg, const MCRegisterInfo *MRI=nullptr) const
Return true if this instruction implicitly defines the specified physical register.
Definition: MCInstrDesc.cpp:44