LLVM  6.0.0svn
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1 //===------ llvm/MC/MCInstrDesc.cpp- Instruction Descriptors --------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines methods on the MCOperandInfo and MCInstrDesc classes, which
11 // are used to describe target instructions and their operands.
12 //
13 //===----------------------------------------------------------------------===//
15 #include "llvm/MC/MCInstrDesc.h"
16 #include "llvm/MC/MCInst.h"
17 #include "llvm/MC/MCRegisterInfo.h"
20 using namespace llvm;
23  std::string &Info) const {
25  return ComplexDeprecationInfo(MI, STI, Info);
27  // FIXME: it would be nice to include the subtarget feature here.
28  Info = "deprecated";
29  return true;
30  }
31  return false;
32 }
34  const MCRegisterInfo &RI) const {
35  if (isBranch() || isCall() || isReturn() || isIndirectBranch())
36  return true;
37  unsigned PC = RI.getProgramCounter();
38  if (PC == 0)
39  return false;
40  if (hasDefOfPhysReg(MI, PC, RI))
41  return true;
42  // A variadic instruction may define PC in the variable operand list.
43  // There's currently no indication of which entries in a variable
44  // list are defs and which are uses. While that's the case, this function
45  // needs to assume they're defs in order to be conservatively correct.
46  for (int i = NumOperands, e = MI.getNumOperands(); i != e; ++i) {
47  if (MI.getOperand(i).isReg() &&
48  RI.isSubRegisterEq(PC, MI.getOperand(i).getReg()))
49  return true;
50  }
51  return false;
52 }
55  const MCRegisterInfo *MRI) const {
56  if (const MCPhysReg *ImpDefs = ImplicitDefs)
57  for (; *ImpDefs; ++ImpDefs)
58  if (*ImpDefs == Reg || (MRI && MRI->isSubRegister(Reg, *ImpDefs)))
59  return true;
60  return false;
61 }
63 bool MCInstrDesc::hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
64  const MCRegisterInfo &RI) const {
65  for (int i = 0, e = NumDefs; i != e; ++i)
66  if (MI.getOperand(i).isReg() &&
67  RI.isSubRegisterEq(Reg, MI.getOperand(i).getReg()))
68  return true;
69  return hasImplicitDefOfPhysReg(Reg, &RI);
70 }
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
bool isReg() const
Definition: MCInst.h:58
bool getDeprecatedInfo(MCInst &MI, const MCSubtargetInfo &STI, std::string &Info) const
Returns true if a certain instruction is deprecated and if so returns the reason in Info...
Definition: MCInstrDesc.cpp:22
bool isReturn() const
Return true if the instruction is a return.
Definition: MCInstrDesc.h:245
bool isBranch() const
Returns true if this is a conditional, unconditional, or indirect branch.
Definition: MCInstrDesc.h:270
const FeatureBitset & getFeatureBits() const
getFeatureBits - Return the feature bits.
bool isSubRegister(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA.
All possible values of the reg field in the ModR/M byte.
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:65
bool hasDefOfPhysReg(const MCInst &MI, unsigned Reg, const MCRegisterInfo &RI) const
Return true if this instruction defines the specified physical register, either explicitly or implici...
Definition: MCInstrDesc.cpp:63
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:159
unsigned short NumOperands
Definition: MCInstrDesc.h:166
uint16_t MCPhysReg
An unsigned integer type large enough to represent all physical registers, but not necessarily virtua...
MCRegisterInfo base class - We assume that the target defines a static array of MCRegisterDesc object...
bool mayAffectControlFlow(const MCInst &MI, const MCRegisterInfo &RI) const
Return true if this is a branch or an instruction which directly writes to the program counter...
Definition: MCInstrDesc.cpp:33
unsigned const MachineRegisterInfo * MRI
int64_t DeprecatedFeature
Definition: MCInstrDesc.h:178
const MCPhysReg * ImplicitDefs
Definition: MCInstrDesc.h:173
bool(* ComplexDeprecationInfo)(MCInst &, const MCSubtargetInfo &, std::string &)
Definition: MCInstrDesc.h:182
unsigned getNumOperands() const
Definition: MCInst.h:182
bool isIndirectBranch() const
Return true if this is an indirect branch, such as a branch through a register.
Definition: MCInstrDesc.h:274
unsigned char NumDefs
Definition: MCInstrDesc.h:167
bool isSubRegisterEq(unsigned RegA, unsigned RegB) const
Returns true if RegB is a sub-register of RegA or if RegB == RegA.
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:180
bool isCall() const
Return true if the instruction is a call.
Definition: MCInstrDesc.h:251
MCSubtargetInfo - Generic base class for all target subtargets.
unsigned getProgramCounter() const
Return the register which is the program counter.
IRTranslator LLVM IR MI
bool hasImplicitDefOfPhysReg(unsigned Reg, const MCRegisterInfo *MRI=nullptr) const
Return true if this instruction implicitly defines the specified physical register.
Definition: MCInstrDesc.cpp:54