LLVM  9.0.0svn
MIPatternMatch.h
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1 //==------ llvm/CodeGen/GlobalISel/MIPatternMatch.h -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// Contains matchers for matching SSA Machine Instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 #ifndef LLVM_GMIR_PATTERNMATCH_H
13 #define LLVM_GMIR_PATTERNMATCH_H
14 
15 #include "llvm/ADT/APFloat.h"
16 #include "llvm/ADT/APInt.h"
19 
20 namespace llvm {
21 namespace MIPatternMatch {
22 
23 template <typename Reg, typename Pattern>
24 bool mi_match(Reg R, MachineRegisterInfo &MRI, Pattern &&P) {
25  return P.match(MRI, R);
26 }
27 
28 // TODO: Extend for N use.
29 template <typename SubPatternT> struct OneUse_match {
30  SubPatternT SubPat;
31  OneUse_match(const SubPatternT &SP) : SubPat(SP) {}
32 
33  template <typename OpTy>
34  bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
35  return MRI.hasOneUse(Reg) && SubPat.match(MRI, Reg);
36  }
37 };
38 
39 template <typename SubPat>
41  return SP;
42 }
43 
44 struct ConstantMatch {
45  int64_t &CR;
46  ConstantMatch(int64_t &C) : CR(C) {}
47  bool match(const MachineRegisterInfo &MRI, unsigned Reg) {
48  if (auto MaybeCst = getConstantVRegVal(Reg, MRI)) {
49  CR = *MaybeCst;
50  return true;
51  }
52  return false;
53  }
54 };
55 
56 inline ConstantMatch m_ICst(int64_t &Cst) { return ConstantMatch(Cst); }
57 
58 // TODO: Rework this for different kinds of MachineOperand.
59 // Currently assumes the Src for a match is a register.
60 // We might want to support taking in some MachineOperands and call getReg on
61 // that.
62 
64  bool match(const MachineRegisterInfo &MRI, unsigned Reg) { return true; }
66  return MO->isReg();
67  }
68 };
69 
71 
72 /// Matching combinators.
73 template <typename... Preds> struct And {
74  template <typename MatchSrc>
75  bool match(MachineRegisterInfo &MRI, MatchSrc &&src) {
76  return true;
77  }
78 };
79 
80 template <typename Pred, typename... Preds>
81 struct And<Pred, Preds...> : And<Preds...> {
82  Pred P;
83  And(Pred &&p, Preds &&... preds)
84  : And<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {
85  }
86  template <typename MatchSrc>
87  bool match(MachineRegisterInfo &MRI, MatchSrc &&src) {
88  return P.match(MRI, src) && And<Preds...>::match(MRI, src);
89  }
90 };
91 
92 template <typename... Preds> struct Or {
93  template <typename MatchSrc>
94  bool match(MachineRegisterInfo &MRI, MatchSrc &&src) {
95  return false;
96  }
97 };
98 
99 template <typename Pred, typename... Preds>
100 struct Or<Pred, Preds...> : Or<Preds...> {
101  Pred P;
102  Or(Pred &&p, Preds &&... preds)
103  : Or<Preds...>(std::forward<Preds>(preds)...), P(std::forward<Pred>(p)) {}
104  template <typename MatchSrc>
105  bool match(MachineRegisterInfo &MRI, MatchSrc &&src) {
106  return P.match(MRI, src) || Or<Preds...>::match(MRI, src);
107  }
108 };
109 
110 template <typename... Preds> And<Preds...> m_all_of(Preds &&... preds) {
111  return And<Preds...>(std::forward<Preds>(preds)...);
112 }
113 
114 template <typename... Preds> Or<Preds...> m_any_of(Preds &&... preds) {
115  return Or<Preds...>(std::forward<Preds>(preds)...);
116 }
117 
118 template <typename BindTy> struct bind_helper {
119  static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V) {
120  VR = V;
121  return true;
122  }
123 };
124 
125 template <> struct bind_helper<MachineInstr *> {
126  static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI,
127  unsigned Reg) {
128  MI = MRI.getVRegDef(Reg);
129  if (MI)
130  return true;
131  return false;
132  }
133 };
134 
135 template <> struct bind_helper<LLT> {
136  static bool bind(const MachineRegisterInfo &MRI, LLT &Ty, unsigned Reg) {
137  Ty = MRI.getType(Reg);
138  if (Ty.isValid())
139  return true;
140  return false;
141  }
142 };
143 
144 template <> struct bind_helper<const ConstantFP *> {
145  static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F,
146  unsigned Reg) {
147  F = getConstantFPVRegVal(Reg, MRI);
148  if (F)
149  return true;
150  return false;
151  }
152 };
153 
154 template <typename Class> struct bind_ty {
155  Class &VR;
156 
157  bind_ty(Class &V) : VR(V) {}
158 
159  template <typename ITy> bool match(const MachineRegisterInfo &MRI, ITy &&V) {
160  return bind_helper<Class>::bind(MRI, VR, V);
161  }
162 };
163 
164 inline bind_ty<unsigned> m_Reg(unsigned &R) { return R; }
166 inline bind_ty<LLT> m_Type(LLT &Ty) { return Ty; }
167 
168 // Helper for matching G_FCONSTANT
169 inline bind_ty<const ConstantFP *> m_GFCst(const ConstantFP *&C) { return C; }
170 
171 // General helper for all the binary generic MI such as G_ADD/G_SUB etc
172 template <typename LHS_P, typename RHS_P, unsigned Opcode,
173  bool Commutable = false>
175  LHS_P L;
176  RHS_P R;
177 
178  BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {}
179  template <typename OpTy> bool match(MachineRegisterInfo &MRI, OpTy &&Op) {
180  MachineInstr *TmpMI;
181  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
182  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
183  return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
184  R.match(MRI, TmpMI->getOperand(2).getReg())) ||
185  (Commutable && (R.match(MRI, TmpMI->getOperand(1).getReg()) &&
186  L.match(MRI, TmpMI->getOperand(2).getReg())));
187  }
188  }
189  return false;
190  }
191 };
192 
193 template <typename LHS, typename RHS>
195 m_GAdd(const LHS &L, const RHS &R) {
197 }
198 
199 template <typename LHS, typename RHS>
201  const RHS &R) {
203 }
204 
205 template <typename LHS, typename RHS>
207 m_GMul(const LHS &L, const RHS &R) {
209 }
210 
211 template <typename LHS, typename RHS>
213 m_GFAdd(const LHS &L, const RHS &R) {
215 }
216 
217 template <typename LHS, typename RHS>
219 m_GFMul(const LHS &L, const RHS &R) {
221 }
222 
223 template <typename LHS, typename RHS>
225 m_GFSub(const LHS &L, const RHS &R) {
227 }
228 
229 template <typename LHS, typename RHS>
231 m_GAnd(const LHS &L, const RHS &R) {
233 }
234 
235 template <typename LHS, typename RHS>
237  const RHS &R) {
239 }
240 
241 // Helper for unary instructions (G_[ZSA]EXT/G_TRUNC) etc
242 template <typename SrcTy, unsigned Opcode> struct UnaryOp_match {
243  SrcTy L;
244 
245  UnaryOp_match(const SrcTy &LHS) : L(LHS) {}
246  template <typename OpTy> bool match(MachineRegisterInfo &MRI, OpTy &&Op) {
247  MachineInstr *TmpMI;
248  if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
249  if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
250  return L.match(MRI, TmpMI->getOperand(1).getReg());
251  }
252  }
253  return false;
254  }
255 };
256 
257 template <typename SrcTy>
259 m_GAnyExt(const SrcTy &Src) {
261 }
262 
263 template <typename SrcTy>
266 }
267 
268 template <typename SrcTy>
271 }
272 
273 template <typename SrcTy>
276 }
277 
278 template <typename SrcTy>
281 }
282 
283 template <typename SrcTy>
285 m_GBitcast(const SrcTy &Src) {
287 }
288 
289 template <typename SrcTy>
291 m_GPtrToInt(const SrcTy &Src) {
293 }
294 
295 template <typename SrcTy>
297 m_GIntToPtr(const SrcTy &Src) {
299 }
300 
301 template <typename SrcTy>
303 m_GFPTrunc(const SrcTy &Src) {
305 }
306 
307 template <typename SrcTy>
310 }
311 
312 template <typename SrcTy>
315 }
316 
317 template <typename SrcTy>
319  return UnaryOp_match<SrcTy, TargetOpcode::COPY>(std::forward<SrcTy>(Src));
320 }
321 
322 // Helper for checking if a Reg is of specific type.
323 struct CheckType {
325  CheckType(const LLT &Ty) : Ty(Ty) {}
326 
327  bool match(MachineRegisterInfo &MRI, unsigned Reg) {
328  return MRI.getType(Reg) == Ty;
329  }
330 };
331 
332 inline CheckType m_SpecificType(LLT Ty) { return Ty; }
333 
334 } // namespace GMIPatternMatch
335 } // namespace llvm
336 
337 #endif
uint64_t CallInst * C
BinaryOp_match< LHS, RHS, TargetOpcode::G_FMUL, true > m_GFMul(const LHS &L, const RHS &R)
UnaryOp_match< SrcTy, TargetOpcode::G_INTTOPTR > m_GIntToPtr(const SrcTy &Src)
BinaryOp_match(const LHS_P &LHS, const RHS_P &RHS)
bool match(MachineRegisterInfo &MRI, MatchSrc &&src)
bind_ty< MachineInstr * > m_MInstr(MachineInstr *&MI)
UnaryOp_match< SrcTy, TargetOpcode::G_ANYEXT > m_GAnyExt(const SrcTy &Src)
static bool bind(const MachineRegisterInfo &MRI, BindTy &VR, BindTy &V)
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static bool bind(const MachineRegisterInfo &MRI, LLT &Ty, unsigned Reg)
const ConstantFP * getConstantFPVRegVal(unsigned VReg, const MachineRegisterInfo &MRI)
Definition: Utils.cpp:250
bool match(const MachineRegisterInfo &MRI, MachineOperand *MO)
unsigned getReg() const
getReg - Returns the register number.
unsigned Reg
UnaryOp_match< SrcTy, TargetOpcode::G_ZEXT > m_GZExt(const SrcTy &Src)
LLT getType(unsigned Reg) const
Get the low-level type of Reg or LLT{} if Reg is not a generic (target independent) virtual register...
bool match(const MachineRegisterInfo &MRI, ITy &&V)
F(f)
static bool bind(const MachineRegisterInfo &MRI, const ConstantFP *&F, unsigned Reg)
BinaryOp_match< LHS, RHS, TargetOpcode::G_ADD, true > m_GAdd(const LHS &L, const RHS &R)
Or< Preds... > m_any_of(Preds &&... preds)
Definition: BitVector.h:937
UnaryOp_match< SrcTy, TargetOpcode::G_FPTRUNC > m_GFPTrunc(const SrcTy &Src)
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:411
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:408
This file implements a class to represent arbitrary precision integral constant values and operations...
bool mi_match(Reg R, MachineRegisterInfo &MRI, Pattern &&P)
MachineInstr * getVRegDef(unsigned Reg) const
getVRegDef - Return the machine instr that defines the specified virtual register or null if none is ...
Matching combinators.
BinaryOp_match< LHS, RHS, TargetOpcode::G_FSUB, false > m_GFSub(const LHS &L, const RHS &R)
UnaryOp_match< SrcTy, TargetOpcode::COPY > m_Copy(SrcTy &&Src)
And< Preds... > m_all_of(Preds &&... preds)
bool match(MachineRegisterInfo &MRI, unsigned Reg)
UnaryOp_match< SrcTy, TargetOpcode::G_BITCAST > m_GBitcast(const SrcTy &Src)
bind_ty< LLT > m_Type(LLT &Ty)
bool match(MachineRegisterInfo &MRI, MatchSrc &&src)
UnaryOp_match< SrcTy, TargetOpcode::G_FPEXT > m_GFPExt(const SrcTy &Src)
OneUse_match< SubPat > m_OneUse(const SubPat &SP)
bool match(MachineRegisterInfo &MRI, MatchSrc &&src)
#define P(N)
OneUse_match(const SubPatternT &SP)
BinaryOp_match< LHS, RHS, TargetOpcode::G_AND, true > m_GAnd(const LHS &L, const RHS &R)
unsigned const MachineRegisterInfo * MRI
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
BinaryOp_match< LHS, RHS, TargetOpcode::G_SUB > m_GSub(const LHS &L, const RHS &R)
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:263
This file declares a class to represent arbitrary precision floating point values and provide a varie...
bool isValid() const
static bool bind(const MachineRegisterInfo &MRI, MachineInstr *&MI, unsigned Reg)
UnaryOp_match< SrcTy, TargetOpcode::G_FNEG > m_GFNeg(const SrcTy &Src)
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
MachineOperand class - Representation of each machine instruction operand.
CheckType m_SpecificType(LLT Ty)
Optional< int64_t > getConstantVRegVal(unsigned VReg, const MachineRegisterInfo &MRI)
If VReg is defined by a G_CONSTANT fits in int64_t returns it.
Definition: Utils.cpp:184
UnaryOp_match< SrcTy, TargetOpcode::G_SEXT > m_GSExt(const SrcTy &Src)
UnaryOp_match< SrcTy, TargetOpcode::G_TRUNC > m_GTrunc(const SrcTy &Src)
UnaryOp_match< SrcTy, TargetOpcode::G_FABS > m_GFabs(const SrcTy &Src)
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
BinaryOp_match< LHS, RHS, TargetOpcode::G_MUL, true > m_GMul(const LHS &L, const RHS &R)
Representation of each machine instruction.
Definition: MachineInstr.h:63
bool match(MachineRegisterInfo &MRI, OpTy &&Op)
bool hasOneUse(unsigned RegNo) const
hasOneUse - Return true if there is exactly one instruction using the specified register.
ConstantMatch m_ICst(int64_t &Cst)
bool match(const MachineRegisterInfo &MRI, unsigned Reg)
UnaryOp_match< SrcTy, TargetOpcode::G_PTRTOINT > m_GPtrToInt(const SrcTy &Src)
bind_ty< const ConstantFP * > m_GFCst(const ConstantFP *&C)
BinaryOp_match< LHS, RHS, TargetOpcode::G_FADD, true > m_GFAdd(const LHS &L, const RHS &R)
bool isReg() const
isReg - Tests if this is a MO_Register operand.
aarch64 promote const
operand_type_match m_Reg()
BinaryOp_match< LHS, RHS, TargetOpcode::G_OR, true > m_GOr(const LHS &L, const RHS &R)
IRTranslator LLVM IR MI
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:413
bool match(MachineRegisterInfo &MRI, MatchSrc &&src)
bool match(MachineRegisterInfo &MRI, OpTy &&Op)