LLVM  12.0.0git
MSP430InstPrinter.cpp
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1 //===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class prints an MSP430 MCInst to a .s file.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MSP430InstPrinter.h"
14 #include "MSP430.h"
15 #include "llvm/MC/MCAsmInfo.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
21 using namespace llvm;
22 
23 #define DEBUG_TYPE "asm-printer"
24 
25 // Include the auto-generated portion of the assembly writer.
26 #define PRINT_ALIAS_INSTR
27 #include "MSP430GenAsmWriter.inc"
28 
29 void MSP430InstPrinter::printInst(const MCInst *MI, uint64_t Address,
30  StringRef Annot, const MCSubtargetInfo &STI,
31  raw_ostream &O) {
32  if (!printAliasInstr(MI, Address, O))
33  printInstruction(MI, Address, O);
34  printAnnotation(O, Annot);
35 }
36 
37 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
38  raw_ostream &O) {
39  const MCOperand &Op = MI->getOperand(OpNo);
40  if (Op.isImm()) {
41  int64_t Imm = Op.getImm() * 2 + 2;
42  O << "$";
43  if (Imm >= 0)
44  O << '+';
45  O << Imm;
46  } else {
47  assert(Op.isExpr() && "unknown pcrel immediate operand");
48  Op.getExpr()->print(O, &MAI);
49  }
50 }
51 
52 void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
53  raw_ostream &O, const char *Modifier) {
54  assert((Modifier == nullptr || Modifier[0] == 0) && "No modifiers supported");
55  const MCOperand &Op = MI->getOperand(OpNo);
56  if (Op.isReg()) {
57  O << getRegisterName(Op.getReg());
58  } else if (Op.isImm()) {
59  O << '#' << Op.getImm();
60  } else {
61  assert(Op.isExpr() && "unknown operand kind in printOperand");
62  O << '#';
63  Op.getExpr()->print(O, &MAI);
64  }
65 }
66 
67 void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
68  raw_ostream &O,
69  const char *Modifier) {
70  const MCOperand &Base = MI->getOperand(OpNo);
71  const MCOperand &Disp = MI->getOperand(OpNo+1);
72 
73  // Print displacement first
74 
75  // If the global address expression is a part of displacement field with a
76  // register base, we should not emit any prefix symbol here, e.g.
77  // mov.w &foo, r1
78  // vs
79  // mov.w glb(r1), r2
80  // Otherwise (!) msp430-as will silently miscompile the output :(
81  if (Base.getReg() == MSP430::SR)
82  O << '&';
83 
84  if (Disp.isExpr())
85  Disp.getExpr()->print(O, &MAI);
86  else {
87  assert(Disp.isImm() && "Expected immediate in displacement field");
88  O << Disp.getImm();
89  }
90 
91  // Print register base field
92  if ((Base.getReg() != MSP430::SR) &&
93  (Base.getReg() != MSP430::PC))
94  O << '(' << getRegisterName(Base.getReg()) << ')';
95 }
96 
97 void MSP430InstPrinter::printIndRegOperand(const MCInst *MI, unsigned OpNo,
98  raw_ostream &O) {
99  const MCOperand &Base = MI->getOperand(OpNo);
100  O << "@" << getRegisterName(Base.getReg());
101 }
102 
103 void MSP430InstPrinter::printPostIndRegOperand(const MCInst *MI, unsigned OpNo,
104  raw_ostream &O) {
105  const MCOperand &Base = MI->getOperand(OpNo);
106  O << "@" << getRegisterName(Base.getReg()) << "+";
107 }
108 
109 void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
110  raw_ostream &O) {
111  unsigned CC = MI->getOperand(OpNo).getImm();
112 
113  switch (CC) {
114  default:
115  llvm_unreachable("Unsupported CC code");
116  case MSP430CC::COND_E:
117  O << "eq";
118  break;
119  case MSP430CC::COND_NE:
120  O << "ne";
121  break;
122  case MSP430CC::COND_HS:
123  O << "hs";
124  break;
125  case MSP430CC::COND_LO:
126  O << "lo";
127  break;
128  case MSP430CC::COND_GE:
129  O << "ge";
130  break;
131  case MSP430CC::COND_L:
132  O << 'l';
133  break;
134  case MSP430CC::COND_N:
135  O << 'n';
136  break;
137  }
138 }
bool isImm() const
Definition: MCInst.h:58
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static const char * getRegisterName(unsigned RegNo)
bool isReg() const
Definition: MCInst.h:57
void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O)
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:64
void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, const MCSubtargetInfo &STI, raw_ostream &O) override
Print the specified MCInst to the specified raw_ostream.
const MCExpr * getExpr() const
Definition: MCInst.h:95
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
int64_t getImm() const
Definition: MCInst.h:75
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
Definition: MCExpr.cpp:42
bool isExpr() const
Definition: MCInst.h:60
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:180
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:48
Generic base class for all target subtargets.
bool printAliasInstr(const MCInst *MI, uint64_t Address, raw_ostream &O)
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:57
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34