LLVM  9.0.0svn
MSP430InstPrinter.cpp
Go to the documentation of this file.
1 //===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class prints an MSP430 MCInst to a .s file.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "MSP430InstPrinter.h"
14 #include "MSP430.h"
15 #include "llvm/MC/MCAsmInfo.h"
16 #include "llvm/MC/MCExpr.h"
17 #include "llvm/MC/MCInst.h"
18 #include "llvm/MC/MCInstrInfo.h"
21 using namespace llvm;
22 
23 #define DEBUG_TYPE "asm-printer"
24 
25 // Include the auto-generated portion of the assembly writer.
26 #define PRINT_ALIAS_INSTR
27 #include "MSP430GenAsmWriter.inc"
28 
30  StringRef Annot, const MCSubtargetInfo &STI) {
31  if (!printAliasInstr(MI, O))
32  printInstruction(MI, O);
33  printAnnotation(O, Annot);
34 }
35 
36 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
37  raw_ostream &O) {
38  const MCOperand &Op = MI->getOperand(OpNo);
39  if (Op.isImm()) {
40  int64_t Imm = Op.getImm() * 2 + 2;
41  O << "$";
42  if (Imm >= 0)
43  O << '+';
44  O << Imm;
45  } else {
46  assert(Op.isExpr() && "unknown pcrel immediate operand");
47  Op.getExpr()->print(O, &MAI);
48  }
49 }
50 
51 void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
52  raw_ostream &O, const char *Modifier) {
53  assert((Modifier == nullptr || Modifier[0] == 0) && "No modifiers supported");
54  const MCOperand &Op = MI->getOperand(OpNo);
55  if (Op.isReg()) {
56  O << getRegisterName(Op.getReg());
57  } else if (Op.isImm()) {
58  O << '#' << Op.getImm();
59  } else {
60  assert(Op.isExpr() && "unknown operand kind in printOperand");
61  O << '#';
62  Op.getExpr()->print(O, &MAI);
63  }
64 }
65 
66 void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
67  raw_ostream &O,
68  const char *Modifier) {
69  const MCOperand &Base = MI->getOperand(OpNo);
70  const MCOperand &Disp = MI->getOperand(OpNo+1);
71 
72  // Print displacement first
73 
74  // If the global address expression is a part of displacement field with a
75  // register base, we should not emit any prefix symbol here, e.g.
76  // mov.w &foo, r1
77  // vs
78  // mov.w glb(r1), r2
79  // Otherwise (!) msp430-as will silently miscompile the output :(
80  if (Base.getReg() == MSP430::SR)
81  O << '&';
82 
83  if (Disp.isExpr())
84  Disp.getExpr()->print(O, &MAI);
85  else {
86  assert(Disp.isImm() && "Expected immediate in displacement field");
87  O << Disp.getImm();
88  }
89 
90  // Print register base field
91  if ((Base.getReg() != MSP430::SR) &&
92  (Base.getReg() != MSP430::PC))
93  O << '(' << getRegisterName(Base.getReg()) << ')';
94 }
95 
96 void MSP430InstPrinter::printIndRegOperand(const MCInst *MI, unsigned OpNo,
97  raw_ostream &O) {
98  const MCOperand &Base = MI->getOperand(OpNo);
99  O << "@" << getRegisterName(Base.getReg());
100 }
101 
102 void MSP430InstPrinter::printPostIndRegOperand(const MCInst *MI, unsigned OpNo,
103  raw_ostream &O) {
104  const MCOperand &Base = MI->getOperand(OpNo);
105  O << "@" << getRegisterName(Base.getReg()) << "+";
106 }
107 
108 void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
109  raw_ostream &O) {
110  unsigned CC = MI->getOperand(OpNo).getImm();
111 
112  switch (CC) {
113  default:
114  llvm_unreachable("Unsupported CC code");
115  case MSP430CC::COND_E:
116  O << "eq";
117  break;
118  case MSP430CC::COND_NE:
119  O << "ne";
120  break;
121  case MSP430CC::COND_HS:
122  O << "hs";
123  break;
124  case MSP430CC::COND_LO:
125  O << "lo";
126  break;
127  case MSP430CC::COND_GE:
128  O << "ge";
129  break;
130  case MSP430CC::COND_L:
131  O << 'l';
132  break;
133  case MSP430CC::COND_N:
134  O << 'n';
135  break;
136  }
137 }
bool printAliasInstr(const MCInst *MI, raw_ostream &O)
bool isImm() const
Definition: MCInst.h:58
void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot, const MCSubtargetInfo &STI) override
Print the specified MCInst to the specified raw_ostream.
This class represents lattice values for constants.
Definition: AllocatorList.h:23
static const char * getRegisterName(unsigned RegNo)
bool isReg() const
Definition: MCInst.h:57
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:64
const MCExpr * getExpr() const
Definition: MCInst.h:95
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
int64_t getImm() const
Definition: MCInst.h:75
void print(raw_ostream &OS, const MCAsmInfo *MAI, bool InParens=false) const
Definition: MCExpr.cpp:41
bool isExpr() const
Definition: MCInst.h:60
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:179
const MCAsmInfo & MAI
Definition: MCInstPrinter.h:45
void printInstruction(const MCInst *MI, raw_ostream &O)
Generic base class for all target subtargets.
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
void printAnnotation(raw_ostream &OS, StringRef Annot)
Utility function for printing annotations.
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
IRTranslator LLVM IR MI
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34