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MachineIRBuilder.h
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1 //===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.h - MIBuilder --*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file declares the MachineIRBuilder class.
11 /// This is a helper class to build MachineInstr.
12 //===----------------------------------------------------------------------===//
13 
14 #ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
15 #define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
16 
18 
23 #include "llvm/IR/Constants.h"
24 #include "llvm/IR/DebugLoc.h"
25 
26 #include <queue>
27 
28 namespace llvm {
29 
30 // Forward declarations.
31 class MachineFunction;
32 class MachineInstr;
33 class TargetInstrInfo;
34 
35 /// Helper class to build MachineInstr.
36 /// It keeps internally the insertion point and debug location for all
37 /// the new instructions we want to create.
38 /// This information can be modify via the related setters.
40  /// MachineFunction under construction.
41  MachineFunction *MF;
42  /// Information used to access the description of the opcodes.
43  const TargetInstrInfo *TII;
44  /// Information used to verify types are consistent and to create virtual registers.
46  /// Debug location to be set to any instruction we create.
47  DebugLoc DL;
48 
49  /// \name Fields describing the insertion point.
50  /// @{
51  MachineBasicBlock *MBB;
53  /// @}
54 
55  std::function<void(MachineInstr *)> InsertedInstr;
56 
57  const TargetInstrInfo &getTII() {
58  assert(TII && "TargetInstrInfo is not set");
59  return *TII;
60  }
61 
62  void validateTruncExt(unsigned Dst, unsigned Src, bool IsExtend);
63  MachineInstrBuilder buildBinaryOp(unsigned Opcode, unsigned Res, unsigned Op0, unsigned Op1);
64 
65  unsigned getDestFromArg(unsigned Reg) { return Reg; }
66  unsigned getDestFromArg(LLT Ty) {
68  }
69  unsigned getDestFromArg(const TargetRegisterClass *RC) {
70  return getMF().getRegInfo().createVirtualRegister(RC);
71  }
72 
73  void addUseFromArg(MachineInstrBuilder &MIB, unsigned Reg) {
74  MIB.addUse(Reg);
75  }
76 
77  void addUseFromArg(MachineInstrBuilder &MIB, const MachineInstrBuilder &UseMIB) {
78  MIB.addUse(UseMIB->getOperand(0).getReg());
79  }
80 
81  void addUsesFromArgs(MachineInstrBuilder &MIB) { }
82  template<typename UseArgTy, typename ... UseArgsTy>
83  void addUsesFromArgs(MachineInstrBuilder &MIB, UseArgTy &&Arg1, UseArgsTy &&... Args) {
84  addUseFromArg(MIB, Arg1);
85  addUsesFromArgs(MIB, std::forward<UseArgsTy>(Args)...);
86  }
87  unsigned getRegFromArg(unsigned Reg) { return Reg; }
88  unsigned getRegFromArg(const MachineInstrBuilder &MIB) {
89  return MIB->getOperand(0).getReg();
90  }
91 
92 public:
93  /// Some constructors for easy use.
94  MachineIRBuilder() = default;
97  setInstr(MI);
98  }
99 
100  /// Getter for the function we currently build.
102  assert(MF && "MachineFunction is not set");
103  return *MF;
104  }
105 
106  /// Getter for the basic block we currently build.
108  assert(MBB && "MachineBasicBlock is not set");
109  return *MBB;
110  }
111 
112  /// Current insertion point for new instructions.
114  return II;
115  }
116 
117  /// Set the insertion point before the specified position.
118  /// \pre MBB must be in getMF().
119  /// \pre II must be a valid iterator in MBB.
121  /// @}
122 
123  /// \name Setters for the insertion point.
124  /// @{
125  /// Set the MachineFunction where to build instructions.
126  void setMF(MachineFunction &);
127 
128  /// Set the insertion point to the end of \p MBB.
129  /// \pre \p MBB must be contained by getMF().
130  void setMBB(MachineBasicBlock &MBB);
131 
132  /// Set the insertion point to before MI.
133  /// \pre MI must be in getMF().
134  void setInstr(MachineInstr &MI);
135  /// @}
136 
137  /// \name Control where instructions we create are recorded (typically for
138  /// visiting again later during legalization).
139  /// @{
140  void recordInsertions(std::function<void(MachineInstr *)> InsertedInstr);
142  /// @}
143 
144  /// Set the debug location to \p DL for all the next build instructions.
145  void setDebugLoc(const DebugLoc &DL) { this->DL = DL; }
146 
147  /// Get the current instruction's debug location.
148  DebugLoc getDebugLoc() { return DL; }
149 
150  /// Build and insert <empty> = \p Opcode <empty>.
151  /// The insertion point is the one set by the last call of either
152  /// setBasicBlock or setMI.
153  ///
154  /// \pre setBasicBlock or setMI must have been called.
155  ///
156  /// \return a MachineInstrBuilder for the newly created instruction.
157  MachineInstrBuilder buildInstr(unsigned Opcode);
158 
159  /// DAG like Generic method for building arbitrary instructions as above.
160  /// \Opc opcode for the instruction.
161  /// \Ty Either LLT/TargetRegisterClass/unsigned types for Dst
162  /// \Args Variadic list of uses of types(unsigned/MachineInstrBuilder)
163  /// Uses of type MachineInstrBuilder will perform
164  /// getOperand(0).getReg() to convert to register.
165  template <typename DstTy, typename... UseArgsTy>
166  MachineInstrBuilder buildInstr(unsigned Opc, DstTy &&Ty,
167  UseArgsTy &&... Args) {
168  auto MIB = buildInstr(Opc).addDef(getDestFromArg(Ty));
169  addUsesFromArgs(MIB, std::forward<UseArgsTy>(Args)...);
170  return MIB;
171  }
172 
173  /// Build but don't insert <empty> = \p Opcode <empty>.
174  ///
175  /// \pre setMF, setBasicBlock or setMI must have been called.
176  ///
177  /// \return a MachineInstrBuilder for the newly created instruction.
178  MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);
179 
180  /// Insert an existing instruction at the insertion point.
182 
183  /// Build and insert a DBG_VALUE instruction expressing the fact that the
184  /// associated \p Variable lives in \p Reg (suitably modified by \p Expr).
185  MachineInstrBuilder buildDirectDbgValue(unsigned Reg, const MDNode *Variable,
186  const MDNode *Expr);
187 
188  /// Build and insert a DBG_VALUE instruction expressing the fact that the
189  /// associated \p Variable lives in memory at \p Reg (suitably modified by \p
190  /// Expr).
192  const MDNode *Variable,
193  const MDNode *Expr);
194 
195  /// Build and insert a DBG_VALUE instruction expressing the fact that the
196  /// associated \p Variable lives in the stack slot specified by \p FI
197  /// (suitably modified by \p Expr).
198  MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable,
199  const MDNode *Expr);
200 
201  /// Build and insert a DBG_VALUE instructions specifying that \p Variable is
202  /// given by \p C (suitably modified by \p Expr).
204  const MDNode *Variable,
205  const MDNode *Expr);
206 
207  /// Build and insert \p Res = G_FRAME_INDEX \p Idx
208  ///
209  /// G_FRAME_INDEX materializes the address of an alloca value or other
210  /// stack-based object.
211  ///
212  /// \pre setBasicBlock or setMI must have been called.
213  /// \pre \p Res must be a generic virtual register with pointer type.
214  ///
215  /// \return a MachineInstrBuilder for the newly created instruction.
216  MachineInstrBuilder buildFrameIndex(unsigned Res, int Idx);
217 
218  /// Build and insert \p Res = G_GLOBAL_VALUE \p GV
219  ///
220  /// G_GLOBAL_VALUE materializes the address of the specified global
221  /// into \p Res.
222  ///
223  /// \pre setBasicBlock or setMI must have been called.
224  /// \pre \p Res must be a generic virtual register with pointer type
225  /// in the same address space as \p GV.
226  ///
227  /// \return a MachineInstrBuilder for the newly created instruction.
228  MachineInstrBuilder buildGlobalValue(unsigned Res, const GlobalValue *GV);
229 
230  /// Build and insert \p Res = G_ADD \p Op0, \p Op1
231  ///
232  /// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
233  /// truncated to their width.
234  ///
235  /// \pre setBasicBlock or setMI must have been called.
236  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
237  /// with the same (scalar or vector) type).
238  ///
239  /// \return a MachineInstrBuilder for the newly created instruction.
240  MachineInstrBuilder buildAdd(unsigned Res, unsigned Op0,
241  unsigned Op1);
242  template <typename DstTy, typename... UseArgsTy>
243  MachineInstrBuilder buildAdd(DstTy &&Ty, UseArgsTy &&... UseArgs) {
244  unsigned Res = getDestFromArg(Ty);
245  return buildAdd(Res, (getRegFromArg(UseArgs))...);
246  }
247 
248  /// Build and insert \p Res = G_SUB \p Op0, \p Op1
249  ///
250  /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
251  /// truncated to their width.
252  ///
253  /// \pre setBasicBlock or setMI must have been called.
254  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
255  /// with the same (scalar or vector) type).
256  ///
257  /// \return a MachineInstrBuilder for the newly created instruction.
258  template <typename DstTy, typename... UseArgsTy>
259  MachineInstrBuilder buildSub(DstTy &&Ty, UseArgsTy &&... UseArgs) {
260  unsigned Res = getDestFromArg(Ty);
261  return buildSub(Res, (getRegFromArg(UseArgs))...);
262  }
263  MachineInstrBuilder buildSub(unsigned Res, unsigned Op0,
264  unsigned Op1);
265 
266  /// Build and insert \p Res = G_MUL \p Op0, \p Op1
267  ///
268  /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
269  /// truncated to their width.
270  ///
271  /// \pre setBasicBlock or setMI must have been called.
272  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
273  /// with the same (scalar or vector) type).
274  ///
275  /// \return a MachineInstrBuilder for the newly created instruction.
276  template <typename DstTy, typename... UseArgsTy>
277  MachineInstrBuilder buildMul(DstTy &&Ty, UseArgsTy &&... UseArgs) {
278  unsigned Res = getDestFromArg(Ty);
279  return buildMul(Res, (getRegFromArg(UseArgs))...);
280  }
281  MachineInstrBuilder buildMul(unsigned Res, unsigned Op0,
282  unsigned Op1);
283 
284  /// Build and insert \p Res = G_GEP \p Op0, \p Op1
285  ///
286  /// G_GEP adds \p Op1 bytes to the pointer specified by \p Op0,
287  /// storing the resulting pointer in \p Res.
288  ///
289  /// \pre setBasicBlock or setMI must have been called.
290  /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
291  /// type.
292  /// \pre \p Op1 must be a generic virtual register with scalar type.
293  ///
294  /// \return a MachineInstrBuilder for the newly created instruction.
295  MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0,
296  unsigned Op1);
297 
298  /// Materialize and insert \p Res = G_GEP \p Op0, (G_CONSTANT \p Value)
299  ///
300  /// G_GEP adds \p Value bytes to the pointer specified by \p Op0,
301  /// storing the resulting pointer in \p Res. If \p Value is zero then no
302  /// G_GEP or G_CONSTANT will be created and \pre Op0 will be assigned to
303  /// \p Res.
304  ///
305  /// \pre setBasicBlock or setMI must have been called.
306  /// \pre \p Op0 must be a generic virtual register with pointer type.
307  /// \pre \p ValueTy must be a scalar type.
308  /// \pre \p Res must be 0. This is to detect confusion between
309  /// materializeGEP() and buildGEP().
310  /// \post \p Res will either be a new generic virtual register of the same
311  /// type as \p Op0 or \p Op0 itself.
312  ///
313  /// \return a MachineInstrBuilder for the newly created instruction.
314  Optional<MachineInstrBuilder> materializeGEP(unsigned &Res, unsigned Op0,
315  const LLT &ValueTy,
316  uint64_t Value);
317 
318  /// Build and insert \p Res = G_PTR_MASK \p Op0, \p NumBits
319  ///
320  /// G_PTR_MASK clears the low bits of a pointer operand without destroying its
321  /// pointer properties. This has the effect of rounding the address *down* to
322  /// a specified alignment in bits.
323  ///
324  /// \pre setBasicBlock or setMI must have been called.
325  /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
326  /// type.
327  /// \pre \p NumBits must be an integer representing the number of low bits to
328  /// be cleared in \p Op0.
329  ///
330  /// \return a MachineInstrBuilder for the newly created instruction.
331  MachineInstrBuilder buildPtrMask(unsigned Res, unsigned Op0,
332  uint32_t NumBits);
333 
334  /// Build and insert \p Res, \p CarryOut = G_UADDE \p Op0,
335  /// \p Op1, \p CarryIn
336  ///
337  /// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
338  /// width) and sets \p CarryOut to 1 if the result overflowed in unsigned
339  /// arithmetic.
340  ///
341  /// \pre setBasicBlock or setMI must have been called.
342  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
343  /// with the same scalar type.
344  /// \pre \p CarryOut and \p CarryIn must be generic virtual
345  /// registers with the same scalar type (typically s1)
346  ///
347  /// \return The newly created instruction.
348  MachineInstrBuilder buildUAdde(unsigned Res, unsigned CarryOut, unsigned Op0,
349  unsigned Op1, unsigned CarryIn);
350 
351  /// Build and insert \p Res = G_AND \p Op0, \p Op1
352  ///
353  /// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p
354  /// Op1.
355  ///
356  /// \pre setBasicBlock or setMI must have been called.
357  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
358  /// with the same (scalar or vector) type).
359  ///
360  /// \return a MachineInstrBuilder for the newly created instruction.
361  template <typename DstTy, typename... UseArgsTy>
362  MachineInstrBuilder buildAnd(DstTy &&Dst, UseArgsTy &&... UseArgs) {
363  return buildAnd(getDestFromArg(Dst), getRegFromArg(UseArgs)...);
364  }
365  MachineInstrBuilder buildAnd(unsigned Res, unsigned Op0,
366  unsigned Op1);
367 
368  /// Build and insert \p Res = G_OR \p Op0, \p Op1
369  ///
370  /// G_OR sets \p Res to the bitwise or of integer parameters \p Op0 and \p
371  /// Op1.
372  ///
373  /// \pre setBasicBlock or setMI must have been called.
374  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
375  /// with the same (scalar or vector) type).
376  ///
377  /// \return a MachineInstrBuilder for the newly created instruction.
378  template <typename DstTy, typename... UseArgsTy>
379  MachineInstrBuilder buildOr(DstTy &&Dst, UseArgsTy &&... UseArgs) {
380  return buildOr(getDestFromArg(Dst), getRegFromArg(UseArgs)...);
381  }
382  MachineInstrBuilder buildOr(unsigned Res, unsigned Op0, unsigned Op1);
383 
384  /// Build and insert \p Res = G_ANYEXT \p Op0
385  ///
386  /// G_ANYEXT produces a register of the specified width, with bits 0 to
387  /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
388  /// (i.e. this is neither zero nor sign-extension). For a vector register,
389  /// each element is extended individually.
390  ///
391  /// \pre setBasicBlock or setMI must have been called.
392  /// \pre \p Res must be a generic virtual register with scalar or vector type.
393  /// \pre \p Op must be a generic virtual register with scalar or vector type.
394  /// \pre \p Op must be smaller than \p Res
395  ///
396  /// \return The newly created instruction.
397 
398  MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
399  template <typename DstType, typename ArgType>
400  MachineInstrBuilder buildAnyExt(DstType &&Res, ArgType &&Arg) {
401  return buildAnyExt(getDestFromArg(Res), getRegFromArg(Arg));
402  }
403 
404  /// Build and insert \p Res = G_SEXT \p Op
405  ///
406  /// G_SEXT produces a register of the specified width, with bits 0 to
407  /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
408  /// high bit of \p Op (i.e. 2s-complement sign extended).
409  ///
410  /// \pre setBasicBlock or setMI must have been called.
411  /// \pre \p Res must be a generic virtual register with scalar or vector type.
412  /// \pre \p Op must be a generic virtual register with scalar or vector type.
413  /// \pre \p Op must be smaller than \p Res
414  ///
415  /// \return The newly created instruction.
416  template <typename DstType, typename ArgType>
417  MachineInstrBuilder buildSExt(DstType &&Res, ArgType &&Arg) {
418  return buildSExt(getDestFromArg(Res), getRegFromArg(Arg));
419  }
420  MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
421 
422  /// Build and insert \p Res = G_ZEXT \p Op
423  ///
424  /// G_ZEXT produces a register of the specified width, with bits 0 to
425  /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are 0. For a vector
426  /// register, each element is extended individually.
427  ///
428  /// \pre setBasicBlock or setMI must have been called.
429  /// \pre \p Res must be a generic virtual register with scalar or vector type.
430  /// \pre \p Op must be a generic virtual register with scalar or vector type.
431  /// \pre \p Op must be smaller than \p Res
432  ///
433  /// \return The newly created instruction.
434  template <typename DstType, typename ArgType>
435  MachineInstrBuilder buildZExt(DstType &&Res, ArgType &&Arg) {
436  return buildZExt(getDestFromArg(Res), getRegFromArg(Arg));
437  }
438  MachineInstrBuilder buildZExt(unsigned Res, unsigned Op);
439 
440  /// Build and insert \p Res = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
441  /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
442  /// ///
443  /// \pre setBasicBlock or setMI must have been called.
444  /// \pre \p Res must be a generic virtual register with scalar or vector type.
445  /// \pre \p Op must be a generic virtual register with scalar or vector type.
446  ///
447  /// \return The newly created instruction.
448  template <typename DstTy, typename UseArgTy>
449  MachineInstrBuilder buildSExtOrTrunc(DstTy &&Dst, UseArgTy &&Use) {
450  return buildSExtOrTrunc(getDestFromArg(Dst), getRegFromArg(Use));
451  }
452  MachineInstrBuilder buildSExtOrTrunc(unsigned Res, unsigned Op);
453 
454  /// Build and insert \p Res = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
455  /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
456  /// ///
457  /// \pre setBasicBlock or setMI must have been called.
458  /// \pre \p Res must be a generic virtual register with scalar or vector type.
459  /// \pre \p Op must be a generic virtual register with scalar or vector type.
460  ///
461  /// \return The newly created instruction.
462  template <typename DstTy, typename UseArgTy>
463  MachineInstrBuilder buildZExtOrTrunc(DstTy &&Dst, UseArgTy &&Use) {
464  return buildZExtOrTrunc(getDestFromArg(Dst), getRegFromArg(Use));
465  }
466  MachineInstrBuilder buildZExtOrTrunc(unsigned Res, unsigned Op);
467 
468  // Build and insert \p Res = G_ANYEXT \p Op, \p Res = G_TRUNC \p Op, or
469  /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
470  /// ///
471  /// \pre setBasicBlock or setMI must have been called.
472  /// \pre \p Res must be a generic virtual register with scalar or vector type.
473  /// \pre \p Op must be a generic virtual register with scalar or vector type.
474  ///
475  /// \return The newly created instruction.
476  template <typename DstTy, typename UseArgTy>
477  MachineInstrBuilder buildAnyExtOrTrunc(DstTy &&Dst, UseArgTy &&Use) {
478  return buildAnyExtOrTrunc(getDestFromArg(Dst), getRegFromArg(Use));
479  }
480  MachineInstrBuilder buildAnyExtOrTrunc(unsigned Res, unsigned Op);
481 
482  /// Build and insert \p Res = \p ExtOpc, \p Res = G_TRUNC \p
483  /// Op, or \p Res = COPY \p Op depending on the differing sizes of \p Res and
484  /// \p Op.
485  /// ///
486  /// \pre setBasicBlock or setMI must have been called.
487  /// \pre \p Res must be a generic virtual register with scalar or vector type.
488  /// \pre \p Op must be a generic virtual register with scalar or vector type.
489  ///
490  /// \return The newly created instruction.
491  MachineInstrBuilder buildExtOrTrunc(unsigned ExtOpc, unsigned Res,
492  unsigned Op);
493 
494  /// Build and insert an appropriate cast between two registers of equal size.
495  template <typename DstType, typename ArgType>
496  MachineInstrBuilder buildCast(DstType &&Res, ArgType &&Arg) {
497  return buildCast(getDestFromArg(Res), getRegFromArg(Arg));
498  }
499  MachineInstrBuilder buildCast(unsigned Dst, unsigned Src);
500 
501  /// Build and insert G_BR \p Dest
502  ///
503  /// G_BR is an unconditional branch to \p Dest.
504  ///
505  /// \pre setBasicBlock or setMI must have been called.
506  ///
507  /// \return a MachineInstrBuilder for the newly created instruction.
509 
510  /// Build and insert G_BRCOND \p Tst, \p Dest
511  ///
512  /// G_BRCOND is a conditional branch to \p Dest.
513  ///
514  /// \pre setBasicBlock or setMI must have been called.
515  /// \pre \p Tst must be a generic virtual register with scalar
516  /// type. At the beginning of legalization, this will be a single
517  /// bit (s1). Targets with interesting flags registers may change
518  /// this. For a wider type, whether the branch is taken must only
519  /// depend on bit 0 (for now).
520  ///
521  /// \return The newly created instruction.
523 
524  /// Build and insert G_BRINDIRECT \p Tgt
525  ///
526  /// G_BRINDIRECT is an indirect branch to \p Tgt.
527  ///
528  /// \pre setBasicBlock or setMI must have been called.
529  /// \pre \p Tgt must be a generic virtual register with pointer type.
530  ///
531  /// \return a MachineInstrBuilder for the newly created instruction.
532  MachineInstrBuilder buildBrIndirect(unsigned Tgt);
533 
534  /// Build and insert \p Res = G_CONSTANT \p Val
535  ///
536  /// G_CONSTANT is an integer constant with the specified size and value. \p
537  /// Val will be extended or truncated to the size of \p Reg.
538  ///
539  /// \pre setBasicBlock or setMI must have been called.
540  /// \pre \p Res must be a generic virtual register with scalar or pointer
541  /// type.
542  ///
543  /// \return The newly created instruction.
544  MachineInstrBuilder buildConstant(unsigned Res, const ConstantInt &Val);
545 
546  /// Build and insert \p Res = G_CONSTANT \p Val
547  ///
548  /// G_CONSTANT is an integer constant with the specified size and value.
549  ///
550  /// \pre setBasicBlock or setMI must have been called.
551  /// \pre \p Res must be a generic virtual register with scalar type.
552  ///
553  /// \return The newly created instruction.
554  MachineInstrBuilder buildConstant(unsigned Res, int64_t Val);
555 
556  template <typename DstType>
557  MachineInstrBuilder buildConstant(DstType &&Res, int64_t Val) {
558  return buildConstant(getDestFromArg(Res), Val);
559  }
560  /// Build and insert \p Res = G_FCONSTANT \p Val
561  ///
562  /// G_FCONSTANT is a floating-point constant with the specified size and
563  /// value.
564  ///
565  /// \pre setBasicBlock or setMI must have been called.
566  /// \pre \p Res must be a generic virtual register with scalar type.
567  ///
568  /// \return The newly created instruction.
569  template <typename DstType>
570  MachineInstrBuilder buildFConstant(DstType &&Res, const ConstantFP &Val) {
571  return buildFConstant(getDestFromArg(Res), Val);
572  }
573  MachineInstrBuilder buildFConstant(unsigned Res, const ConstantFP &Val);
574 
575  /// Build and insert \p Res = COPY Op
576  ///
577  /// Register-to-register COPY sets \p Res to \p Op.
578  ///
579  /// \pre setBasicBlock or setMI must have been called.
580  ///
581  /// \return a MachineInstrBuilder for the newly created instruction.
582  MachineInstrBuilder buildCopy(unsigned Res, unsigned Op);
583  template <typename DstType, typename SrcType>
584  MachineInstrBuilder buildCopy(DstType &&Res, SrcType &&Src) {
585  return buildCopy(getDestFromArg(Res), getRegFromArg(Src));
586  }
587 
588  /// Build and insert `Res = G_LOAD Addr, MMO`.
589  ///
590  /// Loads the value stored at \p Addr. Puts the result in \p Res.
591  ///
592  /// \pre setBasicBlock or setMI must have been called.
593  /// \pre \p Res must be a generic virtual register.
594  /// \pre \p Addr must be a generic virtual register with pointer type.
595  ///
596  /// \return a MachineInstrBuilder for the newly created instruction.
597  MachineInstrBuilder buildLoad(unsigned Res, unsigned Addr,
598  MachineMemOperand &MMO);
599 
600  /// Build and insert `G_STORE Val, Addr, MMO`.
601  ///
602  /// Stores the value \p Val to \p Addr.
603  ///
604  /// \pre setBasicBlock or setMI must have been called.
605  /// \pre \p Val must be a generic virtual register.
606  /// \pre \p Addr must be a generic virtual register with pointer type.
607  ///
608  /// \return a MachineInstrBuilder for the newly created instruction.
609  MachineInstrBuilder buildStore(unsigned Val, unsigned Addr,
610  MachineMemOperand &MMO);
611 
612  /// Build and insert `Res0, ... = G_EXTRACT Src, Idx0`.
613  ///
614  /// \pre setBasicBlock or setMI must have been called.
615  /// \pre \p Res and \p Src must be generic virtual registers.
616  ///
617  /// \return a MachineInstrBuilder for the newly created instruction.
618  MachineInstrBuilder buildExtract(unsigned Res, unsigned Src, uint64_t Index);
619 
620  /// Build and insert \p Res = IMPLICIT_DEF.
621  template <typename DstType> MachineInstrBuilder buildUndef(DstType &&Res) {
622  return buildUndef(getDestFromArg(Res));
623  }
624  MachineInstrBuilder buildUndef(unsigned Dst);
625 
626  /// Build and insert instructions to put \p Ops together at the specified p
627  /// Indices to form a larger register.
628  ///
629  /// If the types of the input registers are uniform and cover the entirity of
630  /// \p Res then a G_MERGE_VALUES will be produced. Otherwise an IMPLICIT_DEF
631  /// followed by a sequence of G_INSERT instructions.
632  ///
633  /// \pre setBasicBlock or setMI must have been called.
634  /// \pre The final element of the sequence must not extend past the end of the
635  /// destination register.
636  /// \pre The bits defined by each Op (derived from index and scalar size) must
637  /// not overlap.
638  /// \pre \p Indices must be in ascending order of bit position.
639  void buildSequence(unsigned Res, ArrayRef<unsigned> Ops,
640  ArrayRef<uint64_t> Indices);
641 
642  /// Build and insert \p Res = G_MERGE_VALUES \p Op0, ...
643  ///
644  /// G_MERGE_VALUES combines the input elements contiguously into a larger
645  /// register.
646  ///
647  /// \pre setBasicBlock or setMI must have been called.
648  /// \pre The entire register \p Res (and no more) must be covered by the input
649  /// registers.
650  /// \pre The type of all \p Ops registers must be identical.
651  ///
652  /// \return a MachineInstrBuilder for the newly created instruction.
654 
655  /// Build and insert \p Res0, ... = G_UNMERGE_VALUES \p Op
656  ///
657  /// G_UNMERGE_VALUES splits contiguous bits of the input into multiple
658  ///
659  /// \pre setBasicBlock or setMI must have been called.
660  /// \pre The entire register \p Res (and no more) must be covered by the input
661  /// registers.
662  /// \pre The type of all \p Res registers must be identical.
663  ///
664  /// \return a MachineInstrBuilder for the newly created instruction.
666 
667  MachineInstrBuilder buildInsert(unsigned Res, unsigned Src,
668  unsigned Op, unsigned Index);
669 
670  /// Build and insert either a G_INTRINSIC (if \p HasSideEffects is false) or
671  /// G_INTRINSIC_W_SIDE_EFFECTS instruction. Its first operand will be the
672  /// result register definition unless \p Reg is NoReg (== 0). The second
673  /// operand will be the intrinsic's ID.
674  ///
675  /// Callers are expected to add the required definitions and uses afterwards.
676  ///
677  /// \pre setBasicBlock or setMI must have been called.
678  ///
679  /// \return a MachineInstrBuilder for the newly created instruction.
681  bool HasSideEffects);
682 
683  /// Build and insert \p Res = G_FPTRUNC \p Op
684  ///
685  /// G_FPTRUNC converts a floating-point value into one with a smaller type.
686  ///
687  /// \pre setBasicBlock or setMI must have been called.
688  /// \pre \p Res must be a generic virtual register with scalar or vector type.
689  /// \pre \p Op must be a generic virtual register with scalar or vector type.
690  /// \pre \p Res must be smaller than \p Op
691  ///
692  /// \return The newly created instruction.
693  template <typename DstType, typename SrcType>
694  MachineInstrBuilder buildFPTrunc(DstType &&Res, SrcType &&Src) {
695  return buildFPTrunc(getDestFromArg(Res), getRegFromArg(Src));
696  }
697  MachineInstrBuilder buildFPTrunc(unsigned Res, unsigned Op);
698 
699  /// Build and insert \p Res = G_TRUNC \p Op
700  ///
701  /// G_TRUNC extracts the low bits of a type. For a vector type each element is
702  /// truncated independently before being packed into the destination.
703  ///
704  /// \pre setBasicBlock or setMI must have been called.
705  /// \pre \p Res must be a generic virtual register with scalar or vector type.
706  /// \pre \p Op must be a generic virtual register with scalar or vector type.
707  /// \pre \p Res must be smaller than \p Op
708  ///
709  /// \return The newly created instruction.
710  MachineInstrBuilder buildTrunc(unsigned Res, unsigned Op);
711  template <typename DstType, typename SrcType>
712  MachineInstrBuilder buildTrunc(DstType &&Res, SrcType &&Src) {
713  return buildTrunc(getDestFromArg(Res), getRegFromArg(Src));
714  }
715 
716  /// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1
717  ///
718  /// \pre setBasicBlock or setMI must have been called.
719 
720  /// \pre \p Res must be a generic virtual register with scalar or
721  /// vector type. Typically this starts as s1 or <N x s1>.
722  /// \pre \p Op0 and Op1 must be generic virtual registers with the
723  /// same number of elements as \p Res. If \p Res is a scalar,
724  /// \p Op0 must be either a scalar or pointer.
725  /// \pre \p Pred must be an integer predicate.
726  ///
727  /// \return a MachineInstrBuilder for the newly created instruction.
729  unsigned Res, unsigned Op0, unsigned Op1);
730 
731  /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
732  ///
733  /// \pre setBasicBlock or setMI must have been called.
734 
735  /// \pre \p Res must be a generic virtual register with scalar or
736  /// vector type. Typically this starts as s1 or <N x s1>.
737  /// \pre \p Op0 and Op1 must be generic virtual registers with the
738  /// same number of elements as \p Res (or scalar, if \p Res is
739  /// scalar).
740  /// \pre \p Pred must be a floating-point predicate.
741  ///
742  /// \return a MachineInstrBuilder for the newly created instruction.
744  unsigned Res, unsigned Op0, unsigned Op1);
745 
746  /// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1
747  ///
748  /// \pre setBasicBlock or setMI must have been called.
749  /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
750  /// with the same type.
751  /// \pre \p Tst must be a generic virtual register with scalar, pointer or
752  /// vector type. If vector then it must have the same number of
753  /// elements as the other parameters.
754  ///
755  /// \return a MachineInstrBuilder for the newly created instruction.
756  MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst,
757  unsigned Op0, unsigned Op1);
758 
759  /// Build and insert \p Res = G_INSERT_VECTOR_ELT \p Val,
760  /// \p Elt, \p Idx
761  ///
762  /// \pre setBasicBlock or setMI must have been called.
763  /// \pre \p Res and \p Val must be a generic virtual register
764  // with the same vector type.
765  /// \pre \p Elt and \p Idx must be a generic virtual register
766  /// with scalar type.
767  ///
768  /// \return The newly created instruction.
769  MachineInstrBuilder buildInsertVectorElement(unsigned Res, unsigned Val,
770  unsigned Elt, unsigned Idx);
771 
772  /// Build and insert \p Res = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
773  ///
774  /// \pre setBasicBlock or setMI must have been called.
775  /// \pre \p Res must be a generic virtual register with scalar type.
776  /// \pre \p Val must be a generic virtual register with vector type.
777  /// \pre \p Idx must be a generic virtual register with scalar type.
778  ///
779  /// \return The newly created instruction.
780  MachineInstrBuilder buildExtractVectorElement(unsigned Res, unsigned Val,
781  unsigned Idx);
782 
783  /// Build and insert `OldValRes = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal,
784  /// MMO`.
785  ///
786  /// Atomically replace the value at \p Addr with \p NewVal if it is currently
787  /// \p CmpVal otherwise leaves it unchanged. Puts the original value from \p
788  /// Addr in \p Res.
789  ///
790  /// \pre setBasicBlock or setMI must have been called.
791  /// \pre \p OldValRes must be a generic virtual register of scalar type.
792  /// \pre \p Addr must be a generic virtual register with pointer type.
793  /// \pre \p OldValRes, \p CmpVal, and \p NewVal must be generic virtual
794  /// registers of the same type.
795  ///
796  /// \return a MachineInstrBuilder for the newly created instruction.
797  MachineInstrBuilder buildAtomicCmpXchg(unsigned OldValRes, unsigned Addr,
798  unsigned CmpVal, unsigned NewVal,
799  MachineMemOperand &MMO);
800 };
801 
802 } // End namespace llvm.
803 #endif // LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
MachineBasicBlock & getMBB()
Getter for the basic block we currently build.
uint64_t CallInst * C
MachineIRBuilder()=default
Some constructors for easy use.
MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0, unsigned Op1)
Build and insert Res = G_GEP Op0, Op1.
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
MachineInstrBuilder buildIndirectDbgValue(unsigned Reg, const MDNode *Variable, const MDNode *Expr)
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in me...
unsigned createVirtualRegister(const TargetRegisterClass *RegClass)
createVirtualRegister - Create and return a new virtual register in the function with the specified r...
unsigned getReg() const
getReg - Returns the register number.
void setDebugLoc(const DebugLoc &DL)
Set the debug location to DL for all the next build instructions.
MachineInstrBuilder buildAnyExt(DstType &&Res, ArgType &&Arg)
MachineInstrBuilder buildTrunc(unsigned Res, unsigned Op)
Build and insert Res = G_TRUNC Op.
MachineInstrBuilder buildAnyExtOrTrunc(DstTy &&Dst, UseArgTy &&Use)
Res = COPY Op depending on the differing sizes of Res and Op.
A debug info location.
Definition: DebugLoc.h:34
Metadata node.
Definition: Metadata.h:862
MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op)
Build and insert Res = G_ANYEXT Op0.
unsigned createGenericVirtualRegister(LLT Ty)
Create and return a new generic virtual register with low-level type Ty.
MachineInstrBuilder buildExtract(unsigned Res, unsigned Src, uint64_t Index)
Build and insert `Res0, ...
MachineIRBuilder(MachineInstr &MI)
MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst, unsigned Op0, unsigned Op1)
Build and insert a Res = G_SELECT Tst, Op0, Op1.
MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred, unsigned Res, unsigned Op0, unsigned Op1)
Build and insert a Res = G_FCMP PredOp0, Op1.
MachineInstrBuilder buildExtOrTrunc(unsigned ExtOpc, unsigned Res, unsigned Op)
Build and insert Res = ExtOpc, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes of...
MachineInstrBuilder buildStore(unsigned Val, unsigned Addr, MachineMemOperand &MMO)
Build and insert G_STORE Val, Addr, MMO.
A description of a memory reference used in the backend.
void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II)
Set the insertion point before the specified position.
A Use represents the edge between a Value definition and its users.
Definition: Use.h:56
const MachineInstrBuilder & addUse(unsigned RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register use operand.
MachineInstrBuilder buildFPTrunc(DstType &&Res, SrcType &&Src)
Build and insert Res = G_FPTRUNC Op.
Reg
All possible values of the reg field in the ModR/M byte.
MachineInstrBuilder buildExtractVectorElement(unsigned Res, unsigned Val, unsigned Idx)
Build and insert Res = G_EXTRACT_VECTOR_ELT Val, Idx.
MachineInstrBuilder buildInsertVectorElement(unsigned Res, unsigned Val, unsigned Elt, unsigned Idx)
Build and insert Res = G_INSERT_VECTOR_ELT Val, Elt, Idx.
MachineInstrBuilder buildSExtOrTrunc(DstTy &&Dst, UseArgTy &&Use)
Build and insert Res = G_SEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes...
MachineInstrBuilder buildInstrNoInsert(unsigned Opcode)
Build but don&#39;t insert <empty> = Opcode <empty>.
MachineFunction & getMF()
Getter for the function we currently build.
void recordInsertions(std::function< void(MachineInstr *)> InsertedInstr)
MachineInstrBuilder buildOr(DstTy &&Dst, UseArgsTy &&... UseArgs)
Build and insert Res = G_OR Op0, Op1.
MachineInstrBuilder buildConstant(DstType &&Res, int64_t Val)
MachineInstrBuilder buildMul(DstTy &&Ty, UseArgsTy &&... UseArgs)
Build and insert Res = G_MUL Op0, Op1.
TargetInstrInfo - Interface to description of machine instruction set.
MachineBasicBlock::iterator getInsertPt()
Current insertion point for new instructions.
MachineInstrBuilder buildSExt(DstType &&Res, ArgType &&Arg)
Build and insert Res = G_SEXT Op.
MachineInstrBuilder buildBr(MachineBasicBlock &BB)
Build and insert G_BR Dest.
MachineInstrBuilder buildInstr(unsigned Opcode)
Build and insert <empty> = Opcode <empty>.
This is an important base class in LLVM.
Definition: Constant.h:42
MachineInstrBuilder buildPtrMask(unsigned Res, unsigned Op0, uint32_t NumBits)
Build and insert Res = G_PTR_MASK Op0, NumBits.
This file contains the declarations for the subclasses of Constant, which represent the different fla...
ConstantFP - Floating Point Values [float, double].
Definition: Constants.h:264
MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, unsigned Res, bool HasSideEffects)
Build and insert either a G_INTRINSIC (if HasSideEffects is false) or G_INTRINSIC_W_SIDE_EFFECTS inst...
Helper class to build MachineInstr.
MachineInstrBuilder buildICmp(CmpInst::Predicate Pred, unsigned Res, unsigned Op0, unsigned Op1)
Build and insert a Res = G_ICMP Pred, Op0, Op1.
MachineInstrBuilder buildUndef(DstType &&Res)
Build and insert Res = IMPLICIT_DEF.
void setInstr(MachineInstr &MI)
Set the insertion point to before MI.
Predicate
This enumeration lists the possible predicates for CmpInst subclasses.
Definition: InstrTypes.h:853
MachineInstrBuilder buildInsert(unsigned Res, unsigned Src, unsigned Op, unsigned Index)
MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable, const MDNode *Expr)
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in th...
MachineInstrBuilder buildCast(DstType &&Res, ArgType &&Arg)
Build and insert an appropriate cast between two registers of equal size.
void setMF(MachineFunction &)
MachineIRBuilder(MachineFunction &MF)
MachineInstrBuilder buildBrIndirect(unsigned Tgt)
Build and insert G_BRINDIRECT Tgt.
MachineInstrBuilder buildUAdde(unsigned Res, unsigned CarryOut, unsigned Op0, unsigned Op1, unsigned CarryIn)
Build and insert Res, CarryOut = G_UADDE Op0, Op1, CarryIn.
MachineInstrBuilder buildFrameIndex(unsigned Res, int Idx)
Build and insert Res = G_FRAME_INDEX Idx.
MachineInstrBuilder buildConstDbgValue(const Constant &C, const MDNode *Variable, const MDNode *Expr)
Build and insert a DBG_VALUE instructions specifying that Variable is given by C (suitably modified b...
This is the shared class of boolean and integer constants.
Definition: Constants.h:84
void buildSequence(unsigned Res, ArrayRef< unsigned > Ops, ArrayRef< uint64_t > Indices)
Build and insert instructions to put Ops together at the specified p Indices to form a larger registe...
MachineInstrBuilder buildCopy(unsigned Res, unsigned Op)
Build and insert Res = COPY Op.
MachineInstrBuilder buildZExtOrTrunc(DstTy &&Dst, UseArgTy &&Use)
Build and insert Res = G_ZEXT Op, Res = G_TRUNC Op, or Res = COPY Op depending on the differing sizes...
DebugLoc getDebugLoc()
Get the current instruction&#39;s debug location.
This file describes high level types that are used by several passes or APIs involved in the GlobalIS...
MachineInstrBuilder buildAdd(DstTy &&Ty, UseArgsTy &&... UseArgs)
amdgpu Simplify well known AMD library false Value Value * Arg
MachineRegisterInfo - Keep track of information for virtual and physical registers, including vreg register classes, use/def chains for registers, etc.
Representation of each machine instruction.
Definition: MachineInstr.h:60
MachineInstrBuilder buildCopy(DstType &&Res, SrcType &&Src)
MachineInstrBuilder buildDirectDbgValue(unsigned Reg, const MDNode *Variable, const MDNode *Expr)
Build and insert a DBG_VALUE instruction expressing the fact that the associated Variable lives in Re...
MachineRegisterInfo & getRegInfo()
getRegInfo - Return information about the registers currently in use.
MachineInstrBuilder buildAdd(unsigned Res, unsigned Op0, unsigned Op1)
Build and insert Res = G_ADD Op0, Op1.
void setMBB(MachineBasicBlock &MBB)
Set the insertion point to the end of MBB.
MachineInstrBuilder buildConstant(unsigned Res, const ConstantInt &Val)
Build and insert Res = G_CONSTANT Val.
MachineInstrBuilder buildFConstant(DstType &&Res, const ConstantFP &Val)
Build and insert Res = G_FCONSTANT Val.
Optional< MachineInstrBuilder > materializeGEP(unsigned &Res, unsigned Op0, const LLT &ValueTy, uint64_t Value)
Materialize and insert Res = G_GEP Op0, (G_CONSTANT Value)
MachineInstrBuilder buildUnmerge(ArrayRef< unsigned > Res, unsigned Op)
Build and insert Res0, ...
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
MachineInstrBuilder insertInstr(MachineInstrBuilder MIB)
Insert an existing instruction at the insertion point.
LLVM Value Representation.
Definition: Value.h:73
MachineInstrBuilder buildLoad(unsigned Res, unsigned Addr, MachineMemOperand &MMO)
Build and insert Res = G_LOAD Addr, MMO.
MachineInstrBuilder buildInstr(unsigned Opc, DstTy &&Ty, UseArgsTy &&... Args)
DAG like Generic method for building arbitrary instructions as above.
print Print MemDeps of function
MachineInstrBuilder buildAtomicCmpXchg(unsigned OldValRes, unsigned Addr, unsigned CmpVal, unsigned NewVal, MachineMemOperand &MMO)
Build and insert OldValRes = G_ATOMIC_CMPXCHG Addr, CmpVal, NewVal, MMO.
MachineInstrBuilder buildTrunc(DstType &&Res, SrcType &&Src)
IRTranslator LLVM IR MI
const MachineInstrBuilder & addDef(unsigned RegNo, unsigned Flags=0, unsigned SubReg=0) const
Add a virtual register definition operand.
MachineInstrBuilder buildAnd(DstTy &&Dst, UseArgsTy &&... UseArgs)
Build and insert Res = G_AND Op0, Op1.
MachineInstrBuilder buildGlobalValue(unsigned Res, const GlobalValue *GV)
Build and insert Res = G_GLOBAL_VALUE GV.
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:298
MachineInstrBuilder buildMerge(unsigned Res, ArrayRef< unsigned > Ops)
Build and insert Res = G_MERGE_VALUES Op0, ...
MachineInstrBuilder buildZExt(DstType &&Res, ArgType &&Arg)
Build and insert Res = G_ZEXT Op.
constexpr char Args[]
Key for Kernel::Metadata::mArgs.
MachineInstrBuilder buildSub(DstTy &&Ty, UseArgsTy &&... UseArgs)
Build and insert Res = G_SUB Op0, Op1.
MachineInstrBuilder buildBrCond(unsigned Tst, MachineBasicBlock &BB)
Build and insert G_BRCOND Tst, Dest.