LLVM  6.0.0svn
Macros | Functions
MipsHazardSchedule.cpp File Reference

This pass is used to workaround certain pipeline hazards. More...

#include "Mips.h"
#include "MipsInstrInfo.h"
#include "MipsSubtarget.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include <algorithm>
#include <iterator>
#include <utility>
Include dependency graph for MipsHazardSchedule.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "mips-hazard-schedule"
 

Functions

 STATISTIC (NumInsertedNops, "Number of nops inserted")
 
static Iter getNextMachineInstrInBB (Iter Position)
 
static std::pair< Iter, boolgetNextMachineInstr (Iter Position, MachineBasicBlock *Parent)
 

Detailed Description

This pass is used to workaround certain pipeline hazards.

For now, this covers compact branch hazards. In future this pass can be extended to other pipeline hazards, such as various MIPS1 hazards, processor errata that require instruction reorganization, etc.

This pass has to run after the delay slot filler as that pass can introduce pipeline hazards, hence the existing hazard recognizer is not suitable.

Hazards handled: forbidden slots for MIPSR6.

A forbidden slot hazard occurs when a compact branch instruction is executed and the adjacent instruction in memory is a control transfer instruction such as a branch or jump, ERET, ERETNC, DERET, WAIT and PAUSE.

For example:

0x8004 bnec a1,v0,<P+0x18> 0x8008 beqc a1,a2,<P+0x54>

In such cases, the processor is required to signal a Reserved Instruction exception.

Here, if the instruction at 0x8004 is executed, the processor will raise an exception as there is a control transfer instruction at 0x8008.

There are two sources of forbidden slot hazards:

A) A previous pass has created a compact branch directly. B) Transforming a delay slot branch into compact branch. This case can be difficult to process as lookahead for hazards is insufficient, as backwards delay slot fillling can also produce hazards in previously processed instuctions.

Definition in file MipsHazardSchedule.cpp.

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "mips-hazard-schedule"

Definition at line 59 of file MipsHazardSchedule.cpp.

Function Documentation

◆ getNextMachineInstr()

static std::pair<Iter, bool> getNextMachineInstr ( Iter  Position,
MachineBasicBlock Parent 
)
static

◆ getNextMachineInstrInBB()

static Iter getNextMachineInstrInBB ( Iter  Position)
static

Definition at line 96 of file MipsHazardSchedule.cpp.

References E, llvm::find_if_not(), and I.

Referenced by getNextMachineInstr().

◆ STATISTIC()

STATISTIC ( NumInsertedNops  ,
"Number of nops inserted"   
)