LLVM  9.0.0svn
Macros | Functions | Variables
MipsSEISelLowering.cpp File Reference
#include "MipsSEISelLowering.h"
#include "MipsMachineFunction.h"
#include "MipsRegisterInfo.h"
#include "MipsSubtarget.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/ArrayRef.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Triple.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/ISDOpcodes.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/CodeGen/TargetInstrInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/CodeGen/ValueTypes.h"
#include "llvm/IR/DebugLoc.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MachineValueType.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
#include <iterator>
#include <utility>
Include dependency graph for MipsSEISelLowering.cpp:

Go to the source code of this file.

Macros

#define DEBUG_TYPE   "mips-isel"
 

Functions

static SDValue performANDCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
 
static bool isVSplat (SDValue N, APInt &Imm, bool IsLittleEndian)
 
static bool isVectorAllOnes (SDValue N)
 
static bool isBitwiseInverse (SDValue N, SDValue OfNode)
 
static SDValue performORCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
 
static bool shouldTransformMulToShiftsAddsSubs (APInt C, EVT VT, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
 
static SDValue genConstMult (SDValue X, APInt C, const SDLoc &DL, EVT VT, EVT ShiftTy, SelectionDAG &DAG)
 
static SDValue performMULCombine (SDNode *N, SelectionDAG &DAG, const TargetLowering::DAGCombinerInfo &DCI, const MipsSETargetLowering *TL, const MipsSubtarget &Subtarget)
 
static SDValue performDSPShiftCombine (unsigned Opc, SDNode *N, EVT Ty, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
 
static SDValue performSHLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
 
static SDValue performSRACombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
 
static SDValue performSRLCombine (SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI, const MipsSubtarget &Subtarget)
 
static bool isLegalDSPCondCode (EVT Ty, ISD::CondCode CC)
 
static SDValue performSETCCCombine (SDNode *N, SelectionDAG &DAG)
 
static SDValue performVSELECTCombine (SDNode *N, SelectionDAG &DAG)
 
static SDValue performXORCombine (SDNode *N, SelectionDAG &DAG, const MipsSubtarget &Subtarget)
 
static SDValue initAccumulator (SDValue In, const SDLoc &DL, SelectionDAG &DAG)
 
static SDValue extractLOHI (SDValue Op, const SDLoc &DL, SelectionDAG &DAG)
 
static SDValue lowerDSPIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
 
static SDValue lowerMSACopyIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc)
 
static SDValue lowerMSASplatZExt (SDValue Op, unsigned OpNr, SelectionDAG &DAG)
 
static SDValue lowerMSASplatImm (SDValue Op, unsigned ImmOp, SelectionDAG &DAG, bool IsSigned=false)
 
static SDValue getBuildVectorSplat (EVT VecTy, SDValue SplatValue, bool BigEndian, SelectionDAG &DAG)
 
static SDValue lowerMSABinaryBitImmIntr (SDValue Op, SelectionDAG &DAG, unsigned Opc, SDValue Imm, bool BigEndian)
 
static SDValue truncateVecElts (SDValue Op, SelectionDAG &DAG)
 
static SDValue lowerMSABitClear (SDValue Op, SelectionDAG &DAG)
 
static SDValue lowerMSABitClearImm (SDValue Op, SelectionDAG &DAG)
 
static SDValue lowerMSALoadIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr, const MipsSubtarget &Subtarget)
 
static SDValue lowerMSAStoreIntr (SDValue Op, SelectionDAG &DAG, unsigned Intr, const MipsSubtarget &Subtarget)
 
static bool isConstantOrUndef (const SDValue Op)
 
static bool isConstantOrUndefBUILD_VECTOR (const BuildVectorSDNode *Op)
 
static SDValue lowerVECTOR_SHUFFLE_SHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
template<typename ValType >
static bool fitsRegularPattern (typename SmallVectorImpl< ValType >::const_iterator Begin, unsigned CheckStride, typename SmallVectorImpl< ValType >::const_iterator End, ValType ExpectedIndex, unsigned ExpectedIndexStride)
 Determine whether a range fits a regular pattern of values. More...
 
static bool isVECTOR_SHUFFLE_SPLATI (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_ILVEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_ILVOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_ILVR (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_ILVL (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_PCKEV (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_PCKOD (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 
static SDValue lowerVECTOR_SHUFFLE_VSHF (SDValue Op, EVT ResTy, SmallVector< int, 16 > Indices, SelectionDAG &DAG)
 

Variables

static cl::opt< boolUseMipsTailCalls ("mips-tail-calls", cl::Hidden, cl::desc("MIPS: permit tail calls."), cl::init(false))
 
static cl::opt< boolNoDPLoadStore ("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts"))
 

Macro Definition Documentation

◆ DEBUG_TYPE

#define DEBUG_TYPE   "mips-isel"

Definition at line 52 of file MipsSEISelLowering.cpp.

Function Documentation

◆ extractLOHI()

static SDValue extractLOHI ( SDValue  Op,
const SDLoc DL,
SelectionDAG DAG 
)
static

◆ fitsRegularPattern()

template<typename ValType >
static bool fitsRegularPattern ( typename SmallVectorImpl< ValType >::const_iterator  Begin,
unsigned  CheckStride,
typename SmallVectorImpl< ValType >::const_iterator  End,
ValType  ExpectedIndex,
unsigned  ExpectedIndexStride 
)
static

Determine whether a range fits a regular pattern of values.

This function accounts for the possibility of jumping over the End iterator.

Definition at line 2605 of file MipsSEISelLowering.cpp.

◆ genConstMult()

static SDValue genConstMult ( SDValue  X,
APInt  C,
const SDLoc DL,
EVT  VT,
EVT  ShiftTy,
SelectionDAG DAG 
)
static

◆ getBuildVectorSplat()

static SDValue getBuildVectorSplat ( EVT  VecTy,
SDValue  SplatValue,
bool  BigEndian,
SelectionDAG DAG 
)
static

◆ initAccumulator()

static SDValue initAccumulator ( SDValue  In,
const SDLoc DL,
SelectionDAG DAG 
)
static

◆ isBitwiseInverse()

static bool isBitwiseInverse ( SDValue  N,
SDValue  OfNode 
)
static

◆ isConstantOrUndef()

static bool isConstantOrUndef ( const SDValue  Op)
static

Definition at line 2428 of file MipsSEISelLowering.cpp.

References llvm::SDNode::isUndef().

Referenced by isConstantOrUndefBUILD_VECTOR().

◆ isConstantOrUndefBUILD_VECTOR()

static bool isConstantOrUndefBUILD_VECTOR ( const BuildVectorSDNode Op)
static

◆ isLegalDSPCondCode()

static bool isLegalDSPCondCode ( EVT  Ty,
ISD::CondCode  CC 
)
static

◆ isVECTOR_SHUFFLE_SPLATI()

static bool isVECTOR_SHUFFLE_SPLATI ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

Definition at line 2632 of file MipsSEISelLowering.cpp.

References assert(), and llvm::SmallVectorBase::size().

◆ isVectorAllOnes()

static bool isVectorAllOnes ( SDValue  N)
static

◆ isVSplat()

static bool isVSplat ( SDValue  N,
APInt Imm,
bool  IsLittleEndian 
)
static

Definition at line 532 of file MipsSEISelLowering.cpp.

◆ lowerDSPIntr()

static SDValue lowerDSPIntr ( SDValue  Op,
SelectionDAG DAG,
unsigned  Opc 
)
static

◆ lowerMSABinaryBitImmIntr()

static SDValue lowerMSABinaryBitImmIntr ( SDValue  Op,
SelectionDAG DAG,
unsigned  Opc,
SDValue  Imm,
bool  BigEndian 
)
static

◆ lowerMSABitClear()

static SDValue lowerMSABitClear ( SDValue  Op,
SelectionDAG DAG 
)
static

◆ lowerMSABitClearImm()

static SDValue lowerMSABitClearImm ( SDValue  Op,
SelectionDAG DAG 
)
static

Definition at line 1529 of file MipsSEISelLowering.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::ISD::CTLZ, llvm::ISD::CTPOP, llvm::MipsISD::DPA_W_PH, llvm::MipsISD::DPAU_H_QBL, llvm::MipsISD::DPAU_H_QBR, llvm::MipsISD::DPAX_W_PH, llvm::MipsISD::DPS_W_PH, llvm::MipsISD::DPSU_H_QBL, llvm::MipsISD::DPSU_H_QBR, llvm::MipsISD::DPSX_W_PH, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FADD, llvm::ISD::FDIV, llvm::ISD::FEXP2, llvm::ISD::FLOG2, llvm::ISD::FMA, llvm::MipsISD::FMS, llvm::ISD::FMUL, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FRINT, llvm::ISD::FSQRT, llvm::ISD::FSUB, llvm::SelectionDAG::getBuildVector(), llvm::SelectionDAG::getConstant(), llvm::SDNode::getConstantOperandVal(), llvm::SelectionDAG::getDataLayout(), llvm::APInt::getHighBitsSet(), llvm::APInt::getLowBitsSet(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDNode::getOperand(), llvm::TargetLoweringBase::getPointerTy(), llvm::EVT::getScalarSizeInBits(), llvm::SelectionDAG::getSetCC(), llvm::EVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::EVT::getVectorElementType(), llvm::EVT::getVectorNumElements(), llvm::MipsSubtarget::hasMips64(), llvm::MVT::i32, llvm::MipsISD::ILVEV, llvm::MipsISD::ILVL, llvm::MipsISD::ILVOD, llvm::MipsISD::ILVR, llvm::ISD::INSERT_VECTOR_ELT, llvm::MipsISD::INSVE, llvm::MipsSubtarget::isLittle(), llvm_unreachable, lowerDSPIntr(), lowerMSABinaryBitImmIntr(), lowerMSABitClear(), lowerMSACopyIntr(), lowerMSASplatImm(), lowerMSASplatZExt(), llvm::MipsISD::MAdd, llvm::MipsISD::MAddu, llvm::BitmaskEnumDetail::Mask(), llvm::MipsISD::MSub, llvm::MipsISD::MSubu, llvm::ISD::MUL, llvm::MipsISD::MULSA_W_PH, llvm::MipsISD::Mult, llvm::MipsISD::Multu, llvm::ISD::OR, llvm::MipsISD::PCKEV, llvm::MipsISD::PCKOD, llvm::report_fatal_error(), llvm::ISD::SDIV, llvm::ISD::SETEQ, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::MipsISD::SHF, llvm::MipsISD::SHILO, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, llvm::ISD::SMAX, llvm::ISD::SMIN, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::SUB, llvm::MipsTargetLowering::Subtarget, llvm::MipsISD::ThreadPointer, truncateVecElts(), llvm::ISD::UDIV, llvm::ISD::UINT_TO_FP, llvm::ISD::UMAX, llvm::ISD::UMIN, llvm::ISD::UREM, llvm::MipsISD::VALL_NONZERO, llvm::MipsISD::VALL_ZERO, llvm::MipsISD::VANY_NONZERO, llvm::MipsISD::VANY_ZERO, llvm::MipsISD::VEXTRACT_SEXT_ELT, llvm::MipsISD::VEXTRACT_ZEXT_ELT, llvm::ISD::VSELECT, llvm::MipsISD::VSHF, and llvm::ISD::XOR.

◆ lowerMSACopyIntr()

static SDValue lowerMSACopyIntr ( SDValue  Op,
SelectionDAG DAG,
unsigned  Opc 
)
static

◆ lowerMSALoadIntr()

static SDValue lowerMSALoadIntr ( SDValue  Op,
SelectionDAG DAG,
unsigned  Intr,
const MipsSubtarget Subtarget 
)
static

◆ lowerMSASplatImm()

static SDValue lowerMSASplatImm ( SDValue  Op,
unsigned  ImmOp,
SelectionDAG DAG,
bool  IsSigned = false 
)
static

◆ lowerMSASplatZExt()

static SDValue lowerMSASplatZExt ( SDValue  Op,
unsigned  OpNr,
SelectionDAG DAG 
)
static

◆ lowerMSAStoreIntr()

static SDValue lowerMSAStoreIntr ( SDValue  Op,
SelectionDAG DAG,
unsigned  Intr,
const MipsSubtarget Subtarget 
)
static

◆ lowerVECTOR_SHUFFLE_ILVEV()

static SDValue lowerVECTOR_SHUFFLE_ILVEV ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_ILVL()

static SDValue lowerVECTOR_SHUFFLE_ILVL ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_ILVOD()

static SDValue lowerVECTOR_SHUFFLE_ILVOD ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_ILVR()

static SDValue lowerVECTOR_SHUFFLE_ILVR ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_PCKEV()

static SDValue lowerVECTOR_SHUFFLE_PCKEV ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_PCKOD()

static SDValue lowerVECTOR_SHUFFLE_PCKOD ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_SHF()

static SDValue lowerVECTOR_SHUFFLE_SHF ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ lowerVECTOR_SHUFFLE_VSHF()

static SDValue lowerVECTOR_SHUFFLE_VSHF ( SDValue  Op,
EVT  ResTy,
SmallVector< int, 16 >  Indices,
SelectionDAG DAG 
)
static

◆ performANDCombine()

static SDValue performANDCombine ( SDNode N,
SelectionDAG DAG,
TargetLowering::DAGCombinerInfo DCI,
const MipsSubtarget Subtarget 
)
static

◆ performDSPShiftCombine()

static SDValue performDSPShiftCombine ( unsigned  Opc,
SDNode N,
EVT  Ty,
SelectionDAG DAG,
const MipsSubtarget Subtarget 
)
static

◆ performMULCombine()

static SDValue performMULCombine ( SDNode N,
SelectionDAG DAG,
const TargetLowering::DAGCombinerInfo DCI,
const MipsSETargetLowering TL,
const MipsSubtarget Subtarget 
)
static

◆ performORCombine()

static SDValue performORCombine ( SDNode N,
SelectionDAG DAG,
TargetLowering::DAGCombinerInfo DCI,
const MipsSubtarget Subtarget 
)
static

◆ performSETCCCombine()

static SDValue performSETCCCombine ( SDNode N,
SelectionDAG DAG 
)
static

◆ performSHLCombine()

static SDValue performSHLCombine ( SDNode N,
SelectionDAG DAG,
TargetLowering::DAGCombinerInfo DCI,
const MipsSubtarget Subtarget 
)
static

◆ performSRACombine()

static SDValue performSRACombine ( SDNode N,
SelectionDAG DAG,
TargetLowering::DAGCombinerInfo DCI,
const MipsSubtarget Subtarget 
)
static

◆ performSRLCombine()

static SDValue performSRLCombine ( SDNode N,
SelectionDAG DAG,
TargetLowering::DAGCombinerInfo DCI,
const MipsSubtarget Subtarget 
)
static

◆ performVSELECTCombine()

static SDValue performVSELECTCombine ( SDNode N,
SelectionDAG DAG 
)
static

◆ performXORCombine()

static SDValue performXORCombine ( SDNode N,
SelectionDAG DAG,
const MipsSubtarget Subtarget 
)
static

◆ shouldTransformMulToShiftsAddsSubs()

static bool shouldTransformMulToShiftsAddsSubs ( APInt  C,
EVT  VT,
SelectionDAG DAG,
const MipsSubtarget Subtarget 
)
static

Definition at line 715 of file MipsSEISelLowering.cpp.

References llvm::MipsSubtarget::isABI_O32().

Referenced by performMULCombine().

◆ truncateVecElts()

static SDValue truncateVecElts ( SDValue  Op,
SelectionDAG DAG 
)
static

Variable Documentation

◆ NoDPLoadStore

cl::opt<bool> NoDPLoadStore("mno-ldc1-sdc1", cl::init(false), cl::desc("Expand double precision loads and " "stores to their single precision " "counterparts"))
static

◆ UseMipsTailCalls

cl::opt<bool> UseMipsTailCalls("mips-tail-calls", cl::Hidden, cl::desc("MIPS: permit tail calls."), cl::init(false))
static