LLVM  10.0.0svn
PPCAsmPrinter.cpp
Go to the documentation of this file.
1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a printer that converts from our internal representation
10 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
11 // the output mechanism used by `llc'.
12 //
13 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
14 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
15 //
16 //===----------------------------------------------------------------------===//
17 
19 #include "MCTargetDesc/PPCMCExpr.h"
22 #include "PPC.h"
23 #include "PPCInstrInfo.h"
24 #include "PPCMachineFunctionInfo.h"
25 #include "PPCSubtarget.h"
26 #include "PPCTargetMachine.h"
27 #include "PPCTargetStreamer.h"
29 #include "llvm/ADT/MapVector.h"
30 #include "llvm/ADT/StringRef.h"
31 #include "llvm/ADT/Triple.h"
32 #include "llvm/ADT/Twine.h"
33 #include "llvm/BinaryFormat/ELF.h"
42 #include "llvm/CodeGen/StackMaps.h"
44 #include "llvm/IR/DataLayout.h"
45 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/Module.h"
47 #include "llvm/MC/MCAsmInfo.h"
48 #include "llvm/MC/MCContext.h"
49 #include "llvm/MC/MCExpr.h"
50 #include "llvm/MC/MCInst.h"
51 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSectionMachO.h"
54 #include "llvm/MC/MCSectionXCOFF.h"
55 #include "llvm/MC/MCStreamer.h"
56 #include "llvm/MC/MCSymbol.h"
57 #include "llvm/MC/MCSymbolELF.h"
58 #include "llvm/MC/MCSymbolXCOFF.h"
59 #include "llvm/MC/SectionKind.h"
60 #include "llvm/Support/Casting.h"
61 #include "llvm/Support/CodeGen.h"
62 #include "llvm/Support/Debug.h"
67 #include <algorithm>
68 #include <cassert>
69 #include <cstdint>
70 #include <memory>
71 #include <new>
72 
73 using namespace llvm;
74 
75 #define DEBUG_TYPE "asmprinter"
76 
77 namespace {
78 
79 class PPCAsmPrinter : public AsmPrinter {
80 protected:
82  const PPCSubtarget *Subtarget;
83  StackMaps SM;
84 
85 public:
86  explicit PPCAsmPrinter(TargetMachine &TM,
87  std::unique_ptr<MCStreamer> Streamer)
88  : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
89 
90  StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
91 
92  MCSymbol *lookUpOrCreateTOCEntry(const MCSymbol *Sym);
93 
94  bool doInitialization(Module &M) override {
95  if (!TOC.empty())
96  TOC.clear();
98  }
99 
100  void EmitInstruction(const MachineInstr *MI) override;
101 
102  /// This function is for PrintAsmOperand and PrintAsmMemoryOperand,
103  /// invoked by EmitMSInlineAsmStr and EmitGCCInlineAsmStr only.
104  /// The \p MI would be INLINEASM ONLY.
105  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
106 
107  void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
108  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
109  const char *ExtraCode, raw_ostream &O) override;
110  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
111  const char *ExtraCode, raw_ostream &O) override;
112 
113  void EmitEndOfAsmFile(Module &M) override;
114 
115  void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
116  void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
117  void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
118  bool runOnMachineFunction(MachineFunction &MF) override {
119  Subtarget = &MF.getSubtarget<PPCSubtarget>();
120  bool Changed = AsmPrinter::runOnMachineFunction(MF);
121  emitXRayTable();
122  return Changed;
123  }
124 };
125 
126 /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
127 class PPCLinuxAsmPrinter : public PPCAsmPrinter {
128 public:
129  explicit PPCLinuxAsmPrinter(TargetMachine &TM,
130  std::unique_ptr<MCStreamer> Streamer)
131  : PPCAsmPrinter(TM, std::move(Streamer)) {}
132 
133  StringRef getPassName() const override {
134  return "Linux PPC Assembly Printer";
135  }
136 
137  bool doFinalization(Module &M) override;
138  void EmitStartOfAsmFile(Module &M) override;
139 
140  void EmitFunctionEntryLabel() override;
141 
142  void EmitFunctionBodyStart() override;
143  void EmitFunctionBodyEnd() override;
144  void EmitInstruction(const MachineInstr *MI) override;
145 };
146 
147 /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
148 /// OS X
149 class PPCDarwinAsmPrinter : public PPCAsmPrinter {
150 public:
151  explicit PPCDarwinAsmPrinter(TargetMachine &TM,
152  std::unique_ptr<MCStreamer> Streamer)
153  : PPCAsmPrinter(TM, std::move(Streamer)) {}
154 
155  StringRef getPassName() const override {
156  return "Darwin PPC Assembly Printer";
157  }
158 
159  bool doFinalization(Module &M) override;
160  void EmitStartOfAsmFile(Module &M) override;
161 };
162 
163 class PPCAIXAsmPrinter : public PPCAsmPrinter {
164 public:
165  PPCAIXAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
166  : PPCAsmPrinter(TM, std::move(Streamer)) {}
167 
168  StringRef getPassName() const override { return "AIX PPC Assembly Printer"; }
169 
170  void SetupMachineFunction(MachineFunction &MF) override;
171 
172  void EmitGlobalVariable(const GlobalVariable *GV) override;
173 
174  void EmitFunctionDescriptor() override;
175 
176  void EmitEndOfAsmFile(Module &) override;
177 };
178 
179 } // end anonymous namespace
180 
181 void PPCAsmPrinter::PrintSymbolOperand(const MachineOperand &MO,
182  raw_ostream &O) {
183  // Computing the address of a global symbol, not calling it.
184  const GlobalValue *GV = MO.getGlobal();
185  MCSymbol *SymToPrint;
186 
187  // External or weakly linked global variables need non-lazily-resolved stubs
188  if (Subtarget->hasLazyResolverStub(GV)) {
189  SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
191  MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(
192  SymToPrint);
193  if (!StubSym.getPointer())
194  StubSym = MachineModuleInfoImpl::StubValueTy(getSymbol(GV),
195  !GV->hasInternalLinkage());
196  } else {
197  SymToPrint = getSymbol(GV);
198  }
199 
200  SymToPrint->print(O, MAI);
201 
202  printOffset(MO.getOffset(), O);
203 }
204 
205 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
206  raw_ostream &O) {
207  const DataLayout &DL = getDataLayout();
208  const MachineOperand &MO = MI->getOperand(OpNo);
209 
210  switch (MO.getType()) {
212  // The MI is INLINEASM ONLY and UseVSXReg is always false.
213  const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
214 
215  // Linux assembler (Others?) does not take register mnemonics.
216  // FIXME - What about special registers used in mfspr/mtspr?
217  if (!Subtarget->isDarwin())
218  RegName = PPCRegisterInfo::stripRegisterPrefix(RegName);
219  O << RegName;
220  return;
221  }
223  O << MO.getImm();
224  return;
225 
227  MO.getMBB()->getSymbol()->print(O, MAI);
228  return;
230  O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
231  << MO.getIndex();
232  return;
234  GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
235  return;
237  PrintSymbolOperand(MO, O);
238  return;
239  }
240 
241  default:
242  O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
243  return;
244  }
245 }
246 
247 /// PrintAsmOperand - Print out an operand for an inline asm expression.
248 ///
249 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
250  const char *ExtraCode, raw_ostream &O) {
251  // Does this asm operand have a single letter operand modifier?
252  if (ExtraCode && ExtraCode[0]) {
253  if (ExtraCode[1] != 0) return true; // Unknown modifier.
254 
255  switch (ExtraCode[0]) {
256  default:
257  // See if this is a generic print operand
258  return AsmPrinter::PrintAsmOperand(MI, OpNo, ExtraCode, O);
259  case 'L': // Write second word of DImode reference.
260  // Verify that this operand has two consecutive registers.
261  if (!MI->getOperand(OpNo).isReg() ||
262  OpNo+1 == MI->getNumOperands() ||
263  !MI->getOperand(OpNo+1).isReg())
264  return true;
265  ++OpNo; // Return the high-part.
266  break;
267  case 'I':
268  // Write 'i' if an integer constant, otherwise nothing. Used to print
269  // addi vs add, etc.
270  if (MI->getOperand(OpNo).isImm())
271  O << "i";
272  return false;
273  case 'x':
274  if(!MI->getOperand(OpNo).isReg())
275  return true;
276  // This operand uses VSX numbering.
277  // If the operand is a VMX register, convert it to a VSX register.
278  Register Reg = MI->getOperand(OpNo).getReg();
280  Reg = PPC::VSX32 + (Reg - PPC::V0);
281  else if (PPCInstrInfo::isVFRegister(Reg))
282  Reg = PPC::VSX32 + (Reg - PPC::VF0);
283  const char *RegName;
284  RegName = PPCInstPrinter::getRegisterName(Reg);
285  RegName = PPCRegisterInfo::stripRegisterPrefix(RegName);
286  O << RegName;
287  return false;
288  }
289  }
290 
291  printOperand(MI, OpNo, O);
292  return false;
293 }
294 
295 // At the moment, all inline asm memory operands are a single register.
296 // In any case, the output of this routine should always be just one
297 // assembler operand.
298 
299 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
300  const char *ExtraCode,
301  raw_ostream &O) {
302  if (ExtraCode && ExtraCode[0]) {
303  if (ExtraCode[1] != 0) return true; // Unknown modifier.
304 
305  switch (ExtraCode[0]) {
306  default: return true; // Unknown modifier.
307  case 'y': // A memory reference for an X-form instruction
308  {
309  const char *RegName = "r0";
310  if (!Subtarget->isDarwin())
311  RegName = PPCRegisterInfo::stripRegisterPrefix(RegName);
312  O << RegName << ", ";
313  printOperand(MI, OpNo, O);
314  return false;
315  }
316  case 'U': // Print 'u' for update form.
317  case 'X': // Print 'x' for indexed form.
318  {
319  // FIXME: Currently for PowerPC memory operands are always loaded
320  // into a register, so we never get an update or indexed form.
321  // This is bad even for offset forms, since even if we know we
322  // have a value in -16(r1), we will generate a load into r<n>
323  // and then load from 0(r<n>). Until that issue is fixed,
324  // tolerate 'U' and 'X' but don't output anything.
325  assert(MI->getOperand(OpNo).isReg());
326  return false;
327  }
328  }
329  }
330 
331  assert(MI->getOperand(OpNo).isReg());
332  O << "0(";
333  printOperand(MI, OpNo, O);
334  O << ")";
335  return false;
336 }
337 
338 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
339 /// exists for it. If not, create one. Then return a symbol that references
340 /// the TOC entry.
341 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(const MCSymbol *Sym) {
342  MCSymbol *&TOCEntry = TOC[Sym];
343  if (!TOCEntry)
344  TOCEntry = createTempSymbol("C");
345  return TOCEntry;
346 }
347 
348 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) {
349  emitStackMaps(SM);
350 }
351 
352 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
353  unsigned NumNOPBytes = MI.getOperand(1).getImm();
354 
355  SM.recordStackMap(MI);
356  assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
357 
358  // Scan ahead to trim the shadow.
359  const MachineBasicBlock &MBB = *MI.getParent();
361  ++MII;
362  while (NumNOPBytes > 0) {
363  if (MII == MBB.end() || MII->isCall() ||
364  MII->getOpcode() == PPC::DBG_VALUE ||
365  MII->getOpcode() == TargetOpcode::PATCHPOINT ||
366  MII->getOpcode() == TargetOpcode::STACKMAP)
367  break;
368  ++MII;
369  NumNOPBytes -= 4;
370  }
371 
372  // Emit nops.
373  for (unsigned i = 0; i < NumNOPBytes; i += 4)
374  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
375 }
376 
377 // Lower a patchpoint of the form:
378 // [<def>], <id>, <numBytes>, <target>, <numArgs>
379 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
380  SM.recordPatchPoint(MI);
381  PatchPointOpers Opers(&MI);
382 
383  unsigned EncodedBytes = 0;
384  const MachineOperand &CalleeMO = Opers.getCallTarget();
385 
386  if (CalleeMO.isImm()) {
387  int64_t CallTarget = CalleeMO.getImm();
388  if (CallTarget) {
389  assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
390  "High 16 bits of call target should be zero.");
391  Register ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
392  EncodedBytes = 0;
393  // Materialize the jump address:
394  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
395  .addReg(ScratchReg)
396  .addImm((CallTarget >> 32) & 0xFFFF));
397  ++EncodedBytes;
398  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
399  .addReg(ScratchReg)
400  .addReg(ScratchReg)
401  .addImm(32).addImm(16));
402  ++EncodedBytes;
403  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
404  .addReg(ScratchReg)
405  .addReg(ScratchReg)
406  .addImm((CallTarget >> 16) & 0xFFFF));
407  ++EncodedBytes;
408  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
409  .addReg(ScratchReg)
410  .addReg(ScratchReg)
411  .addImm(CallTarget & 0xFFFF));
412 
413  // Save the current TOC pointer before the remote call.
414  int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
415  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
416  .addReg(PPC::X2)
417  .addImm(TOCSaveOffset)
418  .addReg(PPC::X1));
419  ++EncodedBytes;
420 
421  // If we're on ELFv1, then we need to load the actual function pointer
422  // from the function descriptor.
423  if (!Subtarget->isELFv2ABI()) {
424  // Load the new TOC pointer and the function address, but not r11
425  // (needing this is rare, and loading it here would prevent passing it
426  // via a 'nest' parameter.
427  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
428  .addReg(PPC::X2)
429  .addImm(8)
430  .addReg(ScratchReg));
431  ++EncodedBytes;
432  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
433  .addReg(ScratchReg)
434  .addImm(0)
435  .addReg(ScratchReg));
436  ++EncodedBytes;
437  }
438 
439  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
440  .addReg(ScratchReg));
441  ++EncodedBytes;
442  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
443  ++EncodedBytes;
444 
445  // Restore the TOC pointer after the call.
446  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
447  .addReg(PPC::X2)
448  .addImm(TOCSaveOffset)
449  .addReg(PPC::X1));
450  ++EncodedBytes;
451  }
452  } else if (CalleeMO.isGlobal()) {
453  const GlobalValue *GValue = CalleeMO.getGlobal();
454  MCSymbol *MOSymbol = getSymbol(GValue);
455  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
456 
457  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
458  .addExpr(SymVar));
459  EncodedBytes += 2;
460  }
461 
462  // Each instruction is 4 bytes.
463  EncodedBytes *= 4;
464 
465  // Emit padding.
466  unsigned NumBytes = Opers.getNumPatchBytes();
467  assert(NumBytes >= EncodedBytes &&
468  "Patchpoint can't request size less than the length of a call.");
469  assert((NumBytes - EncodedBytes) % 4 == 0 &&
470  "Invalid number of NOP bytes requested!");
471  for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
472  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
473 }
474 
475 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
476 /// call to __tls_get_addr to the current output stream.
477 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
479  StringRef Name = "__tls_get_addr";
480  MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name);
482  const Module *M = MF->getFunction().getParent();
483 
484  assert(MI->getOperand(0).isReg() &&
485  ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
486  (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
487  "GETtls[ld]ADDR[32] must define GPR3");
488  assert(MI->getOperand(1).isReg() &&
489  ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
490  (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
491  "GETtls[ld]ADDR[32] must read GPR3");
492 
493  if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
494  isPositionIndependent())
496  const MCExpr *TlsRef =
497  MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
498 
499  // Add 32768 offset to the symbol so we follow up the latest GOT/PLT ABI.
500  if (Kind == MCSymbolRefExpr::VK_PLT && Subtarget->isSecurePlt() &&
502  TlsRef = MCBinaryExpr::createAdd(
503  TlsRef, MCConstantExpr::create(32768, OutContext), OutContext);
504  const MachineOperand &MO = MI->getOperand(2);
505  const GlobalValue *GValue = MO.getGlobal();
506  MCSymbol *MOSymbol = getSymbol(GValue);
507  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
508  EmitToStreamer(*OutStreamer,
509  MCInstBuilder(Subtarget->isPPC64() ?
510  PPC::BL8_NOP_TLS : PPC::BL_TLS)
511  .addExpr(TlsRef)
512  .addExpr(SymVar));
513 }
514 
515 /// Map a machine operand for a TOC pseudo-machine instruction to its
516 /// corresponding MCSymbol.
518  AsmPrinter &AP) {
519  switch (MO.getType()) {
521  return AP.getSymbol(MO.getGlobal());
523  return AP.GetCPISymbol(MO.getIndex());
525  return AP.GetJTISymbol(MO.getIndex());
527  return AP.GetBlockAddressSymbol(MO.getBlockAddress());
528  default:
529  llvm_unreachable("Unexpected operand type to get symbol.");
530  }
531 }
532 
533 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
534 /// the current output stream.
535 ///
536 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
537  MCInst TmpInst;
538  const bool IsDarwin = TM.getTargetTriple().isOSDarwin();
539  const bool IsPPC64 = Subtarget->isPPC64();
540  const bool IsAIX = Subtarget->isAIXABI();
541  const Module *M = MF->getFunction().getParent();
543 
544 #ifndef NDEBUG
545  // Validate that SPE and FPU are mutually exclusive in codegen
546  if (!MI->isInlineAsm()) {
547  for (const MachineOperand &MO: MI->operands()) {
548  if (MO.isReg()) {
549  Register Reg = MO.getReg();
550  if (Subtarget->hasSPE()) {
551  if (PPC::F4RCRegClass.contains(Reg) ||
552  PPC::F8RCRegClass.contains(Reg) ||
553  PPC::QBRCRegClass.contains(Reg) ||
554  PPC::QFRCRegClass.contains(Reg) ||
555  PPC::QSRCRegClass.contains(Reg) ||
556  PPC::VFRCRegClass.contains(Reg) ||
557  PPC::VRRCRegClass.contains(Reg) ||
558  PPC::VSFRCRegClass.contains(Reg) ||
559  PPC::VSSRCRegClass.contains(Reg)
560  )
561  llvm_unreachable("SPE targets cannot have FPRegs!");
562  } else {
563  if (PPC::SPERCRegClass.contains(Reg))
564  llvm_unreachable("SPE register found in FPU-targeted code!");
565  }
566  }
567  }
568  }
569 #endif
570  // Lower multi-instruction pseudo operations.
571  switch (MI->getOpcode()) {
572  default: break;
573  case TargetOpcode::DBG_VALUE:
574  llvm_unreachable("Should be handled target independently");
575  case TargetOpcode::STACKMAP:
576  return LowerSTACKMAP(SM, *MI);
577  case TargetOpcode::PATCHPOINT:
578  return LowerPATCHPOINT(SM, *MI);
579 
580  case PPC::MoveGOTtoLR: {
581  // Transform %lr = MoveGOTtoLR
582  // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
583  // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
584  // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
585  // blrl
586  // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
587  MCSymbol *GOTSymbol =
588  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
589  const MCExpr *OffsExpr =
592  OutContext),
593  MCConstantExpr::create(4, OutContext),
594  OutContext);
595 
596  // Emit the 'bl'.
597  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
598  return;
599  }
600  case PPC::MovePCtoLR:
601  case PPC::MovePCtoLR8: {
602  // Transform %lr = MovePCtoLR
603  // Into this, where the label is the PIC base:
604  // bl L1$pb
605  // L1$pb:
606  MCSymbol *PICBase = MF->getPICBaseSymbol();
607 
608  // Emit the 'bl'.
609  EmitToStreamer(*OutStreamer,
611  // FIXME: We would like an efficient form for this, so we
612  // don't have to do a lot of extra uniquing.
613  .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
614 
615  // Emit the label.
616  OutStreamer->EmitLabel(PICBase);
617  return;
618  }
619  case PPC::UpdateGBR: {
620  // Transform %rd = UpdateGBR(%rt, %ri)
621  // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
622  // add %rd, %rt, %ri
623  // or into (if secure plt mode is on):
624  // addis r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@ha
625  // addi r30, r30, {.LTOC,_GLOBAL_OFFSET_TABLE} - .L0$pb@l
626  // Get the offset from the GOT Base Register to the GOT
627  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
628  if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
629  unsigned PICR = TmpInst.getOperand(0).getReg();
630  MCSymbol *BaseSymbol = OutContext.getOrCreateSymbol(
631  M->getPICLevel() == PICLevel::SmallPIC ? "_GLOBAL_OFFSET_TABLE_"
632  : ".LTOC");
633  const MCExpr *PB =
634  MCSymbolRefExpr::create(MF->getPICBaseSymbol(), OutContext);
635 
636  const MCExpr *DeltaExpr = MCBinaryExpr::createSub(
637  MCSymbolRefExpr::create(BaseSymbol, OutContext), PB, OutContext);
638 
639  const MCExpr *DeltaHi = PPCMCExpr::createHa(DeltaExpr, false, OutContext);
640  EmitToStreamer(
641  *OutStreamer,
642  MCInstBuilder(PPC::ADDIS).addReg(PICR).addReg(PICR).addExpr(DeltaHi));
643 
644  const MCExpr *DeltaLo = PPCMCExpr::createLo(DeltaExpr, false, OutContext);
645  EmitToStreamer(
646  *OutStreamer,
647  MCInstBuilder(PPC::ADDI).addReg(PICR).addReg(PICR).addExpr(DeltaLo));
648  return;
649  } else {
650  MCSymbol *PICOffset =
651  MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol();
652  TmpInst.setOpcode(PPC::LWZ);
653  const MCExpr *Exp =
654  MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
655  const MCExpr *PB =
656  MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
658  OutContext);
659  const MCOperand TR = TmpInst.getOperand(1);
660  const MCOperand PICR = TmpInst.getOperand(0);
661 
662  // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
663  TmpInst.getOperand(1) =
664  MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext));
665  TmpInst.getOperand(0) = TR;
666  TmpInst.getOperand(2) = PICR;
667  EmitToStreamer(*OutStreamer, TmpInst);
668 
669  TmpInst.setOpcode(PPC::ADD4);
670  TmpInst.getOperand(0) = PICR;
671  TmpInst.getOperand(1) = TR;
672  TmpInst.getOperand(2) = PICR;
673  EmitToStreamer(*OutStreamer, TmpInst);
674  return;
675  }
676  }
677  case PPC::LWZtoc: {
678  assert(!IsDarwin && "TOC is an ELF/XCOFF construct.");
679 
680  // Transform %rN = LWZtoc @op1, %r2
681  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
682 
683  // Change the opcode to LWZ.
684  TmpInst.setOpcode(PPC::LWZ);
685 
686  const MachineOperand &MO = MI->getOperand(1);
687  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
688  "Invalid operand for LWZtoc.");
689 
690  // Map the operand to its corresponding MCSymbol.
691  const MCSymbol *const MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
692 
693  // Create a reference to the GOT entry for the symbol. The GOT entry will be
694  // synthesized later.
695  if (PL == PICLevel::SmallPIC && !IsAIX) {
696  const MCExpr *Exp =
698  OutContext);
699  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
700  EmitToStreamer(*OutStreamer, TmpInst);
701  return;
702  }
703 
704  // Otherwise, use the TOC. 'TOCEntry' is a label used to reference the
705  // storage allocated in the TOC which contains the address of
706  // 'MOSymbol'. Said TOC entry will be synthesized later.
707  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
708  const MCExpr *Exp =
709  MCSymbolRefExpr::create(TOCEntry, MCSymbolRefExpr::VK_None, OutContext);
710 
711  // AIX uses the label directly as the lwz displacement operand for
712  // references into the toc section. The displacement value will be generated
713  // relative to the toc-base.
714  if (IsAIX) {
715  assert(
716  TM.getCodeModel() == CodeModel::Small &&
717  "This pseudo should only be selected for 32-bit small code model.");
718  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
719  EmitToStreamer(*OutStreamer, TmpInst);
720  return;
721  }
722 
723  // Create an explicit subtract expression between the local symbol and
724  // '.LTOC' to manifest the toc-relative offset.
725  const MCExpr *PB = MCSymbolRefExpr::create(
726  OutContext.getOrCreateSymbol(Twine(".LTOC")), OutContext);
727  Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
728  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
729  EmitToStreamer(*OutStreamer, TmpInst);
730  return;
731  }
732  case PPC::LDtocJTI:
733  case PPC::LDtocCPT:
734  case PPC::LDtocBA:
735  case PPC::LDtoc: {
736  assert(!IsDarwin && "TOC is an ELF/XCOFF construct");
737 
738  // Transform %x3 = LDtoc @min1, %x2
739  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
740 
741  // Change the opcode to LD.
742  TmpInst.setOpcode(PPC::LD);
743 
744  const MachineOperand &MO = MI->getOperand(1);
745  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
746  "Invalid operand!");
747 
748  // Map the machine operand to its corresponding MCSymbol, then map the
749  // global address operand to be a reference to the TOC entry we will
750  // synthesize later.
751  MCSymbol *TOCEntry =
752  lookUpOrCreateTOCEntry(getMCSymbolForTOCPseudoMO(MO, *this));
753 
756  const MCExpr *Exp =
757  MCSymbolRefExpr::create(TOCEntry, VK, OutContext);
758  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
759  EmitToStreamer(*OutStreamer, TmpInst);
760  return;
761  }
762  case PPC::ADDIStocHA: {
763  assert((IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large) &&
764  "This pseudo should only be selected for 32-bit large code model on"
765  " AIX.");
766 
767  // Transform %rd = ADDIStocHA %rA, @sym(%r2)
768  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
769 
770  // Change the opcode to ADDIS.
771  TmpInst.setOpcode(PPC::ADDIS);
772 
773  const MachineOperand &MO = MI->getOperand(2);
774  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
775  "Invalid operand for ADDIStocHA.");
776 
777  // Map the machine operand to its corresponding MCSymbol.
778  MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
779 
780  // Always use TOC on AIX. Map the global address operand to be a reference
781  // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to
782  // reference the storage allocated in the TOC which contains the address of
783  // 'MOSymbol'.
784  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
785  const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry,
787  OutContext);
788  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
789  EmitToStreamer(*OutStreamer, TmpInst);
790  return;
791  }
792  case PPC::LWZtocL: {
793  assert(IsAIX && !IsPPC64 && TM.getCodeModel() == CodeModel::Large &&
794  "This pseudo should only be selected for 32-bit large code model on"
795  " AIX.");
796 
797  // Transform %rd = LWZtocL @sym, %rs.
798  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
799 
800  // Change the opcode to lwz.
801  TmpInst.setOpcode(PPC::LWZ);
802 
803  const MachineOperand &MO = MI->getOperand(1);
804  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
805  "Invalid operand for LWZtocL.");
806 
807  // Map the machine operand to its corresponding MCSymbol.
808  MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
809 
810  // Always use TOC on AIX. Map the global address operand to be a reference
811  // to the TOC entry we will synthesize later. 'TOCEntry' is a label used to
812  // reference the storage allocated in the TOC which contains the address of
813  // 'MOSymbol'.
814  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
815  const MCExpr *Exp = MCSymbolRefExpr::create(TOCEntry,
817  OutContext);
818  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
819  EmitToStreamer(*OutStreamer, TmpInst);
820  return;
821  }
822  case PPC::ADDIStocHA8: {
823  assert(!IsDarwin && "TOC is an ELF/XCOFF construct");
824 
825  // Transform %xd = ADDIStocHA8 %x2, @sym
826  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
827 
828  // Change the opcode to ADDIS8. If the global address is the address of
829  // an external symbol, is a jump table address, is a block address, or is a
830  // constant pool index with large code model enabled, then generate a TOC
831  // entry and reference that. Otherwise, reference the symbol directly.
832  TmpInst.setOpcode(PPC::ADDIS8);
833 
834  const MachineOperand &MO = MI->getOperand(2);
835  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress()) &&
836  "Invalid operand for ADDIStocHA8!");
837 
838  const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
839 
840  const bool GlobalToc =
841  MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal());
842  if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
843  (MO.isCPI() && TM.getCodeModel() == CodeModel::Large))
844  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
845 
848 
849  const MCExpr *Exp =
850  MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
851 
852  if (!MO.isJTI() && MO.getOffset())
853  Exp = MCBinaryExpr::createAdd(Exp,
855  OutContext),
856  OutContext);
857 
858  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
859  EmitToStreamer(*OutStreamer, TmpInst);
860  return;
861  }
862  case PPC::LDtocL: {
863  assert(!IsDarwin && "TOC is an ELF/XCOFF construct");
864 
865  // Transform %xd = LDtocL @sym, %xs
866  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
867 
868  // Change the opcode to LD. If the global address is the address of
869  // an external symbol, is a jump table address, is a block address, or is
870  // a constant pool index with large code model enabled, then generate a
871  // TOC entry and reference that. Otherwise, reference the symbol directly.
872  TmpInst.setOpcode(PPC::LD);
873 
874  const MachineOperand &MO = MI->getOperand(1);
875  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
876  MO.isBlockAddress()) &&
877  "Invalid operand for LDtocL!");
878 
880  (!MO.isGlobal() || Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
881  "LDtocL used on symbol that could be accessed directly is "
882  "invalid. Must match ADDIStocHA8."));
883 
884  const MCSymbol *MOSymbol = getMCSymbolForTOCPseudoMO(MO, *this);
885 
886  if (!MO.isCPI() || TM.getCodeModel() == CodeModel::Large)
887  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
888 
891  const MCExpr *Exp =
892  MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
893  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
894  EmitToStreamer(*OutStreamer, TmpInst);
895  return;
896  }
897  case PPC::ADDItocL: {
898  // Transform %xd = ADDItocL %xs, @sym
899  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
900 
901  // Change the opcode to ADDI8. If the global address is external, then
902  // generate a TOC entry and reference that. Otherwise, reference the
903  // symbol directly.
904  TmpInst.setOpcode(PPC::ADDI8);
905 
906  const MachineOperand &MO = MI->getOperand(2);
907  assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL.");
908 
910  !(MO.isGlobal() && Subtarget->isGVIndirectSymbol(MO.getGlobal())) &&
911  "Interposable definitions must use indirect access."));
912 
913  const MCExpr *Exp =
915  MCSymbolRefExpr::VK_PPC_TOC_LO, OutContext);
916  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
917  EmitToStreamer(*OutStreamer, TmpInst);
918  return;
919  }
920  case PPC::ADDISgotTprelHA: {
921  // Transform: %xd = ADDISgotTprelHA %x2, @sym
922  // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
923  assert(IsPPC64 && "Not supported for 32-bit PowerPC");
924  const MachineOperand &MO = MI->getOperand(2);
925  const GlobalValue *GValue = MO.getGlobal();
926  MCSymbol *MOSymbol = getSymbol(GValue);
927  const MCExpr *SymGotTprel =
929  OutContext);
930  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
931  .addReg(MI->getOperand(0).getReg())
932  .addReg(MI->getOperand(1).getReg())
933  .addExpr(SymGotTprel));
934  return;
935  }
936  case PPC::LDgotTprelL:
937  case PPC::LDgotTprelL32: {
938  // Transform %xd = LDgotTprelL @sym, %xs
939  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
940 
941  // Change the opcode to LD.
942  TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ);
943  const MachineOperand &MO = MI->getOperand(1);
944  const GlobalValue *GValue = MO.getGlobal();
945  MCSymbol *MOSymbol = getSymbol(GValue);
946  const MCExpr *Exp = MCSymbolRefExpr::create(
947  MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TPREL_LO
949  OutContext);
950  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
951  EmitToStreamer(*OutStreamer, TmpInst);
952  return;
953  }
954 
955  case PPC::PPC32PICGOT: {
956  MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
957  MCSymbol *GOTRef = OutContext.createTempSymbol();
958  MCSymbol *NextInstr = OutContext.createTempSymbol();
959 
960  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
961  // FIXME: We would like an efficient form for this, so we don't have to do
962  // a lot of extra uniquing.
963  .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
964  const MCExpr *OffsExpr =
965  MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
966  MCSymbolRefExpr::create(GOTRef, OutContext),
967  OutContext);
968  OutStreamer->EmitLabel(GOTRef);
969  OutStreamer->EmitValue(OffsExpr, 4);
970  OutStreamer->EmitLabel(NextInstr);
971  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
972  .addReg(MI->getOperand(0).getReg()));
973  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
974  .addReg(MI->getOperand(1).getReg())
975  .addImm(0)
976  .addReg(MI->getOperand(0).getReg()));
977  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
978  .addReg(MI->getOperand(0).getReg())
979  .addReg(MI->getOperand(1).getReg())
980  .addReg(MI->getOperand(0).getReg()));
981  return;
982  }
983  case PPC::PPC32GOT: {
984  MCSymbol *GOTSymbol =
985  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
986  const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
987  GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
988  const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
989  GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
990  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
991  .addReg(MI->getOperand(0).getReg())
992  .addExpr(SymGotTlsL));
993  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
994  .addReg(MI->getOperand(0).getReg())
995  .addReg(MI->getOperand(0).getReg())
996  .addExpr(SymGotTlsHA));
997  return;
998  }
999  case PPC::ADDIStlsgdHA: {
1000  // Transform: %xd = ADDIStlsgdHA %x2, @sym
1001  // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
1002  assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1003  const MachineOperand &MO = MI->getOperand(2);
1004  const GlobalValue *GValue = MO.getGlobal();
1005  MCSymbol *MOSymbol = getSymbol(GValue);
1006  const MCExpr *SymGotTlsGD =
1008  OutContext);
1009  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1010  .addReg(MI->getOperand(0).getReg())
1011  .addReg(MI->getOperand(1).getReg())
1012  .addExpr(SymGotTlsGD));
1013  return;
1014  }
1015  case PPC::ADDItlsgdL:
1016  // Transform: %xd = ADDItlsgdL %xs, @sym
1017  // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
1018  case PPC::ADDItlsgdL32: {
1019  // Transform: %rd = ADDItlsgdL32 %rs, @sym
1020  // Into: %rd = ADDI %rs, sym@got@tlsgd
1021  const MachineOperand &MO = MI->getOperand(2);
1022  const GlobalValue *GValue = MO.getGlobal();
1023  MCSymbol *MOSymbol = getSymbol(GValue);
1024  const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
1025  MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
1027  OutContext);
1028  EmitToStreamer(*OutStreamer,
1029  MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1030  .addReg(MI->getOperand(0).getReg())
1031  .addReg(MI->getOperand(1).getReg())
1032  .addExpr(SymGotTlsGD));
1033  return;
1034  }
1035  case PPC::GETtlsADDR:
1036  // Transform: %x3 = GETtlsADDR %x3, @sym
1037  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
1038  case PPC::GETtlsADDR32: {
1039  // Transform: %r3 = GETtlsADDR32 %r3, @sym
1040  // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
1041  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
1042  return;
1043  }
1044  case PPC::ADDIStlsldHA: {
1045  // Transform: %xd = ADDIStlsldHA %x2, @sym
1046  // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
1047  assert(IsPPC64 && "Not supported for 32-bit PowerPC");
1048  const MachineOperand &MO = MI->getOperand(2);
1049  const GlobalValue *GValue = MO.getGlobal();
1050  MCSymbol *MOSymbol = getSymbol(GValue);
1051  const MCExpr *SymGotTlsLD =
1053  OutContext);
1054  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
1055  .addReg(MI->getOperand(0).getReg())
1056  .addReg(MI->getOperand(1).getReg())
1057  .addExpr(SymGotTlsLD));
1058  return;
1059  }
1060  case PPC::ADDItlsldL:
1061  // Transform: %xd = ADDItlsldL %xs, @sym
1062  // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
1063  case PPC::ADDItlsldL32: {
1064  // Transform: %rd = ADDItlsldL32 %rs, @sym
1065  // Into: %rd = ADDI %rs, sym@got@tlsld
1066  const MachineOperand &MO = MI->getOperand(2);
1067  const GlobalValue *GValue = MO.getGlobal();
1068  MCSymbol *MOSymbol = getSymbol(GValue);
1069  const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
1070  MOSymbol, IsPPC64 ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
1072  OutContext);
1073  EmitToStreamer(*OutStreamer,
1074  MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1075  .addReg(MI->getOperand(0).getReg())
1076  .addReg(MI->getOperand(1).getReg())
1077  .addExpr(SymGotTlsLD));
1078  return;
1079  }
1080  case PPC::GETtlsldADDR:
1081  // Transform: %x3 = GETtlsldADDR %x3, @sym
1082  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
1083  case PPC::GETtlsldADDR32: {
1084  // Transform: %r3 = GETtlsldADDR32 %r3, @sym
1085  // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
1086  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
1087  return;
1088  }
1089  case PPC::ADDISdtprelHA:
1090  // Transform: %xd = ADDISdtprelHA %xs, @sym
1091  // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
1092  case PPC::ADDISdtprelHA32: {
1093  // Transform: %rd = ADDISdtprelHA32 %rs, @sym
1094  // Into: %rd = ADDIS %rs, sym@dtprel@ha
1095  const MachineOperand &MO = MI->getOperand(2);
1096  const GlobalValue *GValue = MO.getGlobal();
1097  MCSymbol *MOSymbol = getSymbol(GValue);
1098  const MCExpr *SymDtprel =
1100  OutContext);
1101  EmitToStreamer(
1102  *OutStreamer,
1103  MCInstBuilder(IsPPC64 ? PPC::ADDIS8 : PPC::ADDIS)
1104  .addReg(MI->getOperand(0).getReg())
1105  .addReg(MI->getOperand(1).getReg())
1106  .addExpr(SymDtprel));
1107  return;
1108  }
1109  case PPC::ADDIdtprelL:
1110  // Transform: %xd = ADDIdtprelL %xs, @sym
1111  // Into: %xd = ADDI8 %xs, sym@dtprel@l
1112  case PPC::ADDIdtprelL32: {
1113  // Transform: %rd = ADDIdtprelL32 %rs, @sym
1114  // Into: %rd = ADDI %rs, sym@dtprel@l
1115  const MachineOperand &MO = MI->getOperand(2);
1116  const GlobalValue *GValue = MO.getGlobal();
1117  MCSymbol *MOSymbol = getSymbol(GValue);
1118  const MCExpr *SymDtprel =
1120  OutContext);
1121  EmitToStreamer(*OutStreamer,
1122  MCInstBuilder(IsPPC64 ? PPC::ADDI8 : PPC::ADDI)
1123  .addReg(MI->getOperand(0).getReg())
1124  .addReg(MI->getOperand(1).getReg())
1125  .addExpr(SymDtprel));
1126  return;
1127  }
1128  case PPC::MFOCRF:
1129  case PPC::MFOCRF8:
1130  if (!Subtarget->hasMFOCRF()) {
1131  // Transform: %r3 = MFOCRF %cr7
1132  // Into: %r3 = MFCR ;; cr7
1133  unsigned NewOpcode =
1134  MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1135  OutStreamer->AddComment(PPCInstPrinter::
1136  getRegisterName(MI->getOperand(1).getReg()));
1137  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1138  .addReg(MI->getOperand(0).getReg()));
1139  return;
1140  }
1141  break;
1142  case PPC::MTOCRF:
1143  case PPC::MTOCRF8:
1144  if (!Subtarget->hasMFOCRF()) {
1145  // Transform: %cr7 = MTOCRF %r3
1146  // Into: MTCRF mask, %r3 ;; cr7
1147  unsigned NewOpcode =
1148  MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1149  unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1150  ->getEncodingValue(MI->getOperand(0).getReg());
1151  OutStreamer->AddComment(PPCInstPrinter::
1152  getRegisterName(MI->getOperand(0).getReg()));
1153  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1154  .addImm(Mask)
1155  .addReg(MI->getOperand(1).getReg()));
1156  return;
1157  }
1158  break;
1159  case PPC::LD:
1160  case PPC::STD:
1161  case PPC::LWA_32:
1162  case PPC::LWA: {
1163  // Verify alignment is legal, so we don't create relocations
1164  // that can't be supported.
1165  // FIXME: This test is currently disabled for Darwin. The test
1166  // suite shows a handful of test cases that fail this check for
1167  // Darwin. Those need to be investigated before this sanity test
1168  // can be enabled for those subtargets.
1169  if (!IsDarwin) {
1170  unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1171  const MachineOperand &MO = MI->getOperand(OpNum);
1172  if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
1173  llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1174  }
1175  // Now process the instruction normally.
1176  break;
1177  }
1178  }
1179 
1180  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, IsDarwin);
1181  EmitToStreamer(*OutStreamer, TmpInst);
1182 }
1183 
1184 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) {
1185  if (!Subtarget->isPPC64())
1186  return PPCAsmPrinter::EmitInstruction(MI);
1187 
1188  switch (MI->getOpcode()) {
1189  default:
1190  return PPCAsmPrinter::EmitInstruction(MI);
1191  case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1192  // .begin:
1193  // b .end # lis 0, FuncId[16..32]
1194  // nop # li 0, FuncId[0..15]
1195  // std 0, -8(1)
1196  // mflr 0
1197  // bl __xray_FunctionEntry
1198  // mtlr 0
1199  // .end:
1200  //
1201  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1202  // of instructions change.
1203  MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1204  MCSymbol *EndOfSled = OutContext.createTempSymbol();
1205  OutStreamer->EmitLabel(BeginOfSled);
1206  EmitToStreamer(*OutStreamer,
1207  MCInstBuilder(PPC::B).addExpr(
1208  MCSymbolRefExpr::create(EndOfSled, OutContext)));
1209  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1210  EmitToStreamer(
1211  *OutStreamer,
1212  MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1213  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1214  EmitToStreamer(*OutStreamer,
1215  MCInstBuilder(PPC::BL8_NOP)
1216  .addExpr(MCSymbolRefExpr::create(
1217  OutContext.getOrCreateSymbol("__xray_FunctionEntry"),
1218  OutContext)));
1219  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1220  OutStreamer->EmitLabel(EndOfSled);
1221  recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER);
1222  break;
1223  }
1224  case TargetOpcode::PATCHABLE_RET: {
1225  unsigned RetOpcode = MI->getOperand(0).getImm();
1226  MCInst RetInst;
1227  RetInst.setOpcode(RetOpcode);
1228  for (const auto &MO :
1229  make_range(std::next(MI->operands_begin()), MI->operands_end())) {
1230  MCOperand MCOp;
1231  if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false))
1232  RetInst.addOperand(MCOp);
1233  }
1234 
1235  bool IsConditional;
1236  if (RetOpcode == PPC::BCCLR) {
1237  IsConditional = true;
1238  } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1239  RetOpcode == PPC::TCRETURNai8) {
1240  break;
1241  } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1242  IsConditional = false;
1243  } else {
1244  EmitToStreamer(*OutStreamer, RetInst);
1245  break;
1246  }
1247 
1248  MCSymbol *FallthroughLabel;
1249  if (IsConditional) {
1250  // Before:
1251  // bgtlr cr0
1252  //
1253  // After:
1254  // ble cr0, .end
1255  // .p2align 3
1256  // .begin:
1257  // blr # lis 0, FuncId[16..32]
1258  // nop # li 0, FuncId[0..15]
1259  // std 0, -8(1)
1260  // mflr 0
1261  // bl __xray_FunctionExit
1262  // mtlr 0
1263  // blr
1264  // .end:
1265  //
1266  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1267  // of instructions change.
1268  FallthroughLabel = OutContext.createTempSymbol();
1269  EmitToStreamer(
1270  *OutStreamer,
1271  MCInstBuilder(PPC::BCC)
1272  .addImm(PPC::InvertPredicate(
1273  static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1274  .addReg(MI->getOperand(2).getReg())
1275  .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));
1276  RetInst = MCInst();
1277  RetInst.setOpcode(PPC::BLR8);
1278  }
1279  // .p2align 3
1280  // .begin:
1281  // b(lr)? # lis 0, FuncId[16..32]
1282  // nop # li 0, FuncId[0..15]
1283  // std 0, -8(1)
1284  // mflr 0
1285  // bl __xray_FunctionExit
1286  // mtlr 0
1287  // b(lr)?
1288  //
1289  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1290  // of instructions change.
1291  OutStreamer->EmitCodeAlignment(8);
1292  MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1293  OutStreamer->EmitLabel(BeginOfSled);
1294  EmitToStreamer(*OutStreamer, RetInst);
1295  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1296  EmitToStreamer(
1297  *OutStreamer,
1298  MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1299  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1300  EmitToStreamer(*OutStreamer,
1301  MCInstBuilder(PPC::BL8_NOP)
1302  .addExpr(MCSymbolRefExpr::create(
1303  OutContext.getOrCreateSymbol("__xray_FunctionExit"),
1304  OutContext)));
1305  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1306  EmitToStreamer(*OutStreamer, RetInst);
1307  if (IsConditional)
1308  OutStreamer->EmitLabel(FallthroughLabel);
1309  recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT);
1310  break;
1311  }
1312  case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1313  llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1314  case TargetOpcode::PATCHABLE_TAIL_CALL:
1315  // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1316  // normal function exit from a tail exit.
1317  llvm_unreachable("Tail call is handled in the normal case. See comments "
1318  "around this assert.");
1319  }
1320 }
1321 
1322 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
1323  if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1324  PPCTargetStreamer *TS =
1325  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1326 
1327  if (TS)
1328  TS->emitAbiVersion(2);
1329  }
1330 
1331  if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1332  !isPositionIndependent())
1334 
1335  if (M.getPICLevel() == PICLevel::SmallPIC)
1337 
1338  OutStreamer->SwitchSection(OutContext.getELFSection(
1340 
1341  MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1342  MCSymbol *CurrentPos = OutContext.createTempSymbol();
1343 
1344  OutStreamer->EmitLabel(CurrentPos);
1345 
1346  // The GOT pointer points to the middle of the GOT, in order to reference the
1347  // entire 64kB range. 0x8000 is the midpoint.
1348  const MCExpr *tocExpr =
1349  MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1350  MCConstantExpr::create(0x8000, OutContext),
1351  OutContext);
1352 
1353  OutStreamer->EmitAssignment(TOCSym, tocExpr);
1354 
1355  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1356 }
1357 
1358 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
1359  // linux/ppc32 - Normal entry label.
1360  if (!Subtarget->isPPC64() &&
1361  (!isPositionIndependent() ||
1362  MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1364 
1365  if (!Subtarget->isPPC64()) {
1366  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1367  if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
1368  MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();
1369  MCSymbol *PICBase = MF->getPICBaseSymbol();
1370  OutStreamer->EmitLabel(RelocSymbol);
1371 
1372  const MCExpr *OffsExpr =
1374  MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1375  OutContext),
1376  MCSymbolRefExpr::create(PICBase, OutContext),
1377  OutContext);
1378  OutStreamer->EmitValue(OffsExpr, 4);
1379  OutStreamer->EmitLabel(CurrentFnSym);
1380  return;
1381  } else
1383  }
1384 
1385  // ELFv2 ABI - Normal entry label.
1386  if (Subtarget->isELFv2ABI()) {
1387  // In the Large code model, we allow arbitrary displacements between
1388  // the text section and its associated TOC section. We place the
1389  // full 8-byte offset to the TOC in memory immediately preceding
1390  // the function global entry point.
1391  if (TM.getCodeModel() == CodeModel::Large
1392  && !MF->getRegInfo().use_empty(PPC::X2)) {
1393  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1394 
1395  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1396  MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol();
1397  const MCExpr *TOCDeltaExpr =
1398  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1399  MCSymbolRefExpr::create(GlobalEPSymbol,
1400  OutContext),
1401  OutContext);
1402 
1403  OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol());
1404  OutStreamer->EmitValue(TOCDeltaExpr, 8);
1405  }
1407  }
1408 
1409  // Emit an official procedure descriptor.
1410  MCSectionSubPair Current = OutStreamer->getCurrentSection();
1411  MCSectionELF *Section = OutStreamer->getContext().getELFSection(
1413  OutStreamer->SwitchSection(Section);
1414  OutStreamer->EmitLabel(CurrentFnSym);
1415  OutStreamer->EmitValueToAlignment(8);
1416  MCSymbol *Symbol1 = CurrentFnSymForSize;
1417  // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
1418  // entry point.
1419  OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
1420  8 /*size*/);
1421  MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1422  // Generates a R_PPC64_TOC relocation for TOC base insertion.
1423  OutStreamer->EmitValue(
1425  8/*size*/);
1426  // Emit a null environment pointer.
1427  OutStreamer->EmitIntValue(0, 8 /* size */);
1428  OutStreamer->SwitchSection(Current.first, Current.second);
1429 }
1430 
1431 bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
1432  const DataLayout &DL = getDataLayout();
1433 
1434  bool isPPC64 = DL.getPointerSizeInBits() == 64;
1435 
1436  PPCTargetStreamer &TS =
1437  static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
1438 
1439  if (!TOC.empty()) {
1441 
1442  if (isPPC64)
1443  Section = OutStreamer->getContext().getELFSection(
1445  else
1446  Section = OutStreamer->getContext().getELFSection(
1448  OutStreamer->SwitchSection(Section);
1449 
1450  for (const auto &TOCMapPair : TOC) {
1451  const MCSymbol *const TOCEntryTarget = TOCMapPair.first;
1452  MCSymbol *const TOCEntryLabel = TOCMapPair.second;
1453 
1454  OutStreamer->EmitLabel(TOCEntryLabel);
1455  if (isPPC64) {
1456  TS.emitTCEntry(*TOCEntryTarget);
1457  } else {
1458  OutStreamer->EmitValueToAlignment(4);
1459  OutStreamer->EmitSymbolValue(TOCEntryTarget, 4);
1460  }
1461  }
1462  }
1463 
1464  return AsmPrinter::doFinalization(M);
1465 }
1466 
1467 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
1468 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() {
1469  // In the ELFv2 ABI, in functions that use the TOC register, we need to
1470  // provide two entry points. The ABI guarantees that when calling the
1471  // local entry point, r2 is set up by the caller to contain the TOC base
1472  // for this function, and when calling the global entry point, r12 is set
1473  // up by the caller to hold the address of the global entry point. We
1474  // thus emit a prefix sequence along the following lines:
1475  //
1476  // func:
1477  // .Lfunc_gepNN:
1478  // # global entry point
1479  // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
1480  // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
1481  // .Lfunc_lepNN:
1482  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1483  // # local entry point, followed by function body
1484  //
1485  // For the Large code model, we create
1486  //
1487  // .Lfunc_tocNN:
1488  // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
1489  // func:
1490  // .Lfunc_gepNN:
1491  // # global entry point
1492  // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
1493  // add r2,r2,r12
1494  // .Lfunc_lepNN:
1495  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1496  // # local entry point, followed by function body
1497  //
1498  // This ensures we have r2 set up correctly while executing the function
1499  // body, no matter which entry point is called.
1500  if (Subtarget->isELFv2ABI()
1501  // Only do all that if the function uses r2 in the first place.
1502  && !MF->getRegInfo().use_empty(PPC::X2)) {
1503  // Note: The logic here must be synchronized with the code in the
1504  // branch-selection pass which sets the offset of the first block in the
1505  // function. This matters because it affects the alignment.
1506  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1507 
1508  MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol();
1509  OutStreamer->EmitLabel(GlobalEntryLabel);
1510  const MCSymbolRefExpr *GlobalEntryLabelExp =
1511  MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
1512 
1513  if (TM.getCodeModel() != CodeModel::Large) {
1514  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1515  const MCExpr *TOCDeltaExpr =
1516  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1517  GlobalEntryLabelExp, OutContext);
1518 
1519  const MCExpr *TOCDeltaHi =
1520  PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext);
1521  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1522  .addReg(PPC::X2)
1523  .addReg(PPC::X12)
1524  .addExpr(TOCDeltaHi));
1525 
1526  const MCExpr *TOCDeltaLo =
1527  PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext);
1528  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
1529  .addReg(PPC::X2)
1530  .addReg(PPC::X2)
1531  .addExpr(TOCDeltaLo));
1532  } else {
1533  MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol();
1534  const MCExpr *TOCOffsetDeltaExpr =
1535  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
1536  GlobalEntryLabelExp, OutContext);
1537 
1538  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
1539  .addReg(PPC::X2)
1540  .addExpr(TOCOffsetDeltaExpr)
1541  .addReg(PPC::X12));
1542  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
1543  .addReg(PPC::X2)
1544  .addReg(PPC::X2)
1545  .addReg(PPC::X12));
1546  }
1547 
1548  MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol();
1549  OutStreamer->EmitLabel(LocalEntryLabel);
1550  const MCSymbolRefExpr *LocalEntryLabelExp =
1551  MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
1552  const MCExpr *LocalOffsetExp =
1553  MCBinaryExpr::createSub(LocalEntryLabelExp,
1554  GlobalEntryLabelExp, OutContext);
1555 
1556  PPCTargetStreamer *TS =
1557  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1558 
1559  if (TS)
1560  TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
1561  }
1562 }
1563 
1564 /// EmitFunctionBodyEnd - Print the traceback table before the .size
1565 /// directive.
1566 ///
1567 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() {
1568  // Only the 64-bit target requires a traceback table. For now,
1569  // we only emit the word of zeroes that GDB requires to find
1570  // the end of the function, and zeroes for the eight-byte
1571  // mandatory fields.
1572  // FIXME: We should fill in the eight-byte mandatory fields as described in
1573  // the PPC64 ELF ABI (this is a low-priority item because GDB does not
1574  // currently make use of these fields).
1575  if (Subtarget->isPPC64()) {
1576  OutStreamer->EmitIntValue(0, 4/*size*/);
1577  OutStreamer->EmitIntValue(0, 8/*size*/);
1578  }
1579 }
1580 
1581 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
1582  static const char *const CPUDirectives[] = {
1583  "",
1584  "ppc",
1585  "ppc440",
1586  "ppc601",
1587  "ppc602",
1588  "ppc603",
1589  "ppc7400",
1590  "ppc750",
1591  "ppc970",
1592  "ppcA2",
1593  "ppce500",
1594  "ppce500mc",
1595  "ppce5500",
1596  "power3",
1597  "power4",
1598  "power5",
1599  "power5x",
1600  "power6",
1601  "power6x",
1602  "power7",
1603  // FIXME: why is power8 missing here?
1604  "ppc64",
1605  "ppc64le",
1606  "power9"
1607  };
1608 
1609  // Get the numerically largest directive.
1610  // FIXME: How should we merge darwin directives?
1611  unsigned Directive = PPC::DIR_NONE;
1612  for (const Function &F : M) {
1613  const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F);
1614  unsigned FDir = STI.getDarwinDirective();
1615  Directive = Directive > FDir ? FDir : STI.getDarwinDirective();
1616  if (STI.hasMFOCRF() && Directive < PPC::DIR_970)
1617  Directive = PPC::DIR_970;
1618  if (STI.hasAltivec() && Directive < PPC::DIR_7400)
1619  Directive = PPC::DIR_7400;
1620  if (STI.isPPC64() && Directive < PPC::DIR_64)
1621  Directive = PPC::DIR_64;
1622  }
1623 
1624  assert(Directive <= PPC::DIR_64 && "Directive out of range.");
1625 
1626  assert(Directive < array_lengthof(CPUDirectives) &&
1627  "CPUDirectives[] might not be up-to-date!");
1628  PPCTargetStreamer &TStreamer =
1629  *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1630  TStreamer.emitMachine(CPUDirectives[Directive]);
1631 
1632  // Prime text sections so they are adjacent. This reduces the likelihood a
1633  // large data or debug section causes a branch to exceed 16M limit.
1634  const TargetLoweringObjectFileMachO &TLOFMacho =
1635  static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1636  OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection());
1637  if (TM.getRelocationModel() == Reloc::PIC_) {
1638  OutStreamer->SwitchSection(
1639  OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
1642  32, SectionKind::getText()));
1643  } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
1644  OutStreamer->SwitchSection(
1645  OutContext.getMachOSection("__TEXT","__symbol_stub1",
1648  16, SectionKind::getText()));
1649  }
1650  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1651 }
1652 
1653 bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
1654  bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64;
1655 
1656  // Darwin/PPC always uses mach-o.
1657  const TargetLoweringObjectFileMachO &TLOFMacho =
1658  static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1659  if (MMI) {
1660  MachineModuleInfoMachO &MMIMacho =
1661  MMI->getObjFileInfo<MachineModuleInfoMachO>();
1662 
1663  if (MAI->doesSupportExceptionHandling()) {
1664  // Add the (possibly multiple) personalities to the set of global values.
1665  // Only referenced functions get into the Personalities list.
1666  for (const Function *Personality : MMI->getPersonalities()) {
1667  if (Personality) {
1668  MCSymbol *NLPSym =
1669  getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr");
1671  MMIMacho.getGVStubEntry(NLPSym);
1672  StubSym =
1673  MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true);
1674  }
1675  }
1676  }
1677 
1678  // Output stubs for dynamically-linked functions.
1680 
1681  // Output macho stubs for external and common global variables.
1682  if (!Stubs.empty()) {
1683  // Switch with ".non_lazy_symbol_pointer" directive.
1684  OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1685  EmitAlignment(isPPC64 ? Align(8) : Align(4));
1686 
1687  for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1688  // L_foo$stub:
1689  OutStreamer->EmitLabel(Stubs[i].first);
1690  // .indirect_symbol _foo
1691  MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1692  OutStreamer->EmitSymbolAttribute(MCSym.getPointer(),
1694 
1695  if (MCSym.getInt())
1696  // External to current translation unit.
1697  OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/);
1698  else
1699  // Internal to current translation unit.
1700  //
1701  // When we place the LSDA into the TEXT section, the type info
1702  // pointers
1703  // need to be indirect and pc-rel. We accomplish this by using NLPs.
1704  // However, sometimes the types are local to the file. So we need to
1705  // fill in the value for the NLP in those cases.
1706  OutStreamer->EmitValue(
1707  MCSymbolRefExpr::create(MCSym.getPointer(), OutContext),
1708  isPPC64 ? 8 : 4 /*size*/);
1709  }
1710 
1711  Stubs.clear();
1712  OutStreamer->AddBlankLine();
1713  }
1714  }
1715 
1716  // Funny Darwin hack: This flag tells the linker that no global symbols
1717  // contain code that falls through to other global symbols (e.g. the obvious
1718  // implementation of multiple entry points). If this doesn't occur, the
1719  // linker can safely perform dead code stripping. Since LLVM never generates
1720  // code that does this, it is always safe to set.
1721  OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
1722 
1723  return AsmPrinter::doFinalization(M);
1724 }
1725 
1726 void PPCAIXAsmPrinter::SetupMachineFunction(MachineFunction &MF) {
1727  // Get the function descriptor symbol.
1728  CurrentFnDescSym = getSymbol(&MF.getFunction());
1729  // Set the containing csect.
1730  MCSectionXCOFF *FnDescSec = OutStreamer->getContext().getXCOFFSection(
1731  CurrentFnDescSym->getName(), XCOFF::XMC_DS, XCOFF::XTY_SD,
1733  cast<MCSymbolXCOFF>(CurrentFnDescSym)->setContainingCsect(FnDescSec);
1734 
1736 }
1737 
1738 void PPCAIXAsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
1739  // Early error checking limiting what is supported.
1740  if (GV->isThreadLocal())
1741  report_fatal_error("Thread local not yet supported on AIX.");
1742 
1743  if (GV->hasSection())
1744  report_fatal_error("Custom section for Data not yet supported.");
1745 
1746  if (GV->hasComdat())
1747  report_fatal_error("COMDAT not yet supported by AIX.");
1748 
1749  SectionKind GVKind = getObjFileLowering().getKindForGlobal(GV, TM);
1750  if (!GVKind.isCommon() && !GVKind.isBSSLocal() && !GVKind.isData())
1751  report_fatal_error("Encountered a global variable kind that is "
1752  "not supported yet.");
1753 
1754  // Create the containing csect and switch to it.
1755  MCSectionXCOFF *CSect = cast<MCSectionXCOFF>(
1756  getObjFileLowering().SectionForGlobal(GV, GVKind, TM));
1757  OutStreamer->SwitchSection(CSect);
1758 
1759  // Create the symbol, set its storage class, and emit it.
1760  MCSymbolXCOFF *GVSym = cast<MCSymbolXCOFF>(getSymbol(GV));
1761  GVSym->setStorageClass(
1763  GVSym->setContainingCsect(CSect);
1764 
1765  const DataLayout &DL = GV->getParent()->getDataLayout();
1766 
1767  // Handle common symbols.
1768  if (GVKind.isCommon() || GVKind.isBSSLocal()) {
1769  unsigned Align =
1770  GV->getAlignment() ? GV->getAlignment() : DL.getPreferredAlignment(GV);
1771  uint64_t Size = DL.getTypeAllocSize(GV->getType()->getElementType());
1772 
1773  if (GVKind.isBSSLocal())
1774  OutStreamer->EmitXCOFFLocalCommonSymbol(GVSym, Size, Align);
1775  else
1776  OutStreamer->EmitCommonSymbol(GVSym, Size, Align);
1777  return;
1778  }
1779 
1780  MCSymbol *EmittedInitSym = GVSym;
1781  EmitLinkage(GV, EmittedInitSym);
1782  EmitAlignment(getGVAlignment(GV, DL), GV);
1783  OutStreamer->EmitLabel(EmittedInitSym);
1784  EmitGlobalConstant(GV->getParent()->getDataLayout(), GV->getInitializer());
1785 }
1786 
1787 void PPCAIXAsmPrinter::EmitFunctionDescriptor() {
1788  const DataLayout &DL = getDataLayout();
1789  const unsigned PointerSize = DL.getPointerSizeInBits() == 64 ? 8 : 4;
1790 
1791  MCSectionSubPair Current = OutStreamer->getCurrentSection();
1792  // Emit function descriptor.
1793  OutStreamer->SwitchSection(
1794  cast<MCSymbolXCOFF>(CurrentFnDescSym)->getContainingCsect());
1795  OutStreamer->EmitLabel(CurrentFnDescSym);
1796  // Emit function entry point address.
1797  OutStreamer->EmitValue(MCSymbolRefExpr::create(CurrentFnSym, OutContext),
1798  PointerSize);
1799  // Emit TOC base address.
1800  MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]"));
1801  OutStreamer->EmitValue(MCSymbolRefExpr::create(TOCBaseSym, OutContext),
1802  PointerSize);
1803  // Emit a null environment pointer.
1804  OutStreamer->EmitIntValue(0, PointerSize);
1805 
1806  OutStreamer->SwitchSection(Current.first, Current.second);
1807 }
1808 
1809 void PPCAIXAsmPrinter::EmitEndOfAsmFile(Module &M) {
1810  // If there are no functions in this module, we will never need to reference
1811  // the TOC base.
1812  if (M.empty())
1813  return;
1814 
1815  // Emit TOC base.
1816  MCSymbol *TOCBaseSym = OutContext.getOrCreateSymbol(StringRef("TOC[TC0]"));
1817  MCSectionXCOFF *TOCBaseSection = OutStreamer->getContext().getXCOFFSection(
1820  cast<MCSymbolXCOFF>(TOCBaseSym)->setContainingCsect(TOCBaseSection);
1821  // Switch to section to emit TOC base.
1822  OutStreamer->SwitchSection(TOCBaseSection);
1823 }
1824 
1825 
1826 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
1827 /// for a MachineFunction to the given output stream, in a format that the
1828 /// Darwin assembler can deal with.
1829 ///
1830 static AsmPrinter *
1832  std::unique_ptr<MCStreamer> &&Streamer) {
1833  if (tm.getTargetTriple().isMacOSX())
1834  return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
1835  if (tm.getTargetTriple().isOSAIX())
1836  return new PPCAIXAsmPrinter(tm, std::move(Streamer));
1837 
1838  return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
1839 }
1840 
1841 // Force static initialization.
1849 }
unsigned getAlignment() const
Definition: GlobalObject.h:73
virtual void EmitStartOfAsmFile(Module &)
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: AsmPrinter.h:388
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
constexpr char Align[]
Key for Kernel::Arg::Metadata::mAlign.
SymbolListTy GetGVStubList()
Accessor methods to return the set of stubs in sorted order.
static SectionKind getData()
Definition: SectionKind.h:201
mop_iterator operands_end()
Definition: MachineInstr.h:471
MCSymbol * getGlobalEPSymbol() const
S_SYMBOL_STUBS - Section with symbol stubs, byte size of stub in the Reserved2 field.
Definition: MachO.h:136
void clear()
Definition: MapVector.h:88
unsigned getNextScratchIdx(unsigned StartIdx=0) const
Get the next scratch register operand index.
Definition: StackMaps.cpp:69
S_ATTR_PURE_INSTRUCTIONS - Section contains only true machine instructions.
Definition: MachO.h:181
MachineBasicBlock * getMBB() const
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:329
const Constant * getInitializer() const
getInitializer - Return the initializer for this global variable.
LLVM_ATTRIBUTE_NORETURN void report_fatal_error(Error Err, bool gen_crash_diag=true)
Report a serious error, calling any installed error handler.
Definition: Error.cpp:139
This class represents lattice values for constants.
Definition: AllocatorList.h:23
PointerTy getPointer() const
bool isMacOSX() const
isMacOSX - Is this a Mac OS X triple.
Definition: Triple.h:453
StringRef getPrivateGlobalPrefix() const
Definition: DataLayout.h:320
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:41
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:66
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
bool doFinalization(Module &M) override
Shut down the asmprinter.
amdgpu Simplify well known AMD library false FunctionCallee Value const Twine & Name
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:136
TOC Anchor for TOC Addressability.
Definition: XCOFF.h:43
Address of indexed Jump Table for switch.
unsigned Reg
bool isInlineAsm() const
Target & getThePPC32Target()
PointerIntPair< MCSymbol *, 1, bool > StubValueTy
This class implements a map that also provides access to all stored values in a deterministic order...
Definition: MapVector.h:37
MachineBasicBlock reference.
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:392
F(f)
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
iterator_range< mop_iterator > operands()
Definition: MachineInstr.h:476
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
static const PPCMCExpr * createLo(const MCExpr *Expr, bool IsDarwin, MCContext &Ctx)
Definition: PPCMCExpr.h:50
return AArch64::GPR64RegClass contains(Reg)
static bool isVRRegister(unsigned Reg)
Definition: PPCInstrInfo.h:400
const DataLayout & getDataLayout() const
Get the data layout for the module&#39;s target platform.
Definition: Module.cpp:369
PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:80
unsigned getNumOperands() const
Retuns the total number of operands.
Definition: MachineInstr.h:413
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:35
bool hasMFOCRF() const
Definition: PPCSubtarget.h:259
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:169
bool empty() const
Definition: MapVector.h:79
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:410
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:64
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:1080
MCSymbol * getTOCOffsetSymbol() const
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:299
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:552
bool empty() const
Definition: Module.h:608
IntType getInt() const
R32 = MFOCRF(CRREG, INFLAG) - Represents the MFOCRF instruction.
virtual void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset)=0
bool isBSSLocal() const
Definition: SectionKind.h:160
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP, bool IsDarwin)
unsigned getAlignment() const
Definition: Globals.cpp:97
static const char * stripRegisterPrefix(const char *RegName)
stripRegisterPrefix - This method strips the character prefix from a register name so that only the n...
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:467
Target & getThePPC64Target()
MCInstBuilder & addExpr(const MCExpr *Val)
Add a new MCExpr operand.
Definition: MCInstBuilder.h:49
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:158
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx, bool PrintInHex=false)
Definition: MCExpr.cpp:169
Address of a global value.
MCInstBuilder & addReg(unsigned Reg)
Add a new register operand.
Definition: MCInstBuilder.h:31
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
PointerIntPair - This class implements a pair of a pointer and small integer.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
void LLVMInitializePowerPCAsmPrinter()
bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &OutMO, AsmPrinter &AP, bool IsDarwin)
const GlobalValue * getGlobal() const
virtual void emitAbiVersion(int AbiVersion)=0
TypeSize getTypeAllocSize(Type *Ty) const
Returns the offset in bytes between successive objects of the specified type, including alignment pad...
Definition: DataLayout.h:486
MCSection * getNonLazySymbolPointerSection() const
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
static const char * getRegisterName(unsigned RegNo)
bool hasInternalLinkage() const
Definition: GlobalValue.h:443
Address of a basic block.
static const PPCMCExpr * createHa(const MCExpr *Expr, bool IsDarwin, MCContext &Ctx)
Definition: PPCMCExpr.h:60
constexpr double e
Definition: MathExtras.h:57
.subsections_via_symbols (MachO)
Definition: MCDirectives.h:51
SectionKind - This is a simple POD value that classifies the properties of a section.
Definition: SectionKind.h:22
const Triple & getTargetTriple() const
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
MI-level patchpoint operands.
Definition: StackMaps.h:76
void setStorageClass(XCOFF::StorageClass SC)
Definition: MCSymbolXCOFF.h:26
virtual MCSymbol * GetCPISymbol(unsigned CPID) const
Return the symbol for the specified constant pool entry.
StubValueTy & getGVStubEntry(MCSymbol *Sym)
unsigned getDarwinDirective() const
getDarwinDirective - Returns the -m directive specified for the cpu.
Definition: PPCSubtarget.h:173
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
This struct is a compact representation of a valid (non-zero power of two) alignment.
Definition: Alignment.h:40
void recordPatchPoint(const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
Definition: StackMaps.cpp:372
static AsmPrinter * createPPCAsmPrinterPass(TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer)
createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code for a MachineFunction to t...
unsigned first
bool isOSAIX() const
Tests whether the OS is AIX.
Definition: Triple.h:618
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
void setOpcode(unsigned Op)
Definition: MCInst.h:170
MCSymbol * GetBlockAddressSymbol(const BlockAddress *BA) const
Return the MCSymbol used to satisfy BlockAddress uses of the specified basic block.
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
std::pair< MCSection *, const MCExpr * > MCSectionSubPair
Definition: MCStreamer.h:64
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
MCSymbol * getSymbol(const GlobalValue *GV) const
Definition: AsmPrinter.cpp:449
MachineOperand class - Representation of each machine instruction operand.
bool hasSection() const
Check if this global has a custom object file section.
Definition: GlobalObject.h:101
bool isCommon() const
Definition: SectionKind.h:163
Module.h This file contains the declarations for the Module class.
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:179
.indirect_symbol (MachO)
Definition: MCDirectives.h:33
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:1023
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
static bool isVFRegister(unsigned Reg)
Definition: PPCInstrInfo.h:397
int64_t getImm() const
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
const Function & getFunction() const
Return the LLVM function that this machine code represents.
Function * getFunction(StringRef Name) const
Look up the specified function in the module symbol table.
Definition: Module.cpp:174
unsigned getPreferredAlignment(const GlobalVariable *GV) const
Returns the preferred alignment of the specified global.
Definition: DataLayout.cpp:837
MCSymbol * getPICOffsetSymbol() const
Target & getThePPC64LETarget()
void recordStackMap(const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
Definition: StackMaps.cpp:363
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
bool hasComdat() const
Definition: GlobalObject.h:119
Csect definition for initialized storage.
Definition: XCOFF.h:145
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:255
Representation of each machine instruction.
Definition: MachineInstr.h:63
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Predicate InvertPredicate(Predicate Opcode)
Invert the specified predicate. != -> ==, < -> >=.
bool doInitialization(Module &M) override
Set up the AsmPrinter when we are working on a new module.
Definition: AsmPrinter.cpp:258
virtual void SetupMachineFunction(MachineFunction &MF)
This should be called when a new MachineFunction is being processed from runOnMachineFunction.
MCSymbol * GetJTISymbol(unsigned JTID, bool isLinkerPrivate=false) const
Return the symbol for the specified jump table entry.
int64_t getOffset() const
Return the offset from the symbol in this operand.
const BlockAddress * getBlockAddress() const
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
bool hasAltivec() const
Definition: PPCSubtarget.h:248
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:27
uint32_t Size
Definition: Profile.cpp:46
uint32_t getNumPatchBytes() const
Return the number of patchable bytes the given patchpoint should emit.
Definition: StackMaps.h:104
virtual void EmitFunctionEntryLabel()
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: AsmPrinter.cpp:753
MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation for MachO targets...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
std::vector< std::pair< MCSymbol *, StubValueTy > > SymbolListTy
MCSymbol * getLocalEPSymbol() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:575
virtual void emitTCEntry(const MCSymbol &S)=0
mop_iterator operands_begin()
Definition: MachineInstr.h:470
bool isData() const
Definition: SectionKind.h:165
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:80
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:45
void setContainingCsect(MCSectionXCOFF *C)
Definition: MCSymbolXCOFF.h:38
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:65
PICLevel::Level getPICLevel() const
Returns the PIC level (small or large model)
Definition: Module.cpp:488
static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn)
RegisterAsmPrinter - Register an AsmPrinter implementation for the given target.
bool isThreadLocal() const
If the value is "Thread Local", its value isn&#39;t shared by the threads.
Definition: GlobalValue.h:250
IRTranslator LLVM IR MI
const MachineOperand & getCallTarget() const
Returns the target of the underlying call.
Definition: StackMaps.h:109
void addOperand(const MCOperand &Op)
Definition: MCInst.h:183
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:48
Address of indexed Constant in Constant Pool.
Register getReg() const
getReg - Returns the register number.
virtual void emitMachine(StringRef CPU)=0
#define LLVM_DEBUG(X)
Definition: Debug.h:122
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:415
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:34
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static XCOFF::StorageClass getStorageClassForGlobal(const GlobalObject *GO)
static MCSymbol * getMCSymbolForTOCPseudoMO(const MachineOperand &MO, AsmPrinter &AP)
Map a machine operand for a TOC pseudo-machine instruction to its corresponding MCSymbol.
Type * getElementType() const
Definition: DerivedTypes.h:598
MCSection * getTextCoalSection() const
PointerType * getType() const
Global values are always pointers.
Definition: GlobalValue.h:277
Wrapper class representing virtual and physical registers.
Definition: Register.h:19
Descriptor csect.
Definition: XCOFF.h:46
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:59
static SectionKind getText()
Definition: SectionKind.h:179