LLVM  7.0.0svn
PPCAsmPrinter.cpp
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1 //===-- PPCAsmPrinter.cpp - Print machine instrs to PowerPC assembly ------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to PowerPC assembly language. This printer is
12 // the output mechanism used by `llc'.
13 //
14 // Documentation at http://developer.apple.com/documentation/DeveloperTools/
15 // Reference/Assembler/ASMIntroduction/chapter_1_section_1.html
16 //
17 //===----------------------------------------------------------------------===//
18 
20 #include "MCTargetDesc/PPCMCExpr.h"
23 #include "PPC.h"
24 #include "PPCInstrInfo.h"
25 #include "PPCMachineFunctionInfo.h"
26 #include "PPCSubtarget.h"
27 #include "PPCTargetMachine.h"
28 #include "PPCTargetStreamer.h"
29 #include "llvm/ADT/MapVector.h"
30 #include "llvm/ADT/StringRef.h"
31 #include "llvm/ADT/Triple.h"
32 #include "llvm/ADT/Twine.h"
33 #include "llvm/BinaryFormat/ELF.h"
42 #include "llvm/CodeGen/StackMaps.h"
44 #include "llvm/IR/DataLayout.h"
45 #include "llvm/IR/GlobalValue.h"
46 #include "llvm/IR/Module.h"
47 #include "llvm/MC/MCAsmInfo.h"
48 #include "llvm/MC/MCContext.h"
49 #include "llvm/MC/MCExpr.h"
50 #include "llvm/MC/MCInst.h"
51 #include "llvm/MC/MCInstBuilder.h"
52 #include "llvm/MC/MCSectionELF.h"
53 #include "llvm/MC/MCSectionMachO.h"
54 #include "llvm/MC/MCStreamer.h"
55 #include "llvm/MC/MCSymbol.h"
56 #include "llvm/MC/MCSymbolELF.h"
57 #include "llvm/MC/SectionKind.h"
58 #include "llvm/Support/Casting.h"
59 #include "llvm/Support/CodeGen.h"
60 #include "llvm/Support/Debug.h"
65 #include <algorithm>
66 #include <cassert>
67 #include <cstdint>
68 #include <memory>
69 #include <new>
70 
71 using namespace llvm;
72 
73 #define DEBUG_TYPE "asmprinter"
74 
75 namespace {
76 
77 class PPCAsmPrinter : public AsmPrinter {
78 protected:
80  const PPCSubtarget *Subtarget;
81  StackMaps SM;
82 
83 public:
84  explicit PPCAsmPrinter(TargetMachine &TM,
85  std::unique_ptr<MCStreamer> Streamer)
86  : AsmPrinter(TM, std::move(Streamer)), SM(*this) {}
87 
88  StringRef getPassName() const override { return "PowerPC Assembly Printer"; }
89 
90  MCSymbol *lookUpOrCreateTOCEntry(MCSymbol *Sym);
91 
92  bool doInitialization(Module &M) override {
93  if (!TOC.empty())
94  TOC.clear();
96  }
97 
98  void EmitInstruction(const MachineInstr *MI) override;
99 
100  void printOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
101 
102  bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
103  unsigned AsmVariant, const char *ExtraCode,
104  raw_ostream &O) override;
105  bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
106  unsigned AsmVariant, const char *ExtraCode,
107  raw_ostream &O) override;
108 
109  void EmitEndOfAsmFile(Module &M) override;
110 
111  void LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI);
112  void LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI);
113  void EmitTlsCall(const MachineInstr *MI, MCSymbolRefExpr::VariantKind VK);
114  bool runOnMachineFunction(MachineFunction &MF) override {
115  Subtarget = &MF.getSubtarget<PPCSubtarget>();
116  bool Changed = AsmPrinter::runOnMachineFunction(MF);
117  emitXRayTable();
118  return Changed;
119  }
120  };
121 
122  /// PPCLinuxAsmPrinter - PowerPC assembly printer, customized for Linux
123  class PPCLinuxAsmPrinter : public PPCAsmPrinter {
124  public:
125  explicit PPCLinuxAsmPrinter(TargetMachine &TM,
126  std::unique_ptr<MCStreamer> Streamer)
127  : PPCAsmPrinter(TM, std::move(Streamer)) {}
128 
129  StringRef getPassName() const override {
130  return "Linux PPC Assembly Printer";
131  }
132 
133  bool doFinalization(Module &M) override;
134  void EmitStartOfAsmFile(Module &M) override;
135 
136  void EmitFunctionEntryLabel() override;
137 
138  void EmitFunctionBodyStart() override;
139  void EmitFunctionBodyEnd() override;
140  void EmitInstruction(const MachineInstr *MI) override;
141  };
142 
143  /// PPCDarwinAsmPrinter - PowerPC assembly printer, customized for Darwin/Mac
144  /// OS X
145  class PPCDarwinAsmPrinter : public PPCAsmPrinter {
146  public:
147  explicit PPCDarwinAsmPrinter(TargetMachine &TM,
148  std::unique_ptr<MCStreamer> Streamer)
149  : PPCAsmPrinter(TM, std::move(Streamer)) {}
150 
151  StringRef getPassName() const override {
152  return "Darwin PPC Assembly Printer";
153  }
154 
155  bool doFinalization(Module &M) override;
156  void EmitStartOfAsmFile(Module &M) override;
157  };
158 
159 } // end anonymous namespace
160 
161 /// stripRegisterPrefix - This method strips the character prefix from a
162 /// register name so that only the number is left. Used by for linux asm.
163 static const char *stripRegisterPrefix(const char *RegName) {
164  switch (RegName[0]) {
165  case 'r':
166  case 'f':
167  case 'q': // for QPX
168  case 'v':
169  if (RegName[1] == 's')
170  return RegName + 2;
171  return RegName + 1;
172  case 'c': if (RegName[1] == 'r') return RegName + 2;
173  }
174 
175  return RegName;
176 }
177 
178 void PPCAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
179  raw_ostream &O) {
180  const DataLayout &DL = getDataLayout();
181  const MachineOperand &MO = MI->getOperand(OpNo);
182 
183  switch (MO.getType()) {
185  unsigned Reg = MO.getReg();
186 
187  // There are VSX instructions that use VSX register numbering (vs0 - vs63)
188  // as well as those that use VMX register numbering (v0 - v31 which
189  // correspond to vs32 - vs63). If we have an instruction that uses VSX
190  // numbering, we need to convert the VMX registers to VSX registers.
191  // Namely, we print 32-63 when the instruction operates on one of the
192  // VMX registers.
193  // (Please synchronize with PPCInstPrinter::printOperand)
194  if (MI->getDesc().TSFlags & PPCII::UseVSXReg) {
196  Reg = PPC::VSX32 + (Reg - PPC::V0);
197  else if (PPCInstrInfo::isVFRegister(Reg))
198  Reg = PPC::VSX32 + (Reg - PPC::VF0);
199  }
200  const char *RegName = PPCInstPrinter::getRegisterName(Reg);
201 
202  // Linux assembler (Others?) does not take register mnemonics.
203  // FIXME - What about special registers used in mfspr/mtspr?
204  if (!Subtarget->isDarwin())
205  RegName = stripRegisterPrefix(RegName);
206  O << RegName;
207  return;
208  }
210  O << MO.getImm();
211  return;
212 
214  MO.getMBB()->getSymbol()->print(O, MAI);
215  return;
217  O << DL.getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << '_'
218  << MO.getIndex();
219  return;
221  GetBlockAddressSymbol(MO.getBlockAddress())->print(O, MAI);
222  return;
224  // Computing the address of a global symbol, not calling it.
225  const GlobalValue *GV = MO.getGlobal();
226  MCSymbol *SymToPrint;
227 
228  // External or weakly linked global variables need non-lazily-resolved stubs
229  if (Subtarget->hasLazyResolverStub(GV)) {
230  SymToPrint = getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
232  MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(
233  SymToPrint);
234  if (!StubSym.getPointer())
236  !GV->hasInternalLinkage());
237  } else {
238  SymToPrint = getSymbol(GV);
239  }
240 
241  SymToPrint->print(O, MAI);
242 
243  printOffset(MO.getOffset(), O);
244  return;
245  }
246 
247  default:
248  O << "<unknown operand type: " << (unsigned)MO.getType() << ">";
249  return;
250  }
251 }
252 
253 /// PrintAsmOperand - Print out an operand for an inline asm expression.
254 ///
255 bool PPCAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
256  unsigned AsmVariant,
257  const char *ExtraCode, raw_ostream &O) {
258  // Does this asm operand have a single letter operand modifier?
259  if (ExtraCode && ExtraCode[0]) {
260  if (ExtraCode[1] != 0) return true; // Unknown modifier.
261 
262  switch (ExtraCode[0]) {
263  default:
264  // See if this is a generic print operand
265  return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
266  case 'c': // Don't print "$" before a global var name or constant.
267  break; // PPC never has a prefix.
268  case 'L': // Write second word of DImode reference.
269  // Verify that this operand has two consecutive registers.
270  if (!MI->getOperand(OpNo).isReg() ||
271  OpNo+1 == MI->getNumOperands() ||
272  !MI->getOperand(OpNo+1).isReg())
273  return true;
274  ++OpNo; // Return the high-part.
275  break;
276  case 'I':
277  // Write 'i' if an integer constant, otherwise nothing. Used to print
278  // addi vs add, etc.
279  if (MI->getOperand(OpNo).isImm())
280  O << "i";
281  return false;
282  }
283  }
284 
285  printOperand(MI, OpNo, O);
286  return false;
287 }
288 
289 // At the moment, all inline asm memory operands are a single register.
290 // In any case, the output of this routine should always be just one
291 // assembler operand.
292 
293 bool PPCAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
294  unsigned AsmVariant,
295  const char *ExtraCode,
296  raw_ostream &O) {
297  if (ExtraCode && ExtraCode[0]) {
298  if (ExtraCode[1] != 0) return true; // Unknown modifier.
299 
300  switch (ExtraCode[0]) {
301  default: return true; // Unknown modifier.
302  case 'y': // A memory reference for an X-form instruction
303  {
304  const char *RegName = "r0";
305  if (!Subtarget->isDarwin())
306  RegName = stripRegisterPrefix(RegName);
307  O << RegName << ", ";
308  printOperand(MI, OpNo, O);
309  return false;
310  }
311  case 'U': // Print 'u' for update form.
312  case 'X': // Print 'x' for indexed form.
313  {
314  // FIXME: Currently for PowerPC memory operands are always loaded
315  // into a register, so we never get an update or indexed form.
316  // This is bad even for offset forms, since even if we know we
317  // have a value in -16(r1), we will generate a load into r<n>
318  // and then load from 0(r<n>). Until that issue is fixed,
319  // tolerate 'U' and 'X' but don't output anything.
320  assert(MI->getOperand(OpNo).isReg());
321  return false;
322  }
323  }
324  }
325 
326  assert(MI->getOperand(OpNo).isReg());
327  O << "0(";
328  printOperand(MI, OpNo, O);
329  O << ")";
330  return false;
331 }
332 
333 /// lookUpOrCreateTOCEntry -- Given a symbol, look up whether a TOC entry
334 /// exists for it. If not, create one. Then return a symbol that references
335 /// the TOC entry.
336 MCSymbol *PPCAsmPrinter::lookUpOrCreateTOCEntry(MCSymbol *Sym) {
337  MCSymbol *&TOCEntry = TOC[Sym];
338  if (!TOCEntry)
339  TOCEntry = createTempSymbol("C");
340  return TOCEntry;
341 }
342 
343 void PPCAsmPrinter::EmitEndOfAsmFile(Module &M) {
344  SM.serializeToStackMapSection();
345 }
346 
347 void PPCAsmPrinter::LowerSTACKMAP(StackMaps &SM, const MachineInstr &MI) {
348  unsigned NumNOPBytes = MI.getOperand(1).getImm();
349 
350  SM.recordStackMap(MI);
351  assert(NumNOPBytes % 4 == 0 && "Invalid number of NOP bytes requested!");
352 
353  // Scan ahead to trim the shadow.
354  const MachineBasicBlock &MBB = *MI.getParent();
356  ++MII;
357  while (NumNOPBytes > 0) {
358  if (MII == MBB.end() || MII->isCall() ||
359  MII->getOpcode() == PPC::DBG_VALUE ||
360  MII->getOpcode() == TargetOpcode::PATCHPOINT ||
361  MII->getOpcode() == TargetOpcode::STACKMAP)
362  break;
363  ++MII;
364  NumNOPBytes -= 4;
365  }
366 
367  // Emit nops.
368  for (unsigned i = 0; i < NumNOPBytes; i += 4)
369  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
370 }
371 
372 // Lower a patchpoint of the form:
373 // [<def>], <id>, <numBytes>, <target>, <numArgs>
374 void PPCAsmPrinter::LowerPATCHPOINT(StackMaps &SM, const MachineInstr &MI) {
375  SM.recordPatchPoint(MI);
376  PatchPointOpers Opers(&MI);
377 
378  unsigned EncodedBytes = 0;
379  const MachineOperand &CalleeMO = Opers.getCallTarget();
380 
381  if (CalleeMO.isImm()) {
382  int64_t CallTarget = CalleeMO.getImm();
383  if (CallTarget) {
384  assert((CallTarget & 0xFFFFFFFFFFFF) == CallTarget &&
385  "High 16 bits of call target should be zero.");
386  unsigned ScratchReg = MI.getOperand(Opers.getNextScratchIdx()).getReg();
387  EncodedBytes = 0;
388  // Materialize the jump address:
389  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI8)
390  .addReg(ScratchReg)
391  .addImm((CallTarget >> 32) & 0xFFFF));
392  ++EncodedBytes;
393  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::RLDIC)
394  .addReg(ScratchReg)
395  .addReg(ScratchReg)
396  .addImm(32).addImm(16));
397  ++EncodedBytes;
398  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORIS8)
399  .addReg(ScratchReg)
400  .addReg(ScratchReg)
401  .addImm((CallTarget >> 16) & 0xFFFF));
402  ++EncodedBytes;
403  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ORI8)
404  .addReg(ScratchReg)
405  .addReg(ScratchReg)
406  .addImm(CallTarget & 0xFFFF));
407 
408  // Save the current TOC pointer before the remote call.
409  int TOCSaveOffset = Subtarget->getFrameLowering()->getTOCSaveOffset();
410  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::STD)
411  .addReg(PPC::X2)
412  .addImm(TOCSaveOffset)
413  .addReg(PPC::X1));
414  ++EncodedBytes;
415 
416  // If we're on ELFv1, then we need to load the actual function pointer
417  // from the function descriptor.
418  if (!Subtarget->isELFv2ABI()) {
419  // Load the new TOC pointer and the function address, but not r11
420  // (needing this is rare, and loading it here would prevent passing it
421  // via a 'nest' parameter.
422  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
423  .addReg(PPC::X2)
424  .addImm(8)
425  .addReg(ScratchReg));
426  ++EncodedBytes;
427  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
428  .addReg(ScratchReg)
429  .addImm(0)
430  .addReg(ScratchReg));
431  ++EncodedBytes;
432  }
433 
434  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTCTR8)
435  .addReg(ScratchReg));
436  ++EncodedBytes;
437  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BCTRL8));
438  ++EncodedBytes;
439 
440  // Restore the TOC pointer after the call.
441  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
442  .addReg(PPC::X2)
443  .addImm(TOCSaveOffset)
444  .addReg(PPC::X1));
445  ++EncodedBytes;
446  }
447  } else if (CalleeMO.isGlobal()) {
448  const GlobalValue *GValue = CalleeMO.getGlobal();
449  MCSymbol *MOSymbol = getSymbol(GValue);
450  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, OutContext);
451 
452  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL8_NOP)
453  .addExpr(SymVar));
454  EncodedBytes += 2;
455  }
456 
457  // Each instruction is 4 bytes.
458  EncodedBytes *= 4;
459 
460  // Emit padding.
461  unsigned NumBytes = Opers.getNumPatchBytes();
462  assert(NumBytes >= EncodedBytes &&
463  "Patchpoint can't request size less than the length of a call.");
464  assert((NumBytes - EncodedBytes) % 4 == 0 &&
465  "Invalid number of NOP bytes requested!");
466  for (unsigned i = EncodedBytes; i < NumBytes; i += 4)
467  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
468 }
469 
470 /// EmitTlsCall -- Given a GETtls[ld]ADDR[32] instruction, print a
471 /// call to __tls_get_addr to the current output stream.
472 void PPCAsmPrinter::EmitTlsCall(const MachineInstr *MI,
474  StringRef Name = "__tls_get_addr";
475  MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(Name);
477 
478  assert(MI->getOperand(0).isReg() &&
479  ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
480  (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
481  "GETtls[ld]ADDR[32] must define GPR3");
482  assert(MI->getOperand(1).isReg() &&
483  ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
484  (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
485  "GETtls[ld]ADDR[32] must read GPR3");
486 
487  if (!Subtarget->isPPC64() && !Subtarget->isDarwin() &&
488  isPositionIndependent())
490  const MCSymbolRefExpr *TlsRef =
491  MCSymbolRefExpr::create(TlsGetAddr, Kind, OutContext);
492  const MachineOperand &MO = MI->getOperand(2);
493  const GlobalValue *GValue = MO.getGlobal();
494  MCSymbol *MOSymbol = getSymbol(GValue);
495  const MCExpr *SymVar = MCSymbolRefExpr::create(MOSymbol, VK, OutContext);
496  EmitToStreamer(*OutStreamer,
497  MCInstBuilder(Subtarget->isPPC64() ?
498  PPC::BL8_NOP_TLS : PPC::BL_TLS)
499  .addExpr(TlsRef)
500  .addExpr(SymVar));
501 }
502 
503 /// EmitInstruction -- Print out a single PowerPC MI in Darwin syntax to
504 /// the current output stream.
505 ///
506 void PPCAsmPrinter::EmitInstruction(const MachineInstr *MI) {
507  MCInst TmpInst;
508  bool isPPC64 = Subtarget->isPPC64();
509  bool isDarwin = TM.getTargetTriple().isOSDarwin();
510  const Module *M = MF->getFunction().getParent();
512 
513  // Lower multi-instruction pseudo operations.
514  switch (MI->getOpcode()) {
515  default: break;
516  case TargetOpcode::DBG_VALUE:
517  llvm_unreachable("Should be handled target independently");
518  case TargetOpcode::STACKMAP:
519  return LowerSTACKMAP(SM, *MI);
520  case TargetOpcode::PATCHPOINT:
521  return LowerPATCHPOINT(SM, *MI);
522 
523  case PPC::MoveGOTtoLR: {
524  // Transform %lr = MoveGOTtoLR
525  // Into this: bl _GLOBAL_OFFSET_TABLE_@local-4
526  // _GLOBAL_OFFSET_TABLE_@local-4 (instruction preceding
527  // _GLOBAL_OFFSET_TABLE_) has exactly one instruction:
528  // blrl
529  // This will return the pointer to _GLOBAL_OFFSET_TABLE_@local
530  MCSymbol *GOTSymbol =
531  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
532  const MCExpr *OffsExpr =
535  OutContext),
536  MCConstantExpr::create(4, OutContext),
537  OutContext);
538 
539  // Emit the 'bl'.
540  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL).addExpr(OffsExpr));
541  return;
542  }
543  case PPC::MovePCtoLR:
544  case PPC::MovePCtoLR8: {
545  // Transform %lr = MovePCtoLR
546  // Into this, where the label is the PIC base:
547  // bl L1$pb
548  // L1$pb:
549  MCSymbol *PICBase = MF->getPICBaseSymbol();
550 
551  // Emit the 'bl'.
552  EmitToStreamer(*OutStreamer,
554  // FIXME: We would like an efficient form for this, so we
555  // don't have to do a lot of extra uniquing.
556  .addExpr(MCSymbolRefExpr::create(PICBase, OutContext)));
557 
558  // Emit the label.
559  OutStreamer->EmitLabel(PICBase);
560  return;
561  }
562  case PPC::UpdateGBR: {
563  // Transform %rd = UpdateGBR(%rt, %ri)
564  // Into: lwz %rt, .L0$poff - .L0$pb(%ri)
565  // add %rd, %rt, %ri
566  // or into (if secure plt mode is on):
567  // addis r30, r30, .LTOC - .L0$pb@ha
568  // addi r30, r30, .LTOC - .L0$pb@l
569  // Get the offset from the GOT Base Register to the GOT
570  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
571  if (Subtarget->isSecurePlt() && isPositionIndependent() ) {
572  unsigned PICR = TmpInst.getOperand(0).getReg();
573  MCSymbol *LTOCSymbol = OutContext.getOrCreateSymbol(StringRef(".LTOC"));
574  const MCExpr *PB =
575  MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
576  OutContext);
577 
578  const MCExpr *LTOCDeltaExpr =
579  MCBinaryExpr::createSub(MCSymbolRefExpr::create(LTOCSymbol, OutContext),
580  PB, OutContext);
581 
582  const MCExpr *LTOCDeltaHi =
583  PPCMCExpr::createHa(LTOCDeltaExpr, false, OutContext);
584  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
585  .addReg(PICR)
586  .addReg(PICR)
587  .addExpr(LTOCDeltaHi));
588 
589  const MCExpr *LTOCDeltaLo =
590  PPCMCExpr::createLo(LTOCDeltaExpr, false, OutContext);
591  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
592  .addReg(PICR)
593  .addReg(PICR)
594  .addExpr(LTOCDeltaLo));
595  return;
596  } else {
597  MCSymbol *PICOffset =
598  MF->getInfo<PPCFunctionInfo>()->getPICOffsetSymbol();
599  TmpInst.setOpcode(PPC::LWZ);
600  const MCExpr *Exp =
601  MCSymbolRefExpr::create(PICOffset, MCSymbolRefExpr::VK_None, OutContext);
602  const MCExpr *PB =
603  MCSymbolRefExpr::create(MF->getPICBaseSymbol(),
605  OutContext);
606  const MCOperand TR = TmpInst.getOperand(1);
607  const MCOperand PICR = TmpInst.getOperand(0);
608 
609  // Step 1: lwz %rt, .L$poff - .L$pb(%ri)
610  TmpInst.getOperand(1) =
611  MCOperand::createExpr(MCBinaryExpr::createSub(Exp, PB, OutContext));
612  TmpInst.getOperand(0) = TR;
613  TmpInst.getOperand(2) = PICR;
614  EmitToStreamer(*OutStreamer, TmpInst);
615 
616  TmpInst.setOpcode(PPC::ADD4);
617  TmpInst.getOperand(0) = PICR;
618  TmpInst.getOperand(1) = TR;
619  TmpInst.getOperand(2) = PICR;
620  EmitToStreamer(*OutStreamer, TmpInst);
621  return;
622  }
623  }
624  case PPC::LWZtoc: {
625  // Transform %r3 = LWZtoc @min1, %r2
626  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
627 
628  // Change the opcode to LWZ, and the global address operand to be a
629  // reference to the GOT entry we will synthesize later.
630  TmpInst.setOpcode(PPC::LWZ);
631  const MachineOperand &MO = MI->getOperand(1);
632 
633  // Map symbol -> label of TOC entry
634  assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
635  MCSymbol *MOSymbol = nullptr;
636  if (MO.isGlobal())
637  MOSymbol = getSymbol(MO.getGlobal());
638  else if (MO.isCPI())
639  MOSymbol = GetCPISymbol(MO.getIndex());
640  else if (MO.isJTI())
641  MOSymbol = GetJTISymbol(MO.getIndex());
642  else if (MO.isBlockAddress())
643  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
644 
645  if (PL == PICLevel::SmallPIC) {
646  const MCExpr *Exp =
648  OutContext);
649  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
650  } else {
651  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
652 
653  const MCExpr *Exp =
655  OutContext);
656  const MCExpr *PB =
657  MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
658  OutContext);
659  Exp = MCBinaryExpr::createSub(Exp, PB, OutContext);
660  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
661  }
662  EmitToStreamer(*OutStreamer, TmpInst);
663  return;
664  }
665  case PPC::LDtocJTI:
666  case PPC::LDtocCPT:
667  case PPC::LDtocBA:
668  case PPC::LDtoc: {
669  // Transform %x3 = LDtoc @min1, %x2
670  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
671 
672  // Change the opcode to LD, and the global address operand to be a
673  // reference to the TOC entry we will synthesize later.
674  TmpInst.setOpcode(PPC::LD);
675  const MachineOperand &MO = MI->getOperand(1);
676 
677  // Map symbol -> label of TOC entry
678  assert(MO.isGlobal() || MO.isCPI() || MO.isJTI() || MO.isBlockAddress());
679  MCSymbol *MOSymbol = nullptr;
680  if (MO.isGlobal())
681  MOSymbol = getSymbol(MO.getGlobal());
682  else if (MO.isCPI())
683  MOSymbol = GetCPISymbol(MO.getIndex());
684  else if (MO.isJTI())
685  MOSymbol = GetJTISymbol(MO.getIndex());
686  else if (MO.isBlockAddress())
687  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
688 
689  MCSymbol *TOCEntry = lookUpOrCreateTOCEntry(MOSymbol);
690 
691  const MCExpr *Exp =
693  OutContext);
694  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
695  EmitToStreamer(*OutStreamer, TmpInst);
696  return;
697  }
698 
699  case PPC::ADDIStocHA: {
700  // Transform %xd = ADDIStocHA %x2, @sym
701  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
702 
703  // Change the opcode to ADDIS8. If the global address is external, has
704  // common linkage, is a non-local function address, or is a jump table
705  // address, then generate a TOC entry and reference that. Otherwise
706  // reference the symbol directly.
707  TmpInst.setOpcode(PPC::ADDIS8);
708  const MachineOperand &MO = MI->getOperand(2);
709  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
710  MO.isBlockAddress()) &&
711  "Invalid operand for ADDIStocHA!");
712  MCSymbol *MOSymbol = nullptr;
713  bool GlobalToc = false;
714 
715  if (MO.isGlobal()) {
716  const GlobalValue *GV = MO.getGlobal();
717  MOSymbol = getSymbol(GV);
718  unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
719  GlobalToc = (GVFlags & PPCII::MO_NLP_FLAG);
720  } else if (MO.isCPI()) {
721  MOSymbol = GetCPISymbol(MO.getIndex());
722  } else if (MO.isJTI()) {
723  MOSymbol = GetJTISymbol(MO.getIndex());
724  } else if (MO.isBlockAddress()) {
725  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
726  }
727 
728  if (GlobalToc || MO.isJTI() || MO.isBlockAddress() ||
729  TM.getCodeModel() == CodeModel::Large)
730  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
731 
732  const MCExpr *Exp =
734  OutContext);
735 
736  if (!MO.isJTI() && MO.getOffset())
737  Exp = MCBinaryExpr::createAdd(Exp,
739  OutContext),
740  OutContext);
741 
742  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
743  EmitToStreamer(*OutStreamer, TmpInst);
744  return;
745  }
746  case PPC::LDtocL: {
747  // Transform %xd = LDtocL @sym, %xs
748  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
749 
750  // Change the opcode to LD. If the global address is external, has
751  // common linkage, or is a jump table address, then reference the
752  // associated TOC entry. Otherwise reference the symbol directly.
753  TmpInst.setOpcode(PPC::LD);
754  const MachineOperand &MO = MI->getOperand(1);
755  assert((MO.isGlobal() || MO.isCPI() || MO.isJTI() ||
756  MO.isBlockAddress()) &&
757  "Invalid operand for LDtocL!");
758  MCSymbol *MOSymbol = nullptr;
759 
760  if (MO.isJTI())
761  MOSymbol = lookUpOrCreateTOCEntry(GetJTISymbol(MO.getIndex()));
762  else if (MO.isBlockAddress()) {
763  MOSymbol = GetBlockAddressSymbol(MO.getBlockAddress());
764  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
765  }
766  else if (MO.isCPI()) {
767  MOSymbol = GetCPISymbol(MO.getIndex());
768  if (TM.getCodeModel() == CodeModel::Large)
769  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
770  }
771  else if (MO.isGlobal()) {
772  const GlobalValue *GV = MO.getGlobal();
773  MOSymbol = getSymbol(GV);
774  LLVM_DEBUG(
775  unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
776  assert((GVFlags & PPCII::MO_NLP_FLAG) &&
777  "LDtocL used on symbol that could be accessed directly is "
778  "invalid. Must match ADDIStocHA."));
779  MOSymbol = lookUpOrCreateTOCEntry(MOSymbol);
780  }
781 
782  const MCExpr *Exp =
784  OutContext);
785  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
786  EmitToStreamer(*OutStreamer, TmpInst);
787  return;
788  }
789  case PPC::ADDItocL: {
790  // Transform %xd = ADDItocL %xs, @sym
791  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
792 
793  // Change the opcode to ADDI8. If the global address is external, then
794  // generate a TOC entry and reference that. Otherwise reference the
795  // symbol directly.
796  TmpInst.setOpcode(PPC::ADDI8);
797  const MachineOperand &MO = MI->getOperand(2);
798  assert((MO.isGlobal() || MO.isCPI()) && "Invalid operand for ADDItocL");
799  MCSymbol *MOSymbol = nullptr;
800 
801  if (MO.isGlobal()) {
802  const GlobalValue *GV = MO.getGlobal();
803  LLVM_DEBUG(unsigned char GVFlags = Subtarget->classifyGlobalReference(GV);
804  assert(!(GVFlags & PPCII::MO_NLP_FLAG) &&
805  "Interposable definitions must use indirect access."));
806  MOSymbol = getSymbol(GV);
807  } else if (MO.isCPI()) {
808  MOSymbol = GetCPISymbol(MO.getIndex());
809  }
810 
811  const MCExpr *Exp =
813  OutContext);
814  TmpInst.getOperand(2) = MCOperand::createExpr(Exp);
815  EmitToStreamer(*OutStreamer, TmpInst);
816  return;
817  }
818  case PPC::ADDISgotTprelHA: {
819  // Transform: %xd = ADDISgotTprelHA %x2, @sym
820  // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
821  assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
822  const MachineOperand &MO = MI->getOperand(2);
823  const GlobalValue *GValue = MO.getGlobal();
824  MCSymbol *MOSymbol = getSymbol(GValue);
825  const MCExpr *SymGotTprel =
827  OutContext);
828  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
829  .addReg(MI->getOperand(0).getReg())
830  .addReg(MI->getOperand(1).getReg())
831  .addExpr(SymGotTprel));
832  return;
833  }
834  case PPC::LDgotTprelL:
835  case PPC::LDgotTprelL32: {
836  // Transform %xd = LDgotTprelL @sym, %xs
837  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
838 
839  // Change the opcode to LD.
840  TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ);
841  const MachineOperand &MO = MI->getOperand(1);
842  const GlobalValue *GValue = MO.getGlobal();
843  MCSymbol *MOSymbol = getSymbol(GValue);
844  const MCExpr *Exp =
846  OutContext);
847  TmpInst.getOperand(1) = MCOperand::createExpr(Exp);
848  EmitToStreamer(*OutStreamer, TmpInst);
849  return;
850  }
851 
852  case PPC::PPC32PICGOT: {
853  MCSymbol *GOTSymbol = OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
854  MCSymbol *GOTRef = OutContext.createTempSymbol();
855  MCSymbol *NextInstr = OutContext.createTempSymbol();
856 
857  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::BL)
858  // FIXME: We would like an efficient form for this, so we don't have to do
859  // a lot of extra uniquing.
860  .addExpr(MCSymbolRefExpr::create(NextInstr, OutContext)));
861  const MCExpr *OffsExpr =
862  MCBinaryExpr::createSub(MCSymbolRefExpr::create(GOTSymbol, OutContext),
863  MCSymbolRefExpr::create(GOTRef, OutContext),
864  OutContext);
865  OutStreamer->EmitLabel(GOTRef);
866  OutStreamer->EmitValue(OffsExpr, 4);
867  OutStreamer->EmitLabel(NextInstr);
868  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR)
869  .addReg(MI->getOperand(0).getReg()));
870  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LWZ)
871  .addReg(MI->getOperand(1).getReg())
872  .addImm(0)
873  .addReg(MI->getOperand(0).getReg()));
874  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD4)
875  .addReg(MI->getOperand(0).getReg())
876  .addReg(MI->getOperand(1).getReg())
877  .addReg(MI->getOperand(0).getReg()));
878  return;
879  }
880  case PPC::PPC32GOT: {
881  MCSymbol *GOTSymbol =
882  OutContext.getOrCreateSymbol(StringRef("_GLOBAL_OFFSET_TABLE_"));
883  const MCExpr *SymGotTlsL = MCSymbolRefExpr::create(
884  GOTSymbol, MCSymbolRefExpr::VK_PPC_LO, OutContext);
885  const MCExpr *SymGotTlsHA = MCSymbolRefExpr::create(
886  GOTSymbol, MCSymbolRefExpr::VK_PPC_HA, OutContext);
887  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LI)
888  .addReg(MI->getOperand(0).getReg())
889  .addExpr(SymGotTlsL));
890  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
891  .addReg(MI->getOperand(0).getReg())
892  .addReg(MI->getOperand(0).getReg())
893  .addExpr(SymGotTlsHA));
894  return;
895  }
896  case PPC::ADDIStlsgdHA: {
897  // Transform: %xd = ADDIStlsgdHA %x2, @sym
898  // Into: %xd = ADDIS8 %x2, sym@got@tlsgd@ha
899  assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
900  const MachineOperand &MO = MI->getOperand(2);
901  const GlobalValue *GValue = MO.getGlobal();
902  MCSymbol *MOSymbol = getSymbol(GValue);
903  const MCExpr *SymGotTlsGD =
905  OutContext);
906  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
907  .addReg(MI->getOperand(0).getReg())
908  .addReg(MI->getOperand(1).getReg())
909  .addExpr(SymGotTlsGD));
910  return;
911  }
912  case PPC::ADDItlsgdL:
913  // Transform: %xd = ADDItlsgdL %xs, @sym
914  // Into: %xd = ADDI8 %xs, sym@got@tlsgd@l
915  case PPC::ADDItlsgdL32: {
916  // Transform: %rd = ADDItlsgdL32 %rs, @sym
917  // Into: %rd = ADDI %rs, sym@got@tlsgd
918  const MachineOperand &MO = MI->getOperand(2);
919  const GlobalValue *GValue = MO.getGlobal();
920  MCSymbol *MOSymbol = getSymbol(GValue);
921  const MCExpr *SymGotTlsGD = MCSymbolRefExpr::create(
922  MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSGD_LO
924  OutContext);
925  EmitToStreamer(*OutStreamer,
926  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
927  .addReg(MI->getOperand(0).getReg())
928  .addReg(MI->getOperand(1).getReg())
929  .addExpr(SymGotTlsGD));
930  return;
931  }
932  case PPC::GETtlsADDR:
933  // Transform: %x3 = GETtlsADDR %x3, @sym
934  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsgd)
935  case PPC::GETtlsADDR32: {
936  // Transform: %r3 = GETtlsADDR32 %r3, @sym
937  // Into: BL_TLS __tls_get_addr(sym at tlsgd)@PLT
938  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSGD);
939  return;
940  }
941  case PPC::ADDIStlsldHA: {
942  // Transform: %xd = ADDIStlsldHA %x2, @sym
943  // Into: %xd = ADDIS8 %x2, sym@got@tlsld@ha
944  assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC");
945  const MachineOperand &MO = MI->getOperand(2);
946  const GlobalValue *GValue = MO.getGlobal();
947  MCSymbol *MOSymbol = getSymbol(GValue);
948  const MCExpr *SymGotTlsLD =
950  OutContext);
951  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS8)
952  .addReg(MI->getOperand(0).getReg())
953  .addReg(MI->getOperand(1).getReg())
954  .addExpr(SymGotTlsLD));
955  return;
956  }
957  case PPC::ADDItlsldL:
958  // Transform: %xd = ADDItlsldL %xs, @sym
959  // Into: %xd = ADDI8 %xs, sym@got@tlsld@l
960  case PPC::ADDItlsldL32: {
961  // Transform: %rd = ADDItlsldL32 %rs, @sym
962  // Into: %rd = ADDI %rs, sym@got@tlsld
963  const MachineOperand &MO = MI->getOperand(2);
964  const GlobalValue *GValue = MO.getGlobal();
965  MCSymbol *MOSymbol = getSymbol(GValue);
966  const MCExpr *SymGotTlsLD = MCSymbolRefExpr::create(
967  MOSymbol, Subtarget->isPPC64() ? MCSymbolRefExpr::VK_PPC_GOT_TLSLD_LO
969  OutContext);
970  EmitToStreamer(*OutStreamer,
971  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
972  .addReg(MI->getOperand(0).getReg())
973  .addReg(MI->getOperand(1).getReg())
974  .addExpr(SymGotTlsLD));
975  return;
976  }
977  case PPC::GETtlsldADDR:
978  // Transform: %x3 = GETtlsldADDR %x3, @sym
979  // Into: BL8_NOP_TLS __tls_get_addr(sym at tlsld)
980  case PPC::GETtlsldADDR32: {
981  // Transform: %r3 = GETtlsldADDR32 %r3, @sym
982  // Into: BL_TLS __tls_get_addr(sym at tlsld)@PLT
983  EmitTlsCall(MI, MCSymbolRefExpr::VK_PPC_TLSLD);
984  return;
985  }
986  case PPC::ADDISdtprelHA:
987  // Transform: %xd = ADDISdtprelHA %xs, @sym
988  // Into: %xd = ADDIS8 %xs, sym@dtprel@ha
989  case PPC::ADDISdtprelHA32: {
990  // Transform: %rd = ADDISdtprelHA32 %rs, @sym
991  // Into: %rd = ADDIS %rs, sym@dtprel@ha
992  const MachineOperand &MO = MI->getOperand(2);
993  const GlobalValue *GValue = MO.getGlobal();
994  MCSymbol *MOSymbol = getSymbol(GValue);
995  const MCExpr *SymDtprel =
997  OutContext);
998  EmitToStreamer(
999  *OutStreamer,
1000  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDIS8 : PPC::ADDIS)
1001  .addReg(MI->getOperand(0).getReg())
1002  .addReg(MI->getOperand(1).getReg())
1003  .addExpr(SymDtprel));
1004  return;
1005  }
1006  case PPC::ADDIdtprelL:
1007  // Transform: %xd = ADDIdtprelL %xs, @sym
1008  // Into: %xd = ADDI8 %xs, sym@dtprel@l
1009  case PPC::ADDIdtprelL32: {
1010  // Transform: %rd = ADDIdtprelL32 %rs, @sym
1011  // Into: %rd = ADDI %rs, sym@dtprel@l
1012  const MachineOperand &MO = MI->getOperand(2);
1013  const GlobalValue *GValue = MO.getGlobal();
1014  MCSymbol *MOSymbol = getSymbol(GValue);
1015  const MCExpr *SymDtprel =
1017  OutContext);
1018  EmitToStreamer(*OutStreamer,
1019  MCInstBuilder(Subtarget->isPPC64() ? PPC::ADDI8 : PPC::ADDI)
1020  .addReg(MI->getOperand(0).getReg())
1021  .addReg(MI->getOperand(1).getReg())
1022  .addExpr(SymDtprel));
1023  return;
1024  }
1025  case PPC::MFOCRF:
1026  case PPC::MFOCRF8:
1027  if (!Subtarget->hasMFOCRF()) {
1028  // Transform: %r3 = MFOCRF %cr7
1029  // Into: %r3 = MFCR ;; cr7
1030  unsigned NewOpcode =
1031  MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8;
1032  OutStreamer->AddComment(PPCInstPrinter::
1033  getRegisterName(MI->getOperand(1).getReg()));
1034  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1035  .addReg(MI->getOperand(0).getReg()));
1036  return;
1037  }
1038  break;
1039  case PPC::MTOCRF:
1040  case PPC::MTOCRF8:
1041  if (!Subtarget->hasMFOCRF()) {
1042  // Transform: %cr7 = MTOCRF %r3
1043  // Into: MTCRF mask, %r3 ;; cr7
1044  unsigned NewOpcode =
1045  MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8;
1046  unsigned Mask = 0x80 >> OutContext.getRegisterInfo()
1047  ->getEncodingValue(MI->getOperand(0).getReg());
1048  OutStreamer->AddComment(PPCInstPrinter::
1049  getRegisterName(MI->getOperand(0).getReg()));
1050  EmitToStreamer(*OutStreamer, MCInstBuilder(NewOpcode)
1051  .addImm(Mask)
1052  .addReg(MI->getOperand(1).getReg()));
1053  return;
1054  }
1055  break;
1056  case PPC::LD:
1057  case PPC::STD:
1058  case PPC::LWA_32:
1059  case PPC::LWA: {
1060  // Verify alignment is legal, so we don't create relocations
1061  // that can't be supported.
1062  // FIXME: This test is currently disabled for Darwin. The test
1063  // suite shows a handful of test cases that fail this check for
1064  // Darwin. Those need to be investigated before this sanity test
1065  // can be enabled for those subtargets.
1066  if (!Subtarget->isDarwin()) {
1067  unsigned OpNum = (MI->getOpcode() == PPC::STD) ? 2 : 1;
1068  const MachineOperand &MO = MI->getOperand(OpNum);
1069  if (MO.isGlobal() && MO.getGlobal()->getAlignment() < 4)
1070  llvm_unreachable("Global must be word-aligned for LD, STD, LWA!");
1071  }
1072  // Now process the instruction normally.
1073  break;
1074  }
1075  }
1076 
1077  LowerPPCMachineInstrToMCInst(MI, TmpInst, *this, isDarwin);
1078  EmitToStreamer(*OutStreamer, TmpInst);
1079 }
1080 
1081 void PPCLinuxAsmPrinter::EmitInstruction(const MachineInstr *MI) {
1082  if (!Subtarget->isPPC64())
1083  return PPCAsmPrinter::EmitInstruction(MI);
1084 
1085  switch (MI->getOpcode()) {
1086  default:
1087  return PPCAsmPrinter::EmitInstruction(MI);
1088  case TargetOpcode::PATCHABLE_FUNCTION_ENTER: {
1089  // .begin:
1090  // b .end # lis 0, FuncId[16..32]
1091  // nop # li 0, FuncId[0..15]
1092  // std 0, -8(1)
1093  // mflr 0
1094  // bl __xray_FunctionEntry
1095  // mtlr 0
1096  // .end:
1097  //
1098  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1099  // of instructions change.
1100  MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1101  MCSymbol *EndOfSled = OutContext.createTempSymbol();
1102  OutStreamer->EmitLabel(BeginOfSled);
1103  EmitToStreamer(*OutStreamer,
1104  MCInstBuilder(PPC::B).addExpr(
1105  MCSymbolRefExpr::create(EndOfSled, OutContext)));
1106  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1107  EmitToStreamer(
1108  *OutStreamer,
1109  MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1110  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1111  EmitToStreamer(*OutStreamer,
1112  MCInstBuilder(PPC::BL8_NOP)
1113  .addExpr(MCSymbolRefExpr::create(
1114  OutContext.getOrCreateSymbol("__xray_FunctionEntry"),
1115  OutContext)));
1116  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1117  OutStreamer->EmitLabel(EndOfSled);
1118  recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER);
1119  break;
1120  }
1121  case TargetOpcode::PATCHABLE_RET: {
1122  unsigned RetOpcode = MI->getOperand(0).getImm();
1123  MCInst RetInst;
1124  RetInst.setOpcode(RetOpcode);
1125  for (const auto &MO :
1126  make_range(std::next(MI->operands_begin()), MI->operands_end())) {
1127  MCOperand MCOp;
1128  if (LowerPPCMachineOperandToMCOperand(MO, MCOp, *this, false))
1129  RetInst.addOperand(MCOp);
1130  }
1131 
1132  bool IsConditional;
1133  if (RetOpcode == PPC::BCCLR) {
1134  IsConditional = true;
1135  } else if (RetOpcode == PPC::TCRETURNdi8 || RetOpcode == PPC::TCRETURNri8 ||
1136  RetOpcode == PPC::TCRETURNai8) {
1137  break;
1138  } else if (RetOpcode == PPC::BLR8 || RetOpcode == PPC::TAILB8) {
1139  IsConditional = false;
1140  } else {
1141  EmitToStreamer(*OutStreamer, RetInst);
1142  break;
1143  }
1144 
1145  MCSymbol *FallthroughLabel;
1146  if (IsConditional) {
1147  // Before:
1148  // bgtlr cr0
1149  //
1150  // After:
1151  // ble cr0, .end
1152  // .p2align 3
1153  // .begin:
1154  // blr # lis 0, FuncId[16..32]
1155  // nop # li 0, FuncId[0..15]
1156  // std 0, -8(1)
1157  // mflr 0
1158  // bl __xray_FunctionExit
1159  // mtlr 0
1160  // blr
1161  // .end:
1162  //
1163  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1164  // of instructions change.
1165  FallthroughLabel = OutContext.createTempSymbol();
1166  EmitToStreamer(
1167  *OutStreamer,
1168  MCInstBuilder(PPC::BCC)
1169  .addImm(PPC::InvertPredicate(
1170  static_cast<PPC::Predicate>(MI->getOperand(1).getImm())))
1171  .addReg(MI->getOperand(2).getReg())
1172  .addExpr(MCSymbolRefExpr::create(FallthroughLabel, OutContext)));
1173  RetInst = MCInst();
1174  RetInst.setOpcode(PPC::BLR8);
1175  }
1176  // .p2align 3
1177  // .begin:
1178  // b(lr)? # lis 0, FuncId[16..32]
1179  // nop # li 0, FuncId[0..15]
1180  // std 0, -8(1)
1181  // mflr 0
1182  // bl __xray_FunctionExit
1183  // mtlr 0
1184  // b(lr)?
1185  //
1186  // Update compiler-rt/lib/xray/xray_powerpc64.cc accordingly when number
1187  // of instructions change.
1188  OutStreamer->EmitCodeAlignment(8);
1189  MCSymbol *BeginOfSled = OutContext.createTempSymbol();
1190  OutStreamer->EmitLabel(BeginOfSled);
1191  EmitToStreamer(*OutStreamer, RetInst);
1192  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::NOP));
1193  EmitToStreamer(
1194  *OutStreamer,
1195  MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1));
1196  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MFLR8).addReg(PPC::X0));
1197  EmitToStreamer(*OutStreamer,
1198  MCInstBuilder(PPC::BL8_NOP)
1199  .addExpr(MCSymbolRefExpr::create(
1200  OutContext.getOrCreateSymbol("__xray_FunctionExit"),
1201  OutContext)));
1202  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
1203  EmitToStreamer(*OutStreamer, RetInst);
1204  if (IsConditional)
1205  OutStreamer->EmitLabel(FallthroughLabel);
1206  recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT);
1207  break;
1208  }
1209  case TargetOpcode::PATCHABLE_FUNCTION_EXIT:
1210  llvm_unreachable("PATCHABLE_FUNCTION_EXIT should never be emitted");
1211  case TargetOpcode::PATCHABLE_TAIL_CALL:
1212  // TODO: Define a trampoline `__xray_FunctionTailExit` and differentiate a
1213  // normal function exit from a tail exit.
1214  llvm_unreachable("Tail call is handled in the normal case. See comments "
1215  "around this assert.");
1216  }
1217 }
1218 
1219 void PPCLinuxAsmPrinter::EmitStartOfAsmFile(Module &M) {
1220  if (static_cast<const PPCTargetMachine &>(TM).isELFv2ABI()) {
1221  PPCTargetStreamer *TS =
1222  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1223 
1224  if (TS)
1225  TS->emitAbiVersion(2);
1226  }
1227 
1228  if (static_cast<const PPCTargetMachine &>(TM).isPPC64() ||
1229  !isPositionIndependent())
1231 
1232  if (M.getPICLevel() == PICLevel::SmallPIC)
1234 
1235  OutStreamer->SwitchSection(OutContext.getELFSection(
1237 
1238  MCSymbol *TOCSym = OutContext.getOrCreateSymbol(Twine(".LTOC"));
1239  MCSymbol *CurrentPos = OutContext.createTempSymbol();
1240 
1241  OutStreamer->EmitLabel(CurrentPos);
1242 
1243  // The GOT pointer points to the middle of the GOT, in order to reference the
1244  // entire 64kB range. 0x8000 is the midpoint.
1245  const MCExpr *tocExpr =
1246  MCBinaryExpr::createAdd(MCSymbolRefExpr::create(CurrentPos, OutContext),
1247  MCConstantExpr::create(0x8000, OutContext),
1248  OutContext);
1249 
1250  OutStreamer->EmitAssignment(TOCSym, tocExpr);
1251 
1252  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1253 }
1254 
1255 void PPCLinuxAsmPrinter::EmitFunctionEntryLabel() {
1256  // linux/ppc32 - Normal entry label.
1257  if (!Subtarget->isPPC64() &&
1258  (!isPositionIndependent() ||
1259  MF->getFunction().getParent()->getPICLevel() == PICLevel::SmallPIC))
1261 
1262  if (!Subtarget->isPPC64()) {
1263  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1264  if (PPCFI->usesPICBase() && !Subtarget->isSecurePlt()) {
1265  MCSymbol *RelocSymbol = PPCFI->getPICOffsetSymbol();
1266  MCSymbol *PICBase = MF->getPICBaseSymbol();
1267  OutStreamer->EmitLabel(RelocSymbol);
1268 
1269  const MCExpr *OffsExpr =
1271  MCSymbolRefExpr::create(OutContext.getOrCreateSymbol(Twine(".LTOC")),
1272  OutContext),
1273  MCSymbolRefExpr::create(PICBase, OutContext),
1274  OutContext);
1275  OutStreamer->EmitValue(OffsExpr, 4);
1276  OutStreamer->EmitLabel(CurrentFnSym);
1277  return;
1278  } else
1280  }
1281 
1282  // ELFv2 ABI - Normal entry label.
1283  if (Subtarget->isELFv2ABI()) {
1284  // In the Large code model, we allow arbitrary displacements between
1285  // the text section and its associated TOC section. We place the
1286  // full 8-byte offset to the TOC in memory immediately preceding
1287  // the function global entry point.
1288  if (TM.getCodeModel() == CodeModel::Large
1289  && !MF->getRegInfo().use_empty(PPC::X2)) {
1290  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1291 
1292  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1293  MCSymbol *GlobalEPSymbol = PPCFI->getGlobalEPSymbol();
1294  const MCExpr *TOCDeltaExpr =
1295  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1296  MCSymbolRefExpr::create(GlobalEPSymbol,
1297  OutContext),
1298  OutContext);
1299 
1300  OutStreamer->EmitLabel(PPCFI->getTOCOffsetSymbol());
1301  OutStreamer->EmitValue(TOCDeltaExpr, 8);
1302  }
1304  }
1305 
1306  // Emit an official procedure descriptor.
1307  MCSectionSubPair Current = OutStreamer->getCurrentSection();
1308  MCSectionELF *Section = OutStreamer->getContext().getELFSection(
1310  OutStreamer->SwitchSection(Section);
1311  OutStreamer->EmitLabel(CurrentFnSym);
1312  OutStreamer->EmitValueToAlignment(8);
1313  MCSymbol *Symbol1 = CurrentFnSymForSize;
1314  // Generates a R_PPC64_ADDR64 (from FK_DATA_8) relocation for the function
1315  // entry point.
1316  OutStreamer->EmitValue(MCSymbolRefExpr::create(Symbol1, OutContext),
1317  8 /*size*/);
1318  MCSymbol *Symbol2 = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1319  // Generates a R_PPC64_TOC relocation for TOC base insertion.
1320  OutStreamer->EmitValue(
1322  8/*size*/);
1323  // Emit a null environment pointer.
1324  OutStreamer->EmitIntValue(0, 8 /* size */);
1325  OutStreamer->SwitchSection(Current.first, Current.second);
1326 }
1327 
1328 bool PPCLinuxAsmPrinter::doFinalization(Module &M) {
1329  const DataLayout &DL = getDataLayout();
1330 
1331  bool isPPC64 = DL.getPointerSizeInBits() == 64;
1332 
1333  PPCTargetStreamer &TS =
1334  static_cast<PPCTargetStreamer &>(*OutStreamer->getTargetStreamer());
1335 
1336  if (!TOC.empty()) {
1338 
1339  if (isPPC64)
1340  Section = OutStreamer->getContext().getELFSection(
1342  else
1343  Section = OutStreamer->getContext().getELFSection(
1345  OutStreamer->SwitchSection(Section);
1346 
1347  for (MapVector<MCSymbol*, MCSymbol*>::iterator I = TOC.begin(),
1348  E = TOC.end(); I != E; ++I) {
1349  OutStreamer->EmitLabel(I->second);
1350  MCSymbol *S = I->first;
1351  if (isPPC64) {
1352  TS.emitTCEntry(*S);
1353  } else {
1354  OutStreamer->EmitValueToAlignment(4);
1355  OutStreamer->EmitSymbolValue(S, 4);
1356  }
1357  }
1358  }
1359 
1360  return AsmPrinter::doFinalization(M);
1361 }
1362 
1363 /// EmitFunctionBodyStart - Emit a global entry point prefix for ELFv2.
1364 void PPCLinuxAsmPrinter::EmitFunctionBodyStart() {
1365  // In the ELFv2 ABI, in functions that use the TOC register, we need to
1366  // provide two entry points. The ABI guarantees that when calling the
1367  // local entry point, r2 is set up by the caller to contain the TOC base
1368  // for this function, and when calling the global entry point, r12 is set
1369  // up by the caller to hold the address of the global entry point. We
1370  // thus emit a prefix sequence along the following lines:
1371  //
1372  // func:
1373  // .Lfunc_gepNN:
1374  // # global entry point
1375  // addis r2,r12,(.TOC.-.Lfunc_gepNN)@ha
1376  // addi r2,r2,(.TOC.-.Lfunc_gepNN)@l
1377  // .Lfunc_lepNN:
1378  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1379  // # local entry point, followed by function body
1380  //
1381  // For the Large code model, we create
1382  //
1383  // .Lfunc_tocNN:
1384  // .quad .TOC.-.Lfunc_gepNN # done by EmitFunctionEntryLabel
1385  // func:
1386  // .Lfunc_gepNN:
1387  // # global entry point
1388  // ld r2,.Lfunc_tocNN-.Lfunc_gepNN(r12)
1389  // add r2,r2,r12
1390  // .Lfunc_lepNN:
1391  // .localentry func, .Lfunc_lepNN-.Lfunc_gepNN
1392  // # local entry point, followed by function body
1393  //
1394  // This ensures we have r2 set up correctly while executing the function
1395  // body, no matter which entry point is called.
1396  if (Subtarget->isELFv2ABI()
1397  // Only do all that if the function uses r2 in the first place.
1398  && !MF->getRegInfo().use_empty(PPC::X2)) {
1399  // Note: The logic here must be synchronized with the code in the
1400  // branch-selection pass which sets the offset of the first block in the
1401  // function. This matters because it affects the alignment.
1402  const PPCFunctionInfo *PPCFI = MF->getInfo<PPCFunctionInfo>();
1403 
1404  MCSymbol *GlobalEntryLabel = PPCFI->getGlobalEPSymbol();
1405  OutStreamer->EmitLabel(GlobalEntryLabel);
1406  const MCSymbolRefExpr *GlobalEntryLabelExp =
1407  MCSymbolRefExpr::create(GlobalEntryLabel, OutContext);
1408 
1409  if (TM.getCodeModel() != CodeModel::Large) {
1410  MCSymbol *TOCSymbol = OutContext.getOrCreateSymbol(StringRef(".TOC."));
1411  const MCExpr *TOCDeltaExpr =
1412  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCSymbol, OutContext),
1413  GlobalEntryLabelExp, OutContext);
1414 
1415  const MCExpr *TOCDeltaHi =
1416  PPCMCExpr::createHa(TOCDeltaExpr, false, OutContext);
1417  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDIS)
1418  .addReg(PPC::X2)
1419  .addReg(PPC::X12)
1420  .addExpr(TOCDeltaHi));
1421 
1422  const MCExpr *TOCDeltaLo =
1423  PPCMCExpr::createLo(TOCDeltaExpr, false, OutContext);
1424  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADDI)
1425  .addReg(PPC::X2)
1426  .addReg(PPC::X2)
1427  .addExpr(TOCDeltaLo));
1428  } else {
1429  MCSymbol *TOCOffset = PPCFI->getTOCOffsetSymbol();
1430  const MCExpr *TOCOffsetDeltaExpr =
1431  MCBinaryExpr::createSub(MCSymbolRefExpr::create(TOCOffset, OutContext),
1432  GlobalEntryLabelExp, OutContext);
1433 
1434  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::LD)
1435  .addReg(PPC::X2)
1436  .addExpr(TOCOffsetDeltaExpr)
1437  .addReg(PPC::X12));
1438  EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::ADD8)
1439  .addReg(PPC::X2)
1440  .addReg(PPC::X2)
1441  .addReg(PPC::X12));
1442  }
1443 
1444  MCSymbol *LocalEntryLabel = PPCFI->getLocalEPSymbol();
1445  OutStreamer->EmitLabel(LocalEntryLabel);
1446  const MCSymbolRefExpr *LocalEntryLabelExp =
1447  MCSymbolRefExpr::create(LocalEntryLabel, OutContext);
1448  const MCExpr *LocalOffsetExp =
1449  MCBinaryExpr::createSub(LocalEntryLabelExp,
1450  GlobalEntryLabelExp, OutContext);
1451 
1452  PPCTargetStreamer *TS =
1453  static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1454 
1455  if (TS)
1456  TS->emitLocalEntry(cast<MCSymbolELF>(CurrentFnSym), LocalOffsetExp);
1457  }
1458 }
1459 
1460 /// EmitFunctionBodyEnd - Print the traceback table before the .size
1461 /// directive.
1462 ///
1463 void PPCLinuxAsmPrinter::EmitFunctionBodyEnd() {
1464  // Only the 64-bit target requires a traceback table. For now,
1465  // we only emit the word of zeroes that GDB requires to find
1466  // the end of the function, and zeroes for the eight-byte
1467  // mandatory fields.
1468  // FIXME: We should fill in the eight-byte mandatory fields as described in
1469  // the PPC64 ELF ABI (this is a low-priority item because GDB does not
1470  // currently make use of these fields).
1471  if (Subtarget->isPPC64()) {
1472  OutStreamer->EmitIntValue(0, 4/*size*/);
1473  OutStreamer->EmitIntValue(0, 8/*size*/);
1474  }
1475 }
1476 
1477 void PPCDarwinAsmPrinter::EmitStartOfAsmFile(Module &M) {
1478  static const char *const CPUDirectives[] = {
1479  "",
1480  "ppc",
1481  "ppc440",
1482  "ppc601",
1483  "ppc602",
1484  "ppc603",
1485  "ppc7400",
1486  "ppc750",
1487  "ppc970",
1488  "ppcA2",
1489  "ppce500mc",
1490  "ppce5500",
1491  "power3",
1492  "power4",
1493  "power5",
1494  "power5x",
1495  "power6",
1496  "power6x",
1497  "power7",
1498  // FIXME: why is power8 missing here?
1499  "ppc64",
1500  "ppc64le",
1501  "power9"
1502  };
1503 
1504  // Get the numerically largest directive.
1505  // FIXME: How should we merge darwin directives?
1506  unsigned Directive = PPC::DIR_NONE;
1507  for (const Function &F : M) {
1508  const PPCSubtarget &STI = TM.getSubtarget<PPCSubtarget>(F);
1509  unsigned FDir = STI.getDarwinDirective();
1510  Directive = Directive > FDir ? FDir : STI.getDarwinDirective();
1511  if (STI.hasMFOCRF() && Directive < PPC::DIR_970)
1512  Directive = PPC::DIR_970;
1513  if (STI.hasAltivec() && Directive < PPC::DIR_7400)
1514  Directive = PPC::DIR_7400;
1515  if (STI.isPPC64() && Directive < PPC::DIR_64)
1516  Directive = PPC::DIR_64;
1517  }
1518 
1519  assert(Directive <= PPC::DIR_64 && "Directive out of range.");
1520 
1521  assert(Directive < array_lengthof(CPUDirectives) &&
1522  "CPUDirectives[] might not be up-to-date!");
1523  PPCTargetStreamer &TStreamer =
1524  *static_cast<PPCTargetStreamer *>(OutStreamer->getTargetStreamer());
1525  TStreamer.emitMachine(CPUDirectives[Directive]);
1526 
1527  // Prime text sections so they are adjacent. This reduces the likelihood a
1528  // large data or debug section causes a branch to exceed 16M limit.
1529  const TargetLoweringObjectFileMachO &TLOFMacho =
1530  static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1531  OutStreamer->SwitchSection(TLOFMacho.getTextCoalSection());
1532  if (TM.getRelocationModel() == Reloc::PIC_) {
1533  OutStreamer->SwitchSection(
1534  OutContext.getMachOSection("__TEXT", "__picsymbolstub1",
1537  32, SectionKind::getText()));
1538  } else if (TM.getRelocationModel() == Reloc::DynamicNoPIC) {
1539  OutStreamer->SwitchSection(
1540  OutContext.getMachOSection("__TEXT","__symbol_stub1",
1543  16, SectionKind::getText()));
1544  }
1545  OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
1546 }
1547 
1548 bool PPCDarwinAsmPrinter::doFinalization(Module &M) {
1549  bool isPPC64 = getDataLayout().getPointerSizeInBits() == 64;
1550 
1551  // Darwin/PPC always uses mach-o.
1552  const TargetLoweringObjectFileMachO &TLOFMacho =
1553  static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1554  if (MMI) {
1555  MachineModuleInfoMachO &MMIMacho =
1556  MMI->getObjFileInfo<MachineModuleInfoMachO>();
1557 
1558  if (MAI->doesSupportExceptionHandling()) {
1559  // Add the (possibly multiple) personalities to the set of global values.
1560  // Only referenced functions get into the Personalities list.
1561  for (const Function *Personality : MMI->getPersonalities()) {
1562  if (Personality) {
1563  MCSymbol *NLPSym =
1564  getSymbolWithGlobalValueBase(Personality, "$non_lazy_ptr");
1566  MMIMacho.getGVStubEntry(NLPSym);
1567  StubSym =
1568  MachineModuleInfoImpl::StubValueTy(getSymbol(Personality), true);
1569  }
1570  }
1571  }
1572 
1573  // Output stubs for dynamically-linked functions.
1575 
1576  // Output macho stubs for external and common global variables.
1577  if (!Stubs.empty()) {
1578  // Switch with ".non_lazy_symbol_pointer" directive.
1579  OutStreamer->SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1580  EmitAlignment(isPPC64 ? 3 : 2);
1581 
1582  for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1583  // L_foo$stub:
1584  OutStreamer->EmitLabel(Stubs[i].first);
1585  // .indirect_symbol _foo
1586  MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1587  OutStreamer->EmitSymbolAttribute(MCSym.getPointer(),
1589 
1590  if (MCSym.getInt())
1591  // External to current translation unit.
1592  OutStreamer->EmitIntValue(0, isPPC64 ? 8 : 4 /*size*/);
1593  else
1594  // Internal to current translation unit.
1595  //
1596  // When we place the LSDA into the TEXT section, the type info
1597  // pointers
1598  // need to be indirect and pc-rel. We accomplish this by using NLPs.
1599  // However, sometimes the types are local to the file. So we need to
1600  // fill in the value for the NLP in those cases.
1601  OutStreamer->EmitValue(
1602  MCSymbolRefExpr::create(MCSym.getPointer(), OutContext),
1603  isPPC64 ? 8 : 4 /*size*/);
1604  }
1605 
1606  Stubs.clear();
1607  OutStreamer->AddBlankLine();
1608  }
1609  }
1610 
1611  // Funny Darwin hack: This flag tells the linker that no global symbols
1612  // contain code that falls through to other global symbols (e.g. the obvious
1613  // implementation of multiple entry points). If this doesn't occur, the
1614  // linker can safely perform dead code stripping. Since LLVM never generates
1615  // code that does this, it is always safe to set.
1616  OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
1617 
1618  return AsmPrinter::doFinalization(M);
1619 }
1620 
1621 /// createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code
1622 /// for a MachineFunction to the given output stream, in a format that the
1623 /// Darwin assembler can deal with.
1624 ///
1625 static AsmPrinter *
1627  std::unique_ptr<MCStreamer> &&Streamer) {
1628  if (tm.getTargetTriple().isMacOSX())
1629  return new PPCDarwinAsmPrinter(tm, std::move(Streamer));
1630  return new PPCLinuxAsmPrinter(tm, std::move(Streamer));
1631 }
1632 
1633 // Force static initialization.
1641 }
virtual void EmitStartOfAsmFile(Module &)
This virtual method can be overridden by targets that want to emit something at the start of their fi...
Definition: AsmPrinter.h:373
A parsed version of the target data layout string in and methods for querying it. ...
Definition: DataLayout.h:111
SymbolListTy GetGVStubList()
Accessor methods to return the set of stubs in sorted order.
mop_iterator operands_end()
Definition: MachineInstr.h:356
MCSymbol * getGlobalEPSymbol() const
S_SYMBOL_STUBS - Section with symbol stubs, byte size of stub in the Reserved2 field.
Definition: MachO.h:137
void clear()
Definition: MapVector.h:89
unsigned getNextScratchIdx(unsigned StartIdx=0) const
Get the next scratch register operand index.
Definition: StackMaps.cpp:70
MachineBasicBlock * getMBB() const
static const MCSymbolRefExpr * create(const MCSymbol *Symbol, MCContext &Ctx)
Definition: MCExpr.h:321
Compute iterated dominance frontiers using a linear time algorithm.
Definition: AllocatorList.h:24
PointerTy getPointer() const
bool isMacOSX() const
isMacOSX - Is this a Mac OS X triple.
Definition: Triple.h:442
StringRef getPrivateGlobalPrefix() const
Definition: DataLayout.h:294
MCSymbol - Instances of this class represent a symbol name in the MC file, and MCSymbols are created ...
Definition: MCSymbol.h:42
A Module instance is used to store all the information related to an LLVM module. ...
Definition: Module.h:63
bool isPPC64() const
isPPC64 - Return true if we are generating code for 64-bit pointer mode.
bool doFinalization(Module &M) override
Shut down the asmprinter.
static MCOperand createExpr(const MCExpr *Val)
Definition: MCInst.h:137
unsigned getReg() const
getReg - Returns the register number.
unsigned Reg
Target & getThePPC32Target()
PointerIntPair< MCSymbol *, 1, bool > StubValueTy
This class implements a map that also provides access to all stored values in a deterministic order...
Definition: MapVector.h:38
MachineBasicBlock reference.
unsigned getPointerSizeInBits(unsigned AS=0) const
Layout pointer size, in bits FIXME: The defaults need to be removed once all of the backends/clients ...
Definition: DataLayout.h:360
F(f)
bool isCPI() const
isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isImm() const
isImm - Tests if this is a MO_Immediate operand.
static bool isVRRegister(unsigned Reg)
Definition: PPCInstrInfo.h:346
PPCFunctionInfo - This class is derived from MachineFunction private PowerPC target-specific informat...
Twine - A lightweight data structure for efficiently representing the concatenation of temporary valu...
Definition: Twine.h:81
unsigned getNumOperands() const
Access to explicit operands of the instruction.
Definition: MachineInstr.h:314
Base class for the full range of assembler expressions which are needed for parsing.
Definition: MCExpr.h:36
bool hasMFOCRF() const
Definition: PPCSubtarget.h:249
Represent a reference to a symbol from inside an expression.
Definition: MCExpr.h:166
bool empty() const
Definition: MapVector.h:80
unsigned getOpcode() const
Returns the opcode of this MachineInstr.
Definition: MachineInstr.h:311
unsigned getReg() const
Returns the register number.
Definition: MCInst.h:65
static std::string getRegisterName(const TargetRegisterInfo *TRI, unsigned Reg)
Definition: MIParser.cpp:891
MCSymbol * getTOCOffsetSymbol() const
const MCInstrDesc & getDesc() const
Returns the target instruction descriptor of this MachineInstr.
Definition: MachineInstr.h:308
bool runOnMachineFunction(MachineFunction &MF) override
Emit the specified function out to the OutStreamer.
Definition: AsmPrinter.h:288
static const MCBinaryExpr * createSub(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:544
IntType getInt() const
R32 = MFOCRF(CRREG, INFLAG) - Represents the MFOCRF instruction.
virtual void emitLocalEntry(MCSymbolELF *S, const MCExpr *LocalOffset)=0
unsigned getAlignment() const
Definition: Globals.cpp:97
static const MCBinaryExpr * createAdd(const MCExpr *LHS, const MCExpr *RHS, MCContext &Ctx)
Definition: MCExpr.h:459
Target & getThePPC64Target()
Expected< const typename ELFT::Sym * > getSymbol(typename ELFT::SymRange Symbols, uint32_t Index)
Definition: ELF.h:330
MCInstBuilder & addExpr(const MCExpr *Val)
Add a new MCExpr operand.
Definition: MCInstBuilder.h:50
Instances of this class represent a single low-level machine instruction.
Definition: MCInst.h:161
Address of a global value.
MCInstBuilder & addReg(unsigned Reg)
Add a new register operand.
Definition: MCInstBuilder.h:32
static GCRegistry::Add< OcamlGC > B("ocaml", "ocaml 3.10-compatible GC")
PointerIntPair - This class implements a pair of a pointer and small integer.
const TargetSubtargetInfo & getSubtarget() const
getSubtarget - Return the subtarget for which this machine code is being compiled.
static GCRegistry::Add< CoreCLRGC > E("coreclr", "CoreCLR-compatible GC")
MO_NLP_FLAG - If this bit is set, the symbol reference is actually to the non_lazy_ptr for the global...
Definition: PPC.h:87
void LLVMInitializePowerPCAsmPrinter()
const GlobalValue * getGlobal() const
virtual void emitAbiVersion(int AbiVersion)=0
virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS)
Print the specified operand of MI, an INLINEASM instruction, using the specified assembler variant...
S_ATTR_PURE_INSTRUCTIONS - Section contains only true machine instructions.
Definition: MachO.h:182
MCSection * getNonLazySymbolPointerSection() const
This class is intended to be used as a driving class for all asm writers.
Definition: AsmPrinter.h:78
static const char * getRegisterName(unsigned RegNo)
bool hasInternalLinkage() const
Definition: GlobalValue.h:433
Address of a basic block.
.subsections_via_symbols (MachO)
Definition: MCDirectives.h:50
const Triple & getTargetTriple() const
static void print(raw_ostream &Out, object::Archive::Kind Kind, T Val)
MI-level patchpoint operands.
Definition: StackMaps.h:77
static const PPCMCExpr * createLo(const MCExpr *Expr, bool isDarwin, MCContext &Ctx)
Definition: PPCMCExpr.h:51
The VSX instruction that uses VSX register (vs0-vs63), instead of VMX register (v0-v31).
Definition: PPCInstrInfo.h:71
StubValueTy & getGVStubEntry(MCSymbol *Sym)
unsigned getDarwinDirective() const
getDarwinDirective - Returns the -m directive specified for the cpu.
Definition: PPCSubtarget.h:169
#define llvm_unreachable(msg)
Marks that the current location is not supposed to be reachable.
void recordPatchPoint(const MachineInstr &MI)
Generate a stackmap record for a patchpoint instruction.
Definition: StackMaps.cpp:374
static AsmPrinter * createPPCAsmPrinterPass(TargetMachine &tm, std::unique_ptr< MCStreamer > &&Streamer)
createPPCAsmPrinterPass - Returns a pass that prints the PPC assembly code for a MachineFunction to t...
unsigned first
iterator_range< T > make_range(T x, T y)
Convenience function for iterating over sub-ranges.
void setOpcode(unsigned Op)
Definition: MCInst.h:173
bool isJTI() const
isJTI - Tests if this is a MO_JumpTableIndex operand.
std::pair< MCSection *, const MCExpr * > MCSectionSubPair
Definition: MCStreamer.h:56
bool isGlobal() const
isGlobal - Tests if this is a MO_GlobalAddress operand.
MachineOperand class - Representation of each machine instruction operand.
Module.h This file contains the declarations for the Module class.
const MCOperand & getOperand(unsigned i) const
Definition: MCInst.h:182
.indirect_symbol (MachO)
Definition: MCDirectives.h:32
constexpr size_t array_lengthof(T(&)[N])
Find the length of an array.
Definition: STLExtras.h:787
typename VectorType::iterator iterator
Definition: MapVector.h:50
static bool isVFRegister(unsigned Reg)
Definition: PPCInstrInfo.h:343
int64_t getImm() const
bool isBlockAddress() const
isBlockAddress - Tests if this is a MO_BlockAddress operand.
Function * getFunction(StringRef Name) const
Look up the specified function in the module symbol table.
Definition: Module.cpp:172
MCSymbol * getPICOffsetSymbol() const
Target & getThePPC64LETarget()
void recordStackMap(const MachineInstr &MI)
Generate a stackmap record for a stackmap instruction.
Definition: StackMaps.cpp:365
static unsigned getReg(const void *D, unsigned RC, unsigned RegNo)
bool LowerPPCMachineOperandToMCOperand(const MachineOperand &MO, MCOperand &OutMO, AsmPrinter &AP, bool isDarwin)
const MachineBasicBlock * getParent() const
Definition: MachineInstr.h:156
Representation of each machine instruction.
Definition: MachineInstr.h:60
static bool printOperand(raw_ostream &OS, const SelectionDAG *G, const SDValue Value)
Predicate InvertPredicate(Predicate Opcode)
Invert the specified predicate. != -> ==, < -> >=.
bool doInitialization(Module &M) override
Set up the AsmPrinter when we are working on a new module.
Definition: AsmPrinter.cpp:244
int64_t getOffset() const
Return the offset from the symbol in this operand.
const BlockAddress * getBlockAddress() const
MCSymbol * getSymbol() const
Return the MCSymbol for this basic block.
#define I(x, y, z)
Definition: MD5.cpp:58
bool hasAltivec() const
Definition: PPCSubtarget.h:240
This represents a section on linux, lots of unix variants and some bare metal systems.
Definition: MCSectionELF.h:28
uint32_t getNumPatchBytes() const
Return the number of patchable bytes the given patchpoint should emit.
Definition: StackMaps.h:105
virtual void EmitFunctionEntryLabel()
EmitFunctionEntryLabel - Emit the label that is the entrypoint for the function.
Definition: AsmPrinter.cpp:722
MachineModuleInfoMachO - This is a MachineModuleInfoImpl implementation for MachO targets...
bool isReg() const
isReg - Tests if this is a MO_Register operand.
std::vector< std::pair< MCSymbol *, StubValueTy > > SymbolListTy
const unsigned Kind
MCSymbol * getLocalEPSymbol() const
assert(ImpDefSCC.getReg()==AMDGPU::SCC &&ImpDefSCC.isDef())
Module * getParent()
Get the module that this global value is contained inside of...
Definition: GlobalValue.h:565
virtual void emitTCEntry(const MCSymbol &S)=0
mop_iterator operands_begin()
Definition: MachineInstr.h:355
std::underlying_type< E >::type Mask()
Get a bitmask with 1s in all places up to the high-order bit of E&#39;s largest value.
Definition: BitmaskEnum.h:81
static const PPCMCExpr * createHa(const MCExpr *Expr, bool isDarwin, MCContext &Ctx)
Definition: PPCMCExpr.h:61
This class implements an extremely fast bulk output stream that can only output to a stream...
Definition: raw_ostream.h:46
Primary interface to the complete machine description for the target machine.
Definition: TargetMachine.h:59
void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, AsmPrinter &AP, bool isDarwin)
PICLevel::Level getPICLevel() const
Returns the PIC level (small or large model)
Definition: Module.cpp:480
static void RegisterAsmPrinter(Target &T, Target::AsmPrinterCtorTy Fn)
RegisterAsmPrinter - Register an AsmPrinter implementation for the given target.
IRTranslator LLVM IR MI
const MachineOperand & getCallTarget() const
Returns the target of the underlying call.
Definition: StackMaps.h:110
void addOperand(const MCOperand &Op)
Definition: MCInst.h:186
StringRef - Represent a constant reference to a string, i.e.
Definition: StringRef.h:49
Address of indexed Constant in Constant Pool.
virtual void emitMachine(StringRef CPU)=0
#define LLVM_DEBUG(X)
Definition: Debug.h:119
const MachineOperand & getOperand(unsigned i) const
Definition: MachineInstr.h:316
Instances of this class represent operands of the MCInst class.
Definition: MCInst.h:35
MachineOperandType getType() const
getType - Returns the MachineOperandType for this operand.
static const MCConstantExpr * create(int64_t Value, MCContext &Ctx)
Definition: MCExpr.cpp:164
MCSection * getTextCoalSection() const
static const char * stripRegisterPrefix(const char *RegName)
stripRegisterPrefix - This method strips the character prefix from a register name so that only the n...
void print(raw_ostream &OS, const MCAsmInfo *MAI) const
print - Print the value to the stream OS.
Definition: MCSymbol.cpp:60
static SectionKind getText()
Definition: SectionKind.h:180